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author | Alan Mishchenko <alanmi@berkeley.edu> | 2009-02-15 08:01:00 -0800 |
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committer | Alan Mishchenko <alanmi@berkeley.edu> | 2009-02-15 08:01:00 -0800 |
commit | 0871bffae307e0553e0c5186336189e8b55cf6a6 (patch) | |
tree | 4571d1563fe33a53a57fea1c35fb668b9d33265f /src/map/fpga/fpgaCreate.c | |
parent | f936cc0680c98ffe51b3a1716c996072d5dbf76c (diff) | |
download | abc-0871bffae307e0553e0c5186336189e8b55cf6a6.tar.gz abc-0871bffae307e0553e0c5186336189e8b55cf6a6.tar.bz2 abc-0871bffae307e0553e0c5186336189e8b55cf6a6.zip |
Version abc90215
Diffstat (limited to 'src/map/fpga/fpgaCreate.c')
-rw-r--r-- | src/map/fpga/fpgaCreate.c | 44 |
1 files changed, 22 insertions, 22 deletions
diff --git a/src/map/fpga/fpgaCreate.c b/src/map/fpga/fpgaCreate.c index c0bae1c7..5245f050 100644 --- a/src/map/fpga/fpgaCreate.c +++ b/src/map/fpga/fpgaCreate.c @@ -28,7 +28,7 @@ static void Fpga_TableResize( Fpga_Man_t * p ); static Fpga_Node_t * Fpga_TableLookup( Fpga_Man_t * p, Fpga_Node_t * p1, Fpga_Node_t * p2 ); // hash key for the structural hash table -static inline unsigned Fpga_HashKey2( Fpga_Node_t * p0, Fpga_Node_t * p1, int TableSize ) { return (unsigned)(((PORT_PTRUINT_T)(p0) + (PORT_PTRUINT_T)(p1) * 12582917) % TableSize); } +static inline unsigned Fpga_HashKey2( Fpga_Node_t * p0, Fpga_Node_t * p1, int TableSize ) { return (unsigned)(((ABC_PTRUINT_T)(p0) + (ABC_PTRUINT_T)(p1) * 12582917) % TableSize); } //////////////////////////////////////////////////////////////////////// /// FUNCTION DEFINITIONS /// @@ -167,7 +167,7 @@ Fpga_Man_t * Fpga_ManCreate( int nInputs, int nOutputs, int fVerbose ) int i; // start the manager - p = ALLOC( Fpga_Man_t, 1 ); + p = ABC_ALLOC( Fpga_Man_t, 1 ); memset( p, 0, sizeof(Fpga_Man_t) ); p->pLutLib = Abc_FrameReadLibLut(); p->nVarsMax = p->pLutLib->LutMax; @@ -193,13 +193,13 @@ Fpga_Man_t * Fpga_ManCreate( int nInputs, int nOutputs, int fVerbose ) // create the PI nodes p->nInputs = nInputs; - p->pInputs = ALLOC( Fpga_Node_t *, nInputs ); + p->pInputs = ABC_ALLOC( Fpga_Node_t *, nInputs ); for ( i = 0; i < nInputs; i++ ) p->pInputs[i] = Fpga_NodeCreate( p, NULL, NULL ); // create the place for the output nodes p->nOutputs = nOutputs; - p->pOutputs = ALLOC( Fpga_Node_t *, nOutputs ); + p->pOutputs = ABC_ALLOC( Fpga_Node_t *, nOutputs ); memset( p->pOutputs, 0, sizeof(Fpga_Node_t *) * nOutputs ); return p; } @@ -230,12 +230,12 @@ void Fpga_ManFree( Fpga_Man_t * p ) Fpga_NodeVecFree( p->vNodesAll ); Extra_MmFixedStop( p->mmNodes ); Extra_MmFixedStop( p->mmCuts ); - FREE( p->ppOutputNames ); - FREE( p->pInputArrivals ); - FREE( p->pInputs ); - FREE( p->pOutputs ); - FREE( p->pBins ); - FREE( p ); + ABC_FREE( p->ppOutputNames ); + ABC_FREE( p->pInputArrivals ); + ABC_FREE( p->pInputs ); + ABC_FREE( p->pOutputs ); + ABC_FREE( p->pBins ); + ABC_FREE( p ); } @@ -269,14 +269,14 @@ void Fpga_ManPrintTimeStats( Fpga_Man_t * p ) // printf( "N-canonical = %d. Matchings = %d. ", p->nCanons, p->nMatches ); // printf( "Choice nodes = %d. Choices = %d.\n", p->nChoiceNodes, p->nChoices ); - PRT( "ToMap", p->timeToMap ); - PRT( "Cuts ", p->timeCuts ); - PRT( "Match", p->timeMatch ); - PRT( "Area ", p->timeRecover ); - PRT( "ToNet", p->timeToNet ); - PRT( "TOTAL", p->timeTotal ); - if ( p->time1 ) { PRT( "time1", p->time1 ); } - if ( p->time2 ) { PRT( "time2", p->time2 ); } + ABC_PRT( "ToMap", p->timeToMap ); + ABC_PRT( "Cuts ", p->timeCuts ); + ABC_PRT( "Match", p->timeMatch ); + ABC_PRT( "Area ", p->timeRecover ); + ABC_PRT( "ToNet", p->timeToNet ); + ABC_PRT( "TOTAL", p->timeTotal ); + if ( p->time1 ) { ABC_PRT( "time1", p->time1 ); } + if ( p->time2 ) { ABC_PRT( "time2", p->time2 ); } } /**Function************************************************************* @@ -344,7 +344,7 @@ void Fpga_TableCreate( Fpga_Man_t * pMan ) { assert( pMan->pBins == NULL ); pMan->nBins = Cudd_Prime(50000); - pMan->pBins = ALLOC( Fpga_Node_t *, pMan->nBins ); + pMan->pBins = ABC_ALLOC( Fpga_Node_t *, pMan->nBins ); memset( pMan->pBins, 0, sizeof(Fpga_Node_t *) * pMan->nBins ); pMan->nNodes = 0; } @@ -429,7 +429,7 @@ clk = clock(); // get the new table size nBinsNew = Cudd_Prime(2 * pMan->nBins); // allocate a new array - pBinsNew = ALLOC( Fpga_Node_t *, nBinsNew ); + pBinsNew = ABC_ALLOC( Fpga_Node_t *, nBinsNew ); memset( pBinsNew, 0, sizeof(Fpga_Node_t *) * nBinsNew ); // rehash the entries from the old table Counter = 0; @@ -446,10 +446,10 @@ clk = clock(); if ( pMan->fVerbose ) { // printf( "Increasing the unique table size from %6d to %6d. ", pMan->nBins, nBinsNew ); -// PRT( "Time", clock() - clk ); +// ABC_PRT( "Time", clock() - clk ); } // replace the table and the parameters - free( pMan->pBins ); + ABC_FREE( pMan->pBins ); pMan->pBins = pBinsNew; pMan->nBins = nBinsNew; } |