Version abc70206

6 files changed, 325 insertions, 183 deletions

diff --git a/src/base/abc/abc.h b/src/base/abc/abc.h
index 3d46cdf0..62aac927 100644
--- a/src/base/abc/abc.h
+++ b/src/base/abc/abc.h
@@ -197,6 +197,7 @@ struct Abc_Ntk_t_
     Extra_MmFixed_t * pMmObj;        // memory manager for objects
     Extra_MmStep_t *  pMmStep;       // memory manager for arrays
     void *            pManFunc;      // functionality manager (AIG manager, BDD manager, or memory manager for SOPs)
+    Abc_Lib_t *       pDesign;
 //    Abc_Lib_t *       pVerLib;       // for structural verilog designs
     Abc_ManTime_t *   pManTime;      // the timing manager (for mapped networks) stores arrival/required times for all nodes
     void *            pManCut;       // the cut manager (for AIGs) stores information about the cuts computed for the nodes
@@ -244,10 +245,11 @@ static inline void        Abc_InfoFill( unsigned * p, int nWords )   { memset( p
 static inline void        Abc_InfoNot( unsigned * p, int nWords )    { int i; for ( i = nWords - 1; i >= 0; i-- ) p[i] = ~p[i];   } 
 static inline int         Abc_InfoIsZero( unsigned * p, int nWords ) { int i; for ( i = nWords - 1; i >= 0; i-- ) if ( p[i] )  return 0; return 1; } 
 static inline int         Abc_InfoIsOne( unsigned * p, int nWords )  { int i; for ( i = nWords - 1; i >= 0; i-- ) if ( ~p[i] ) return 0; return 1; } 
-static inline void        Abc_InfoCopy( unsigned * p, unsigned * q, int nWords )  { int i; for ( i = nWords - 1; i >= 0; i-- ) p[i]  = q[i];  } 
-static inline void        Abc_InfoAnd( unsigned * p, unsigned * q, int nWords )   { int i; for ( i = nWords - 1; i >= 0; i-- ) p[i] &= q[i];  } 
-static inline void        Abc_InfoOr( unsigned * p, unsigned * q, int nWords )    { int i; for ( i = nWords - 1; i >= 0; i-- ) p[i] |= q[i];  } 
-static inline void        Abc_InfoXor( unsigned * p, unsigned * q, int nWords )   { int i; for ( i = nWords - 1; i >= 0; i-- ) p[i] ^= q[i];  } 
+static inline void        Abc_InfoCopy( unsigned * p, unsigned * q, int nWords )   { int i; for ( i = nWords - 1; i >= 0; i-- ) p[i]  = q[i];  } 
+static inline void        Abc_InfoAnd( unsigned * p, unsigned * q, int nWords )    { int i; for ( i = nWords - 1; i >= 0; i-- ) p[i] &= q[i];  } 
+static inline void        Abc_InfoOr( unsigned * p, unsigned * q, int nWords )     { int i; for ( i = nWords - 1; i >= 0; i-- ) p[i] |= q[i];  } 
+static inline void        Abc_InfoXor( unsigned * p, unsigned * q, int nWords )    { int i; for ( i = nWords - 1; i >= 0; i-- ) p[i] ^= q[i];  } 
+static inline int         Abc_InfoIsOrOne( unsigned * p, unsigned * q, int nWords ){ int i; for ( i = nWords - 1; i >= 0; i-- ) if ( ~(p[i] | q[i]) ) return 0; return 1; } 
 
 // checking the network type
 static inline bool        Abc_NtkIsNetlist( Abc_Ntk_t * pNtk )       { return pNtk->ntkType == ABC_NTK_NETLIST;     }
diff --git a/src/base/abc/abcHie.c b/src/base/abc/abcHie.c
index 9c9d8a56..c42cff45 100644
--- a/src/base/abc/abcHie.c
+++ b/src/base/abc/abcHie.c
@@ -6,7 +6,7 @@
 
   PackageName [Network and node package.]
 
-  Synopsis    [Hierarchy manager.]
+  Synopsis    [Procedures to handle hierarchy.]
 
   Author      [Alan Mishchenko]
   
@@ -23,14 +23,12 @@
 ////////////////////////////////////////////////////////////////////////
 ///                        DECLARATIONS                              ///
 ////////////////////////////////////////////////////////////////////////
- 
-typedef struct Abc_Hie_t_ Abc_Hie_t;
-struct Abc_Hie_t_ 
-{
-    Vec_Ptr_t * vTops;
-    Vec_Ptr_t * vModels;
-    stmm_table * vNameToModel;
-};
+
+extern Abc_Ntk_t * Abc_NtkFlattenLogicHierarchy( Abc_Ntk_t * pNtk );
+extern Abc_Ntk_t * Abc_NtkConvertBlackboxes( Abc_Ntk_t * pNtk );
+extern void        Abc_NtkInsertNewLogic( Abc_Ntk_t * pNtkHie, Abc_Ntk_t * pNtk );
+
+static void Abc_NtkFlattenLogicHierarchy_rec( Abc_Ntk_t * pNtkNew, Abc_Ntk_t * pNtkOld, int * pCounter );
 
 ////////////////////////////////////////////////////////////////////////
 ///                     FUNCTION DEFINITIONS                         ///
@@ -38,7 +36,131 @@ struct Abc_Hie_t_
 
 /**Function*************************************************************
 
-  Synopsis    []
+  Synopsis    [Flattens the logic hierarchy of the netlist.]
+
+  Description []
+               
+  SideEffects []
+
+  SeeAlso     []
+
+***********************************************************************/
+Abc_Ntk_t * Abc_NtkFlattenLogicHierarchy( Abc_Ntk_t * pNtk )
+{
+    Abc_Ntk_t * pNtkNew; 
+    Abc_Obj_t * pObj, * pNet;
+    int i, Counter = 0;
+    assert( Abc_NtkIsNetlist(pNtk) );
+    // start the network
+    pNtkNew = Abc_NtkAlloc( pNtk->ntkType, pNtk->ntkFunc, 1 );
+    // duplicate the name and the spec
+    pNtkNew->pName = Extra_UtilStrsav(pNtk->pName);
+    pNtkNew->pSpec = Extra_UtilStrsav(pNtk->pSpec);
+    // clean the node copy fields
+    Abc_NtkCleanCopy( pNtk );
+    // duplicate PIs/POs and their nets
+    Abc_NtkForEachPi( pNtk, pObj, i )
+    {
+        Abc_NtkDupObj( pNtkNew, pObj, 0 );
+        pNet = Abc_ObjFanout0( pObj );
+        Abc_NtkDupObj( pNtkNew, pNet, 1 );
+        Abc_ObjAddFanin( pNet->pCopy, pObj->pCopy );
+    }
+    Abc_NtkForEachPo( pNtk, pObj, i )
+    {
+        Abc_NtkDupObj( pNtkNew, pObj, 0 );
+        pNet = Abc_ObjFanin0( pObj );
+        pNet->pCopy = Abc_NtkFindOrCreateNet( pNtkNew, Abc_ObjName(pNet) );
+        Abc_ObjAddFanin( pObj->pCopy, pNet->pCopy );
+    }
+    // recursively flatten hierarchy, create internal logic, add new PI/PO names if there are black boxes
+    Abc_NtkFlattenLogicHierarchy_rec( pNtkNew, pNtk, &Counter );
+    printf( "Abc_NtkFlattenLogicHierarchy(): Flattened %d logic boxes. Left %d block boxes.\n", 
+        Counter - 1, Abc_NtkBlackboxNum(pNtkNew) );
+    // copy the timing information
+//    Abc_ManTimeDup( pNtk, pNtkNew );
+    // duplicate EXDC 
+    if ( pNtk->pExdc )
+        printf( "EXDC is not transformed.\n" );
+    if ( !Abc_NtkCheck( pNtkNew ) )
+        fprintf( stdout, "Abc_NtkFlattenLogicHierarchy(): Network check has failed.\n" );
+    return pNtkNew;
+}
+
+/**Function*************************************************************
+
+  Synopsis    [Recursively flattens the logic hierarchy of the netlist.]
+
+  Description [When this procedure is called, the PI/PO nets of the netlist
+  are already assigned.]
+               
+  SideEffects []
+
+  SeeAlso     []
+
+***********************************************************************/
+void Abc_NtkFlattenLogicHierarchy_rec( Abc_Ntk_t * pNtkNew, Abc_Ntk_t * pNtkOld, int * pCounter )
+{
+    Vec_Ptr_t * vNodes;
+    Abc_Ntk_t * pNtkModel;
+    Abc_Obj_t * pObj, * pTerm, * pFanin, * pNet;
+    int i, k;
+    (*pCounter)++;
+    // collect nodes and boxes in topological order
+    vNodes = Abc_NtkDfs( pNtkOld, 0 );
+    // duplicate nodes and blackboxes, call recursively for logic boxes
+    Vec_PtrForEachEntry( vNodes, pObj, i )
+    {
+        if ( Abc_ObjIsNode(pObj) )
+        {
+            // duplicate the node 
+            Abc_NtkDupObj( pNtkNew, pObj, 0 );
+            Abc_ObjForEachFanin( pObj, pNet, k )
+                Abc_ObjAddFanin( pObj->pCopy, pNet->pCopy );
+            // duplicate the net
+            pNet = Abc_ObjFanout0( pObj );
+            pNet->pCopy = Abc_NtkFindOrCreateNet( pNtkNew, Abc_ObjName(pNet) );
+            Abc_ObjAddFanin( pNet->pCopy, pObj->pCopy );
+            continue;
+        }
+        if ( Abc_ObjIsBlackbox(pObj) )
+        {
+            // duplicate the box 
+            Abc_NtkDupObj( pNtkNew, pObj, 1 );
+            // connect the fanins
+            Abc_ObjForEachFanin( pObj, pNet, k )
+                Abc_ObjAddFanin( pObj->pCopy, pNet->pCopy );
+            // duplicate fanout nets and connect them
+            Abc_ObjForEachFanout( pObj, pNet, i )
+            {
+                pNet->pCopy = Abc_NtkFindOrCreateNet( pNtkNew, Abc_ObjName(pNet) );
+                Abc_ObjAddFanin( pNet->pCopy, pObj->pCopy );
+            }
+            continue;
+        }
+        assert( Abc_ObjIsBox(pObj) );
+        pNtkModel = pObj->pData;
+        assert( pNtkModel && !Abc_NtkHasBlackbox(pNtkModel) );
+        // clean the node copy fields
+        Abc_NtkCleanCopy( pNtkModel );
+        // consider this blackbox
+        // copy the PIs/POs of the box
+        Abc_NtkForEachPi( pNtkModel, pTerm, k )
+            Abc_ObjFanout(pTerm, k)->pCopy = Abc_ObjFanin(pObj, k);
+        Abc_NtkForEachPo( pNtkModel, pTerm, k )
+            Abc_ObjFanin(pTerm, k)->pCopy = Abc_ObjFanout(pObj, k);
+        // call recursively
+        Abc_NtkFlattenLogicHierarchy_rec( pNtkNew, pNtkModel, pCounter );
+    }
+    // connect the POs
+    Abc_NtkForEachPo( pNtkOld, pTerm, k )
+        pTerm->pCopy = Abc_ObjFanin0(pTerm)->pCopy;
+    Vec_PtrFree( vNodes );
+}
+
+/**Function*************************************************************
+
+  Synopsis    [Extracts blackboxes by making them into additional PIs/POs.]
 
   Description []
                
@@ -47,6 +169,173 @@ struct Abc_Hie_t_
   SeeAlso     []
 
 ***********************************************************************/
+Abc_Ntk_t * Abc_NtkConvertBlackboxes( Abc_Ntk_t * pNtk )
+{
+    Abc_Ntk_t * pNtkNew;
+    Abc_Obj_t * pObj, * pNet;
+    int i, k;
+    assert( Abc_NtkIsNetlist(pNtk) );
+    assert( Abc_NtkBlackboxNum(pNtk) == Abc_NtkBoxNum(pNtk) - Abc_NtkLatchNum(pNtk) );
+    // start the network
+    pNtkNew = Abc_NtkAlloc( pNtk->ntkType, pNtk->ntkFunc, 1 );
+    // duplicate the name and the spec
+    pNtkNew->pName = Extra_UtilStrsav( pNtk->pName );
+    pNtkNew->pSpec = Extra_UtilStrsav( pNtk->pSpec );
+    // clean the node copy fields
+    Abc_NtkCleanCopy( pNtk );
+    // create PIs/POs for the box inputs outputs
+    Abc_NtkForEachBlackbox( pNtk, pObj, i )
+    {
+        pObj->pCopy = pObj; // placeholder
+        Abc_ObjForEachFanout( pObj, pNet, k )
+        {
+            if ( pNet->pCopy )
+                continue;
+            pNet->pCopy = Abc_NtkCreatePi( pNtkNew );
+            Abc_ObjAssignName( pNet->pCopy, Abc_ObjName(pNet), NULL );
+        }
+        Abc_ObjForEachFanin( pObj, pNet, k )
+        {
+            if ( pNet->pCopy )
+                continue;
+            pNet->pCopy = Abc_NtkCreatePo( pNtkNew );
+            Abc_ObjAssignName( pNet->pCopy, Abc_ObjName(pNet), NULL );
+        }
+    }
+    // duplicate other objects
+    Abc_NtkForEachObj( pNtk, pObj, i )
+        if ( pObj->pCopy == NULL )
+            Abc_NtkDupObj( pNtkNew, pObj, Abc_ObjIsNet(pObj) );
+    // connect all objects
+
+
+
+
+
+    // duplicate all objects besides the boxes
+    Abc_NtkForEachObj( pNtk, pObj, i )
+        if ( !Abc_ObjIsBlackbox(pObj) )
+            Abc_NtkDupObj( pNtkNew, pObj, Abc_ObjIsNet(pObj) );
+    // create PIs/POs for the nets belonging to the boxes
+    Abc_NtkForEachBlackbox( pNtk, pObj, i )
+    {
+        Abc_ObjForEachFanin( pObj, pNet, k )
+            if ( !Abc_ObjIsPi(Abc_ObjFanin0(pNet)) )
+                Abc_NtkCreatePi(pNtkNew)
+
+    }
+    // connect all objects, besides blackboxes
+    Abc_NtkForEachObj( pNtk, pObj, i )
+    {
+        if ( !Abc_ObjIsBlackbox(pObj) )
+            continue;
+        Abc_ObjForEachFanin( pObj, pNet, k )
+            Abc_ObjAddFanin( pObj->pCopy, pNet->pCopy );
+    }
+    if ( !Abc_NtkCheck( pNtkHie ) )
+        fprintf( stdout, "Abc_NtkInsertNewLogic(): Network check has failed.\n" );
+    return pNtkNew;
+}
+
+/**Function*************************************************************
+
+  Synopsis    [Inserts blackboxes into the netlist.]
+
+  Description [The first arg is the netlist with blackboxes without logic hierarchy.
+  The second arg is a non-hierarchical netlist derived from logic network after processing.
+  This procedure inserts the logic back into the original hierarhical netlist.
+  The result is updated original hierarchical netlist.]
+               
+  SideEffects []
+
+  SeeAlso     []
+
+***********************************************************************/
+int Abc_NtkInsertNewLogic( Abc_Ntk_t * pNtkHie, Abc_Ntk_t * pNtk )
+{
+    Abc_Obj_t * pObj, * pNet, * pNetLogic;
+    int i, k;
+    assert( Abc_NtkIsNetlist(pNtkHie) );
+    assert( Abc_NtkIsNetlist(pNtk) );
+    assert( Abc_NtkBlackboxNum(pNtk) == 0 );
+    Abc_NtkCleanCopy( pNtk );
+    // mark PIs/POs/blackboxes and their nets
+    // map the nets into the corresponding nets of the logic design
+    Abc_NtkForEachPi( pNtkHie, pObj, i )
+    {
+        pObj->fMarkA = 1;
+        pNet = Abc_ObjFanout0(pObj);
+        pNet->fMarkA = 1;
+        pNetLogic = Abc_NtkFindNet( pNtk, Abc_ObjName(pNet) );
+        assert( pNetLogic );
+        pNetLogic->pCopy = pNet;
+    }
+    Abc_NtkForEachPo( pNtkHie, pObj, i )
+    {
+        pObj->fMarkA = 1;
+        pNet = Abc_ObjFanin0(pObj);
+        pNet->fMarkA = 1;
+        pNetLogic = Abc_NtkFindNet( pNtk, Abc_ObjName(pNet) );
+        assert( pNetLogic );
+        pNetLogic->pCopy = pNet;
+    }
+    Abc_NtkForEachBlackbox( pNtkHie, pObj, i )
+    {
+        pObj->fMarkA = 1;
+        Abc_ObjForEachFanin( pObj, pNet, k )
+        {
+            pNet->fMarkA = 1;
+            pNetLogic = Abc_NtkFindNet( pNtk, Abc_ObjName(pNet) );
+            assert( pNetLogic );
+            pNetLogic->pCopy = pNet;
+        }
+        Abc_ObjForEachFanout( pObj, pNet, k )
+        {
+            pNet->fMarkA = 1;
+            pNetLogic = Abc_NtkFindNet( pNtk, Abc_ObjName(pNet) );
+            assert( pNetLogic );
+            pNetLogic->pCopy = pNet;
+        }
+    }
+    // remove all other logic fro the hierarchical netlist
+    Abc_NtkForEachObj( pNtkHie, pObj, i )
+    {
+        if ( pObj->fMarkA )
+            pObj->fMarkA = 0;
+        else
+            Abc_NtkDeleteObj( pObj );
+    }
+    // mark PI/PO nets of the network
+    Abc_NtkForEachPi( pNtk, pObj, i )
+        Abc_ObjFanout0(pObj)->fMarkA = 1;
+    Abc_NtkForEachPo( pNtk, pObj, i )
+        Abc_ObjFanin0(pObj)->fMarkA = 1;
+    // make sure only these nodes are assigned the copy
+    Abc_NtkForEachObj( pNtk, pObj, i )
+    {
+        assert( pObj->fMarkA == (pObj->pCopy != NULL) );
+        pObj->fMarkA = 0;
+        if ( pObj->pCopy )
+            continue;
+        if ( Abc_ObjIsPi(pObj) || Abc_ObjIsPi(pObj) )
+            continue;
+        Abc_NtkDupObj( pNtkHie, pObj, 0 );
+    }
+    // connect all the nodes, except the PIs and POs
+    Abc_NtkForEachObj( pNtk, pObj, i )
+    {
+        if ( Abc_ObjIsPi(pObj) || Abc_ObjIsPi(pObj) )
+            continue;
+        Abc_ObjForEachFanin( pObj, pNet, k )
+            Abc_ObjAddFanin( pObj->pCopy, pNet->pCopy );
+    }
+    if ( !Abc_NtkCheck( pNtkHie ) )
+    {
+        fprintf( stdout, "Abc_NtkInsertNewLogic(): Network check has failed.\n" );
+        return 0;
+    }
+    return 1;
+}
 
 ////////////////////////////////////////////////////////////////////////
 ///                       END OF FILE                                ///
diff --git a/src/base/abc/abcNetlist.c b/src/base/abc/abcNetlist.c
index 040a33df..2a20617c 100644
--- a/src/base/abc/abcNetlist.c
+++ b/src/base/abc/abcNetlist.c
@@ -25,8 +25,6 @@
 ///                        DECLARATIONS                              ///
 ////////////////////////////////////////////////////////////////////////
 
-static Abc_Ntk_t * Abc_NtkNetlistToLogicHie( Abc_Ntk_t * pNtk );
-static void Abc_NtkNetlistToLogicHie_rec( Abc_Ntk_t * pNtkNew, Abc_Ntk_t * pNtkOld, int * pCounter );
 static void Abc_NtkAddPoBuffers( Abc_Ntk_t * pNtk );
 
 ////////////////////////////////////////////////////////////////////////
@@ -51,8 +49,9 @@ Abc_Ntk_t * Abc_NtkNetlistToLogic( Abc_Ntk_t * pNtk )
     int i, k;
     assert( Abc_NtkIsNetlist(pNtk) );
     // consider simple case when there is hierarchy
-    if ( pNtk->tName2Model )
-        return Abc_NtkNetlistToLogicHie( pNtk );
+    assert( pNtk->tName2Model == NULL );
+//    if ( pNtk->tName2Model )
+//        return Abc_NtkNetlistToLogicHie( pNtk );
     // start the network
     if ( Abc_NtkHasMapping(pNtk) )
         pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_MAP );
@@ -79,159 +78,6 @@ Abc_Ntk_t * Abc_NtkNetlistToLogic( Abc_Ntk_t * pNtk )
 
 /**Function*************************************************************
 
-  Synopsis    [Transform the netlist into a logic network.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Abc_Ntk_t * Abc_NtkNetlistToLogicHie( Abc_Ntk_t * pNtk )
-{
-    Abc_Ntk_t * pNtkNew; 
-    Abc_Obj_t * pObj;
-    int i, Counter = 0;
-    assert( Abc_NtkIsNetlist(pNtk) );
-    // start the network
-//    pNtkNew = Abc_NtkAlloc( Type, Func, 1 );
-    if ( !Abc_NtkHasMapping(pNtk) )
-        pNtkNew = Abc_NtkAlloc( ABC_NTK_LOGIC, ABC_FUNC_SOP, 1 );
-    else
-        pNtkNew = Abc_NtkAlloc( ABC_NTK_LOGIC, ABC_FUNC_MAP, 1 );
-    // duplicate the name and the spec
-    pNtkNew->pName = Extra_UtilStrsav(pNtk->pName);
-    pNtkNew->pSpec = Extra_UtilStrsav(pNtk->pSpec);
-    // clean the node copy fields
-    Abc_NtkForEachNode( pNtk, pObj, i )
-        pObj->pCopy = NULL;
-    // clone PIs/POs/latches and make old nets point to new terminals; create names
-    Abc_NtkForEachCi( pNtk, pObj, i )
-    {
-        Abc_ObjFanout0(pObj)->pCopy = Abc_NtkDupObj(pNtkNew, pObj, 0);
-        Abc_ObjAssignName( pObj->pCopy, Abc_ObjName(Abc_ObjFanout0(pObj)), NULL );
-    }
-    Abc_NtkForEachPo( pNtk, pObj, i )
-    {
-        Abc_NtkDupObj(pNtkNew, pObj, 0);
-        Abc_ObjAssignName( pObj->pCopy, Abc_ObjName(Abc_ObjFanin0(pObj)), NULL );
-    }
-    // recursively flatten hierarchy, create internal logic, add new PI/PO names if there are black boxes
-    Abc_NtkNetlistToLogicHie_rec( pNtkNew, pNtk, &Counter );
-    if ( Counter )
-        printf( "Warning: The total of %d block boxes are transformed into PI/PO pairs.\n", Counter );
-    // connect the CO nodes
-    Abc_NtkForEachCo( pNtk, pObj, i )
-        Abc_ObjAddFanin( pObj->pCopy, Abc_ObjFanin0(pObj)->pCopy );
-    // copy the timing information
-    Abc_ManTimeDup( pNtk, pNtkNew );
-    // fix the problem with CO pointing directly to CIs
-    Abc_NtkLogicMakeSimpleCos( pNtkNew, 0 );
-    // duplicate EXDC 
-    if ( pNtk->pExdc )
-        pNtkNew->pExdc = Abc_NtkNetlistToLogic( pNtk->pExdc );
-    if ( !Abc_NtkCheck( pNtkNew ) )
-        fprintf( stdout, "Abc_NtkNetlistToLogic(): Network check has failed.\n" );
-    return pNtkNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Transform the netlist into a logic network.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Abc_NtkNetlistToLogicHie_rec( Abc_Ntk_t * pNtkNew, Abc_Ntk_t * pNtkOld, int * pCounter )
-{
-    char Prefix[1000];
-    Vec_Ptr_t * vNodes;
-    Abc_Ntk_t * pNtkModel;
-    Abc_Obj_t * pNode, * pObj, * pFanin;
-    int i, k;
-    // collect nodes and boxes in topological order
-    vNodes = Abc_NtkDfs( pNtkOld, 0 );
-    // duplicate nodes, create PIs/POs corresponding to blackboxes
-    // have to do it first if blackboxes break combinational loops
-    // (current we do not allow whiteboxes to break combinational loops)
-    Vec_PtrForEachEntry( vNodes, pNode, i )
-    {
-        if ( Abc_ObjIsNode(pNode) )
-        {
-            // duplicate the node and save it in the fanout net
-            Abc_NtkDupObj( pNtkNew, pNode, 0 );
-            Abc_ObjFanout0(pNode)->pCopy = pNode->pCopy;
-            continue;
-        }
-        assert( Abc_ObjIsBox(pNode) );
-        pNtkModel = pNode->pData;
-        if ( !Abc_NtkHasBlackbox(pNtkModel) )
-            continue;
-        // consider this blockbox
-        if ( pNtkNew->pBlackBoxes == NULL )
-        {
-            pNtkNew->pBlackBoxes = Vec_IntAlloc( 10 );
-            Vec_IntPush( pNtkNew->pBlackBoxes, (Abc_NtkPiNum(pNtkNew) << 16) | Abc_NtkPoNum(pNtkNew) );
-        }
-        sprintf( Prefix, "%s_%d_", Abc_NtkName(pNtkModel), *pCounter );
-        // create new PIs from the POs of the box
-        Abc_NtkForEachPo( pNtkModel, pObj, k )
-        {
-            pObj->pCopy = Abc_NtkCreatePi( pNtkNew );
-            Abc_ObjFanout(pNode, k)->pCopy = pObj->pCopy;
-            Abc_ObjAssignName( pObj->pCopy, Prefix, Abc_ObjName(Abc_ObjFanin0(pObj)) );
-        }
-        // create new POs from the PIs of the box
-        Abc_NtkForEachPi( pNtkModel, pObj, k )
-        {
-            pObj->pCopy = Abc_NtkCreatePo( pNtkNew );
-//            Abc_ObjAddFanin( pObj->pCopy, Abc_ObjFanin(pNode, k)->pCopy );
-            Abc_ObjAssignName( pObj->pCopy, Prefix, Abc_ObjName(Abc_ObjFanout0(pObj)) );
-        }
-        (*pCounter)++;
-        Vec_IntPush( pNtkNew->pBlackBoxes, (Abc_NtkPiNum(pNtkNew) << 16) | Abc_NtkPoNum(pNtkNew) );
-    }
-    // connect nodes and boxes
-    Vec_PtrForEachEntry( vNodes, pNode, i )
-    {
-        if ( Abc_ObjIsNode(pNode) )
-        {
-//            printf( "adding node %s\n", Abc_ObjName(Abc_ObjFanout0(pNode)) );
-            Abc_ObjForEachFanin( pNode, pFanin, k )
-                Abc_ObjAddFanin( pNode->pCopy, pFanin->pCopy );
-            continue;
-        }
-        assert( Abc_ObjIsBox(pNode) );
-        pNtkModel = pNode->pData;
-//        printf( "adding model %s\n", Abc_NtkName(pNtkModel) );
-        // consider the case of the black box
-        if ( Abc_NtkHasBlackbox(pNtkModel) )
-        {
-            // create new POs from the PIs of the box
-            Abc_NtkForEachPi( pNtkModel, pObj, k )
-                Abc_ObjAddFanin( pObj->pCopy, Abc_ObjFanin(pNode, k)->pCopy );
-            continue;
-        }
-        // transfer the nodes to the box inputs
-        Abc_NtkForEachPi( pNtkModel, pObj, k )
-            Abc_ObjFanout0(pObj)->pCopy = Abc_ObjFanin(pNode, k)->pCopy;
-        // construct recursively
-        Abc_NtkNetlistToLogicHie_rec( pNtkNew, pNtkModel, pCounter );
-        // transfer the results back
-        Abc_NtkForEachPo( pNtkModel, pObj, k )
-            Abc_ObjFanout(pNode, k)->pCopy = Abc_ObjFanin0(pObj)->pCopy;    
-    }
-    Vec_PtrFree( vNodes );
-}
-
-
-/**Function*************************************************************
-
   Synopsis    [Transform the logic network into a netlist.]
 
   Description []
diff --git a/src/base/abc/abcObj.c b/src/base/abc/abcObj.c
index e434a51b..8d347404 100644
--- a/src/base/abc/abcObj.c
+++ b/src/base/abc/abcObj.c
@@ -327,7 +327,7 @@ Abc_Obj_t * Abc_NtkDupObj( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pObj, int fCopyName
             Abc_ObjAssignName( pObjNew, Abc_ObjName(Abc_ObjFanout0Ntk(pObj)), NULL );
         else if ( Abc_ObjIsCo(pObj) )
             Abc_ObjAssignName( pObjNew, Abc_ObjName(Abc_ObjFanin0Ntk(pObj)), NULL );
-        else if ( Abc_ObjIsBox(pObj) )
+        else if ( Abc_ObjIsBox(pObj) || Abc_ObjIsNet(pObj) )
             Abc_ObjAssignName( pObjNew, Abc_ObjName(pObj), NULL );
     }
     // copy functionality/names
@@ -350,8 +350,6 @@ Abc_Obj_t * Abc_NtkDupObj( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pObj, int fCopyName
     }
     else if ( Abc_ObjIsNet(pObj) ) // copy the name
     {
-        assert( 0 );
-//        pObjNew->pData = Nm_ManStoreIdName( pNtkNew->pManName, pObjNew->Id, pObj->pData, NULL );
     }
     else if ( Abc_ObjIsLatch(pObj) ) // copy the reset value
         pObjNew->pData = pObj->pData;
diff --git a/src/base/abci/abc.c b/src/base/abci/abc.c
index 3a6874ca..f1ec7920 100644
--- a/src/base/abci/abc.c
+++ b/src/base/abci/abc.c
@@ -2577,13 +2577,14 @@ int Abc_CommandMfs( Abc_Frame_t * pAbc, int argc, char ** argv )
     pErr = Abc_FrameReadErr(pAbc);
 
     // set defaults
-    pPars->nWindow      = 33;
-    pPars->nCands       =  3;
-    pPars->nSimWords    =  8;
-    pPars->fVerbose     =  1;
+    pPars->nWindow      = 62;
+    pPars->nCands       =  5;
+    pPars->nSimWords    =  4;
+    pPars->fArea        =  0;
+    pPars->fVerbose     =  0;
     pPars->fVeryVerbose =  0;
     Extra_UtilGetoptReset();
-    while ( ( c = Extra_UtilGetopt( argc, argv, "WSvwh" ) ) != EOF )
+    while ( ( c = Extra_UtilGetopt( argc, argv, "WSavwh" ) ) != EOF )
     {
         switch ( c )
         {
@@ -2609,6 +2610,9 @@ int Abc_CommandMfs( Abc_Frame_t * pAbc, int argc, char ** argv )
             if ( pPars->nSimWords < 1 || pPars->nSimWords > 256 ) 
                 goto usage;
             break;
+        case 'a':
+            pPars->fArea ^= 1;
+            break;
         case 'v':
             pPars->fVerbose ^= 1;
             break;
@@ -2627,9 +2631,9 @@ int Abc_CommandMfs( Abc_Frame_t * pAbc, int argc, char ** argv )
         fprintf( pErr, "Empty network.\n" );
         return 1;
     }
-    if ( !Abc_NtkHasAig(pNtk) )
+    if ( !Abc_NtkIsLogic(pNtk) )
     {
-        fprintf( pErr, "This command can only be applied to AIG logic network (run \"aig\").\n" );
+        fprintf( pErr, "This command can only be applied to a logic network.\n" );
         return 1;
     }
 
@@ -2642,10 +2646,11 @@ int Abc_CommandMfs( Abc_Frame_t * pAbc, int argc, char ** argv )
     return 0;
 
 usage:
-    fprintf( pErr, "usage: mfs [-W <NM>] [-S <num>] [-vwh]\n" );
+    fprintf( pErr, "usage: mfs [-W <NM>] [-S <num>] [-avwh]\n" );
     fprintf( pErr, "\t           performs resubstitution-based resynthesis with don't-cares\n" );
     fprintf( pErr, "\t-W <NM>  : Fanin/Fanout levels (NxM) of the window (00 <= NM <= 99) [default = %d%d]\n", pPars->nWindow/10, pPars->nWindow%10 );
     fprintf( pErr, "\t-S <num> : the number of simulation words (1 <= n <= 256) [default = %d]\n", pPars->nSimWords );
+    fprintf( pErr, "\t-a       : toggle optimization for area only [default = %s]\n", pPars->fArea? "yes": "no" );
     fprintf( pErr, "\t-v       : toggle verbose printout [default = %s]\n", pPars->fVerbose? "yes": "no" );
     fprintf( pErr, "\t-w       : toggle printout subgraph statistics [default = %s]\n", pPars->fVeryVerbose? "yes": "no" );
     fprintf( pErr, "\t-h       : print the command usage\n");
diff --git a/src/base/io/ioReadBlifMv.c b/src/base/io/ioReadBlifMv.c
index c55cc4c9..e6831dba 100644
--- a/src/base/io/ioReadBlifMv.c
+++ b/src/base/io/ioReadBlifMv.c
@@ -176,6 +176,8 @@ Abc_Lib_t * Io_ReadBlifMv( char * pFileName, int fBlifMv, int fCheck )
             }
         }
     }
+// pDesign should be linked to all models of the design
+
 Io_WriteBlifMvDesign( pDesign, "_temp_.mv" );
 Abc_LibPrint( pDesign );
 Abc_LibFree( pDesign );
@@ -637,7 +639,7 @@ static void Io_MvReadInterfaces( Io_MvMan_t * p )
 
 /**Function*************************************************************
 
-  Synopsis    [Reads the AIG in the binary AIGER format.]
+  Synopsis    []
 
   Description []