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authorAlan Mishchenko <alanmi@berkeley.edu>2006-08-22 08:01:00 -0700
committerAlan Mishchenko <alanmi@berkeley.edu>2006-08-22 08:01:00 -0700
commit956842d9cc321eee3907889b820132e6e2b5ec62 (patch)
tree67a2a804c594eabc54d290cbd607a6ae65e583f6 /src/base
parent2fd3c1a25bb7a7ce334d2de5bac96bce446855d8 (diff)
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Version abc60822
Diffstat (limited to 'src/base')
-rw-r--r--src/base/abc/abc.h140
-rw-r--r--src/base/abc/abcAig.c46
-rw-r--r--src/base/abc/abcDfs.c17
-rw-r--r--src/base/abc/abcFanio.c1
-rw-r--r--src/base/abc/abcFunc.c375
-rw-r--r--src/base/abc/abcLatch.c8
-rw-r--r--src/base/abc/abcLib.c116
-rw-r--r--src/base/abc/abcNames.c7
-rw-r--r--src/base/abc/abcNetlist.c35
-rw-r--r--src/base/abc/abcNtk.c92
-rw-r--r--src/base/abc/abcObj.c302
-rw-r--r--src/base/abc/abcUtil.c47
-rw-r--r--src/base/abc/module.make1
-rw-r--r--src/base/abci/abc.c415
-rw-r--r--src/base/abci/abcBalance.c5
-rw-r--r--src/base/abci/abcCut.c14
-rw-r--r--src/base/abci/abcDsd.c8
-rw-r--r--src/base/abci/abcEspresso.c4
-rw-r--r--src/base/abci/abcFpga.c11
-rw-r--r--src/base/abci/abcFraig.c10
-rw-r--r--src/base/abci/abcFxu.c21
-rw-r--r--src/base/abci/abcIvy.c16
-rw-r--r--src/base/abci/abcMap.c59
-rw-r--r--src/base/abci/abcMini.c152
-rw-r--r--src/base/abci/abcMiter.c44
-rw-r--r--src/base/abci/abcNewAig.c391
-rw-r--r--src/base/abci/abcNtbdd.c4
-rw-r--r--src/base/abci/abcPrint.c50
-rw-r--r--src/base/abci/abcRefactor.c4
-rw-r--r--src/base/abci/abcRenode.c30
-rw-r--r--src/base/abci/abcRestruct.c4
-rw-r--r--src/base/abci/abcResub.c4
-rw-r--r--src/base/abci/abcRewrite.c4
-rw-r--r--src/base/abci/abcRr.c11
-rw-r--r--src/base/abci/abcSat.c4
-rw-r--r--src/base/abci/abcStrash.c289
-rw-r--r--src/base/abci/abcSweep.c7
-rw-r--r--src/base/abci/abcTiming.c9
-rw-r--r--src/base/abci/abcTrace.c804
-rw-r--r--src/base/abci/abcUnreach.c2
-rw-r--r--src/base/abci/abcVanEijk.c12
-rw-r--r--src/base/abci/abcVanImp.c8
-rw-r--r--src/base/abci/abcVerify.c6
-rw-r--r--src/base/abci/module.make1
-rw-r--r--src/base/cmd/cmd.c6
-rw-r--r--src/base/io/io.c89
-rw-r--r--src/base/io/ioReadBaf.c2
-rw-r--r--src/base/io/ioWriteDot.c2
-rw-r--r--src/base/io/ioWriteList.c4
-rw-r--r--src/base/io/ioWriteVerAux.c1
-rw-r--r--src/base/main/mainFrame.c5
-rw-r--r--src/base/seq/module.make1
-rw-r--r--src/base/seq/seq.h3
-rw-r--r--src/base/seq/seqCreate.c8
-rw-r--r--src/base/seq/seqFpgaCore.c12
-rw-r--r--src/base/seq/seqFpgaIter.c4
-rw-r--r--src/base/seq/seqMapCore.c8
-rw-r--r--src/base/seq/seqMapIter.c2
-rw-r--r--src/base/seq/seqMaxMeanCycle.c567
-rw-r--r--src/base/seq/seqRetCore.c14
-rw-r--r--src/base/seq/seqRetIter.c2
-rw-r--r--src/base/seq/seqShare.c2
-rw-r--r--src/base/seq/seqUtil.c6
63 files changed, 2360 insertions, 1968 deletions
diff --git a/src/base/abc/abc.h b/src/base/abc/abc.h
index 8bd48874..10e2eb41 100644
--- a/src/base/abc/abc.h
+++ b/src/base/abc/abc.h
@@ -36,6 +36,7 @@ extern "C" {
#include <time.h>
#include "cuddInt.h"
+#include "aig.h"
#include "extra.h"
#include "solver.h"
#include "vec.h"
@@ -71,9 +72,9 @@ typedef enum {
/*------------------------------------------|
| | SOP | BDD | AIG | Map |
|-----------|-------|-------|-------|-------|
-| Netlist | x | | | x |
+| Netlist | x | | x | x |
|-----------|-------|-------|-------|-------|
-| Logic | x | x | | x |
+| Logic | x | x | x | x |
|-----------|-------|-------|-------|-------|
| Strash | | | x | |
|-----------|-------|-------|-------|-------|
@@ -82,15 +83,19 @@ typedef enum {
// object types
typedef enum {
- ABC_OBJ_NONE = 0, // 0: unknown
- ABC_OBJ_NET, // 1: net
- ABC_OBJ_NODE, // 2: node
- ABC_OBJ_LATCH, // 3: latch
- ABC_OBJ_PI, // 4: primary input terminal
- ABC_OBJ_PO, // 5: primary output terminal
- ABC_OBJ_ASSERT, // 6: assertion output
- ABC_OBJ_BOX, // 7: box
- ABC_OBJ_OTHER // 8: unused
+ ABC_OBJ_NONE = 0, // 0: unknown
+ ABC_OBJ_CONST1, // 1: constant 1 node (AIG only)
+ ABC_OBJ_PIO, // 2: inout terminal
+ ABC_OBJ_PI, // 3: primary input terminal
+ ABC_OBJ_PO, // 4: primary output terminal
+ ABC_OBJ_BI, // 5: box input terminal
+ ABC_OBJ_BO, // 6: box output terminal
+ ABC_OBJ_NET, // 7: net
+ ABC_OBJ_NODE, // 8: node
+ ABC_OBJ_LATCH, // 9: latch
+ ABC_OBJ_ASSERT, // 10: assertion output
+ ABC_OBJ_BOX, // 11: box
+ ABC_OBJ_OTHER // 12: unused
} Abc_ObjType_t;
// latch initial values
@@ -113,8 +118,9 @@ typedef enum {
#endif
#endif
-typedef struct Abc_Obj_t_ Abc_Obj_t;
+typedef struct Abc_Lib_t_ Abc_Lib_t;
typedef struct Abc_Ntk_t_ Abc_Ntk_t;
+typedef struct Abc_Obj_t_ Abc_Obj_t;
typedef struct Abc_Aig_t_ Abc_Aig_t;
typedef struct Abc_ManTime_t_ Abc_ManTime_t;
typedef struct Abc_ManCut_t_ Abc_ManCut_t;
@@ -133,7 +139,7 @@ struct Abc_Obj_t_ // 12 words
Abc_Ntk_t * pNtk; // the host network
int Id; // the object ID
// internal information
- unsigned Type : 3; // the object type
+ unsigned Type : 4; // the object type
unsigned fMarkA : 1; // the multipurpose mark
unsigned fMarkB : 1; // the multipurpose mark
unsigned fMarkC : 1; // the multipurpose mark
@@ -142,7 +148,7 @@ struct Abc_Obj_t_ // 12 words
unsigned fPersist: 1; // marks the persistant AIG node
unsigned fCompl0 : 1; // complemented attribute of the first fanin in the AIG
unsigned fCompl1 : 1; // complemented attribute of the second fanin in the AIG
- unsigned TravId : 9; // the traversal ID (if changed, update Abc_NtkIncrementTravId)
+ unsigned TravId : 8; // the traversal ID (if changed, update Abc_NtkIncrementTravId)
unsigned Level : 12; // the level of the node
// connectivity
Vec_Int_t vFanins; // the array of fanins
@@ -168,8 +174,10 @@ struct Abc_Ntk_t_
Vec_Ptr_t * vCos; // the array of combinational outputs (POs, asserts, latches)
Vec_Ptr_t * vPis; // the array of PIs
Vec_Ptr_t * vPos; // the array of POs
+ Vec_Ptr_t * vPios; // the array of PIOs
Vec_Ptr_t * vLatches; // the array of latches (or the cutset in the sequential network)
Vec_Ptr_t * vAsserts; // the array of assertions
+ Vec_Ptr_t * vBoxes; // the array of boxes
Vec_Ptr_t * vCutSet; // the array of cutset nodes (used in the sequential AIG)
// the number of living objects
int nObjs; // the number of live objs
@@ -198,6 +206,17 @@ struct Abc_Ntk_t_
Vec_Ptr_t * vSupps; // CO support information
int * pModel; // counter-example (for miters)
Abc_Ntk_t * pExdc; // the EXDC network (if given)
+ // skew values (for latches)
+ float maxMeanCycle; // maximum mean cycle time
+ float globalSkew; // global skewing
+ Vec_Flt_t * vSkews; // endpoint skewing
+};
+
+struct Abc_Lib_t_
+{
+ char * pName; // the name of the library
+ void * pManFunc; // functionality manager for the gates
+ st_table * tModules; // the table hashing gate/module names into their networks
};
////////////////////////////////////////////////////////////////////////
@@ -227,9 +246,11 @@ static inline bool Abc_NtkHasMapping( Abc_Ntk_t * pNtk ) { return pN
static inline bool Abc_NtkHasBlackbox( Abc_Ntk_t * pNtk ) { return pNtk->ntkFunc == ABC_FUNC_BLACKBOX; }
static inline bool Abc_NtkIsSopNetlist( Abc_Ntk_t * pNtk ) { return pNtk->ntkFunc == ABC_FUNC_SOP && pNtk->ntkType == ABC_NTK_NETLIST; }
+static inline bool Abc_NtkIsAigNetlist( Abc_Ntk_t * pNtk ) { return pNtk->ntkFunc == ABC_FUNC_AIG && pNtk->ntkType == ABC_NTK_NETLIST; }
static inline bool Abc_NtkIsMappedNetlist( Abc_Ntk_t * pNtk ) { return pNtk->ntkFunc == ABC_FUNC_MAP && pNtk->ntkType == ABC_NTK_NETLIST; }
static inline bool Abc_NtkIsSopLogic( Abc_Ntk_t * pNtk ) { return pNtk->ntkFunc == ABC_FUNC_SOP && pNtk->ntkType == ABC_NTK_LOGIC ; }
static inline bool Abc_NtkIsBddLogic( Abc_Ntk_t * pNtk ) { return pNtk->ntkFunc == ABC_FUNC_BDD && pNtk->ntkType == ABC_NTK_LOGIC ; }
+static inline bool Abc_NtkIsAigLogic( Abc_Ntk_t * pNtk ) { return pNtk->ntkFunc == ABC_FUNC_AIG && pNtk->ntkType == ABC_NTK_LOGIC ; }
static inline bool Abc_NtkIsMappedLogic( Abc_Ntk_t * pNtk ) { return pNtk->ntkFunc == ABC_FUNC_MAP && pNtk->ntkType == ABC_NTK_LOGIC ; }
static inline bool Abc_NtkIsComb( Abc_Ntk_t * pNtk ) { return Vec_PtrSize(pNtk->vLatches) == 0; }
@@ -240,7 +261,6 @@ static inline int Abc_NtkTravId( Abc_Ntk_t * pNtk ) { return pN
static inline Abc_Ntk_t * Abc_NtkExdc( Abc_Ntk_t * pNtk ) { return pNtk->pExdc; }
static inline Abc_Ntk_t * Abc_NtkBackup( Abc_Ntk_t * pNtk ) { return pNtk->pNetBackup; }
static inline int Abc_NtkStep ( Abc_Ntk_t * pNtk ) { return pNtk->iStep; }
-static inline Abc_Obj_t * Abc_NtkConst1( Abc_Ntk_t * pNtk ) { return (Abc_Obj_t *)Vec_PtrEntry( pNtk->vObjs, 0 ); }
// setting data members of the network
static inline void Abc_NtkSetName ( Abc_Ntk_t * pNtk, char * pName ) { pNtk->pName = pName; }
@@ -260,6 +280,7 @@ static inline int Abc_NtkPiNum( Abc_Ntk_t * pNtk ) { return Ve
static inline int Abc_NtkPoNum( Abc_Ntk_t * pNtk ) { return Vec_PtrSize(pNtk->vPos); }
static inline int Abc_NtkCiNum( Abc_Ntk_t * pNtk ) { return Vec_PtrSize(pNtk->vCis); }
static inline int Abc_NtkCoNum( Abc_Ntk_t * pNtk ) { return Vec_PtrSize(pNtk->vCos); }
+static inline int Abc_NtkBoxNum( Abc_Ntk_t * pNtk ) { return Vec_PtrSize(pNtk->vBoxes); }
// reading objects
static inline Abc_Obj_t * Abc_NtkObj( Abc_Ntk_t * pNtk, int i ) { return (Abc_Obj_t *)Vec_PtrEntry( pNtk->vObjs, i ); }
@@ -292,21 +313,23 @@ static inline Abc_Obj_t * Abc_ObjNot( Abc_Obj_t * p ) { return (A
static inline Abc_Obj_t * Abc_ObjNotCond( Abc_Obj_t * p, int c ) { return (Abc_Obj_t *)((unsigned long)p ^ (unsigned long)(c!=0)); }
// checking the object type
-static inline bool Abc_ObjIsNode( Abc_Obj_t * pObj ) { return pObj->Type == ABC_OBJ_NODE; }
-static inline bool Abc_ObjIsBox( Abc_Obj_t * pObj ) { return pObj->Type == ABC_OBJ_BOX; }
-static inline bool Abc_ObjIsNet( Abc_Obj_t * pObj ) { return pObj->Type == ABC_OBJ_NET; }
-static inline bool Abc_ObjIsLatch( Abc_Obj_t * pObj ) { return pObj->Type == ABC_OBJ_LATCH; }
-static inline bool Abc_ObjIsAssert( Abc_Obj_t * pObj ) { return pObj->Type == ABC_OBJ_ASSERT; }
static inline bool Abc_ObjIsPi( Abc_Obj_t * pObj ) { return pObj->Type == ABC_OBJ_PI; }
static inline bool Abc_ObjIsPo( Abc_Obj_t * pObj ) { return pObj->Type == ABC_OBJ_PO; }
+static inline bool Abc_ObjIsBi( Abc_Obj_t * pObj ) { return pObj->Type == ABC_OBJ_BI; }
+static inline bool Abc_ObjIsBo( Abc_Obj_t * pObj ) { return pObj->Type == ABC_OBJ_BO; }
static inline bool Abc_ObjIsPio( Abc_Obj_t * pObj ) { return pObj->Type == ABC_OBJ_PI || pObj->Type == ABC_OBJ_PO; }
-static inline bool Abc_ObjIsCi( Abc_Obj_t * pObj ) { return pObj->Type == ABC_OBJ_PI || pObj->Type == ABC_OBJ_LATCH; }
-static inline bool Abc_ObjIsCo( Abc_Obj_t * pObj ) { return pObj->Type == ABC_OBJ_PO || pObj->Type == ABC_OBJ_LATCH || pObj->Type == ABC_OBJ_ASSERT; }
+static inline bool Abc_ObjIsCi( Abc_Obj_t * pObj ) { return pObj->Type == ABC_OBJ_PI || pObj->Type == ABC_OBJ_BI || pObj->Type == ABC_OBJ_LATCH; }
+static inline bool Abc_ObjIsCo( Abc_Obj_t * pObj ) { return pObj->Type == ABC_OBJ_PO || pObj->Type == ABC_OBJ_BO || pObj->Type == ABC_OBJ_LATCH || pObj->Type == ABC_OBJ_ASSERT; }
static inline bool Abc_ObjIsCio( Abc_Obj_t * pObj ) { return pObj->Type == ABC_OBJ_PI || pObj->Type == ABC_OBJ_PO || pObj->Type == ABC_OBJ_LATCH || pObj->Type == ABC_OBJ_ASSERT; }
+static inline bool Abc_ObjIsAssert( Abc_Obj_t * pObj ) { return pObj->Type == ABC_OBJ_ASSERT; }
+static inline bool Abc_ObjIsNet( Abc_Obj_t * pObj ) { return pObj->Type == ABC_OBJ_NET; }
+static inline bool Abc_ObjIsNode( Abc_Obj_t * pObj ) { return pObj->Type == ABC_OBJ_NODE; }
+static inline bool Abc_ObjIsLatch( Abc_Obj_t * pObj ) { return pObj->Type == ABC_OBJ_LATCH; }
+static inline bool Abc_ObjIsBox( Abc_Obj_t * pObj ) { return pObj->Type == ABC_OBJ_BOX; }
// working with fanin/fanout edges
-static inline int Abc_ObjFaninNum( Abc_Obj_t * pObj ) { return pObj->vFanins.nSize; }
-static inline int Abc_ObjFanoutNum( Abc_Obj_t * pObj ) { return pObj->vFanouts.nSize; }
+static inline int Abc_ObjFaninNum( Abc_Obj_t * pObj ) { return pObj->vFanins.nSize; }
+static inline int Abc_ObjFanoutNum( Abc_Obj_t * pObj ) { return pObj->vFanouts.nSize; }
static inline int Abc_ObjFaninId( Abc_Obj_t * pObj, int i) { return pObj->vFanins.pArray[i]; }
static inline int Abc_ObjFaninId0( Abc_Obj_t * pObj ) { return pObj->vFanins.pArray[0]; }
static inline int Abc_ObjFaninId1( Abc_Obj_t * pObj ) { return pObj->vFanins.pArray[1]; }
@@ -330,19 +353,15 @@ static inline Abc_Obj_t * Abc_ObjChildCopy( Abc_Obj_t * pObj, int i ){ return Ab
static inline Abc_Obj_t * Abc_ObjChild0Copy( Abc_Obj_t * pObj ) { return Abc_ObjNotCond( Abc_ObjFanin0(pObj)->pCopy, Abc_ObjFaninC0(pObj) ); }
static inline Abc_Obj_t * Abc_ObjChild1Copy( Abc_Obj_t * pObj ) { return Abc_ObjNotCond( Abc_ObjFanin1(pObj)->pCopy, Abc_ObjFaninC1(pObj) ); }
-// checking the node type
-static inline bool Abc_NodeIsAigAnd( Abc_Obj_t * pNode ) { assert(Abc_NtkHasAig(pNode->pNtk)); return Abc_ObjFaninNum(pNode) == 2; }
-static inline bool Abc_NodeIsAigChoice( Abc_Obj_t * pNode ) { assert(Abc_NtkHasAig(pNode->pNtk)); return pNode->pData != NULL && Abc_ObjFanoutNum(pNode) > 0; }
-static inline bool Abc_NodeIsConst( Abc_Obj_t * pNode ) { assert(Abc_ObjIsNode(Abc_ObjRegular(pNode))); return Abc_ObjFaninNum(Abc_ObjRegular(pNode)) == 0; }
-extern bool Abc_NodeIsConst0( Abc_Obj_t * pNode );
-extern bool Abc_NodeIsConst1( Abc_Obj_t * pNode );
-extern bool Abc_NodeIsBuf( Abc_Obj_t * pNode );
-extern bool Abc_NodeIsInv( Abc_Obj_t * pNode );
+// checking the AIG node types
+static inline bool Abc_AigNodeIsConst( Abc_Obj_t * pNode ) { assert(Abc_NtkIsStrash(Abc_ObjRegular(pNode)->pNtk)||Abc_NtkIsSeq(Abc_ObjRegular(pNode)->pNtk)); return Abc_ObjRegular(pNode)->Type == ABC_OBJ_CONST1; }
+static inline bool Abc_AigNodeIsAnd( Abc_Obj_t * pNode ) { assert(!Abc_ObjIsComplement(pNode)); assert(Abc_NtkIsStrash(pNode->pNtk)||Abc_NtkIsSeq(pNode->pNtk)); return Abc_ObjFaninNum(pNode) == 2; }
+static inline bool Abc_AigNodeIsChoice( Abc_Obj_t * pNode ) { assert(!Abc_ObjIsComplement(pNode)); assert(Abc_NtkIsStrash(pNode->pNtk)||Abc_NtkIsSeq(pNode->pNtk)); return pNode->pData != NULL && Abc_ObjFanoutNum(pNode) > 0; }
// handling persistent nodes
-static inline int Abc_NodeIsPersistant( Abc_Obj_t * pNode ) { assert( Abc_NodeIsAigAnd(pNode) ); return pNode->fPersist; }
-static inline void Abc_NodeSetPersistant( Abc_Obj_t * pNode ) { assert( Abc_NodeIsAigAnd(pNode) ); pNode->fPersist = 1; }
-static inline void Abc_NodeClearPersistant( Abc_Obj_t * pNode ) { assert( Abc_NodeIsAigAnd(pNode) ); pNode->fPersist = 0; }
+static inline int Abc_NodeIsPersistant( Abc_Obj_t * pNode ) { assert( Abc_AigNodeIsAnd(pNode) ); return pNode->fPersist; }
+static inline void Abc_NodeSetPersistant( Abc_Obj_t * pNode ) { assert( Abc_AigNodeIsAnd(pNode) ); pNode->fPersist = 1; }
+static inline void Abc_NodeClearPersistant( Abc_Obj_t * pNode ) { assert( Abc_AigNodeIsAnd(pNode) ); pNode->fPersist = 0; }
// working with the traversal ID
static inline void Abc_NodeSetTravId( Abc_Obj_t * pNode, int TravId ) { pNode->TravId = TravId; }
@@ -362,6 +381,10 @@ static inline bool Abc_LatchIsInit1( Abc_Obj_t * pLatch ) { assert(Ab
static inline bool Abc_LatchIsInitDc( Abc_Obj_t * pLatch ) { assert(Abc_ObjIsLatch(pLatch)); return pLatch->pData == (void *)ABC_INIT_DC; }
static inline int Abc_LatchInit( Abc_Obj_t * pLatch ) { assert(Abc_ObjIsLatch(pLatch)); return (int)pLatch->pData; }
+// skewing latches
+static inline void Abc_NtkSetLatSkew ( Abc_Ntk_t * pNtk, int lat, float skew ) { Vec_FltWriteEntry( pNtk->vSkews, lat, skew ); }
+static inline float Abc_NtkGetLatSkew ( Abc_Ntk_t * pNtk, int lat ) { if (lat >= Vec_FltSize( pNtk->vSkews )) return 0; else return Vec_FltEntry( pNtk->vSkews, lat ); }
+
// outputs the runtime in seconds
#define PRT(a,t) printf("%s = ", (a)); printf("%6.2f sec\n", (float)(t)/(float)(CLOCKS_PER_SEC))
@@ -381,7 +404,7 @@ static inline int Abc_LatchInit( Abc_Obj_t * pLatch ) { assert(Ab
if ( (pNode) == NULL || !Abc_ObjIsNode(pNode) ) {} else
#define Abc_AigForEachAnd( pNtk, pNode, i ) \
for ( i = 0; (i < Vec_PtrSize((pNtk)->vObjs)) && (((pNode) = Abc_NtkObj(pNtk, i)), 1); i++ ) \
- if ( (pNode) == NULL || !Abc_NodeIsAigAnd(pNode) ) {} else
+ if ( (pNode) == NULL || !Abc_AigNodeIsAnd(pNode) ) {} else
#define Abc_NtkForEachBox( pNtk, pNode, i ) \
for ( i = 0; (i < Vec_PtrSize((pNtk)->vObjs)) && (((pNode) = Abc_NtkObj(pNtk, i)), 1); i++ ) \
if ( (pNode) == NULL || !Abc_ObjIsBox(pNode) ) {} else
@@ -423,6 +446,7 @@ extern void Abc_AigFree( Abc_Aig_t * pMan );
extern int Abc_AigCleanup( Abc_Aig_t * pMan );
extern bool Abc_AigCheck( Abc_Aig_t * pMan );
extern int Abc_AigGetLevelNum( Abc_Ntk_t * pNtk );
+extern Abc_Obj_t * Abc_AigConst1( Abc_Ntk_t * pNtk );
extern Abc_Obj_t * Abc_AigAnd( Abc_Aig_t * pMan, Abc_Obj_t * p0, Abc_Obj_t * p1 );
extern Abc_Obj_t * Abc_AigAndLookup( Abc_Aig_t * pMan, Abc_Obj_t * p0, Abc_Obj_t * p1 );
extern Abc_Obj_t * Abc_AigXorLookup( Abc_Aig_t * pMan, Abc_Obj_t * p0, Abc_Obj_t * p1, int * pType );
@@ -491,12 +515,20 @@ extern int Abc_NtkBddToSop( Abc_Ntk_t * pNtk, int fDirect );
extern void Abc_NodeBddToCnf( Abc_Obj_t * pNode, Extra_MmFlex_t * pMmMan, Vec_Str_t * vCube, char ** ppSop0, char ** ppSop1 );
extern int Abc_CountZddCubes( DdManager * dd, DdNode * zCover );
extern void Abc_NtkLogicMakeDirectSops( Abc_Ntk_t * pNtk );
+extern int Abc_NtkSopToAig( Abc_Ntk_t * pNtk );
+extern int Abc_NtkAigToBdd( Abc_Ntk_t * pNtk );
+extern int Abc_NtkMapToSop( Abc_Ntk_t * pNtk );
+extern int Abc_NtkLogicToSop( Abc_Ntk_t * pNtk, int fDirect );
+extern int Abc_NtkLogicToBdd( Abc_Ntk_t * pNtk );
+extern int Abc_NtkLogicToAig( Abc_Ntk_t * pNtk );
/*=== abcLatch.c ==========================================================*/
extern bool Abc_NtkLatchIsSelfFeed( Abc_Obj_t * pLatch );
extern int Abc_NtkCountSelfFeedLatches( Abc_Ntk_t * pNtk );
extern int Abc_NtkRemoveSelfFeedLatches( Abc_Ntk_t * pNtk );
-/*=== abcMap.c ==========================================================*/
-extern int Abc_NtkUnmap( Abc_Ntk_t * pNtk );
+/*=== abcLib.c ==========================================================*/
+extern Abc_Lib_t * Abc_LibCreate( char * pName );
+extern void Abc_LibFree( Abc_Lib_t * pLib );
+extern Abc_Ntk_t * Abc_LibDeriveRoot( Abc_Lib_t * pLib );
/*=== abcMiter.c ==========================================================*/
extern int Abc_NtkMinimumBase( Abc_Ntk_t * pNtk );
extern int Abc_NodeMinimumBase( Abc_Obj_t * pNode );
@@ -515,11 +547,14 @@ extern void Abc_NtkMiterReport( Abc_Ntk_t * pMiter );
extern int Abc_NtkAppend( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2 );
extern Abc_Ntk_t * Abc_NtkFrames( Abc_Ntk_t * pNtk, int nFrames, int fInitial );
/*=== abcObj.c ==========================================================*/
+extern Abc_Obj_t * Abc_ObjAlloc( Abc_Ntk_t * pNtk, Abc_ObjType_t Type );
+extern void Abc_ObjRecycle( Abc_Obj_t * pObj );
+extern void Abc_ObjAdd( Abc_Obj_t * pObj );
extern Abc_Obj_t * Abc_NtkDupObj( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pObj );
+extern Abc_Obj_t * Abc_NtkCloneObj( Abc_Obj_t * pNode );
extern void Abc_NtkDeleteObj( Abc_Obj_t * pObj );
extern void Abc_NtkDeleteObj_rec( Abc_Obj_t * pObj );
extern Abc_Obj_t * Abc_NtkFindNode( Abc_Ntk_t * pNtk, char * pName );
-extern Abc_Obj_t * Abc_NtkFindCo( Abc_Ntk_t * pNtk, char * pName );
extern Abc_Obj_t * Abc_NtkFindNet( Abc_Ntk_t * pNtk, char * pName );
extern Abc_Obj_t * Abc_NtkFindTerm( Abc_Ntk_t * pNtk, char * pName );
extern Abc_Obj_t * Abc_NtkFindOrCreateNet( Abc_Ntk_t * pNtk, char * pName );
@@ -535,11 +570,14 @@ extern Abc_Obj_t * Abc_NodeCreateInv( Abc_Ntk_t * pNtk, Abc_Obj_t * pFani
extern Abc_Obj_t * Abc_NodeCreateBuf( Abc_Ntk_t * pNtk, Abc_Obj_t * pFanin );
extern Abc_Obj_t * Abc_NodeCreateAnd( Abc_Ntk_t * pNtk, Vec_Ptr_t * vFanins );
extern Abc_Obj_t * Abc_NodeCreateOr( Abc_Ntk_t * pNtk, Vec_Ptr_t * vFanins );
+extern Abc_Obj_t * Abc_NodeCreateExor( Abc_Ntk_t * pNtk, Vec_Ptr_t * vFanins );
extern Abc_Obj_t * Abc_NodeCreateMux( Abc_Ntk_t * pNtk, Abc_Obj_t * pNodeC, Abc_Obj_t * pNode1, Abc_Obj_t * pNode0 );
-extern Abc_Obj_t * Abc_NodeClone( Abc_Obj_t * pNode );
-extern Abc_Obj_t * Abc_ObjAlloc( Abc_Ntk_t * pNtk, Abc_ObjType_t Type );
-extern void Abc_ObjRecycle( Abc_Obj_t * pObj );
-extern void Abc_ObjAdd( Abc_Obj_t * pObj );
+extern bool Abc_NodeIsConst( Abc_Obj_t * pNode );
+extern bool Abc_NodeIsConst0( Abc_Obj_t * pNode );
+extern bool Abc_NodeIsConst1( Abc_Obj_t * pNode );
+extern bool Abc_NodeIsBuf( Abc_Obj_t * pNode );
+extern bool Abc_NodeIsInv( Abc_Obj_t * pNode );
+extern void Abc_NodeComplement( Abc_Obj_t * pNode );
/*=== abcNames.c ====================================================*/
extern char * Abc_ObjName( Abc_Obj_t * pNode );
extern char * Abc_ObjNameSuffix( Abc_Obj_t * pObj, char * pSuffix );
@@ -598,6 +636,7 @@ extern void Abc_NtkPrintFactor( FILE * pFile, Abc_Ntk_t * pNtk, in
extern void Abc_NodePrintFactor( FILE * pFile, Abc_Obj_t * pNode, int fUseRealNames );
extern void Abc_NtkPrintLevel( FILE * pFile, Abc_Ntk_t * pNtk, int fProfile, int fListNodes );
extern void Abc_NodePrintLevel( FILE * pFile, Abc_Obj_t * pNode );
+extern void Abc_NtkPrintSkews( FILE * pFile, Abc_Ntk_t * pNtk, int fPrintAll);
/*=== abcProve.c ==========================================================*/
extern int Abc_NtkMiterProve( Abc_Ntk_t ** ppNtk, void * pParams );
/*=== abcReconv.c ==========================================================*/
@@ -657,6 +696,7 @@ extern bool Abc_SopIsBuf( char * pSop );
extern bool Abc_SopIsInv( char * pSop );
extern bool Abc_SopIsAndType( char * pSop );
extern bool Abc_SopIsOrType( char * pSop );
+extern int Abc_SopIsExorType( char * pSop );
extern bool Abc_SopCheck( char * pSop, int nFanins );
extern void Abc_SopWriteCnf( FILE * pFile, char * pClauses, Vec_Int_t * vVars );
extern void Abc_SopAddCnfToSolver( solver * pSat, char * pClauses, Vec_Int_t * vVars, Vec_Int_t * vTemp );
@@ -692,19 +732,6 @@ extern void Abc_NtkStopReverseLevels( Abc_Ntk_t * pNtk );
extern void Abc_NodeSetReverseLevel( Abc_Obj_t * pObj, int LevelR );
extern int Abc_NodeReadReverseLevel( Abc_Obj_t * pObj );
extern int Abc_NodeReadRequiredLevel( Abc_Obj_t * pObj );
-/*=== abcTrace.c ==========================================================*/
-extern void Abc_HManStart();
-extern void Abc_HManStop();
-extern int Abc_HManIsRunning();
-extern int Abc_HManGetNewNtkId();
-extern void Abc_HManAddObj( Abc_Obj_t * pObj );
-extern void Abc_HManAddFanin( Abc_Obj_t * pObj, Abc_Obj_t * pFanin );
-extern void Abc_HManXorFaninC( Abc_Obj_t * pObj, int iFanin );
-extern void Abc_HManRemoveFanins( Abc_Obj_t * pObj );
-extern void Abc_HManAddProto( Abc_Obj_t * pObj, Abc_Obj_t * pProto );
-extern void Abc_HManMapAddEqu( Abc_Obj_t * pObj, Abc_Obj_t * pEqu );
-extern int Abc_HManPopulate( Abc_Ntk_t * pNtk );
-extern int Abc_HManVerify( int NtkIdOld, int NtkIdNew );
/*=== abcUtil.c ==========================================================*/
extern void Abc_NtkIncrementTravId( Abc_Ntk_t * pNtk );
extern void Abc_NtkOrderCisCos( Abc_Ntk_t * pNtk );
@@ -712,6 +739,7 @@ extern int Abc_NtkGetCubeNum( Abc_Ntk_t * pNtk );
extern int Abc_NtkGetLitNum( Abc_Ntk_t * pNtk );
extern int Abc_NtkGetLitFactNum( Abc_Ntk_t * pNtk );
extern int Abc_NtkGetBddNodeNum( Abc_Ntk_t * pNtk );
+extern int Abc_NtkGetAigNodeNum( Abc_Ntk_t * pNtk );
extern int Abc_NtkGetClauseNum( Abc_Ntk_t * pNtk );
extern double Abc_NtkGetMappedArea( Abc_Ntk_t * pNtk );
extern int Abc_NtkGetExorNum( Abc_Ntk_t * pNtk );
diff --git a/src/base/abc/abcAig.c b/src/base/abc/abcAig.c
index 67209a31..75e0292e 100644
--- a/src/base/abc/abcAig.c
+++ b/src/base/abc/abcAig.c
@@ -50,6 +50,7 @@
struct Abc_Aig_t_
{
Abc_Ntk_t * pNtkAig; // the AIG network
+ Abc_Obj_t * pConst1; // the constant 1 object (not a node!)
Abc_Obj_t ** pBins; // the table bins
int nBins; // the size of the table
int nEntries; // the total number of entries in the table
@@ -130,10 +131,17 @@ Abc_Aig_t * Abc_AigAlloc( Abc_Ntk_t * pNtkAig )
pMan->pBins = ALLOC( Abc_Obj_t *, pMan->nBins );
memset( pMan->pBins, 0, sizeof(Abc_Obj_t *) * pMan->nBins );
pMan->vNodes = Vec_PtrAlloc( 100 );
+ pMan->vLevels = Vec_VecAlloc( 100 );
+ pMan->vLevelsR = Vec_VecAlloc( 100 );
pMan->vStackReplaceOld = Vec_PtrAlloc( 100 );
pMan->vStackReplaceNew = Vec_PtrAlloc( 100 );
- pMan->vLevels = Vec_VecAlloc( 100 );
- pMan->vLevelsR = Vec_VecAlloc( 100 );
+ // create the constant node
+ pMan->pConst1 = Abc_ObjAlloc( pNtkAig, ABC_OBJ_CONST1 );
+ // add to the array of objects, count it as object but not as node
+ assert( pNtkAig->vObjs->nSize == 0 );
+ pMan->pConst1->Id = pNtkAig->vObjs->nSize;
+ Vec_PtrPush( pNtkAig->vObjs, pMan->pConst1 );
+ pNtkAig->nObjs++;
// save the current network
pMan->pNtkAig = pNtkAig;
return pMan;
@@ -216,7 +224,7 @@ bool Abc_AigCheck( Abc_Aig_t * pMan )
nFanins = Abc_ObjFaninNum(pObj);
if ( nFanins == 0 )
{
- if ( pObj != Abc_NtkConst1(pMan->pNtkAig) )
+ if ( !Abc_AigNodeIsConst(pObj) )
{
printf( "Abc_AigCheck: The AIG has non-standard constant nodes.\n" );
return 0;
@@ -370,7 +378,7 @@ Abc_Obj_t * Abc_AigAndLookup( Abc_Aig_t * pMan, Abc_Obj_t * p0, Abc_Obj_t * p1 )
Abc_Obj_t * pAnd, * pConst1;
unsigned Key;
// check for trivial cases
- pConst1 = Abc_NtkConst1(pMan->pNtkAig);
+ pConst1 = Abc_AigConst1(pMan->pNtkAig);
if ( p0 == p1 )
return p0;
if ( p0 == Abc_ObjNot(p1) )
@@ -642,6 +650,23 @@ void Abc_AigRehash( Abc_Aig_t * pMan )
SeeAlso []
***********************************************************************/
+Abc_Obj_t * Abc_AigConst1( Abc_Ntk_t * pNtk )
+{
+ assert( Abc_NtkIsStrash(pNtk) || Abc_NtkIsSeq(pNtk) );
+ return ((Abc_Aig_t *)pNtk->pManFunc)->pConst1;
+}
+
+/**Function*************************************************************
+
+ Synopsis [Performs canonicization step.]
+
+ Description [The argument nodes can be complemented.]
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
Abc_Obj_t * Abc_AigAnd( Abc_Aig_t * pMan, Abc_Obj_t * p0, Abc_Obj_t * p1 )
{
Abc_Obj_t * pAnd;
@@ -719,7 +744,7 @@ Abc_Obj_t * Abc_AigMiter( Abc_Aig_t * pMan, Vec_Ptr_t * vPairs )
{
int i;
if ( vPairs->nSize == 0 )
- return Abc_ObjNot( Abc_NtkConst1(pMan->pNtkAig) );
+ return Abc_ObjNot( Abc_AigConst1(pMan->pNtkAig) );
assert( vPairs->nSize % 2 == 0 );
// go through the cubes of the node's SOP
for ( i = 0; i < vPairs->nSize; i += 2 )
@@ -745,7 +770,7 @@ Abc_Obj_t * Abc_AigMiter2( Abc_Aig_t * pMan, Vec_Ptr_t * vPairs )
int i;
assert( vPairs->nSize % 2 == 0 );
// go through the cubes of the node's SOP
- pMiter = Abc_ObjNot( Abc_NtkConst1(pMan->pNtkAig) );
+ pMiter = Abc_ObjNot( Abc_AigConst1(pMan->pNtkAig) );
for ( i = 0; i < vPairs->nSize; i += 2 )
{
pXor = Abc_AigXor( pMan, vPairs->pArray[i], vPairs->pArray[i+1] );
@@ -850,7 +875,6 @@ void Abc_AigReplace_int( Abc_Aig_t * pMan, Abc_Obj_t * pOld, Abc_Obj_t * pNew, i
Abc_AigAndDelete( pMan, pFanout );
// remove the fanins of the old fanout
Abc_ObjRemoveFanins( pFanout );
- Abc_HManRemoveFanins( pFanout );
// recreate the old fanout with new fanins and add it to the table
Abc_AigAndCreateFrom( pMan, pFanin1, pFanin2, pFanout );
assert( Abc_AigNodeIsAcyclic(pFanout, pFanout) );
@@ -872,7 +896,7 @@ void Abc_AigReplace_int( Abc_Aig_t * pMan, Abc_Obj_t * pOld, Abc_Obj_t * pNew, i
// the fanout has changed, update EXOR status of its fanouts
Abc_ObjForEachFanout( pFanout, pFanoutFanout, v )
- if ( Abc_NodeIsAigAnd(pFanoutFanout) )
+ if ( Abc_AigNodeIsAnd(pFanoutFanout) )
pFanoutFanout->fExor = Abc_NodeIsExorType(pFanoutFanout);
}
// if the node has no fanouts left, remove its MFFC
@@ -1199,7 +1223,7 @@ void Abc_AigPrintNode( Abc_Obj_t * pNode )
printf( "CI %4s%s.\n", Abc_ObjName(pNodeR), Abc_ObjIsComplement(pNode)? "\'" : "" );
return;
}
- if ( Abc_NodeIsConst(pNodeR) )
+ if ( Abc_AigNodeIsConst(pNodeR) )
{
printf( "Constant 1 %s.\n", Abc_ObjIsComplement(pNode)? "(complemented)" : "" );
return;
@@ -1230,7 +1254,7 @@ bool Abc_AigNodeIsAcyclic( Abc_Obj_t * pNode, Abc_Obj_t * pRoot )
Abc_Obj_t * pFanin0, * pFanin1;
Abc_Obj_t * pChild00, * pChild01;
Abc_Obj_t * pChild10, * pChild11;
- if ( !Abc_NodeIsAigAnd(pNode) )
+ if ( !Abc_AigNodeIsAnd(pNode) )
return 1;
pFanin0 = Abc_ObjFanin0(pNode);
pFanin1 = Abc_ObjFanin1(pNode);
@@ -1306,7 +1330,7 @@ void Abc_AigSetNodePhases( Abc_Ntk_t * pNtk )
Abc_Obj_t * pObj;
int i;
assert( Abc_NtkIsDfsOrdered(pNtk) );
- Abc_NtkConst1(pNtk)->fPhase = 1;
+ Abc_AigConst1(pNtk)->fPhase = 1;
// Abc_NtkForEachCi( pNtk, pObj, i )
// pObj->fPhase = 0;
Abc_NtkForEachPi( pNtk, pObj, i )
diff --git a/src/base/abc/abcDfs.c b/src/base/abc/abcDfs.c
index 8448578e..54676e9d 100644
--- a/src/base/abc/abcDfs.c
+++ b/src/base/abc/abcDfs.c
@@ -127,7 +127,7 @@ void Abc_NtkDfs_rec( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes )
// mark the node as visited
Abc_NodeSetTravIdCurrent( pNode );
// skip the CI
- if ( Abc_ObjIsCi(pNode) )
+ if ( Abc_ObjIsCi(pNode) || (Abc_NtkIsStrash(pNode->pNtk) && Abc_AigNodeIsConst(pNode)) )
return;
assert( Abc_ObjIsNode( pNode ) || Abc_ObjIsBox( pNode ) );
// visit the transitive fanin of the node
@@ -167,9 +167,10 @@ Vec_Ptr_t * Abc_NtkDfsReverse( Abc_Ntk_t * pNtk )
Abc_NtkDfsReverse_rec( pFanout, vNodes );
}
// add constant nodes in the end
- Abc_NtkForEachNode( pNtk, pObj, i )
- if ( Abc_NodeIsConst(pObj) )
- Vec_PtrPush( vNodes, pObj );
+ if ( !Abc_NtkIsStrash(pNtk) )
+ Abc_NtkForEachNode( pNtk, pObj, i )
+ if ( Abc_NodeIsConst(pObj) )
+ Vec_PtrPush( vNodes, pObj );
return vNodes;
}
@@ -235,7 +236,7 @@ bool Abc_NtkIsDfsOrdered( Abc_Ntk_t * pNtk )
if ( !Abc_NodeIsTravIdCurrent(pFanin) )
return 0;
// check the choices of the node
- if ( Abc_NtkIsStrash(pNtk) && Abc_NodeIsAigChoice(pNode) )
+ if ( Abc_NtkIsStrash(pNtk) && Abc_AigNodeIsChoice(pNode) )
for ( pFanin = pNode->pData; pFanin; pFanin = pFanin->pData )
if ( !Abc_NodeIsTravIdCurrent(pFanin) )
return 0;
@@ -399,14 +400,14 @@ void Abc_AigDfs_rec( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes )
// mark the node as visited
Abc_NodeSetTravIdCurrent( pNode );
// skip the PI
- if ( Abc_ObjIsCi(pNode) )
+ if ( Abc_ObjIsCi(pNode) || Abc_AigNodeIsConst(pNode) )
return;
assert( Abc_ObjIsNode( pNode ) );
// visit the transitive fanin of the node
Abc_ObjForEachFanin( pNode, pFanin, i )
Abc_AigDfs_rec( pFanin, vNodes );
// visit the equivalent nodes
- if ( Abc_NodeIsAigChoice( pNode ) )
+ if ( Abc_AigNodeIsChoice( pNode ) )
for ( pFanin = pNode->pData; pFanin; pFanin = pFanin->pData )
Abc_AigDfs_rec( pFanin, vNodes );
// add the node after the fanins have been added
@@ -712,7 +713,7 @@ int Abc_AigSetChoiceLevels( Abc_Ntk_t * pNtk )
Abc_NodeSetTravIdCurrent( pObj );
pObj->pCopy = NULL;
}
- pObj = Abc_NtkConst1( pNtk );
+ pObj = Abc_AigConst1( pNtk );
Abc_NodeSetTravIdCurrent( pObj );
pObj->pCopy = NULL;
// set levels of all other nodes
diff --git a/src/base/abc/abcFanio.c b/src/base/abc/abcFanio.c
index 2a84212e..1d2ae23b 100644
--- a/src/base/abc/abcFanio.c
+++ b/src/base/abc/abcFanio.c
@@ -50,7 +50,6 @@ void Abc_ObjAddFanin( Abc_Obj_t * pObj, Abc_Obj_t * pFanin )
Vec_IntPushMem( pObj->pNtk->pMmStep, &pFaninR->vFanouts, pObj->Id );
if ( Abc_ObjIsComplement(pFanin) )
Abc_ObjSetFaninC( pObj, Abc_ObjFaninNum(pObj)-1 );
-// Abc_HManAddFanin( pObj, pFanin );
}
diff --git a/src/base/abc/abcFunc.c b/src/base/abc/abcFunc.c
index da50a9aa..7ffe7eac 100644
--- a/src/base/abc/abcFunc.c
+++ b/src/base/abc/abcFunc.c
@@ -19,6 +19,8 @@
***********************************************************************/
#include "abc.h"
+#include "main.h"
+#include "mio.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
@@ -26,7 +28,9 @@
#define ABC_MUX_CUBES 100000
-static int Abc_ConvertZddToSop( DdManager * dd, DdNode * zCover, char * pSop, int nFanins, Vec_Str_t * vCube, int fPhase );
+static int Abc_ConvertZddToSop( DdManager * dd, DdNode * zCover, char * pSop, int nFanins, Vec_Str_t * vCube, int fPhase );
+static DdNode * Abc_ConvertAigToBdd( DdManager * dd, Aig_Obj_t * pRoot);
+static Aig_Obj_t * Abc_ConvertSopToAig( Aig_Man_t * pMan, char * pSop );
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
@@ -95,7 +99,6 @@ DdNode * Abc_ConvertSopToBdd( DdManager * dd, char * pSop )
DdNode * bSum, * bCube, * bTemp, * bVar;
char * pCube;
int nVars, Value, v;
- extern int Abc_SopIsExorType( char * pSop );
// start the cover
nVars = Abc_SopGetVarNum(pSop);
@@ -516,6 +519,374 @@ int Abc_CountZddCubes( DdManager * dd, DdNode * zCover )
}
+/**Function*************************************************************
+
+ Synopsis [Converts the network from SOP to AIG representation.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+int Abc_NtkSopToAig( Abc_Ntk_t * pNtk )
+{
+ Abc_Obj_t * pNode;
+ Aig_Man_t * pMan;
+ int i;
+
+ assert( Abc_NtkIsSopLogic(pNtk) );
+
+ // start the functionality manager
+ pMan = Aig_ManStart();
+
+ // convert each node from SOP to BDD
+ Abc_NtkForEachNode( pNtk, pNode, i )
+ {
+ assert( pNode->pData );
+ pNode->pData = Abc_ConvertSopToAig( pMan, pNode->pData );
+ if ( pNode->pData == NULL )
+ {
+ printf( "Abc_NtkSopToAig: Error while converting SOP into AIG.\n" );
+ return 0;
+ }
+ }
+ Extra_MmFlexStop( pNtk->pManFunc, 0 );
+ pNtk->pManFunc = pMan;
+
+ // update the network type
+ pNtk->ntkFunc = ABC_FUNC_AIG;
+ return 1;
+}
+
+
+/**Function*************************************************************
+
+ Synopsis [Strashes one logic node using its SOP.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+Aig_Obj_t * Abc_ConvertSopToAigInternal( Aig_Man_t * pMan, char * pSop )
+{
+ Aig_Obj_t * pAnd, * pSum;
+ int i, Value, nFanins;
+ char * pCube;
+ // get the number of variables
+ nFanins = Abc_SopGetVarNum(pSop);
+ // go through the cubes of the node's SOP
+ pSum = Aig_ManConst0(pMan);
+ Abc_SopForEachCube( pSop, nFanins, pCube )
+ {
+ // create the AND of literals
+ pAnd = Aig_ManConst1(pMan);
+ Abc_CubeForEachVar( pCube, Value, i )
+ {
+ if ( Value == '1' )
+ pAnd = Aig_And( pMan, pAnd, Aig_IthVar(pMan,i) );
+ else if ( Value == '0' )
+ pAnd = Aig_And( pMan, pAnd, Aig_Not(Aig_IthVar(pMan,i)) );
+ }
+ // add to the sum of cubes
+ pSum = Aig_Or( pMan, pSum, pAnd );
+ }
+ // decide whether to complement the result
+ if ( Abc_SopIsComplement(pSop) )
+ pSum = Aig_Not(pSum);
+ return pSum;
+}
+
+/**Function*************************************************************
+
+ Synopsis [Converts the network from AIG to BDD representation.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+Aig_Obj_t * Abc_ConvertSopToAig( Aig_Man_t * pMan, char * pSop )
+{
+ extern Aig_Obj_t * Dec_GraphFactorSop( Aig_Man_t * pMan, char * pSop );
+ int fUseFactor = 1;
+ // consider the constant node
+ if ( Abc_SopGetVarNum(pSop) == 0 )
+ return Aig_NotCond( Aig_ManConst1(pMan), Abc_SopIsConst0(pSop) );
+ // consider the special case of EXOR function
+ if ( Abc_SopIsExorType(pSop) )
+ return Aig_NotCond( Aig_CreateExor(pMan, Abc_SopGetVarNum(pSop)), Abc_SopIsComplement(pSop) );
+ // decide when to use factoring
+ if ( fUseFactor && Abc_SopGetVarNum(pSop) > 2 && Abc_SopGetCubeNum(pSop) > 1 )
+ return Dec_GraphFactorSop( pMan, pSop );
+ return Abc_ConvertSopToAigInternal( pMan, pSop );
+}
+
+/**Function*************************************************************
+
+ Synopsis [Converts the network from AIG to BDD representation.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+int Abc_NtkAigToBdd( Abc_Ntk_t * pNtk )
+{
+ Abc_Obj_t * pNode;
+ Aig_Man_t * pMan;
+ DdManager * dd;
+ int nFaninsMax, i;
+
+ assert( Abc_NtkIsAigLogic(pNtk) );
+
+ // start the functionality manager
+ nFaninsMax = Abc_NtkGetFaninMax( pNtk );
+ if ( nFaninsMax == 0 )
+ printf( "Warning: The network has only constant nodes.\n" );
+
+ dd = Cudd_Init( nFaninsMax, 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
+
+ // set the mapping of AIG nodes into the BDD nodes
+ pMan = pNtk->pManFunc;
+ assert( Aig_ManPiNum(pMan) >= nFaninsMax );
+ for ( i = 0; i < nFaninsMax; i++ )
+ Aig_ManPi(pMan, i)->pData = Cudd_bddIthVar(dd, i);
+
+ // convert each node from SOP to BDD
+ Abc_NtkForEachNode( pNtk, pNode, i )
+ {
+ assert( pNode->pData );
+ pNode->pData = Abc_ConvertAigToBdd( dd, pNode->pData );
+ if ( pNode->pData == NULL )
+ {
+ printf( "Abc_NtkSopToBdd: Error while converting SOP into BDD.\n" );
+ return 0;
+ }
+ Cudd_Ref( pNode->pData );
+ }
+
+ Aig_ManStop( pNtk->pManFunc );
+ pNtk->pManFunc = dd;
+
+ // update the network type
+ pNtk->ntkFunc = ABC_FUNC_BDD;
+ return 1;
+}
+
+/**Function*************************************************************
+
+ Synopsis [Construct BDDs and mark AIG nodes.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+void Abc_ConvertAigToBdd_rec1( DdManager * dd, Aig_Obj_t * pObj )
+{
+ assert( !Aig_IsComplement(pObj) );
+ if ( !Aig_ObjIsNode(pObj) || Aig_ObjIsMarkA(pObj) )
+ return;
+ Abc_ConvertAigToBdd_rec1( dd, Aig_ObjFanin0(pObj) );
+ Abc_ConvertAigToBdd_rec1( dd, Aig_ObjFanin1(pObj) );
+ pObj->pData = Cudd_bddAnd( dd, (DdNode *)Aig_ObjChild0Copy(pObj), (DdNode *)Aig_ObjChild1Copy(pObj) );
+ Cudd_Ref( pObj->pData );
+ assert( !Aig_ObjIsMarkA(pObj) ); // loop detection
+ Aig_ObjSetMarkA( pObj );
+}
+
+/**Function*************************************************************
+
+ Synopsis [Dereference BDDs and unmark AIG nodes.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+void Abc_ConvertAigToBdd_rec2( DdManager * dd, Aig_Obj_t * pObj )
+{
+ assert( !Aig_IsComplement(pObj) );
+ if ( !Aig_ObjIsNode(pObj) || !Aig_ObjIsMarkA(pObj) )
+ return;
+ Abc_ConvertAigToBdd_rec2( dd, Aig_ObjFanin0(pObj) );
+ Abc_ConvertAigToBdd_rec2( dd, Aig_ObjFanin1(pObj) );
+ Cudd_RecursiveDeref( dd, pObj->pData );
+ pObj->pData = NULL;
+ assert( Aig_ObjIsMarkA(pObj) ); // loop detection
+ Aig_ObjClearMarkA( pObj );
+}
+
+/**Function*************************************************************
+
+ Synopsis [Converts the network from AIG to BDD representation.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+DdNode * Abc_ConvertAigToBdd( DdManager * dd, Aig_Obj_t * pRoot )
+{
+ DdNode * bFunc;
+ // construct BDD
+ Abc_ConvertAigToBdd_rec1( dd, Aig_Regular(pRoot) );
+ // hold on to the result
+ bFunc = Cudd_NotCond( Aig_Regular(pRoot)->pData, Aig_IsComplement(pRoot) ); Cudd_Ref( bFunc );
+ // dereference BDD
+ Abc_ConvertAigToBdd_rec2( dd, Aig_Regular(pRoot) );
+ // return the result
+ Cudd_Deref( bFunc );
+ return bFunc;
+}
+
+/**Function*************************************************************
+
+ Synopsis [Unmaps the network.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+int Abc_NtkMapToSop( Abc_Ntk_t * pNtk )
+{
+ extern void * Abc_FrameReadLibGen();
+ Abc_Obj_t * pNode;
+ char * pSop;
+ int i;
+
+ assert( Abc_NtkIsMappedLogic(pNtk) );
+ // update the functionality manager
+ assert( pNtk->pManFunc == Abc_FrameReadLibGen() );
+ pNtk->pManFunc = Extra_MmFlexStart();
+ pNtk->ntkFunc = ABC_FUNC_SOP;
+ // update the nodes
+ Abc_NtkForEachNode( pNtk, pNode, i )
+ {
+ pSop = Mio_GateReadSop(pNode->pData);
+ assert( Abc_SopGetVarNum(pSop) == Abc_ObjFaninNum(pNode) );
+ pNode->pData = Abc_SopRegister( pNtk->pManFunc, pSop );
+ }
+ return 1;
+}
+
+/**Function*************************************************************
+
+ Synopsis [Convers logic network to the SOP form.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+int Abc_NtkLogicToSop( Abc_Ntk_t * pNtk, int fDirect )
+{
+ assert( Abc_NtkIsLogic(pNtk) );
+ if ( Abc_NtkIsSopLogic(pNtk) )
+ {
+ if ( !fDirect )
+ return 1;
+ if ( !Abc_NtkSopToBdd(pNtk) )
+ return 0;
+ return Abc_NtkBddToSop(pNtk, fDirect);
+ }
+ if ( Abc_NtkIsMappedLogic(pNtk) )
+ return Abc_NtkMapToSop(pNtk);
+ if ( Abc_NtkIsBddLogic(pNtk) )
+ return Abc_NtkBddToSop(pNtk, fDirect);
+ if ( Abc_NtkIsAigLogic(pNtk) )
+ {
+ if ( !Abc_NtkAigToBdd(pNtk) )
+ return 0;
+ return Abc_NtkBddToSop(pNtk, fDirect);
+ }
+ assert( 0 );
+ return 0;
+}
+
+/**Function*************************************************************
+
+ Synopsis [Convers logic network to the SOP form.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+int Abc_NtkLogicToBdd( Abc_Ntk_t * pNtk )
+{
+ assert( Abc_NtkIsLogic(pNtk) );
+ if ( Abc_NtkIsBddLogic(pNtk) )
+ return 1;
+ if ( Abc_NtkIsMappedLogic(pNtk) )
+ {
+ Abc_NtkMapToSop(pNtk);
+ return Abc_NtkSopToBdd(pNtk);
+ }
+ if ( Abc_NtkIsSopLogic(pNtk) )
+ return Abc_NtkSopToBdd(pNtk);
+ if ( Abc_NtkIsAigLogic(pNtk) )
+ return Abc_NtkAigToBdd(pNtk);
+ assert( 0 );
+ return 0;
+}
+
+/**Function*************************************************************
+
+ Synopsis [Convers logic network to the SOP form.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+int Abc_NtkLogicToAig( Abc_Ntk_t * pNtk )
+{
+ assert( Abc_NtkIsLogic(pNtk) );
+ if ( Abc_NtkIsAigLogic(pNtk) )
+ return 1;
+ if ( Abc_NtkIsMappedLogic(pNtk) )
+ {
+ Abc_NtkMapToSop(pNtk);
+ return Abc_NtkSopToAig(pNtk);
+ }
+ if ( Abc_NtkIsBddLogic(pNtk) )
+ {
+ if ( !Abc_NtkBddToSop(pNtk,0) )
+ return 0;
+ return Abc_NtkSopToAig(pNtk);
+ }
+ if ( Abc_NtkIsSopLogic(pNtk) )
+ return Abc_NtkSopToAig(pNtk);
+ assert( 0 );
+ return 0;
+}
+
+
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
diff --git a/src/base/abc/abcLatch.c b/src/base/abc/abcLatch.c
index 610e311a..be487051 100644
--- a/src/base/abc/abcLatch.c
+++ b/src/base/abc/abcLatch.c
@@ -110,14 +110,18 @@ int Abc_NtkCountSelfFeedLatches( Abc_Ntk_t * pNtk )
***********************************************************************/
int Abc_NtkRemoveSelfFeedLatches( Abc_Ntk_t * pNtk )
{
- Abc_Obj_t * pLatch;
+ Abc_Obj_t * pLatch, * pConst1;
int i, Counter;
Counter = 0;
Abc_NtkForEachLatch( pNtk, pLatch, i )
{
if ( Abc_NtkLatchIsSelfFeed( pLatch ) )
{
- Abc_ObjPatchFanin( pLatch, Abc_ObjFanin0(pLatch), Abc_NtkConst1(pNtk) );
+ if ( Abc_NtkIsStrash(pNtk) || Abc_NtkIsSeq(pNtk) )
+ pConst1 = Abc_AigConst1(pNtk);
+ else
+ pConst1 = Abc_NodeCreateConst1(pNtk);
+ Abc_ObjPatchFanin( pLatch, Abc_ObjFanin0(pLatch), pConst1 );
Counter++;
}
}
diff --git a/src/base/abc/abcLib.c b/src/base/abc/abcLib.c
new file mode 100644
index 00000000..80bcc516
--- /dev/null
+++ b/src/base/abc/abcLib.c
@@ -0,0 +1,116 @@
+/**CFile****************************************************************
+
+ FileName [abcLib.c]
+
+ SystemName [ABC: Logic synthesis and verification system.]
+
+ PackageName [Network and node package.]
+
+ Synopsis [Functions to manipulate verilog libraries.]
+
+ Author [Alan Mishchenko]
+
+ Affiliation [UC Berkeley]
+
+ Date [Ver. 1.0. Started - June 20, 2005.]
+
+ Revision [$Id: abcLib.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
+
+***********************************************************************/
+
+#include "abc.h"
+
+////////////////////////////////////////////////////////////////////////
+/// DECLARATIONS ///
+////////////////////////////////////////////////////////////////////////
+
+////////////////////////////////////////////////////////////////////////
+/// FUNCTION DEFINITIONS ///
+////////////////////////////////////////////////////////////////////////
+
+/**Function*************************************************************
+
+ Synopsis [Create the library.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+Abc_Lib_t * Abc_LibCreate( char * pName )
+{
+ Abc_Lib_t * p;
+ p = ALLOC( Abc_Lib_t, 1 );
+ memset( p, 0, sizeof(Abc_Lib_t) );
+ p->pName = Extra_UtilStrsav( pName );
+ p->tModules = st_init_table( strcmp, st_strhash );
+ p->pManFunc = Aig_ManStart();
+ return p;
+}
+
+/**Function*************************************************************
+
+ Synopsis [Frees the library.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+void Abc_LibFree( Abc_Lib_t * pLib )
+{
+ st_generator * gen;
+ Abc_Ntk_t * pNtk;
+ char * pName;
+ if ( pLib->pName )
+ free( pLib->pName );
+ if ( pLib->pManFunc )
+ Aig_ManStop( pLib->pManFunc );
+ if ( pLib->tModules )
+ {
+ st_foreach_item( pLib->tModules, gen, (char**)&pName, (char**)&pNtk )
+ Abc_NtkDelete( pNtk );
+ st_free_table( pLib->tModules );
+ }
+ free( pLib );
+}
+
+/**Function*************************************************************
+
+ Synopsis [Frees the library.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+Abc_Ntk_t * Abc_LibDeriveRoot( Abc_Lib_t * pLib )
+{
+ st_generator * gen;
+ Abc_Ntk_t * pNtk;
+ char * pName;
+ if ( st_count(pLib->tModules) > 1 )
+ {
+ printf( "The design includes more than one module and is currently not used.\n" );
+ return NULL;
+ }
+ // find the network
+ st_foreach_item( pLib->tModules, gen, (char**)&pName, (char**)&pNtk )
+ {
+ st_free_gen(gen);
+ break;
+ }
+ return pNtk;
+}
+
+////////////////////////////////////////////////////////////////////////
+/// END OF FILE ///
+////////////////////////////////////////////////////////////////////////
+
+
diff --git a/src/base/abc/abcNames.c b/src/base/abc/abcNames.c
index e2172872..ef1d0980 100644
--- a/src/base/abc/abcNames.c
+++ b/src/base/abc/abcNames.c
@@ -45,6 +45,7 @@ char * Abc_ObjName( Abc_Obj_t * pObj )
{
static char Buffer[500];
char * pName;
+ int Counter;
// check if the object is in the lookup table
// if ( stmm_lookup( pObj->pNtk->tObj2Name, (char *)pObj, &pName ) )
@@ -63,7 +64,11 @@ char * Abc_ObjName( Abc_Obj_t * pObj )
if ( pObj->pData )
sprintf( Buffer, "%s", pObj->pData );
else
+ {
sprintf( Buffer, "[%d]", pObj->Id ); // make sure this name is unique!!!
+ for ( Counter = 1; Nm_ManFindIdByName(pObj->pNtk->pManName, Buffer, NULL) >= 0; Counter++ )
+ sprintf( Buffer, "[%d]_%d", pObj->Id, Counter );
+ }
}
else
{
@@ -71,6 +76,8 @@ char * Abc_ObjName( Abc_Obj_t * pObj )
// internal nodes have made up names
assert( Abc_ObjIsNode(pObj) || Abc_ObjIsLatch(pObj) );
sprintf( Buffer, "[%d]", pObj->Id );
+ for ( Counter = 1; Nm_ManFindIdByName(pObj->pNtk->pManName, Buffer, NULL) >= 0; Counter++ )
+ sprintf( Buffer, "[%d]_%d", pObj->Id, Counter );
}
return Buffer;
}
diff --git a/src/base/abc/abcNetlist.c b/src/base/abc/abcNetlist.c
index f9e529c7..456d2aa2 100644
--- a/src/base/abc/abcNetlist.c
+++ b/src/base/abc/abcNetlist.c
@@ -264,8 +264,18 @@ Abc_Ntk_t * Abc_NtkLogicToNetlist( Abc_Ntk_t * pNtk, int fDirect )
pNtkNew = Abc_NtkLogicSopToNetlist( pNtk );
Abc_NtkSopToBdd(pNtk);
}
- else
+ else if ( Abc_NtkIsAigLogic(pNtk) )
+ {
+ if ( !Abc_NtkAigToBdd(pNtk) )
+ return NULL;
+ if ( !Abc_NtkBddToSop(pNtk, fDirect) )
+ return NULL;
+ pNtkNew = Abc_NtkLogicSopToNetlist( pNtk );
+ Abc_NtkSopToAig(pNtk);
+ }
+ else if ( Abc_NtkIsSopLogic(pNtk) || Abc_NtkIsMappedLogic(pNtk) )
pNtkNew = Abc_NtkLogicSopToNetlist( pNtk );
+ else assert( 0 );
return pNtkNew;
}
@@ -408,20 +418,20 @@ Abc_Ntk_t * Abc_NtkAigToLogicSop( Abc_Ntk_t * pNtk )
assert( Abc_NtkIsStrash(pNtk) );
// start the network
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_SOP );
+ // if the constant node is used, duplicate it
+ pObj = Abc_AigConst1(pNtk);
+ if ( Abc_ObjFanoutNum(pObj) > 0 )
+ pObj->pCopy = Abc_NodeCreateConst1(pNtkNew);
// duplicate the nodes and create node functions
Abc_NtkForEachNode( pNtk, pObj, i )
{
- if ( Abc_NodeIsConst(pObj) )
- continue;
Abc_NtkDupObj(pNtkNew, pObj);
pObj->pCopy->pData = Abc_SopCreateAnd2( pNtkNew->pManFunc, Abc_ObjFaninC0(pObj), Abc_ObjFaninC1(pObj) );
}
// create the choice nodes
Abc_NtkForEachNode( pNtk, pObj, i )
{
- if ( Abc_NodeIsConst(pObj) )
- continue;
- if ( !Abc_NodeIsAigChoice(pObj) )
+ if ( !Abc_AigNodeIsChoice(pObj) )
continue;
// create an OR gate
pNodeNew = Abc_NtkCreateNode(pNtkNew);
@@ -497,17 +507,20 @@ Abc_Ntk_t * Abc_NtkAigToLogicSopBench( Abc_Ntk_t * pNtk )
// collect the nodes to be used (marks all nodes with current TravId)
vNodes = Abc_NtkDfs( pNtk, 0 );
// create inverters for the CI and remember them
+ pObj = Abc_AigConst1(pNtk);
+ if ( Abc_AigNodeHasComplFanoutEdgeTrav(pObj) )
+ {
+ pObj->pCopy = Abc_NodeCreateConst1(pNtkNew);
+ pObj->pCopy->pCopy = Abc_NodeCreateInv( pNtkNew, pObj->pCopy );
+ }
Abc_NtkForEachCi( pNtk, pObj, i )
if ( Abc_AigNodeHasComplFanoutEdgeTrav(pObj) )
pObj->pCopy->pCopy = Abc_NodeCreateInv( pNtkNew, pObj->pCopy );
// duplicate the nodes, create node functions, and inverters
Vec_PtrForEachEntry( vNodes, pObj, i )
{
- if ( !Abc_NodeIsConst(pObj) )
- {
- Abc_NtkDupObj( pNtkNew, pObj );
- pObj->pCopy->pData = Abc_SopCreateAnd( pNtkNew->pManFunc, 2, NULL );
- }
+ Abc_NtkDupObj( pNtkNew, pObj );
+ pObj->pCopy->pData = Abc_SopCreateAnd( pNtkNew->pManFunc, 2, NULL );
if ( Abc_AigNodeHasComplFanoutEdgeTrav(pObj) )
pObj->pCopy->pCopy = Abc_NodeCreateInv( pNtkNew, pObj->pCopy );
}
diff --git a/src/base/abc/abcNtk.c b/src/base/abc/abcNtk.c
index 1a07ebf2..f21d79be 100644
--- a/src/base/abc/abcNtk.c
+++ b/src/base/abc/abcNtk.c
@@ -50,49 +50,40 @@ Abc_Ntk_t * Abc_NtkAlloc( Abc_NtkType_t Type, Abc_NtkFunc_t Func )
memset( pNtk, 0, sizeof(Abc_Ntk_t) );
pNtk->ntkType = Type;
pNtk->ntkFunc = Func;
- pNtk->Id = !Abc_HManIsRunning()? 0 : Abc_HManGetNewNtkId();
// start the object storage
pNtk->vObjs = Vec_PtrAlloc( 100 );
pNtk->vLatches = Vec_PtrAlloc( 100 );
pNtk->vAsserts = Vec_PtrAlloc( 100 );
+ pNtk->vPios = Vec_PtrAlloc( 100 );
pNtk->vPis = Vec_PtrAlloc( 100 );
pNtk->vPos = Vec_PtrAlloc( 100 );
pNtk->vCis = Vec_PtrAlloc( 100 );
pNtk->vCos = Vec_PtrAlloc( 100 );
pNtk->vCutSet = Vec_PtrAlloc( 100 );
+ pNtk->vBoxes = Vec_PtrAlloc( 100 );
+ pNtk->vSkews = Vec_FltAlloc( 100 );
// start the memory managers
pNtk->pMmObj = Extra_MmFixedStart( sizeof(Abc_Obj_t) );
pNtk->pMmStep = Extra_MmStepStart( ABC_NUM_STEPS );
// get ready to assign the first Obj ID
pNtk->nTravIds = 1;
// start the functionality manager
- if ( Abc_NtkHasSop(pNtk) )
+ if ( Abc_NtkIsStrash(pNtk) )
+ pNtk->pManFunc = Abc_AigAlloc( pNtk );
+ else if ( Abc_NtkIsSeq(pNtk) )
+ pNtk->pManFunc = Seq_Create( pNtk );
+ else if ( Abc_NtkHasSop(pNtk) )
pNtk->pManFunc = Extra_MmFlexStart();
else if ( Abc_NtkHasBdd(pNtk) )
pNtk->pManFunc = Cudd_Init( 20, 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
else if ( Abc_NtkHasAig(pNtk) )
- {
- if ( Abc_NtkIsStrash(pNtk) )
- pNtk->pManFunc = Abc_AigAlloc( pNtk );
- else
- pNtk->pManFunc = Seq_Create( pNtk );
- }
+ pNtk->pManFunc = Aig_ManStart();
else if ( Abc_NtkHasMapping(pNtk) )
pNtk->pManFunc = Abc_FrameReadLibGen();
else if ( !Abc_NtkHasBlackbox(pNtk) )
assert( 0 );
- // allocate constant node
- if ( !Abc_NtkIsNetlist(pNtk) )
- {
- Abc_NodeCreateConst1( pNtk );
- // do not count this node towards the total number of nodes
- pNtk->nNodes -= 1;
- }
- else
- Vec_PtrPush( pNtk->vObjs, NULL );
// name manager
pNtk->pManName = Nm_ManCreate( 1000 );
-//printf( "Allocated newtork %p\n", pNtk );
return pNtk;
}
@@ -123,8 +114,8 @@ Abc_Ntk_t * Abc_NtkStartFrom( Abc_Ntk_t * pNtk, Abc_NtkType_t Type, Abc_NtkFunc_
Abc_NtkForEachNode( pNtk, pObj, i )
pObj->pCopy = NULL;
// map the constant nodes
- if ( Abc_NtkConst1(pNtk) )
- Abc_NtkConst1(pNtk)->pCopy = Abc_NtkConst1(pNtkNew);
+ if ( Abc_NtkIsStrash(pNtk) && Abc_NtkIsStrash(pNtkNew) )
+ Abc_AigConst1(pNtk)->pCopy = Abc_AigConst1(pNtkNew);
// clone the PIs/POs/latches
Abc_NtkForEachPi( pNtk, pObj, i )
Abc_NtkDupObj(pNtkNew, pObj);
@@ -134,14 +125,6 @@ Abc_Ntk_t * Abc_NtkStartFrom( Abc_Ntk_t * pNtk, Abc_NtkType_t Type, Abc_NtkFunc_
Abc_NtkDupObj(pNtkNew, pObj);
Abc_NtkForEachLatch( pNtk, pObj, i )
Abc_NtkDupObj(pNtkNew, pObj);
- if ( Abc_NtkIsStrash(pNtk) && Abc_HManIsRunning() )
- {
- Abc_HManAddProto( Abc_NtkConst1(pNtk)->pCopy, Abc_NtkConst1(pNtk) );
- Abc_NtkForEachCi( pNtk, pObj, i )
- Abc_HManAddProto( pObj->pCopy, pObj );
- Abc_NtkForEachCo( pNtk, pObj, i )
- Abc_HManAddProto( pObj->pCopy, pObj );
- }
// transfer the names
if ( Type != ABC_NTK_NETLIST )
Abc_NtkDupCioNamesTable( pNtk, pNtkNew );
@@ -180,8 +163,8 @@ Abc_Ntk_t * Abc_NtkStartFromNoLatches( Abc_Ntk_t * pNtk, Abc_NtkType_t Type, Abc
Abc_NtkForEachNode( pNtk, pObj, i )
pObj->pCopy = NULL;
// map the constant nodes
- if ( Abc_NtkConst1(pNtk) )
- Abc_NtkConst1(pNtk)->pCopy = Abc_NtkConst1(pNtkNew);
+ if ( Abc_NtkIsStrash(pNtk) && Abc_NtkIsStrash(pNtkNew) )
+ Abc_AigConst1(pNtk)->pCopy = Abc_AigConst1(pNtkNew);
// clone the PIs/POs/latches
Abc_NtkForEachPi( pNtk, pObj, i )
Abc_NtkDupObj(pNtkNew, pObj);
@@ -226,8 +209,8 @@ Abc_Ntk_t * Abc_NtkStartFromDual( Abc_Ntk_t * pNtk, Abc_NtkType_t Type, Abc_NtkF
Abc_NtkForEachNode( pNtk, pObj, i )
pObj->pCopy = NULL;
// map the constant nodes
- if ( Abc_NtkConst1(pNtk) )
- Abc_NtkConst1(pNtk)->pCopy = Abc_NtkConst1(pNtkNew);
+ if ( Abc_NtkIsStrash(pNtk) && Abc_NtkIsStrash(pNtkNew) )
+ Abc_AigConst1(pNtk)->pCopy = Abc_AigConst1(pNtkNew);
// clone the PIs/POs/latches
Abc_NtkForEachPi( pNtk, pObj, i )
Abc_NtkDupObj(pNtkNew, pObj);
@@ -412,11 +395,6 @@ Abc_Ntk_t * Abc_NtkDup( Abc_Ntk_t * pNtk )
Abc_ObjForEachFanin( pObj, pFanin, k )
Abc_ObjAddFanin( pObj->pCopy, pFanin->pCopy );
}
- if ( Abc_NtkIsStrash(pNtk) && Abc_HManIsRunning() )
- {
- Abc_AigForEachAnd( pNtk, pObj, i )
- Abc_HManAddProto( pObj->pCopy, pObj );
- }
// duplicate the EXDC Ntk
if ( pNtk->pExdc )
pNtkNew->pExdc = Abc_NtkDup( pNtk->pExdc );
@@ -454,7 +432,8 @@ Abc_Ntk_t * Abc_NtkCreateCone( Abc_Ntk_t * pNtk, Abc_Obj_t * pNode, char * pNode
pNtkNew->pName = Extra_UtilStrsav(Buffer);
// establish connection between the constant nodes
- Abc_NtkConst1(pNtk)->pCopy = Abc_NtkConst1(pNtkNew);
+ if ( Abc_NtkIsStrash(pNtk) )
+ Abc_AigConst1(pNtk)->pCopy = Abc_AigConst1(pNtkNew);
// collect the nodes in the TFI of the output (mark the TFI)
vNodes = Abc_NtkDfsNodes( pNtk, &pNode, 1 );
@@ -523,7 +502,8 @@ Abc_Ntk_t * Abc_NtkCreateMffc( Abc_Ntk_t * pNtk, Abc_Obj_t * pNode, char * pNode
pNtkNew->pName = Extra_UtilStrsav(Buffer);
// establish connection between the constant nodes
- Abc_NtkConst1(pNtk)->pCopy = Abc_NtkConst1(pNtkNew);
+ if ( Abc_NtkIsStrash(pNtk) )
+ Abc_AigConst1(pNtk)->pCopy = Abc_AigConst1(pNtkNew);
// collect the nodes in MFFC
vCone = Vec_PtrAlloc( 100 );
@@ -584,6 +564,10 @@ Abc_Ntk_t * Abc_NtkCreateTarget( Abc_Ntk_t * pNtk, Vec_Ptr_t * vRoots, Vec_Int_t
int i;
assert( Abc_NtkIsLogic(pNtk) );
+
+ // convert the network into the AIG form
+ if ( !Abc_NtkLogicToAig(pNtk) )
+ return NULL;
// start the network
Abc_NtkCleanCopy( pNtk );
@@ -604,7 +588,7 @@ Abc_Ntk_t * Abc_NtkCreateTarget( Abc_Ntk_t * pNtk, Vec_Ptr_t * vRoots, Vec_Int_t
Vec_PtrFree( vNodes );
// add the PO
- pFinal = Abc_NtkConst1( pNtkNew );
+ pFinal = Abc_AigConst1( pNtkNew );
Vec_PtrForEachEntry( vRoots, pObj, i )
{
if ( Abc_ObjIsCo(pObj) )
@@ -746,6 +730,7 @@ void Abc_NtkDelete( Abc_Ntk_t * pNtk )
if ( pNtk->pExdc )
Abc_NtkDelete( pNtk->pExdc );
// free the arrays
+ Vec_PtrFree( pNtk->vPios );
Vec_PtrFree( pNtk->vPis );
Vec_PtrFree( pNtk->vPos );
Vec_PtrFree( pNtk->vCis );
@@ -754,6 +739,8 @@ void Abc_NtkDelete( Abc_Ntk_t * pNtk )
Vec_PtrFree( pNtk->vLatches );
Vec_PtrFree( pNtk->vObjs );
Vec_PtrFree( pNtk->vCutSet );
+ Vec_PtrFree( pNtk->vBoxes );
+ Vec_FltFree( pNtk->vSkews );
if ( pNtk->pModel ) free( pNtk->pModel );
TotalMemory = 0;
TotalMemory += Extra_MmFixedReadMemUsage(pNtk->pMmObj);
@@ -762,25 +749,26 @@ void Abc_NtkDelete( Abc_Ntk_t * pNtk )
// free the storage
Extra_MmFixedStop( pNtk->pMmObj, 0 );
Extra_MmStepStop ( pNtk->pMmStep, 0 );
+ // name manager
+ Nm_ManFree( pNtk->pManName );
// free the timing manager
if ( pNtk->pManTime )
Abc_ManTimeStop( pNtk->pManTime );
// start the functionality manager
- if ( Abc_NtkHasSop(pNtk) )
+ if ( Abc_NtkIsStrash(pNtk) )
+ Abc_AigFree( pNtk->pManFunc );
+ else if ( Abc_NtkIsSeq(pNtk) )
+ Seq_Delete( pNtk->pManFunc );
+ else if ( Abc_NtkHasSop(pNtk) )
Extra_MmFlexStop( pNtk->pManFunc, 0 );
else if ( Abc_NtkHasBdd(pNtk) )
Extra_StopManager( pNtk->pManFunc );
else if ( Abc_NtkHasAig(pNtk) )
- {
- if ( Abc_NtkIsStrash(pNtk) )
- Abc_AigFree( pNtk->pManFunc );
- else
- Seq_Delete( pNtk->pManFunc );
- }
- else if ( !Abc_NtkHasMapping(pNtk) && !Abc_NtkHasBlackbox(pNtk) )
+ Aig_ManStop( pNtk->pManFunc );
+ else if ( Abc_NtkHasMapping(pNtk) )
+ pNtk->pManFunc = NULL;
+ else if ( !Abc_NtkHasBlackbox(pNtk) )
assert( 0 );
- // name manager
- Nm_ManFree( pNtk->pManName );
// free the hierarchy
if ( Abc_NtkIsNetlist(pNtk) && pNtk->tName2Model )
{
@@ -820,9 +808,7 @@ void Abc_NtkFixNonDrivenNets( Abc_Ntk_t * pNtk )
if ( Abc_ObjFaninNum(pNet) > 0 )
continue;
// add the constant 0 driver
- pNode = Abc_NtkCreateNode( pNtk );
- // set the constant function
- Abc_ObjSetData( pNode, Abc_SopRegister(pNtk->pManFunc, " 0\n") );
+ pNode = Abc_NodeCreateConst0( pNtk );
// add the fanout net
Abc_ObjAddFanin( pNet, pNode );
// add the net to those for which the warning will be printed
diff --git a/src/base/abc/abcObj.c b/src/base/abc/abcObj.c
index 337ba428..2811be16 100644
--- a/src/base/abc/abcObj.c
+++ b/src/base/abc/abcObj.c
@@ -50,8 +50,6 @@ Abc_Obj_t * Abc_ObjAlloc( Abc_Ntk_t * pNtk, Abc_ObjType_t Type )
pObj->pNtk = pNtk;
pObj->Type = Type;
pObj->Id = -1;
- if ( pNtk->ntkType != ABC_NTK_NETLIST )
- Abc_HManAddObj( pObj );
return pObj;
}
@@ -99,13 +97,13 @@ void Abc_ObjAdd( Abc_Obj_t * pObj )
Vec_PtrPush( pNtk->vObjs, pObj );
pNtk->nObjs++;
// perform specialized operations depending on the object type
- if ( Abc_ObjIsNet(pObj) )
+ if ( Abc_ObjIsNode(pObj) )
{
- pNtk->nNets++;
+ pNtk->nNodes++;
}
- else if ( Abc_ObjIsNode(pObj) )
+ else if ( Abc_ObjIsNet(pObj) )
{
- pNtk->nNodes++;
+ pNtk->nNets++;
}
else if ( Abc_ObjIsPi(pObj) )
{
@@ -128,14 +126,20 @@ void Abc_ObjAdd( Abc_Obj_t * pObj )
Vec_PtrPush( pNtk->vAsserts, pObj );
Vec_PtrPush( pNtk->vCos, pObj );
}
- else if ( Abc_ObjIsBox(pObj) )
+ else if ( Abc_ObjIsBi(pObj) )
{
- pNtk->nBoxes++;
+ Vec_PtrPush( pNtk->vCis, pObj );
}
- else
+ else if ( Abc_ObjIsBo(pObj) )
{
- assert( 0 );
+ Vec_PtrPush( pNtk->vCos, pObj );
}
+ else if ( Abc_ObjIsBox(pObj) )
+ {
+ pNtk->nBoxes++;
+ Vec_PtrPush( pNtk->vBoxes, pObj );
+ }
+ else assert( 0 );
}
/**Function*************************************************************
@@ -161,14 +165,17 @@ Abc_Obj_t * Abc_NtkDupObj( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pObj )
{
if ( pNtkNew->ntkFunc == pObj->pNtk->ntkFunc )
{
- if ( Abc_NtkHasSop(pNtkNew) )
+ if ( Abc_NtkIsStrash(pNtkNew) || Abc_NtkIsSeq(pNtkNew) )
+ {}
+ else if ( Abc_NtkHasSop(pNtkNew) )
pObjNew->pData = Abc_SopRegister( pNtkNew->pManFunc, pObj->pData );
else if ( Abc_NtkHasBdd(pNtkNew) )
pObjNew->pData = Cudd_bddTransfer(pObj->pNtk->pManFunc, pNtkNew->pManFunc, pObj->pData), Cudd_Ref(pObjNew->pData);
+ else if ( Abc_NtkHasAig(pNtkNew) )
+ pObjNew->pData = Aig_Transfer(pObj->pNtk->pManFunc, pNtkNew->pManFunc, pObj->pData, Abc_ObjFaninNum(pObj));
else if ( Abc_NtkHasMapping(pNtkNew) )
pObjNew->pData = pObj->pData;
- else if ( !Abc_NtkHasAig(pNtkNew) )
- assert( 0 );
+ else assert( 0 );
}
}
else if ( Abc_ObjIsNet(pObj) ) // copy the name
@@ -181,6 +188,27 @@ Abc_Obj_t * Abc_NtkDupObj( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pObj )
return pObjNew;
}
+/**Function*************************************************************
+
+ Synopsis [Clones the objects in the same network but does not assign its function.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+Abc_Obj_t * Abc_NtkCloneObj( Abc_Obj_t * pObj )
+{
+ Abc_Obj_t * pClone, * pFanin;
+ int i;
+ pClone = Abc_ObjAlloc( pObj->pNtk, pObj->Type );
+ Abc_ObjAdd( pClone );
+ Abc_ObjForEachFanin( pObj, pFanin, i )
+ Abc_ObjAddFanin( pClone, pFanin );
+ return pClone;
+}
/**Function*************************************************************
@@ -249,6 +277,14 @@ void Abc_NtkDeleteObj( Abc_Obj_t * pObj )
Vec_PtrRemove( pObj->pNtk->vPos, pObj );
Vec_PtrRemove( pObj->pNtk->vCos, pObj );
}
+ else if ( Abc_ObjIsBi(pObj) )
+ {
+ Vec_PtrRemove( pObj->pNtk->vCis, pObj );
+ }
+ else if ( Abc_ObjIsBo(pObj) )
+ {
+ Vec_PtrRemove( pObj->pNtk->vCos, pObj );
+ }
else if ( Abc_ObjIsAssert(pObj) )
{
Vec_PtrRemove( pObj->pNtk->vAsserts, pObj );
@@ -257,6 +293,7 @@ void Abc_NtkDeleteObj( Abc_Obj_t * pObj )
else if ( Abc_ObjIsBox(pObj) )
{
pNtk->nBoxes--;
+ Vec_PtrRemove( pObj->pNtk->vBoxes, pObj );
}
else
assert( 0 );
@@ -371,30 +408,6 @@ Abc_Obj_t * Abc_NtkFindNode( Abc_Ntk_t * pNtk, char * pName )
SeeAlso []
***********************************************************************/
-Abc_Obj_t * Abc_NtkFindCo( Abc_Ntk_t * pNtk, char * pName )
-{
- Abc_Obj_t * pNode;
- int i;
- // search the node among COs
- Abc_NtkForEachCo( pNtk, pNode, i )
- {
- if ( strcmp( Abc_ObjName(pNode), pName ) == 0 )
- return pNode;
- }
- return NULL;
-}
-
-/**Function*************************************************************
-
- Synopsis [Returns the net with the given name.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
Abc_Obj_t * Abc_NtkFindNet( Abc_Ntk_t * pNtk, char * pName )
{
Abc_Obj_t * pNet;
@@ -409,7 +422,7 @@ Abc_Obj_t * Abc_NtkFindNet( Abc_Ntk_t * pNtk, char * pName )
/**Function*************************************************************
- Synopsis [Returns the net with the given name.]
+ Synopsis [Returns the CI/CO terminal with the given name.]
Description []
@@ -456,7 +469,7 @@ Abc_Obj_t * Abc_NtkFindOrCreateNet( Abc_Ntk_t * pNtk, char * pName )
/**Function*************************************************************
- Synopsis [Create the new node.]
+ Synopsis [Create node.]
Description []
@@ -472,10 +485,10 @@ Abc_Obj_t * Abc_NtkCreateNode( Abc_Ntk_t * pNtk )
Abc_ObjAdd( pObj );
return pObj;
}
-
+
/**Function*************************************************************
- Synopsis [Create the new node.]
+ Synopsis [Create multi-input/multi-output box.]
Description []
@@ -494,7 +507,7 @@ Abc_Obj_t * Abc_NtkCreateBox( Abc_Ntk_t * pNtk )
/**Function*************************************************************
- Synopsis [Create the new node.]
+ Synopsis [Create primary input.]
Description []
@@ -513,7 +526,7 @@ Abc_Obj_t * Abc_NtkCreatePi( Abc_Ntk_t * pNtk )
/**Function*************************************************************
- Synopsis [Create the new node.]
+ Synopsis [Create primary output.]
Description []
@@ -532,7 +545,7 @@ Abc_Obj_t * Abc_NtkCreatePo( Abc_Ntk_t * pNtk )
/**Function*************************************************************
- Synopsis [Create the new node.]
+ Synopsis [Creates latch.]
Description []
@@ -552,7 +565,7 @@ Abc_Obj_t * Abc_NtkCreateLatch( Abc_Ntk_t * pNtk )
/**Function*************************************************************
- Synopsis [Create the new node.]
+ Synopsis [Creates assert.]
Description []
@@ -571,7 +584,7 @@ Abc_Obj_t * Abc_NtkCreateAssert( Abc_Ntk_t * pNtk )
/**Function*************************************************************
- Synopsis [Creates inverter.]
+ Synopsis [Creates constant 0 node.]
Description []
@@ -583,12 +596,14 @@ Abc_Obj_t * Abc_NtkCreateAssert( Abc_Ntk_t * pNtk )
Abc_Obj_t * Abc_NodeCreateConst0( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pNode;
- assert( !Abc_NtkHasAig(pNtk) );
+ assert( Abc_NtkIsLogic(pNtk) || Abc_NtkIsNetlist(pNtk) );
pNode = Abc_NtkCreateNode( pNtk );
if ( Abc_NtkHasSop(pNtk) )
pNode->pData = Abc_SopRegister( pNtk->pManFunc, " 0\n" );
else if ( Abc_NtkHasBdd(pNtk) )
pNode->pData = Cudd_ReadLogicZero(pNtk->pManFunc), Cudd_Ref( pNode->pData );
+ else if ( Abc_NtkHasAig(pNtk) )
+ pNode->pData = Aig_ManConst0(pNtk->pManFunc);
else if ( Abc_NtkHasMapping(pNtk) )
pNode->pData = Mio_LibraryReadConst0(Abc_FrameReadLibGen());
else if ( !Abc_NtkHasBlackbox(pNtk) )
@@ -598,7 +613,7 @@ Abc_Obj_t * Abc_NodeCreateConst0( Abc_Ntk_t * pNtk )
/**Function*************************************************************
- Synopsis [Creates inverter.]
+ Synopsis [Creates constant 1 node.]
Description []
@@ -610,13 +625,14 @@ Abc_Obj_t * Abc_NodeCreateConst0( Abc_Ntk_t * pNtk )
Abc_Obj_t * Abc_NodeCreateConst1( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pNode;
+ assert( Abc_NtkIsLogic(pNtk) || Abc_NtkIsNetlist(pNtk) );
pNode = Abc_NtkCreateNode( pNtk );
- if ( Abc_NtkHasAig(pNtk) )
- return pNode;
if ( Abc_NtkHasSop(pNtk) )
pNode->pData = Abc_SopRegister( pNtk->pManFunc, " 1\n" );
else if ( Abc_NtkHasBdd(pNtk) )
pNode->pData = Cudd_ReadOne(pNtk->pManFunc), Cudd_Ref( pNode->pData );
+ else if ( Abc_NtkHasAig(pNtk) )
+ pNode->pData = Aig_ManConst1(pNtk->pManFunc);
else if ( Abc_NtkHasMapping(pNtk) )
pNode->pData = Mio_LibraryReadConst1(Abc_FrameReadLibGen());
else if ( !Abc_NtkHasBlackbox(pNtk) )
@@ -645,6 +661,8 @@ Abc_Obj_t * Abc_NodeCreateInv( Abc_Ntk_t * pNtk, Abc_Obj_t * pFanin )
pNode->pData = Abc_SopRegister( pNtk->pManFunc, "0 1\n" );
else if ( Abc_NtkHasBdd(pNtk) )
pNode->pData = Cudd_Not(Cudd_bddIthVar(pNtk->pManFunc,0)), Cudd_Ref( pNode->pData );
+ else if ( Abc_NtkHasAig(pNtk) )
+ pNode->pData = Aig_Not(Aig_IthVar(pNtk->pManFunc,0));
else if ( Abc_NtkHasMapping(pNtk) )
pNode->pData = Mio_LibraryReadInv(Abc_FrameReadLibGen());
else
@@ -673,6 +691,8 @@ Abc_Obj_t * Abc_NodeCreateBuf( Abc_Ntk_t * pNtk, Abc_Obj_t * pFanin )
pNode->pData = Abc_SopRegister( pNtk->pManFunc, "1 1\n" );
else if ( Abc_NtkHasBdd(pNtk) )
pNode->pData = Cudd_bddIthVar(pNtk->pManFunc,0), Cudd_Ref( pNode->pData );
+ else if ( Abc_NtkHasAig(pNtk) )
+ pNode->pData = Aig_IthVar(pNtk->pManFunc,0);
else if ( Abc_NtkHasMapping(pNtk) )
pNode->pData = Mio_LibraryReadBuf(Abc_FrameReadLibGen());
else
@@ -682,7 +702,7 @@ Abc_Obj_t * Abc_NodeCreateBuf( Abc_Ntk_t * pNtk, Abc_Obj_t * pFanin )
/**Function*************************************************************
- Synopsis [Creates inverter.]
+ Synopsis [Creates AND.]
Description []
@@ -695,35 +715,16 @@ Abc_Obj_t * Abc_NodeCreateAnd( Abc_Ntk_t * pNtk, Vec_Ptr_t * vFanins )
{
Abc_Obj_t * pNode;
int i;
- assert( Abc_NtkIsLogic(pNtk) );
+ assert( Abc_NtkIsLogic(pNtk) || Abc_NtkIsNetlist(pNtk) );
pNode = Abc_NtkCreateNode( pNtk );
for ( i = 0; i < vFanins->nSize; i++ )
Abc_ObjAddFanin( pNode, vFanins->pArray[i] );
if ( Abc_NtkHasSop(pNtk) )
- {
- char * pSop;
- pSop = Extra_MmFlexEntryFetch( pNtk->pManFunc, vFanins->nSize + 4 );
- for ( i = 0; i < vFanins->nSize; i++ )
- pSop[i] = '1';
- pSop[i++] = ' ';
- pSop[i++] = '1';
- pSop[i++] = '\n';
- pSop[i++] = 0;
- assert( i == vFanins->nSize + 4 );
- pNode->pData = pSop;
- }
+ pNode->pData = Abc_SopCreateAnd( pNtk->pManFunc, Vec_PtrSize(vFanins), NULL );
else if ( Abc_NtkHasBdd(pNtk) )
- {
- DdManager * dd = pNtk->pManFunc;
- DdNode * bFunc, * bTemp;
- bFunc = Cudd_ReadOne(dd); Cudd_Ref( bFunc );
- for ( i = 0; i < vFanins->nSize; i++ )
- {
- bFunc = Cudd_bddAnd( dd, bTemp = bFunc, Cudd_bddIthVar(pNtk->pManFunc,i) ); Cudd_Ref( bFunc );
- Cudd_RecursiveDeref( dd, bTemp );
- }
- pNode->pData = bFunc;
- }
+ pNode->pData = Extra_bddCreateAnd( pNtk->pManFunc, Vec_PtrSize(vFanins) ), Cudd_Ref(pNode->pData);
+ else if ( Abc_NtkHasAig(pNtk) )
+ pNode->pData = Aig_CreateAnd( pNtk->pManFunc, Vec_PtrSize(vFanins) );
else
assert( 0 );
return pNode;
@@ -731,7 +732,7 @@ Abc_Obj_t * Abc_NodeCreateAnd( Abc_Ntk_t * pNtk, Vec_Ptr_t * vFanins )
/**Function*************************************************************
- Synopsis [Creates inverter.]
+ Synopsis [Creates OR.]
Description []
@@ -744,35 +745,16 @@ Abc_Obj_t * Abc_NodeCreateOr( Abc_Ntk_t * pNtk, Vec_Ptr_t * vFanins )
{
Abc_Obj_t * pNode;
int i;
- assert( Abc_NtkIsLogic(pNtk) );
+ assert( Abc_NtkIsLogic(pNtk) || Abc_NtkIsNetlist(pNtk) );
pNode = Abc_NtkCreateNode( pNtk );
for ( i = 0; i < vFanins->nSize; i++ )
Abc_ObjAddFanin( pNode, vFanins->pArray[i] );
if ( Abc_NtkHasSop(pNtk) )
- {
- char * pSop;
- pSop = Extra_MmFlexEntryFetch( pNtk->pManFunc, vFanins->nSize + 4 );
- for ( i = 0; i < vFanins->nSize; i++ )
- pSop[i] = '0';
- pSop[i++] = ' ';
- pSop[i++] = '0';
- pSop[i++] = '\n';
- pSop[i++] = 0;
- assert( i == vFanins->nSize + 4 );
- pNode->pData = pSop;
- }
+ pNode->pData = Abc_SopCreateOr( pNtk->pManFunc, Vec_PtrSize(vFanins), NULL );
else if ( Abc_NtkHasBdd(pNtk) )
- {
- DdManager * dd = pNtk->pManFunc;
- DdNode * bFunc, * bTemp;
- bFunc = Cudd_ReadLogicZero(dd); Cudd_Ref( bFunc );
- for ( i = 0; i < vFanins->nSize; i++ )
- {
- bFunc = Cudd_bddOr( dd, bTemp = bFunc, Cudd_bddIthVar(pNtk->pManFunc,i) ); Cudd_Ref( bFunc );
- Cudd_RecursiveDeref( dd, bTemp );
- }
- pNode->pData = bFunc;
- }
+ pNode->pData = Extra_bddCreateOr( pNtk->pManFunc, Vec_PtrSize(vFanins) ), Cudd_Ref(pNode->pData);
+ else if ( Abc_NtkHasAig(pNtk) )
+ pNode->pData = Aig_CreateOr( pNtk->pManFunc, Vec_PtrSize(vFanins) );
else
assert( 0 );
return pNode;
@@ -780,7 +762,37 @@ Abc_Obj_t * Abc_NodeCreateOr( Abc_Ntk_t * pNtk, Vec_Ptr_t * vFanins )
/**Function*************************************************************
- Synopsis [Creates inverter.]
+ Synopsis [Creates EXOR.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+Abc_Obj_t * Abc_NodeCreateExor( Abc_Ntk_t * pNtk, Vec_Ptr_t * vFanins )
+{
+ Abc_Obj_t * pNode;
+ int i;
+ assert( Abc_NtkIsLogic(pNtk) || Abc_NtkIsNetlist(pNtk) );
+ pNode = Abc_NtkCreateNode( pNtk );
+ for ( i = 0; i < vFanins->nSize; i++ )
+ Abc_ObjAddFanin( pNode, vFanins->pArray[i] );
+ if ( Abc_NtkHasSop(pNtk) )
+ pNode->pData = Abc_SopCreateXorSpecial( pNtk->pManFunc, Vec_PtrSize(vFanins) );
+ else if ( Abc_NtkHasBdd(pNtk) )
+ pNode->pData = Extra_bddCreateExor( pNtk->pManFunc, Vec_PtrSize(vFanins) ), Cudd_Ref(pNode->pData);
+ else if ( Abc_NtkHasAig(pNtk) )
+ pNode->pData = Aig_CreateExor( pNtk->pManFunc, Vec_PtrSize(vFanins) );
+ else
+ assert( 0 );
+ return pNode;
+}
+
+/**Function*************************************************************
+
+ Synopsis [Creates MUX.]
Description []
@@ -801,14 +813,17 @@ Abc_Obj_t * Abc_NodeCreateMux( Abc_Ntk_t * pNtk, Abc_Obj_t * pNodeC, Abc_Obj_t *
pNode->pData = Abc_SopRegister( pNtk->pManFunc, "11- 1\n0-1 1\n" );
else if ( Abc_NtkHasBdd(pNtk) )
pNode->pData = Cudd_bddIte(pNtk->pManFunc,Cudd_bddIthVar(pNtk->pManFunc,0),Cudd_bddIthVar(pNtk->pManFunc,1),Cudd_bddIthVar(pNtk->pManFunc,2)), Cudd_Ref( pNode->pData );
+ else if ( Abc_NtkHasAig(pNtk) )
+ pNode->pData = Aig_Mux(pNtk->pManFunc,Aig_IthVar(pNtk->pManFunc,0),Aig_IthVar(pNtk->pManFunc,1),Aig_IthVar(pNtk->pManFunc,2));
else
assert( 0 );
return pNode;
}
+
/**Function*************************************************************
- Synopsis [Clones the given node but does not assign the function.]
+ Synopsis [Returns 1 if the node is a constant 0 node.]
Description []
@@ -817,22 +832,16 @@ Abc_Obj_t * Abc_NodeCreateMux( Abc_Ntk_t * pNtk, Abc_Obj_t * pNodeC, Abc_Obj_t *
SeeAlso []
***********************************************************************/
-Abc_Obj_t * Abc_NodeClone( Abc_Obj_t * pNode )
-{
- Abc_Obj_t * pClone, * pFanin;
- int i;
- assert( Abc_ObjIsNode(pNode) );
- pClone = Abc_NtkCreateNode( pNode->pNtk );
- Abc_ObjForEachFanin( pNode, pFanin, i )
- Abc_ObjAddFanin( pClone, pFanin );
- return pClone;
+bool Abc_NodeIsConst( Abc_Obj_t * pNode )
+{
+ assert( Abc_NtkIsLogic(pNode->pNtk) || Abc_NtkIsNetlist(pNode->pNtk) );
+ assert( Abc_ObjIsNode(pNode) );
+ return Abc_ObjFaninNum(pNode) == 0;
}
-
-
/**Function*************************************************************
- Synopsis []
+ Synopsis [Returns 1 if the node is a constant 0 node.]
Description []
@@ -844,23 +853,25 @@ Abc_Obj_t * Abc_NodeClone( Abc_Obj_t * pNode )
bool Abc_NodeIsConst0( Abc_Obj_t * pNode )
{
Abc_Ntk_t * pNtk = pNode->pNtk;
- assert(Abc_ObjIsNode(pNode));
- assert(Abc_NodeIsConst(pNode));
+ assert( Abc_NtkIsLogic(pNtk) || Abc_NtkIsNetlist(pNtk) );
+ assert( Abc_ObjIsNode(pNode) );
+ if ( !Abc_NodeIsConst(pNode) )
+ return 0;
if ( Abc_NtkHasSop(pNtk) )
return Abc_SopIsConst0(pNode->pData);
if ( Abc_NtkHasBdd(pNtk) )
return Cudd_IsComplement(pNode->pData);
if ( Abc_NtkHasAig(pNtk) )
- return Abc_ObjNot(pNode) == Abc_NtkConst1(pNode->pNtk);
+ return Aig_IsComplement(pNode->pData);
if ( Abc_NtkHasMapping(pNtk) )
- return pNode->pData == Mio_LibraryReadConst0(Abc_FrameReadLibSuper());
+ return pNode->pData == Mio_LibraryReadConst0(Abc_FrameReadLibGen());
assert( 0 );
return 0;
}
/**Function*************************************************************
- Synopsis []
+ Synopsis [Returns 1 if the node is a constant 1 node.]
Description []
@@ -872,23 +883,25 @@ bool Abc_NodeIsConst0( Abc_Obj_t * pNode )
bool Abc_NodeIsConst1( Abc_Obj_t * pNode )
{
Abc_Ntk_t * pNtk = pNode->pNtk;
- assert(Abc_ObjIsNode(pNode));
- assert(Abc_NodeIsConst(pNode));
+ assert( Abc_NtkIsLogic(pNtk) || Abc_NtkIsNetlist(pNtk) );
+ assert( Abc_ObjIsNode(pNode) );
+ if ( !Abc_NodeIsConst(pNode) )
+ return 0;
if ( Abc_NtkHasSop(pNtk) )
return Abc_SopIsConst1(pNode->pData);
if ( Abc_NtkHasBdd(pNtk) )
return !Cudd_IsComplement(pNode->pData);
if ( Abc_NtkHasAig(pNtk) )
- return pNode == Abc_NtkConst1(pNode->pNtk);
+ return !Aig_IsComplement(pNode->pData);
if ( Abc_NtkHasMapping(pNtk) )
- return pNode->pData == Mio_LibraryReadConst1(Abc_FrameReadLibSuper());
+ return pNode->pData == Mio_LibraryReadConst1(Abc_FrameReadLibGen());
assert( 0 );
return 0;
}
/**Function*************************************************************
- Synopsis []
+ Synopsis [Returns 1 if the node is a buffer.]
Description []
@@ -900,7 +913,8 @@ bool Abc_NodeIsConst1( Abc_Obj_t * pNode )
bool Abc_NodeIsBuf( Abc_Obj_t * pNode )
{
Abc_Ntk_t * pNtk = pNode->pNtk;
- assert(Abc_ObjIsNode(pNode));
+ assert( Abc_NtkIsLogic(pNtk) || Abc_NtkIsNetlist(pNtk) );
+ assert( Abc_ObjIsNode(pNode) );
if ( Abc_ObjFaninNum(pNode) != 1 )
return 0;
if ( Abc_NtkHasSop(pNtk) )
@@ -908,16 +922,16 @@ bool Abc_NodeIsBuf( Abc_Obj_t * pNode )
if ( Abc_NtkHasBdd(pNtk) )
return !Cudd_IsComplement(pNode->pData);
if ( Abc_NtkHasAig(pNtk) )
- return 0;
+ return !Aig_IsComplement(pNode->pData);
if ( Abc_NtkHasMapping(pNtk) )
- return pNode->pData == Mio_LibraryReadBuf(Abc_FrameReadLibSuper());
+ return pNode->pData == Mio_LibraryReadBuf(Abc_FrameReadLibGen());
assert( 0 );
return 0;
}
/**Function*************************************************************
- Synopsis []
+ Synopsis [Returns 1 if the node is an inverter.]
Description []
@@ -929,7 +943,8 @@ bool Abc_NodeIsBuf( Abc_Obj_t * pNode )
bool Abc_NodeIsInv( Abc_Obj_t * pNode )
{
Abc_Ntk_t * pNtk = pNode->pNtk;
- assert(Abc_ObjIsNode(pNode));
+ assert( Abc_NtkIsLogic(pNtk) || Abc_NtkIsNetlist(pNtk) );
+ assert( Abc_ObjIsNode(pNode) );
if ( Abc_ObjFaninNum(pNode) != 1 )
return 0;
if ( Abc_NtkHasSop(pNtk) )
@@ -937,13 +952,38 @@ bool Abc_NodeIsInv( Abc_Obj_t * pNode )
if ( Abc_NtkHasBdd(pNtk) )
return Cudd_IsComplement(pNode->pData);
if ( Abc_NtkHasAig(pNtk) )
- return 0;
+ return Aig_IsComplement(pNode->pData);
if ( Abc_NtkHasMapping(pNtk) )
- return pNode->pData == Mio_LibraryReadInv(Abc_FrameReadLibSuper());
+ return pNode->pData == Mio_LibraryReadInv(Abc_FrameReadLibGen());
assert( 0 );
return 0;
}
+/**Function*************************************************************
+
+ Synopsis [Complements the local functions of the node.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+void Abc_NodeComplement( Abc_Obj_t * pNode )
+{
+ assert( Abc_NtkIsLogic(pNode->pNtk) || Abc_NtkIsNetlist(pNode->pNtk) );
+ assert( Abc_ObjIsNode(pNode) );
+ if ( Abc_NtkHasSop(pNode->pNtk) )
+ Abc_SopComplement( pNode->pData );
+ else if ( Abc_NtkHasBdd(pNode->pNtk) )
+ pNode->pData = Cudd_Not( pNode->pData );
+ else if ( Abc_NtkHasAig(pNode->pNtk) )
+ pNode->pData = Aig_Not( pNode->pData );
+ else
+ assert( 0 );
+}
+
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
diff --git a/src/base/abc/abcUtil.c b/src/base/abc/abcUtil.c
index f756ef89..33025292 100644
--- a/src/base/abc/abcUtil.c
+++ b/src/base/abc/abcUtil.c
@@ -47,7 +47,7 @@ void Abc_NtkIncrementTravId( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pObj;
int i;
- if ( pNtk->nTravIds == (1<<9)-1 )
+ if ( pNtk->nTravIds == (1<<8)-1 )
{
pNtk->nTravIds = 0;
Abc_NtkForEachObj( pNtk, pObj, i )
@@ -183,9 +183,9 @@ int Abc_NtkGetBddNodeNum( Abc_Ntk_t * pNtk )
assert( Abc_NtkIsBddLogic(pNtk) );
Abc_NtkForEachNode( pNtk, pNode, i )
{
+ assert( pNode->pData );
if ( Abc_NodeIsConst(pNode) )
continue;
- assert( pNode->pData );
nNodes += pNode->pData? Cudd_DagSize( pNode->pData ) : 0;
}
return nNodes;
@@ -202,6 +202,32 @@ int Abc_NtkGetBddNodeNum( Abc_Ntk_t * pNtk )
SeeAlso []
***********************************************************************/
+int Abc_NtkGetAigNodeNum( Abc_Ntk_t * pNtk )
+{
+ Abc_Obj_t * pNode;
+ int i, nNodes = 0;
+ assert( Abc_NtkIsAigLogic(pNtk) );
+ Abc_NtkForEachNode( pNtk, pNode, i )
+ {
+ assert( pNode->pData );
+ if ( Abc_NodeIsConst(pNode) )
+ continue;
+ nNodes += pNode->pData? Aig_DagSize( pNode->pData ) : 0;
+ }
+ return nNodes;
+}
+
+/**Function*************************************************************
+
+ Synopsis [Reads the number of BDD nodes.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
int Abc_NtkGetClauseNum( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pNode;
@@ -321,7 +347,7 @@ int Abc_NtkGetChoiceNum( Abc_Ntk_t * pNtk )
return 0;
Counter = 0;
Abc_NtkForEachNode( pNtk, pNode, i )
- Counter += Abc_NodeIsAigChoice( pNode );
+ Counter += Abc_AigNodeIsChoice( pNode );
return Counter;
}
@@ -525,13 +551,8 @@ int Abc_NtkLogicMakeSimpleCos( Abc_Ntk_t * pNtk, bool fDuplicate )
if ( Abc_ObjFaninC0(pNode) )
{
// change polarity of the duplicated driver
- if ( Abc_NtkHasSop(pNtk) )
- Abc_SopComplement( pDriverNew->pData );
- else if ( Abc_NtkHasBdd(pNtk) )
- pDriverNew->pData = Cudd_Not( pDriverNew->pData );
- else
- assert( 0 );
- Abc_ObjXorFaninC(pNode, 0);
+ Abc_NodeComplement( pDriverNew );
+ Abc_ObjXorFaninC( pNode, 0 );
}
}
else
@@ -605,7 +626,7 @@ bool Abc_NodeIsExorType( Abc_Obj_t * pNode )
// check that the node is regular
assert( !Abc_ObjIsComplement(pNode) );
// if the node is not AND, this is not EXOR
- if ( !Abc_NodeIsAigAnd(pNode) )
+ if ( !Abc_AigNodeIsAnd(pNode) )
return 0;
// if the children are not complemented, this is not EXOR
if ( !Abc_ObjFaninC0(pNode) || !Abc_ObjFaninC1(pNode) )
@@ -638,7 +659,7 @@ bool Abc_NodeIsMuxType( Abc_Obj_t * pNode )
// check that the node is regular
assert( !Abc_ObjIsComplement(pNode) );
// if the node is not AND, this is not MUX
- if ( !Abc_NodeIsAigAnd(pNode) )
+ if ( !Abc_AigNodeIsAnd(pNode) )
return 0;
// if the children are not complemented, this is not MUX
if ( !Abc_ObjFaninC0(pNode) || !Abc_ObjFaninC1(pNode) )
@@ -1049,7 +1070,7 @@ void Abc_NtkReassignIds( Abc_Ntk_t * pNtk )
// start the array of objects with new IDs
vObjsNew = Vec_PtrAlloc( pNtk->nObjs );
// put constant node first
- pConst1 = Abc_NtkConst1(pNtk);
+ pConst1 = Abc_AigConst1(pNtk);
assert( pConst1->Id == 0 );
Vec_PtrPush( vObjsNew, pConst1 );
// put PI nodes next
diff --git a/src/base/abc/module.make b/src/base/abc/module.make
index 649e71a2..113b1f08 100644
--- a/src/base/abc/module.make
+++ b/src/base/abc/module.make
@@ -4,6 +4,7 @@ SRC += src/base/abc/abcAig.c \
src/base/abc/abcFanio.c \
src/base/abc/abcFunc.c \
src/base/abc/abcLatch.c \
+ src/base/abc/abcLib.c \
src/base/abc/abcMinBase.c \
src/base/abc/abcNames.c \
src/base/abc/abcNetlist.c \
diff --git a/src/base/abci/abc.c b/src/base/abci/abc.c
index c1327f43..8cf0e0af 100644
--- a/src/base/abci/abc.c
+++ b/src/base/abci/abc.c
@@ -45,6 +45,7 @@ static int Abc_CommandPrintAuto ( Abc_Frame_t * pAbc, int argc, char ** arg
static int Abc_CommandPrintKMap ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandPrintGates ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandPrintSharing ( Abc_Frame_t * pAbc, int argc, char ** argv );
+static int Abc_CommandPrintSkews ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandShowBdd ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandShowCut ( Abc_Frame_t * pAbc, int argc, char ** argv );
@@ -73,6 +74,7 @@ static int Abc_CommandOrPos ( Abc_Frame_t * pAbc, int argc, char ** arg
static int Abc_CommandFrames ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandSop ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandBdd ( Abc_Frame_t * pAbc, int argc, char ** argv );
+static int Abc_CommandAig ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandReorder ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandOrder ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandMuxes ( Abc_Frame_t * pAbc, int argc, char ** argv );
@@ -95,6 +97,7 @@ static int Abc_CommandIRewrite ( Abc_Frame_t * pAbc, int argc, char ** arg
static int Abc_CommandIRewriteSeq ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandIResyn ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandHaig ( Abc_Frame_t * pAbc, int argc, char ** argv );
+static int Abc_CommandMini ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandFraig ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandFraigTrust ( Abc_Frame_t * pAbc, int argc, char ** argv );
@@ -131,6 +134,9 @@ static int Abc_CommandProve ( Abc_Frame_t * pAbc, int argc, char ** arg
static int Abc_CommandTraceStart ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandTraceCheck ( Abc_Frame_t * pAbc, int argc, char ** argv );
+static int Abc_CommandHoward ( Abc_Frame_t * pAbc, int argc, char ** argv );
+static int Abc_CommandSkewForward ( Abc_Frame_t * pAbc, int argc, char ** argv );
+
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
@@ -164,6 +170,7 @@ void Abc_Init( Abc_Frame_t * pAbc )
Cmd_CommandAdd( pAbc, "Printing", "print_kmap", Abc_CommandPrintKMap, 0 );
Cmd_CommandAdd( pAbc, "Printing", "print_gates", Abc_CommandPrintGates, 0 );
Cmd_CommandAdd( pAbc, "Printing", "print_sharing", Abc_CommandPrintSharing, 0 );
+ Cmd_CommandAdd( pAbc, "Printing", "print_skews", Abc_CommandPrintSkews, 0 );
Cmd_CommandAdd( pAbc, "Printing", "show_bdd", Abc_CommandShowBdd, 0 );
Cmd_CommandAdd( pAbc, "Printing", "show_cut", Abc_CommandShowCut, 0 );
@@ -192,6 +199,7 @@ void Abc_Init( Abc_Frame_t * pAbc )
Cmd_CommandAdd( pAbc, "Various", "frames", Abc_CommandFrames, 1 );
Cmd_CommandAdd( pAbc, "Various", "sop", Abc_CommandSop, 0 );
Cmd_CommandAdd( pAbc, "Various", "bdd", Abc_CommandBdd, 0 );
+ Cmd_CommandAdd( pAbc, "Various", "aig", Abc_CommandAig, 0 );
Cmd_CommandAdd( pAbc, "Various", "reorder", Abc_CommandReorder, 0 );
Cmd_CommandAdd( pAbc, "Various", "order", Abc_CommandOrder, 0 );
Cmd_CommandAdd( pAbc, "Various", "muxes", Abc_CommandMuxes, 1 );
@@ -214,6 +222,7 @@ void Abc_Init( Abc_Frame_t * pAbc )
Cmd_CommandAdd( pAbc, "New AIG", "irws", Abc_CommandIRewriteSeq, 1 );
Cmd_CommandAdd( pAbc, "New AIG", "iresyn", Abc_CommandIResyn, 1 );
Cmd_CommandAdd( pAbc, "New AIG", "haig", Abc_CommandHaig, 1 );
+ Cmd_CommandAdd( pAbc, "New AIG", "mini", Abc_CommandMini, 1 );
Cmd_CommandAdd( pAbc, "Fraiging", "fraig", Abc_CommandFraig, 1 );
Cmd_CommandAdd( pAbc, "Fraiging", "fraig_trust", Abc_CommandFraigTrust, 1 );
@@ -247,8 +256,11 @@ void Abc_Init( Abc_Frame_t * pAbc )
Cmd_CommandAdd( pAbc, "Verification", "sat", Abc_CommandSat, 0 );
Cmd_CommandAdd( pAbc, "Verification", "prove", Abc_CommandProve, 1 );
- Cmd_CommandAdd( pAbc, "Verification", "trace_start", Abc_CommandTraceStart, 0 );
- Cmd_CommandAdd( pAbc, "Verification", "trace_check", Abc_CommandTraceCheck, 0 );
+// Cmd_CommandAdd( pAbc, "Verification", "trace_start", Abc_CommandTraceStart, 0 );
+// Cmd_CommandAdd( pAbc, "Verification", "trace_check", Abc_CommandTraceCheck, 0 );
+
+ Cmd_CommandAdd( pAbc, "Sequential", "howard", Abc_CommandHoward, 0 );
+ Cmd_CommandAdd( pAbc, "Sequential", "skew_fwd", Abc_CommandSkewForward, 0 );
// Rwt_Man4ExploreStart();
// Map_Var3Print();
@@ -1297,6 +1309,74 @@ usage:
SeeAlso []
***********************************************************************/
+int Abc_CommandPrintSkews( Abc_Frame_t * pAbc, int argc, char ** argv )
+{
+ FILE * pOut, * pErr;
+ Abc_Ntk_t * pNtk;
+ int c;
+ int fPrintAll;
+
+ pNtk = Abc_FrameReadNtk(pAbc);
+ pOut = Abc_FrameReadOut(pAbc);
+ pErr = Abc_FrameReadErr(pAbc);
+
+ // set defaults
+ fPrintAll = 0;
+ Extra_UtilGetoptReset();
+ while ( ( c = Extra_UtilGetopt( argc, argv, "ah" ) ) != EOF )
+ {
+ switch ( c )
+ {
+ case 'a':
+ fPrintAll = 1;
+ break;
+ case 'h':
+ goto usage;
+ default:
+ goto usage;
+ }
+ }
+
+ if ( pNtk == NULL )
+ {
+ fprintf( pErr, "Empty network.\n" );
+ return 1;
+ }
+
+ if ( !Abc_NtkIsSeq(pNtk) && Abc_NtkLatchNum(pNtk) == 0 )
+ {
+ fprintf( pErr, "The network has no latches.\n" );
+ return 0;
+ }
+
+ if ( pNtk->vSkews == NULL || pNtk->vSkews->nSize == 0 )
+ {
+ fprintf( pErr, "The network has no clock skew schedule.\n" );
+ return 0;
+ }
+
+ Abc_NtkPrintSkews( pOut, pNtk, fPrintAll );
+ return 0;
+
+usage:
+ fprintf( pErr, "usage: print_skews [-h] [-a]\n" );
+ fprintf( pErr, "\t prints information about a clock skew schedule\n" );
+ fprintf( pErr, "\t-a : dumps the skew of every latch [default = no]\n");
+ fprintf( pErr, "\t-h : print the command usage\n");
+ return 1;
+}
+
+/**Function*************************************************************
+
+ Synopsis []
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
int Abc_CommandShowBdd( Abc_Frame_t * pAbc, int argc, char ** argv )
{
FILE * pOut, * pErr;
@@ -3309,29 +3389,26 @@ int Abc_CommandSop( Abc_Frame_t * pAbc, int argc, char ** argv )
goto usage;
}
}
-
if ( pNtk == NULL )
{
fprintf( pErr, "Empty network.\n" );
return 1;
}
-
- // get the new network
- if ( !Abc_NtkIsBddLogic(pNtk) )
+ if ( !Abc_NtkIsLogic(pNtk) )
{
- fprintf( pErr, "Converting to SOP is possible when node functions are BDDs.\n" );
+ fprintf( pErr, "Converting to SOP is possible only for logic networks.\n" );
return 1;
}
- if ( !Abc_NtkBddToSop( pNtk, fDirect ) )
+ if ( !Abc_NtkLogicToSop(pNtk, fDirect) )
{
- fprintf( pErr, "Converting to SOP has failed.\n" );
+ fprintf( pErr, "Converting to BDD has failed.\n" );
return 1;
}
return 0;
usage:
fprintf( pErr, "usage: sop [-dh]\n" );
- fprintf( pErr, "\t converts node functions from BDD to SOP\n" );
+ fprintf( pErr, "\t converts node functions to SOP\n" );
fprintf( pErr, "\t-d : toggles using both phases or only positive [default = %s]\n", fDirect? "direct": "both" );
fprintf( pErr, "\t-h : print the command usage\n");
return 1;
@@ -3370,19 +3447,22 @@ int Abc_CommandBdd( Abc_Frame_t * pAbc, int argc, char ** argv )
goto usage;
}
}
-
if ( pNtk == NULL )
{
fprintf( pErr, "Empty network.\n" );
return 1;
}
-
- if ( !Abc_NtkIsSopLogic(pNtk) )
+ if ( !Abc_NtkIsLogic(pNtk) )
{
- fprintf( pErr, "Converting to BDD is possible when node functions are SOPs.\n" );
+ fprintf( pErr, "Converting to BDD is possible only for logic networks.\n" );
return 1;
}
- if ( !Abc_NtkSopToBdd( pNtk ) )
+ if ( Abc_NtkIsBddLogic(pNtk) )
+ {
+ fprintf( pOut, "The logic network is already in the BDD form.\n" );
+ return 0;
+ }
+ if ( !Abc_NtkLogicToBdd(pNtk) )
{
fprintf( pErr, "Converting to BDD has failed.\n" );
return 1;
@@ -3391,7 +3471,69 @@ int Abc_CommandBdd( Abc_Frame_t * pAbc, int argc, char ** argv )
usage:
fprintf( pErr, "usage: bdd [-h]\n" );
- fprintf( pErr, "\t converts node functions from SOP to BDD\n" );
+ fprintf( pErr, "\t converts node functions to BDD\n" );
+ fprintf( pErr, "\t-h : print the command usage\n");
+ return 1;
+}
+
+/**Function*************************************************************
+
+ Synopsis []
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+int Abc_CommandAig( Abc_Frame_t * pAbc, int argc, char ** argv )
+{
+ FILE * pOut, * pErr;
+ Abc_Ntk_t * pNtk;
+ int c;
+
+ pNtk = Abc_FrameReadNtk(pAbc);
+ pOut = Abc_FrameReadOut(pAbc);
+ pErr = Abc_FrameReadErr(pAbc);
+
+ // set defaults
+ Extra_UtilGetoptReset();
+ while ( ( c = Extra_UtilGetopt( argc, argv, "h" ) ) != EOF )
+ {
+ switch ( c )
+ {
+ case 'h':
+ goto usage;
+ default:
+ goto usage;
+ }
+ }
+ if ( pNtk == NULL )
+ {
+ fprintf( pErr, "Empty network.\n" );
+ return 1;
+ }
+ if ( !Abc_NtkIsLogic(pNtk) )
+ {
+ fprintf( pErr, "Converting to AIG is possible only for logic networks.\n" );
+ return 1;
+ }
+ if ( Abc_NtkIsAigLogic(pNtk) )
+ {
+ fprintf( pOut, "The logic network is already in the AIG form.\n" );
+ return 0;
+ }
+ if ( !Abc_NtkLogicToAig(pNtk) )
+ {
+ fprintf( pErr, "Converting to AIG has failed.\n" );
+ return 1;
+ }
+ return 0;
+
+usage:
+ fprintf( pErr, "usage: aig [-h]\n" );
+ fprintf( pErr, "\t converts node functions to AIG\n" );
fprintf( pErr, "\t-h : print the command usage\n");
return 1;
}
@@ -3759,7 +3901,7 @@ int Abc_CommandOneOutput( Abc_Frame_t * pAbc, int argc, char ** argv )
if ( argc == globalUtilOptind + 1 )
{
- pNodeCo = Abc_NtkFindCo( pNtk, argv[globalUtilOptind] );
+ pNodeCo = Abc_NtkFindTerm( pNtk, argv[globalUtilOptind] );
pNode = Abc_NtkFindNode( pNtk, argv[globalUtilOptind] );
if ( pNode == NULL )
{
@@ -5271,6 +5413,73 @@ usage:
return 1;
}
+/**Function*************************************************************
+
+ Synopsis []
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+int Abc_CommandMini( Abc_Frame_t * pAbc, int argc, char ** argv )
+{
+ FILE * pOut, * pErr;
+ Abc_Ntk_t * pNtk, * pNtkRes;
+ int c;
+ extern Abc_Ntk_t * Abc_NtkMiniBalance( Abc_Ntk_t * pNtk );
+
+ pNtk = Abc_FrameReadNtk(pAbc);
+ pOut = Abc_FrameReadOut(pAbc);
+ pErr = Abc_FrameReadErr(pAbc);
+
+ // set defaults
+ Extra_UtilGetoptReset();
+ while ( ( c = Extra_UtilGetopt( argc, argv, "h" ) ) != EOF )
+ {
+ switch ( c )
+ {
+ case 'h':
+ goto usage;
+ default:
+ goto usage;
+ }
+ }
+ if ( pNtk == NULL )
+ {
+ fprintf( pErr, "Empty network.\n" );
+ return 1;
+ }
+ if ( Abc_NtkIsSeq(pNtk) )
+ {
+ fprintf( pErr, "Only works for non-sequential networks.\n" );
+ return 1;
+ }
+ if ( !Abc_NtkIsStrash(pNtk) )
+ {
+ fprintf( pErr, "Only works for combinatinally strashed AIG networks.\n" );
+ return 1;
+ }
+
+ pNtkRes = Abc_NtkMiniBalance( pNtk );
+ if ( pNtkRes == NULL )
+ {
+ fprintf( pErr, "Command has failed.\n" );
+ return 0;
+ }
+ // replace the current network
+ Abc_FrameReplaceCurrentNetwork( pAbc, pNtkRes );
+ return 0;
+
+usage:
+ fprintf( pErr, "usage: mini [-h]\n" );
+ fprintf( pErr, "\t perform balancing using new package\n" );
+ fprintf( pErr, "\t-h : print the command usage\n");
+ return 1;
+}
+
/**Function*************************************************************
@@ -5913,7 +6122,6 @@ int Abc_CommandUnmap( Abc_Frame_t * pAbc, int argc, char ** argv )
FILE * pOut, * pErr;
Abc_Ntk_t * pNtk;
int c;
- extern int Abc_NtkUnmap( Abc_Ntk_t * pNtk );
pNtk = Abc_FrameReadNtk(pAbc);
pOut = Abc_FrameReadOut(pAbc);
@@ -5944,7 +6152,7 @@ int Abc_CommandUnmap( Abc_Frame_t * pAbc, int argc, char ** argv )
}
// get the new network
- if ( !Abc_NtkUnmap( pNtk ) )
+ if ( !Abc_NtkMapToSop( pNtk ) )
{
fprintf( pErr, "Unmapping has failed.\n" );
return 1;
@@ -5974,7 +6182,6 @@ int Abc_CommandAttach( Abc_Frame_t * pAbc, int argc, char ** argv )
FILE * pOut, * pErr;
Abc_Ntk_t * pNtk;
int c;
- extern int Abc_NtkUnmap( Abc_Ntk_t * pNtk );
pNtk = Abc_FrameReadNtk(pAbc);
pOut = Abc_FrameReadOut(pAbc);
@@ -7982,13 +8189,14 @@ int Abc_CommandTraceStart( Abc_Frame_t * pAbc, int argc, char ** argv )
fprintf( pErr, "This command is applicable to AIGs.\n" );
return 1;
}
-
+/*
Abc_HManStart();
if ( !Abc_HManPopulate( pNtk ) )
{
fprintf( pErr, "Failed to start the tracing database.\n" );
return 1;
}
+*/
return 0;
usage:
@@ -8042,7 +8250,7 @@ int Abc_CommandTraceCheck( Abc_Frame_t * pAbc, int argc, char ** argv )
fprintf( pErr, "This command is applicable to AIGs.\n" );
return 1;
}
-
+/*
if ( !Abc_HManIsRunning(pNtk) )
{
fprintf( pErr, "The tracing database is not available.\n" );
@@ -8052,6 +8260,7 @@ int Abc_CommandTraceCheck( Abc_Frame_t * pAbc, int argc, char ** argv )
if ( !Abc_HManVerify( 1, pNtk->Id ) )
fprintf( pErr, "Verification failed.\n" );
Abc_HManStop();
+*/
return 0;
usage:
@@ -8060,6 +8269,168 @@ usage:
fprintf( pErr, "\t-h : print the command usage\n");
return 1;
}
+
+/**Function*************************************************************
+
+ Synopsis []
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+int Abc_CommandHoward( Abc_Frame_t * pAbc, int argc, char ** argv )
+{
+ FILE * pOut, * pErr;
+ Abc_Ntk_t * pNtk;
+ int c;
+ int fVerbose;
+ double result;
+
+ pNtk = Abc_FrameReadNtk(pAbc);
+ pOut = Abc_FrameReadOut(pAbc);
+ pErr = Abc_FrameReadErr(pAbc);
+
+ // set defaults
+ fVerbose = 0;
+ Extra_UtilGetoptReset();
+ while ( ( c = Extra_UtilGetopt( argc, argv, "vh" ) ) != EOF )
+ {
+ switch ( c )
+ {
+ case 'v':
+ fVerbose ^= 1;
+ break;
+ default:
+ goto usage;
+ }
+ }
+
+ if ( pNtk == NULL )
+ {
+ fprintf( pErr, "Empty network.\n" );
+ return 1;
+ }
+
+ if ( !Abc_NtkIsSeq(pNtk) && Abc_NtkLatchNum(pNtk) == 0 )
+ {
+ fprintf( pErr, "The network has no latches. Analysis is not performed.\n" );
+ return 0;
+ }
+
+ if ( Abc_NtkHasAig(pNtk) )
+ {
+ // quit if there are choice nodes
+ if ( Abc_NtkGetChoiceNum(pNtk) )
+ {
+ fprintf( pErr, "Currently cannot analyze networks with choice nodes.\n" );
+ return 0;
+ }
+
+ /*
+ if ( Abc_NtkIsStrash(pNtk) )
+ pNtkRes = Abc_NtkAigToSeq(pNtk);
+ else
+ pNtkRes = Abc_NtkDup(pNtk);
+
+ */
+
+ fprintf( pErr, "Currently cannot analyze unmapped networks.\n" );
+ return 0;
+ }
+
+ result = Seq_NtkHoward( pNtk, fVerbose );
+
+ if (result < 0) {
+ fprintf( pErr, "Analysis failed.\n" );
+ return 0;
+ }
+
+ printf("Maximum mean cycle time = %.2f\n", result);
+
+ return 1;
+
+usage:
+ fprintf( pErr, "usage: howard [-h]\n" );
+ fprintf( pErr, "\t computes the maximum mean cycle time using Howard's algorithm\n" );
+ fprintf( pErr, "\t-v : toggles verbose output [default = %s]\n", fVerbose? "yes": "no" );
+ fprintf( pErr, "\t-h : print the command usage\n");
+ return 1;
+}
+
+/**Function*************************************************************
+
+ Synopsis []
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+int Abc_CommandSkewForward( Abc_Frame_t * pAbc, int argc, char ** argv )
+{
+ FILE * pOut, * pErr;
+ Abc_Ntk_t * pNtk;
+ int c;
+ int fMinimize;
+ float target;
+
+ pNtk = Abc_FrameReadNtk(pAbc);
+ pOut = Abc_FrameReadOut(pAbc);
+ pErr = Abc_FrameReadErr(pAbc);
+
+ // set defaults
+ target = pNtk->maxMeanCycle;
+ fMinimize = 0;
+ Extra_UtilGetoptReset();
+ while ( ( c = Extra_UtilGetopt( argc, argv, "mh" ) ) != EOF )
+ {
+ switch ( c )
+ {
+ case 'm':
+ fMinimize ^= 1;
+ break;
+ default:
+ goto usage;
+ }
+ }
+
+
+ if ( pNtk == NULL )
+ {
+ fprintf( pErr, "Empty network.\n" );
+ return 1;
+ }
+
+ if ( !Abc_NtkIsSeq(pNtk) && Abc_NtkLatchNum(pNtk) == 0 )
+ {
+ fprintf( pErr, "The network has no latches.\n" );
+ return 0;
+ }
+
+ if ( pNtk->vSkews == NULL || pNtk->vSkews->nSize == 0 )
+ {
+ fprintf( pErr, "The network has no clock skew schedule.\n" );
+ return 0;
+ }
+
+ Seq_NtkSkewForward( pNtk, target, fMinimize );
+
+ return 1;
+
+usage:
+ fprintf( pErr, "usage: skew_fwd [-h] [-m] [-t float]\n" );
+ fprintf( pErr, "\t converts a skew schedule into a set of forward skews 0<skew<T\n" );
+ fprintf( pErr, "\t-m : minimizes sum of skews [default = %s]\n", fMinimize? "yes": "no" );
+ fprintf( pErr, "\t-t : clock period, T [default = maxMeanCycle] (unimplemented)\n");
+ fprintf( pErr, "\t-h : print the command usage\n");
+ return 1;
+}
+
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
diff --git a/src/base/abci/abcBalance.c b/src/base/abci/abcBalance.c
index 389a7977..819974bf 100644
--- a/src/base/abci/abcBalance.c
+++ b/src/base/abci/abcBalance.c
@@ -233,7 +233,7 @@ Abc_Obj_t * Abc_NodeBalance_rec( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pNodeOld, Vec_
vSuper = Abc_NodeBalanceCone( pNodeOld, vStorage, Level, fDuplicate, fSelective );
if ( vSuper->nSize == 0 )
{ // it means that the supergate contains two nodes in the opposite polarity
- pNodeOld->pCopy = Abc_ObjNot(Abc_NtkConst1(pNtkNew));
+ pNodeOld->pCopy = Abc_ObjNot(Abc_AigConst1(pNtkNew));
return pNodeOld->pCopy;
}
// for each old node, derive the new well-balanced node
@@ -263,9 +263,8 @@ Abc_Obj_t * Abc_NodeBalance_rec( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pNodeOld, Vec_
assert( pNodeOld->pCopy == NULL );
// mark the old node with the new node
pNodeOld->pCopy = vSuper->pArray[0];
- Abc_HManAddProto( pNodeOld->pCopy, pNodeOld );
vSuper->nSize = 0;
-// if ( Abc_ObjRegular(pNodeOld->pCopy) == Abc_NtkConst1(pNtkNew) )
+// if ( Abc_ObjRegular(pNodeOld->pCopy) == Abc_AigConst1(pNtkNew) )
// printf( "Constant node\n" );
// assert( pNodeOld->Level >= Abc_ObjRegular(pNodeOld->pCopy)->Level );
return pNodeOld->pCopy;
diff --git a/src/base/abci/abcCut.c b/src/base/abci/abcCut.c
index c7c164b9..7024a970 100644
--- a/src/base/abci/abcCut.c
+++ b/src/base/abci/abcCut.c
@@ -95,8 +95,8 @@ Cut_Man_t * Abc_NtkCuts( Abc_Ntk_t * pNtk, Cut_Params_t * pParams )
continue;
}
// skip constant node, it has no cuts
- if ( Abc_NodeIsConst(pObj) )
- continue;
+// if ( Abc_NodeIsConst(pObj) )
+// continue;
Extra_ProgressBarUpdate( pProgress, i, NULL );
// compute the cuts to the internal node
Abc_NodeGetCuts( p, pObj, pParams->fDag, pParams->fTree );
@@ -107,7 +107,7 @@ Cut_Man_t * Abc_NtkCuts( Abc_Ntk_t * pNtk, Cut_Params_t * pParams )
Cut_NodeTryDroppingCuts( p, Abc_ObjFaninId1(pObj) );
}
// add cuts due to choices
- if ( Abc_NodeIsAigChoice(pObj) )
+ if ( Abc_AigNodeIsChoice(pObj) )
{
Vec_IntClear( vChoices );
for ( pNode = pObj; pNode; pNode = pNode->pData )
@@ -171,8 +171,8 @@ void Abc_NtkCutsOracle( Abc_Ntk_t * pNtk, Cut_Oracle_t * p )
continue;
}
// skip constant node, it has no cuts
- if ( Abc_NodeIsConst(pObj) )
- continue;
+// if ( Abc_NodeIsConst(pObj) )
+// continue;
// compute the cuts to the internal node
Cut_OracleComputeCuts( p, pObj->Id, Abc_ObjFaninId0(pObj), Abc_ObjFaninId1(pObj),
Abc_ObjFaninC0(pObj), Abc_ObjFaninC1(pObj) );
@@ -218,7 +218,7 @@ Cut_Man_t * Abc_NtkSeqCuts( Abc_Ntk_t * pNtk, Cut_Params_t * pParams )
p = Cut_ManStart( pParams );
// set cuts for the constant node and the PIs
- pObj = Abc_NtkConst1(pNtk);
+ pObj = Abc_AigConst1(pNtk);
if ( Abc_ObjFanoutNum(pObj) > 0 )
Cut_NodeSetTriv( p, pObj->Id );
Abc_NtkForEachPi( pNtk, pObj, i )
@@ -247,7 +247,7 @@ Cut_Man_t * Abc_NtkSeqCuts( Abc_Ntk_t * pNtk, Cut_Params_t * pParams )
{
Abc_NodeGetCutsSeq( p, pObj, nIters==0 );
// add cuts due to choices
- if ( Abc_NodeIsAigChoice(pObj) )
+ if ( Abc_AigNodeIsChoice(pObj) )
{
Vec_IntClear( vChoices );
for ( pNode = pObj; pNode; pNode = pNode->pData )
diff --git a/src/base/abci/abcDsd.c b/src/base/abci/abcDsd.c
index 79d2b729..cd8f9047 100644
--- a/src/base/abci/abcDsd.c
+++ b/src/base/abci/abcDsd.c
@@ -172,7 +172,7 @@ void Abc_NtkDsdConstruct( Dsd_Manager_t * pManDsd, Abc_Ntk_t * pNtk, Abc_Ntk_t *
int i, nNodesDsd;
// save the CI nodes in the DSD nodes
- Dsd_NodeSetMark( Dsd_ManagerReadConst1(pManDsd), (int)Abc_NtkConst1(pNtk)->pCopy );
+ Dsd_NodeSetMark( Dsd_ManagerReadConst1(pManDsd), (int)Abc_AigConst1(pNtkNew) );
Abc_NtkForEachCi( pNtk, pNode, i )
{
pNodeDsd = Dsd_ManagerReadInput( pManDsd, i );
@@ -191,7 +191,7 @@ void Abc_NtkDsdConstruct( Dsd_Manager_t * pManDsd, Abc_Ntk_t * pNtk, Abc_Ntk_t *
pDriver = Abc_ObjFanin0( pNode );
if ( !Abc_ObjIsNode(pDriver) )
continue;
- if ( !Abc_NodeIsAigAnd(pDriver) )
+ if ( !Abc_AigNodeIsAnd(pDriver) )
continue;
pNodeDsd = Dsd_ManagerReadRoot( pManDsd, i );
pNodeNew = (Abc_Obj_t *)Dsd_NodeReadMark( Dsd_Regular(pNodeDsd) );
@@ -419,14 +419,14 @@ void Abc_NodeDecompDsdAndMux( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes, Dsd_Manager
pNodeC = Abc_ObjFanin( pNode, iVar );
// get the negative cofactor
- pNode1 = Abc_NodeClone( pNode );
+ pNode1 = Abc_NtkCloneObj( pNode );
pNode1->pData = Cudd_Cofactor( dd, pNode->pData, Cudd_Not(dd->vars[iVar]) ); Cudd_Ref( pNode1->pData );
Abc_NodeMinimumBase( pNode1 );
if ( Abc_NodeIsForDsd(pNode1) )
Vec_PtrPush( vNodes, pNode1 );
// get the positive cofactor
- pNode2 = Abc_NodeClone( pNode );
+ pNode2 = Abc_NtkCloneObj( pNode );
pNode2->pData = Cudd_Cofactor( dd, pNode->pData, dd->vars[iVar] ); Cudd_Ref( pNode2->pData );
Abc_NodeMinimumBase( pNode2 );
if ( Abc_NodeIsForDsd(pNode2) )
diff --git a/src/base/abci/abcEspresso.c b/src/base/abci/abcEspresso.c
index ad43534d..8f9c7277 100644
--- a/src/base/abci/abcEspresso.c
+++ b/src/base/abci/abcEspresso.c
@@ -52,12 +52,12 @@ void Abc_NtkEspresso( Abc_Ntk_t * pNtk, int fVerbose )
assert( Abc_NtkIsLogic(pNtk) );
// convert the network to have SOPs
if ( Abc_NtkHasMapping(pNtk) )
- Abc_NtkUnmap(pNtk);
+ Abc_NtkMapToSop(pNtk);
else if ( Abc_NtkHasBdd(pNtk) )
{
if ( !Abc_NtkBddToSop(pNtk, 0) )
{
- printf( "Converting to SOPs has failed.\n" );
+ printf( "Abc_NtkEspresso(): Converting to SOPs has failed.\n" );
return;
}
}
diff --git a/src/base/abci/abcFpga.c b/src/base/abci/abcFpga.c
index a59ef2af..e5286487 100644
--- a/src/base/abci/abcFpga.c
+++ b/src/base/abci/abcFpga.c
@@ -143,6 +143,7 @@ Fpga_Man_t * Abc_NtkToFpga( Abc_Ntk_t * pNtk, int fRecovery, float * pSwitching,
// create PIs and remember them in the old nodes
Abc_NtkCleanCopy( pNtk );
+ Abc_AigConst1(pNtk)->pCopy = (Abc_Obj_t *)Fpga_ManReadConst1(pMan);
Abc_NtkForEachCi( pNtk, pNode, i )
{
pNodeFpga = Fpga_ManReadInputs(pMan)[i];
@@ -157,12 +158,6 @@ Fpga_Man_t * Abc_NtkToFpga( Abc_Ntk_t * pNtk, int fRecovery, float * pSwitching,
Vec_PtrForEachEntry( vNodes, pNode, i )
{
Extra_ProgressBarUpdate( pProgress, i, NULL );
- // consider the case of a constant
- if ( Abc_NodeIsConst(pNode) )
- {
- Abc_NtkConst1(pNtk)->pCopy = (Abc_Obj_t *)Fpga_ManReadConst1(pMan);
- continue;
- }
// add the node to the mapper
pNodeFpga = Fpga_NodeAnd( pMan,
Fpga_NotCond( Abc_ObjFanin0(pNode)->pCopy, Abc_ObjFaninC0(pNode) ),
@@ -173,7 +168,7 @@ Fpga_Man_t * Abc_NtkToFpga( Abc_Ntk_t * pNtk, int fRecovery, float * pSwitching,
if ( pSwitching )
Fpga_NodeSetSwitching( pNodeFpga, pSwitching[pNode->Id] );
// set up the choice node
- if ( Abc_NodeIsAigChoice( pNode ) )
+ if ( Abc_AigNodeIsChoice( pNode ) )
for ( pPrev = pNode, pFanin = pNode->pData; pFanin; pPrev = pFanin, pFanin = pFanin->pData )
{
Fpga_NodeSetNextE( (Fpga_Node_t *)pPrev->pCopy, (Fpga_Node_t *)pFanin->pCopy );
@@ -214,7 +209,7 @@ Abc_Ntk_t * Abc_NtkFromFpga( Fpga_Man_t * pMan, Abc_Ntk_t * pNtk )
Abc_NtkForEachCi( pNtk, pNode, i )
Fpga_NodeSetData0( Fpga_ManReadInputs(pMan)[i], (char *)pNode->pCopy );
// set the constant node
- Fpga_NodeSetData0( Fpga_ManReadConst1(pMan), (char *)Abc_NtkConst1(pNtkNew) );
+ Fpga_NodeSetData0( Fpga_ManReadConst1(pMan), (char *)Abc_NodeCreateConst1(pNtkNew) );
// process the nodes in topological order
pProgress = Extra_ProgressBarStart( stdout, Abc_NtkCoNum(pNtk) );
Abc_NtkForEachCo( pNtk, pNode, i )
diff --git a/src/base/abci/abcFraig.c b/src/base/abci/abcFraig.c
index 46f2cdf0..778c8284 100644
--- a/src/base/abci/abcFraig.c
+++ b/src/base/abci/abcFraig.c
@@ -113,7 +113,7 @@ void * Abc_NtkToFraig( Abc_Ntk_t * pNtk, void * pParams, int fAllNodes, int fExd
// map the constant node
Abc_NtkCleanCopy( pNtk );
- Abc_NtkConst1(pNtk)->pCopy = (Abc_Obj_t *)Fraig_ManReadConst1(pMan);
+ Abc_AigConst1(pNtk)->pCopy = (Abc_Obj_t *)Fraig_ManReadConst1(pMan);
// create PIs and remember them in the old nodes
Abc_NtkForEachCi( pNtk, pNode, i )
pNode->pCopy = (Abc_Obj_t *)Fraig_ManReadIthVar(pMan, i);
@@ -168,7 +168,7 @@ Fraig_Node_t * Abc_NtkToFraigExdc( Fraig_Man_t * pMan, Abc_Ntk_t * pNtkMain, Abc
// strash the EXDC network
pNtkStrash = Abc_NtkStrash( pNtkExdc, 0, 0 );
Abc_NtkCleanCopy( pNtkStrash );
- Abc_NtkConst1(pNtkStrash)->pCopy = (Abc_Obj_t *)Fraig_ManReadConst1(pMan);
+ Abc_AigConst1(pNtkStrash)->pCopy = (Abc_Obj_t *)Fraig_ManReadConst1(pMan);
// set the mapping of the PI nodes
ppNames = Abc_NtkCollectCioNames( pNtkMain, 0 );
Abc_NtkForEachCi( pNtkStrash, pObj, i )
@@ -285,7 +285,7 @@ Abc_Ntk_t * Abc_NtkFromFraig( Fraig_Man_t * pMan, Abc_Ntk_t * pNtk )
Abc_NtkForEachCi( pNtk, pNode, i )
Fraig_NodeSetData1( Fraig_ManReadIthVar(pMan, i), (Fraig_Node_t *)pNode->pCopy );
// set the constant node
- Fraig_NodeSetData1( Fraig_ManReadConst1(pMan), (Fraig_Node_t *)Abc_NtkConst1(pNtkNew) );
+ Fraig_NodeSetData1( Fraig_ManReadConst1(pMan), (Fraig_Node_t *)Abc_AigConst1(pNtkNew) );
// process the nodes in topological order
pProgress = Extra_ProgressBarStart( stdout, Abc_NtkCoNum(pNtk) );
Abc_NtkForEachCo( pNtk, pNode, i )
@@ -384,7 +384,7 @@ Abc_Ntk_t * Abc_NtkFromFraig2( Fraig_Man_t * pMan, Abc_Ntk_t * pNtk )
// map the nodes into their lowest level representives
tTable = stmm_init_table(stmm_ptrcmp,stmm_ptrhash);
- pNode = Abc_NtkConst1(pNtk);
+ pNode = Abc_AigConst1(pNtk);
if ( !stmm_find_or_add( tTable, (char *)Fraig_Regular(pNode->pCopy), (char ***)&ppSlot ) )
*ppSlot = pNode;
Abc_NtkForEachCi( pNtk, pNode, i )
@@ -607,7 +607,7 @@ Abc_Obj_t * Abc_NodeFraigTrust( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pNode )
assert( nFanins == Abc_SopGetVarNum(pNode->pData) );
// check if it is a constant
if ( nFanins == 0 )
- return Abc_ObjNotCond( Abc_NtkConst1(pNtkNew), Abc_SopIsConst0(pNode->pData) );
+ return Abc_ObjNotCond( Abc_AigConst1(pNtkNew), Abc_SopIsConst0(pNode->pData) );
if ( nFanins == 1 )
return Abc_ObjNotCond( Abc_ObjFanin0(pNode)->pCopy, Abc_SopIsInv(pNode->pData) );
if ( nFanins == 2 && Abc_SopIsAndType(pNode->pData) )
diff --git a/src/base/abci/abcFxu.c b/src/base/abci/abcFxu.c
index a8e656ce..b6d57a5c 100644
--- a/src/base/abci/abcFxu.c
+++ b/src/base/abci/abcFxu.c
@@ -53,22 +53,19 @@ static void Abc_NtkFxuReconstruct( Abc_Ntk_t * pNtk, Fxu_Data_t * p );
bool Abc_NtkFastExtract( Abc_Ntk_t * pNtk, Fxu_Data_t * p )
{
assert( Abc_NtkIsLogic(pNtk) );
- // convert nodes to SOPs
- if ( Abc_NtkIsMappedLogic(pNtk) )
- Abc_NtkUnmap(pNtk);
- else if ( Abc_NtkIsBddLogic(pNtk) )
- {
- if ( !Abc_NtkBddToSop(pNtk, 0) )
- {
- printf( "Converting to SOPs has failed.\n" );
- return 0;
- }
- }
- else
+ // if the network is already in the SOP form, it may come from BLIF file
+ // and it may not be SCC-free, in which case FXU will not work correctly
+ if ( Abc_NtkIsSopLogic(pNtk) )
{ // to make sure the SOPs are SCC-free
// Abc_NtkSopToBdd(pNtk);
// Abc_NtkBddToSop(pNtk);
}
+ // get the network in the SOP form
+ if ( !Abc_NtkLogicToSop(pNtk, 0) )
+ {
+ printf( "Abc_NtkFastExtract(): Converting to SOPs has failed.\n" );
+ return 0;
+ }
// check if the network meets the requirements
if ( !Abc_NtkFxuCheck(pNtk) )
{
diff --git a/src/base/abci/abcIvy.c b/src/base/abci/abcIvy.c
index 42d5173a..6538b360 100644
--- a/src/base/abci/abcIvy.c
+++ b/src/base/abci/abcIvy.c
@@ -77,7 +77,7 @@ Ivy_Man_t * Abc_NtkIvyBefore( Abc_Ntk_t * pNtk, int fSeq, int fUseDc )
{
if ( !Abc_NtkBddToSop(pNtk, 0) )
{
- printf( "Converting to SOPs has failed.\n" );
+ printf( "Abc_NtkIvyBefore(): Converting to SOPs has failed.\n" );
return NULL;
}
}
@@ -329,7 +329,7 @@ Abc_Ntk_t * Abc_NtkIvy( Abc_Ntk_t * pNtk )
if ( !Abc_NtkBddToSop(pNtk, 0) )
{
FREE( pInit );
- printf( "Converting to SOPs has failed.\n" );
+ printf( "Abc_NtkIvy(): Converting to SOPs has failed.\n" );
return NULL;
}
}
@@ -437,7 +437,7 @@ Abc_Ntk_t * Abc_NtkFromAig( Abc_Ntk_t * pNtkOld, Ivy_Man_t * pMan )
// perform strashing
pNtk = Abc_NtkStartFrom( pNtkOld, ABC_NTK_STRASH, ABC_FUNC_AIG );
// transfer the pointers to the basic nodes
- Ivy_ManConst1(pMan)->TravId = Abc_EdgeFromNode( Abc_NtkConst1(pNtk) );
+ Ivy_ManConst1(pMan)->TravId = Abc_EdgeFromNode( Abc_AigConst1(pNtk) );
Abc_NtkForEachCi( pNtkOld, pObj, i )
Ivy_ManPi(pMan, i)->TravId = Abc_EdgeFromNode( pObj->pCopy );
// rebuild the AIG
@@ -494,7 +494,7 @@ Abc_Ntk_t * Abc_NtkFromAigSeq( Abc_Ntk_t * pNtkOld, Ivy_Man_t * pMan, int fHaig
// perform strashing
pNtk = Abc_NtkStartFromNoLatches( pNtkOld, ABC_NTK_STRASH, ABC_FUNC_AIG );
// transfer the pointers to the basic nodes
- Ivy_ManConst1(pMan)->TravId = Abc_EdgeFromNode( Abc_NtkConst1(pNtk) );
+ Ivy_ManConst1(pMan)->TravId = Abc_EdgeFromNode( Abc_AigConst1(pNtk) );
Abc_NtkForEachPi( pNtkOld, pObj, i )
Ivy_ManPi(pMan, i)->TravId = Abc_EdgeFromNode( pObj->pCopy );
// create latches of the new network
@@ -583,10 +583,11 @@ Ivy_Man_t * Abc_NtkToAig( Abc_Ntk_t * pNtkOld )
Ivy_Obj_t * pFanin;
int i;
// create the manager
- assert( Abc_NtkHasSop(pNtkOld) || Abc_NtkHasAig(pNtkOld) );
+ assert( Abc_NtkHasSop(pNtkOld) || Abc_NtkIsStrash(pNtkOld) );
pMan = Ivy_ManStart();
// create the PIs
- Abc_NtkConst1(pNtkOld)->pCopy = (Abc_Obj_t *)Ivy_ManConst1(pMan);
+ if ( Abc_NtkIsStrash(pNtkOld) )
+ Abc_AigConst1(pNtkOld)->pCopy = (Abc_Obj_t *)Ivy_ManConst1(pMan);
Abc_NtkForEachCi( pNtkOld, pObj, i )
pObj->pCopy = (Abc_Obj_t *)Ivy_ObjCreatePi(pMan);
// perform the conversion of the internal nodes
@@ -646,14 +647,13 @@ Ivy_Obj_t * Abc_NodeStrashAig( Ivy_Man_t * pMan, Abc_Obj_t * pNode )
int fUseFactor = 1;
char * pSop;
Ivy_Obj_t * pFanin0, * pFanin1;
- extern int Abc_SopIsExorType( char * pSop );
assert( Abc_ObjIsNode(pNode) );
// consider the case when the graph is an AIG
if ( Abc_NtkIsStrash(pNode->pNtk) )
{
- if ( Abc_NodeIsConst(pNode) )
+ if ( Abc_AigNodeIsConst(pNode) )
return Ivy_ManConst1(pMan);
pFanin0 = (Ivy_Obj_t *)Abc_ObjFanin0(pNode)->pCopy;
pFanin0 = Ivy_NotCond( pFanin0, Abc_ObjFaninC0(pNode) );
diff --git a/src/base/abci/abcMap.c b/src/base/abci/abcMap.c
index c579eb84..276e41d0 100644
--- a/src/base/abci/abcMap.c
+++ b/src/base/abci/abcMap.c
@@ -159,6 +159,7 @@ Map_Man_t * Abc_NtkToMap( Abc_Ntk_t * pNtk, double DelayTarget, int fRecovery, f
// create PIs and remember them in the old nodes
Abc_NtkCleanCopy( pNtk );
+ Abc_AigConst1(pNtk)->pCopy = (Abc_Obj_t *)Map_ManReadConst1(pMan);
Abc_NtkForEachCi( pNtk, pNode, i )
{
pNodeMap = Map_ManReadInputs(pMan)[i];
@@ -173,12 +174,6 @@ Map_Man_t * Abc_NtkToMap( Abc_Ntk_t * pNtk, double DelayTarget, int fRecovery, f
Vec_PtrForEachEntry( vNodes, pNode, i )
{
Extra_ProgressBarUpdate( pProgress, i, NULL );
- // consider the case of a constant
- if ( Abc_NodeIsConst(pNode) )
- {
- Abc_NtkConst1(pNtk)->pCopy = (Abc_Obj_t *)Map_ManReadConst1(pMan);
- continue;
- }
// add the node to the mapper
pNodeMap = Map_NodeAnd( pMan,
Map_NotCond( Abc_ObjFanin0(pNode)->pCopy, Abc_ObjFaninC0(pNode) ),
@@ -189,7 +184,7 @@ Map_Man_t * Abc_NtkToMap( Abc_Ntk_t * pNtk, double DelayTarget, int fRecovery, f
if ( pSwitching )
Map_NodeSetSwitching( pNodeMap, pSwitching[pNode->Id] );
// set up the choice node
- if ( Abc_NodeIsAigChoice( pNode ) )
+ if ( Abc_AigNodeIsChoice( pNode ) )
for ( pPrev = pNode, pFanin = pNode->pData; pFanin; pPrev = pFanin, pFanin = pFanin->pData )
{
Map_NodeSetNextE( (Map_Node_t *)pPrev->pCopy, (Map_Node_t *)pFanin->pCopy );
@@ -223,16 +218,12 @@ Abc_Ntk_t * Abc_NtkFromMap( Map_Man_t * pMan, Abc_Ntk_t * pNtk )
Map_Node_t * pNodeMap;
Abc_Obj_t * pNode, * pNodeNew;
int i, nDupGates;
-
// create the new network
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_MAP );
// make the mapper point to the new network
Map_ManCleanData( pMan );
Abc_NtkForEachCi( pNtk, pNode, i )
Map_NodeSetData( Map_ManReadInputs(pMan)[i], 1, (char *)pNode->pCopy );
- // set the constant node
- Map_NodeSetData( Map_ManReadConst1(pMan), 1, (char *)Abc_NtkConst1(pNtkNew) );
-
// assign the mapping of the required phase to the POs
pProgress = Extra_ProgressBarStart( stdout, Abc_NtkCoNum(pNtk) );
Abc_NtkForEachCo( pNtk, pNode, i )
@@ -266,6 +257,10 @@ Abc_Obj_t * Abc_NodeFromMap_rec( Abc_Ntk_t * pNtkNew, Map_Node_t * pNodeMap, int
{
Abc_Obj_t * pNodeNew, * pNodeInv;
+ // check the case of constant node
+ if ( Map_NodeIsConst(pNodeMap) )
+ return fPhase? Abc_NodeCreateConst1(pNtkNew) : Abc_NodeCreateConst0(pNtkNew);
+
// check if the phase is already implemented
pNodeNew = (Abc_Obj_t *)Map_NodeReadData( pNodeMap, fPhase );
if ( pNodeNew )
@@ -393,38 +388,6 @@ Abc_Obj_t * Abc_NodeFromMapSuper_rec( Abc_Ntk_t * pNtkNew, Map_Node_t * pNodeMap
}
-/**Function*************************************************************
-
- Synopsis [Unmaps the network.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_NtkUnmap( Abc_Ntk_t * pNtk )
-{
- Abc_Obj_t * pNode;
- char * pSop;
- int i;
-
- assert( Abc_NtkIsMappedLogic(pNtk) );
- // update the functionality manager
- assert( pNtk->pManFunc == Abc_FrameReadLibGen() );
- pNtk->pManFunc = Extra_MmFlexStart();
- pNtk->ntkFunc = ABC_FUNC_SOP;
- // update the nodes
- Abc_NtkForEachNode( pNtk, pNode, i )
- {
- pSop = Mio_GateReadSop(pNode->pData);
- assert( Abc_SopGetVarNum(pSop) == Abc_ObjFaninNum(pNode) );
- pNode->pData = Abc_SopRegister( pNtk->pManFunc, pSop );
- }
- return 1;
-}
-
@@ -524,7 +487,7 @@ Abc_Ntk_t * Abc_NtkFromMapSuperChoice( Map_Man_t * pMan, Abc_Ntk_t * pNtk )
pNtkNew = Abc_NtkRenode( pNtkNew2, 0, 20, 0, 0, 1, 0 );
if ( !Abc_NtkBddToSop( pNtkNew, 0 ) )
{
- printf( "Converting to SOPs has failed.\n" );
+ printf( "Abc_NtkFromMapSuperChoice(): Converting to SOPs has failed.\n" );
return NULL;
}
@@ -545,8 +508,8 @@ Abc_Ntk_t * Abc_NtkFromMapSuperChoice( Map_Man_t * pMan, Abc_Ntk_t * pNtk )
}
Abc_NtkForEachNode( pNtk, pNode, i )
{
- if ( Abc_NodeIsConst(pNode) )
- continue;
+// if ( Abc_NodeIsConst(pNode) )
+// continue;
Map_NodeSetData( (Map_Node_t *)pNode->pNext, 0, (char *)Abc_NodeCreateInv(pNtkNew,pNode->pCopy) );
Map_NodeSetData( (Map_Node_t *)pNode->pNext, 1, (char *)pNode->pCopy );
}
@@ -556,8 +519,8 @@ Abc_Ntk_t * Abc_NtkFromMapSuperChoice( Map_Man_t * pMan, Abc_Ntk_t * pNtk )
Abc_NtkForEachNode( pNtk, pNode, i )
{
Extra_ProgressBarUpdate( pProgress, i, NULL );
- if ( Abc_NodeIsConst(pNode) )
- continue;
+// if ( Abc_NodeIsConst(pNode) )
+// continue;
Abc_NodeSuperChoice( pNtkNew, pNode );
}
Extra_ProgressBarStop( pProgress );
diff --git a/src/base/abci/abcMini.c b/src/base/abci/abcMini.c
new file mode 100644
index 00000000..037f058a
--- /dev/null
+++ b/src/base/abci/abcMini.c
@@ -0,0 +1,152 @@
+/**CFile****************************************************************
+
+ FileName [abcMini.c]
+
+ SystemName [ABC: Logic synthesis and verification system.]
+
+ PackageName [Network and node package.]
+
+ Synopsis [Interface to the minimalistic AIG package.]
+
+ Author [Alan Mishchenko]
+
+ Affiliation [UC Berkeley]
+
+ Date [Ver. 1.0. Started - June 20, 2005.]
+
+ Revision [$Id: abcMini.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
+
+***********************************************************************/
+
+#include "abc.h"
+
+////////////////////////////////////////////////////////////////////////
+/// DECLARATIONS ///
+////////////////////////////////////////////////////////////////////////
+
+static Aig_Man_t * Abc_NtkToAig( Abc_Ntk_t * pNtk );
+static Abc_Ntk_t * Abc_NtkFromAig( Abc_Ntk_t * pNtkOld, Aig_Man_t * pMan );
+
+////////////////////////////////////////////////////////////////////////
+/// FUNCTION DEFINITIONS ///
+////////////////////////////////////////////////////////////////////////
+
+/**Function*************************************************************
+
+ Synopsis [Gives the current ABC network to AIG manager for processing.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+Abc_Ntk_t * Abc_NtkMiniBalance( Abc_Ntk_t * pNtk )
+{
+ Abc_Ntk_t * pNtkAig;
+ Aig_Man_t * pMan, * pTemp;
+ assert( Abc_NtkIsStrash(pNtk) );
+ // convert to the AIG manager
+ pMan = Abc_NtkToAig( pNtk );
+ if ( pMan == NULL )
+ return NULL;
+ if ( !Aig_ManCheck( pMan ) )
+ {
+ printf( "AIG check has failed.\n" );
+ Aig_ManStop( pMan );
+ return NULL;
+ }
+ // perform balance
+ Aig_ManPrintStats( pMan );
+ pMan = Aig_ManBalance( pTemp = pMan, 1 );
+ Aig_ManStop( pTemp );
+ Aig_ManPrintStats( pMan );
+ // convert from the AIG manager
+ pNtkAig = Abc_NtkFromAig( pNtk, pMan );
+ if ( pNtkAig == NULL )
+ return NULL;
+ Aig_ManStop( pMan );
+ // make sure everything is okay
+ if ( !Abc_NtkCheck( pNtkAig ) )
+ {
+ printf( "Abc_NtkStrash: The network check has failed.\n" );
+ Abc_NtkDelete( pNtkAig );
+ return NULL;
+ }
+ return pNtkAig;
+}
+
+/**Function*************************************************************
+
+ Synopsis [Converts the network from the AIG manager into ABC.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+Aig_Man_t * Abc_NtkToAig( Abc_Ntk_t * pNtk )
+{
+ Aig_Man_t * pMan;
+ Abc_Obj_t * pObj;
+ int i;
+ // create the manager
+ pMan = Aig_ManStart();
+ // transfer the pointers to the basic nodes
+ Abc_AigConst1(pNtk)->pCopy = (Abc_Obj_t *)Aig_ManConst1(pMan);
+ Abc_NtkForEachCi( pNtk, pObj, i )
+ pObj->pCopy = (Abc_Obj_t *)Aig_ObjCreatePi(pMan);
+ // perform the conversion of the internal nodes (assumes DFS ordering)
+ Abc_NtkForEachNode( pNtk, pObj, i )
+ pObj->pCopy = (Abc_Obj_t *)Aig_And( pMan, (Aig_Obj_t *)Abc_ObjChild0Copy(pObj), (Aig_Obj_t *)Abc_ObjChild1Copy(pObj) );
+ // create the POs
+ Abc_NtkForEachCo( pNtk, pObj, i )
+ Aig_ObjCreatePo( pMan, (Aig_Obj_t *)Abc_ObjChild0Copy(pObj) );
+ Aig_ManCleanup( pMan );
+ return pMan;
+}
+
+/**Function*************************************************************
+
+ Synopsis [Converts the network from the AIG manager into ABC.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+Abc_Ntk_t * Abc_NtkFromAig( Abc_Ntk_t * pNtk, Aig_Man_t * pMan )
+{
+ Vec_Ptr_t * vNodes;
+ Abc_Ntk_t * pNtkNew;
+ Aig_Obj_t * pObj;
+ int i;
+ // perform strashing
+ pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_STRASH, ABC_FUNC_AIG );
+ // transfer the pointers to the basic nodes
+ Aig_ManConst1(pMan)->pData = Abc_AigConst1(pNtkNew);
+ Aig_ManForEachPi( pMan, pObj, i )
+ pObj->pData = Abc_NtkCi(pNtkNew, i);
+ // rebuild the AIG
+ vNodes = Aig_ManDfs( pMan );
+ Vec_PtrForEachEntry( vNodes, pObj, i )
+ pObj->pData = Abc_AigAnd( pNtkNew->pManFunc, (Abc_Obj_t *)Aig_ObjChild0Copy(pObj), (Abc_Obj_t *)Aig_ObjChild1Copy(pObj) );
+ Vec_PtrFree( vNodes );
+ // connect the PO nodes
+ Aig_ManForEachPo( pMan, pObj, i )
+ Abc_ObjAddFanin( Abc_NtkCo(pNtkNew, i), (Abc_Obj_t *)Aig_ObjChild0Copy(pObj) );
+ if ( !Abc_NtkCheck( pNtkNew ) )
+ fprintf( stdout, "Abc_NtkFromAig(): Network check has failed.\n" );
+ return pNtkNew;
+}
+
+////////////////////////////////////////////////////////////////////////
+/// END OF FILE ///
+////////////////////////////////////////////////////////////////////////
+
+
diff --git a/src/base/abci/abcMiter.c b/src/base/abci/abcMiter.c
index ea1beb8c..dfd49f6e 100644
--- a/src/base/abci/abcMiter.c
+++ b/src/base/abci/abcMiter.c
@@ -125,8 +125,8 @@ void Abc_NtkMiterPrepare( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2, Abc_Ntk_t * pNtk
// clean the copy field in all objects
// Abc_NtkCleanCopy( pNtk1 );
// Abc_NtkCleanCopy( pNtk2 );
- Abc_NtkConst1(pNtk1)->pCopy = Abc_NtkConst1(pNtkMiter);
- Abc_NtkConst1(pNtk2)->pCopy = Abc_NtkConst1(pNtkMiter);
+ Abc_AigConst1(pNtk1)->pCopy = Abc_AigConst1(pNtkMiter);
+ Abc_AigConst1(pNtk2)->pCopy = Abc_AigConst1(pNtkMiter);
if ( fComb )
{
@@ -216,11 +216,11 @@ void Abc_NtkMiterAddCone( Abc_Ntk_t * pNtk, Abc_Ntk_t * pNtkMiter, Abc_Obj_t * p
Abc_Obj_t * pNode;
int i;
// map the constant nodes
- Abc_NtkConst1(pNtk)->pCopy = Abc_NtkConst1(pNtkMiter);
+ Abc_AigConst1(pNtk)->pCopy = Abc_AigConst1(pNtkMiter);
// perform strashing
vNodes = Abc_NtkDfsNodes( pNtk, &pRoot, 1 );
Vec_PtrForEachEntry( vNodes, pNode, i )
- if ( Abc_NodeIsAigAnd(pNode) )
+ if ( Abc_AigNodeIsAnd(pNode) )
pNode->pCopy = Abc_AigAnd( pNtkMiter->pManFunc, Abc_ObjChild0Copy(pNode), Abc_ObjChild1Copy(pNode) );
Vec_PtrFree( vNodes );
}
@@ -372,12 +372,12 @@ Abc_Ntk_t * Abc_NtkMiterCofactor( Abc_Ntk_t * pNtk, Vec_Int_t * vPiValues )
continue;
if ( Value == 0 )
{
- Abc_NtkCi(pNtk, i)->pCopy = Abc_ObjNot( Abc_NtkConst1(pNtkMiter) );
+ Abc_NtkCi(pNtk, i)->pCopy = Abc_ObjNot( Abc_AigConst1(pNtkMiter) );
continue;
}
if ( Value == 1 )
{
- Abc_NtkCi(pNtk, i)->pCopy = Abc_NtkConst1(pNtkMiter);
+ Abc_NtkCi(pNtk, i)->pCopy = Abc_AigConst1(pNtkMiter);
continue;
}
assert( 0 );
@@ -433,9 +433,9 @@ Abc_Ntk_t * Abc_NtkMiterForCofactors( Abc_Ntk_t * pNtk, int Out, int In1, int In
// perform strashing
Abc_NtkMiterPrepare( pNtk, pNtk, pNtkMiter, 1 );
// set the first cofactor
- Abc_NtkCi(pNtk, In1)->pCopy = Abc_ObjNot( Abc_NtkConst1(pNtkMiter) );
+ Abc_NtkCi(pNtk, In1)->pCopy = Abc_ObjNot( Abc_AigConst1(pNtkMiter) );
if ( In2 >= 0 )
- Abc_NtkCi(pNtk, In2)->pCopy = Abc_NtkConst1( pNtkMiter );
+ Abc_NtkCi(pNtk, In2)->pCopy = Abc_AigConst1(pNtkMiter);
// add the first cofactor
Abc_NtkMiterAddCone( pNtk, pNtkMiter, pRoot );
@@ -443,9 +443,9 @@ Abc_Ntk_t * Abc_NtkMiterForCofactors( Abc_Ntk_t * pNtk, int Out, int In1, int In
pOutput1 = Abc_ObjFanin0(pRoot)->pCopy;
// set the second cofactor
- Abc_NtkCi(pNtk, In1)->pCopy = Abc_NtkConst1( pNtkMiter );
+ Abc_NtkCi(pNtk, In1)->pCopy = Abc_AigConst1(pNtkMiter);
if ( In2 >= 0 )
- Abc_NtkCi(pNtk, In2)->pCopy = Abc_ObjNot( Abc_NtkConst1(pNtkMiter) );
+ Abc_NtkCi(pNtk, In2)->pCopy = Abc_ObjNot( Abc_AigConst1(pNtkMiter) );
// add the second cofactor
Abc_NtkMiterAddCone( pNtk, pNtkMiter, pRoot );
@@ -497,7 +497,7 @@ Abc_Ntk_t * Abc_NtkMiterQuantify( Abc_Ntk_t * pNtk, int In, int fExist )
// perform strashing
Abc_NtkMiterPrepare( pNtk, pNtk, pNtkMiter, 1 );
// set the first cofactor
- Abc_NtkCi(pNtk, In)->pCopy = Abc_ObjNot( Abc_NtkConst1(pNtkMiter) );
+ Abc_NtkCi(pNtk, In)->pCopy = Abc_ObjNot( Abc_AigConst1(pNtkMiter) );
// add the first cofactor
Abc_NtkMiterAddCone( pNtk, pNtkMiter, pRoot );
// save the output
@@ -505,7 +505,7 @@ Abc_Ntk_t * Abc_NtkMiterQuantify( Abc_Ntk_t * pNtk, int In, int fExist )
pOutput1 = Abc_ObjNotCond( Abc_ObjFanin0(pRoot)->pCopy, Abc_ObjFaninC0(pRoot) );
// set the second cofactor
- Abc_NtkCi(pNtk, In)->pCopy = Abc_NtkConst1( pNtkMiter );
+ Abc_NtkCi(pNtk, In)->pCopy = Abc_AigConst1(pNtkMiter);
// add the second cofactor
Abc_NtkMiterAddCone( pNtk, pNtkMiter, pRoot );
// save the output
@@ -581,9 +581,9 @@ int Abc_NtkMiterIsConstant( Abc_Ntk_t * pMiter )
Abc_NtkForEachPo( pMiter, pNodePo, i )
{
pChild = Abc_ObjChild0( pNodePo );
- if ( Abc_ObjIsNode(Abc_ObjRegular(pChild)) && Abc_NodeIsConst(pChild) )
+ if ( Abc_ObjIsNode(Abc_ObjRegular(pChild)) && Abc_AigNodeIsConst(pChild) )
{
- assert( Abc_ObjRegular(pChild) == Abc_NtkConst1(pMiter) );
+ assert( Abc_ObjRegular(pChild) == Abc_AigConst1(pMiter) );
if ( !Abc_ObjIsComplement(pChild) )
{
// if the miter is constant 1, return immediately
@@ -617,7 +617,7 @@ void Abc_NtkMiterReport( Abc_Ntk_t * pMiter )
if ( Abc_NtkPoNum(pMiter) == 1 )
{
pChild = Abc_ObjChild0( Abc_NtkPo(pMiter,0) );
- if ( Abc_ObjIsNode(Abc_ObjRegular(pChild)) && Abc_NodeIsConst(pChild) )
+ if ( Abc_ObjIsNode(Abc_ObjRegular(pChild)) && Abc_AigNodeIsConst(pChild) )
{
if ( Abc_ObjIsComplement(pChild) )
printf( "Unsatisfiable.\n" );
@@ -633,7 +633,7 @@ void Abc_NtkMiterReport( Abc_Ntk_t * pMiter )
{
pChild = Abc_ObjChild0( Abc_NtkPo(pMiter,i) );
printf( "Output #%2d : ", i );
- if ( Abc_ObjIsNode(Abc_ObjRegular(pChild)) && Abc_NodeIsConst(pChild) )
+ if ( Abc_ObjIsNode(Abc_ObjRegular(pChild)) && Abc_AigNodeIsConst(pChild) )
{
if ( Abc_ObjIsComplement(pChild) )
printf( "Unsatisfiable.\n" );
@@ -690,7 +690,7 @@ Abc_Ntk_t * Abc_NtkFrames( Abc_Ntk_t * pNtk, int nFrames, int fInitial )
Counter++;
}
else
- pLatch->pCopy = Abc_ObjNotCond( Abc_NtkConst1(pNtkFrames), Abc_LatchIsInit0(pLatch) );
+ pLatch->pCopy = Abc_ObjNotCond( Abc_AigConst1(pNtkFrames), Abc_LatchIsInit0(pLatch) );
}
if ( Counter )
printf( "Warning: %d uninitialized latches are replaced by free PI variables.\n", Counter );
@@ -756,7 +756,7 @@ void Abc_NtkAddFrame( Abc_Ntk_t * pNtkFrames, Abc_Ntk_t * pNtk, int iFrame )
// create the prefix to be added to the node names
sprintf( Buffer, "_%02d", iFrame );
// map the constant nodes
- Abc_NtkConst1(pNtk)->pCopy = Abc_NtkConst1(pNtkFrames);
+ Abc_AigConst1(pNtk)->pCopy = Abc_AigConst1(pNtkFrames);
// add the new PI nodes
Abc_NtkForEachPi( pNtk, pNode, i )
Abc_NtkLogicStoreNamePlus( Abc_NtkDupObj(pNtkFrames, pNode), Abc_ObjName(pNode), Buffer );
@@ -829,7 +829,7 @@ Abc_Ntk_t * Abc_NtkFrames2( Abc_Ntk_t * pNtk, int nFrames, int fInitial, AddFram
Counter++;
}
else {
- pLatch->pCopy = Abc_ObjNotCond( Abc_NtkConst1(pNtkFrames), Abc_LatchIsInit0(pLatch) );
+ pLatch->pCopy = Abc_ObjNotCond( Abc_AigConst1(pNtkFrames), Abc_LatchIsInit0(pLatch) );
}
if (addFrameMapping) addFrameMapping(pLatch->pCopy, pLatch, 0, arg);
@@ -899,8 +899,8 @@ void Abc_NtkAddFrame2( Abc_Ntk_t * pNtkFrames, Abc_Ntk_t * pNtk, int iFrame, Vec
Abc_Obj_t * pConst1, * pConst1New;
int i;
// get the constant nodes
- pConst1 = Abc_NtkConst1( pNtk );
- pConst1New = Abc_NtkConst1( pNtkFrames );
+ pConst1 = Abc_AigConst1(pNtk);
+ pConst1New = Abc_AigConst1(pNtkFrames);
// create the prefix to be added to the node names
sprintf( Buffer, "_%02d", iFrame );
// add the new PI nodes
@@ -1037,7 +1037,7 @@ int Abc_NtkOrPos( Abc_Ntk_t * pNtk )
assert( Abc_NtkIsStrash(pNtk) );
assert( Abc_NtkLatchNum(pNtk) == 0 );
// OR the POs
- pMiter = Abc_ObjNot( Abc_NtkConst1(pNtk) );
+ pMiter = Abc_ObjNot( Abc_AigConst1(pNtk) );
Abc_NtkForEachPo( pNtk, pNode, i )
pMiter = Abc_AigOr( pNtk->pManFunc, pMiter, Abc_ObjChild0(pNode) );
// remove the POs and their names
diff --git a/src/base/abci/abcNewAig.c b/src/base/abci/abcNewAig.c
deleted file mode 100644
index 62ae51ed..00000000
--- a/src/base/abci/abcNewAig.c
+++ /dev/null
@@ -1,391 +0,0 @@
-/**CFile****************************************************************
-
- FileName [aigNewAig.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Network and node package.]
-
- Synopsis [Strashing of the current network.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: aigNewAig.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "abc.h"
-#include "extra.h"
-#include "dec.h"
-#include "aig.h"
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-static Abc_Ntk_t * Abc_NtkFromAig( Abc_Ntk_t * pNtkOld, Aig_Man_t * pMan );
-static Aig_Man_t * Abc_NtkToAig( Abc_Ntk_t * pNtkOld );
-
-static void Abc_NtkStrashPerformAig( Abc_Ntk_t * pNtk, Aig_Man_t * pMan );
-static Aig_Node_t * Abc_NodeStrashAig( Aig_Man_t * pMan, Abc_Obj_t * pNode );
-static Aig_Node_t * Abc_NodeStrashAigSopAig( Aig_Man_t * pMan, Abc_Obj_t * pNode, char * pSop );
-static Aig_Node_t * Abc_NodeStrashAigExorAig( Aig_Man_t * pMan, Abc_Obj_t * pNode, char * pSop );
-static Aig_Node_t * Abc_NodeStrashAigFactorAig( Aig_Man_t * pMan, Abc_Obj_t * pNode, char * pSop );
-extern char * Mio_GateReadSop( void * pGate );
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Gives the current ABC network to AIG manager for processing.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Ntk_t * Abc_NtkNewAig( Abc_Ntk_t * pNtk )
-{
- Aig_Man_t * pMan;
- Abc_Ntk_t * pNtkAig;
-// Aig_ProofType_t RetValue;
- int fCleanup = 1;
- int nNodes;
- extern void Aig_MffcTest( Aig_Man_t * pMan );
-
-
- assert( !Abc_NtkIsNetlist(pNtk) );
- assert( !Abc_NtkIsSeq(pNtk) );
- if ( Abc_NtkIsBddLogic(pNtk) )
- {
- if ( !Abc_NtkBddToSop(pNtk, 0) )
- {
- printf( "Converting to SOPs has failed.\n" );
- return;
- }
- }
- // print warning about choice nodes
- if ( Abc_NtkGetChoiceNum( pNtk ) )
- printf( "Warning: The choice nodes in the initial AIG are removed by strashing.\n" );
-
- // convert to the AIG manager
- pMan = Abc_NtkToAig( pNtk );
-
- Aig_MffcTest( pMan );
-
-/*
- // execute a command in the AIG manager
- RetValue = Aig_FraigProve( pMan );
- if ( RetValue == AIG_PROOF_SAT )
- printf( "Satisfiable.\n" );
- else if ( RetValue == AIG_PROOF_UNSAT )
- printf( "Unsatisfiable.\n" );
- else if ( RetValue == AIG_PROOF_TIMEOUT )
- printf( "Undecided.\n" );
- else
- assert( 0 );
-*/
-
- // convert from the AIG manager
- pNtkAig = Abc_NtkFromAig( pNtk, pMan );
- Aig_ManStop( pMan );
-
- // report the cleanup results
- if ( fCleanup && (nNodes = Abc_AigCleanup(pNtkAig->pManFunc)) )
- printf( "Warning: AIG cleanup removed %d nodes (this is not a bug).\n", nNodes );
- // duplicate EXDC
- if ( pNtk->pExdc )
- pNtkAig->pExdc = Abc_NtkDup( pNtk->pExdc );
- // make sure everything is okay
- if ( !Abc_NtkCheck( pNtkAig ) )
- {
- printf( "Abc_NtkStrash: The network check has failed.\n" );
- Abc_NtkDelete( pNtkAig );
- return NULL;
- }
- return pNtkAig;
-}
-
-/**Function*************************************************************
-
- Synopsis [Converts the network from the AIG manager into ABC.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Ntk_t * Abc_NtkFromAig( Abc_Ntk_t * pNtkOld, Aig_Man_t * pMan )
-{
- Abc_Ntk_t * pNtk;
- Abc_Obj_t * pObj, * pObjNew, * pFaninNew, * pFaninNew0, * pFaninNew1;
- Aig_Node_t * pAnd;
- int i;
- // perform strashing
- pNtk = Abc_NtkStartFrom( pNtkOld, ABC_NTK_STRASH, ABC_FUNC_AIG );
- // transfer the pointers to the basic nodes
- Aig_ManConst1(pMan)->Data = Abc_NtkConst1(pNtk)->Id;
- Abc_NtkForEachCi( pNtkOld, pObj, i )
- Aig_ManPi(pMan, i)->Data = pObj->pCopy->Id;
- // rebuild the AIG
- Aig_ManForEachAnd( pMan, pAnd, i )
- {
- // add the first fanins
- pFaninNew0 = Abc_NtkObj( pNtk, Aig_NodeFanin0(pAnd)->Data );
- pFaninNew0 = Abc_ObjNotCond( pFaninNew0, Aig_NodeFaninC0(pAnd) );
- // add the first second
- pFaninNew1 = Abc_NtkObj( pNtk, Aig_NodeFanin1(pAnd)->Data );
- pFaninNew1 = Abc_ObjNotCond( pFaninNew1, Aig_NodeFaninC1(pAnd) );
- // create the new node
- pObjNew = Abc_AigAnd( pNtk->pManFunc, pFaninNew0, pFaninNew1 );
- pAnd->Data = pObjNew->Id;
- }
- // connect the PO nodes
- Abc_NtkForEachCo( pNtkOld, pObj, i )
- {
- pAnd = Aig_ManPo( pMan, i );
- pFaninNew = Abc_NtkObj( pNtk, Aig_NodeFanin0(pAnd)->Data );
- pFaninNew = Abc_ObjNotCond( pFaninNew, Aig_NodeFaninC0(pAnd) );
- Abc_ObjAddFanin( pObj->pCopy, pFaninNew );
- }
- return pNtk;
-}
-
-/**Function*************************************************************
-
- Synopsis [Converts the network from the AIG manager into ABC.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Aig_Man_t * Abc_NtkToAig( Abc_Ntk_t * pNtkOld )
-{
- Aig_Param_t Params;
- Aig_Man_t * pMan;
- Abc_Obj_t * pObj;
- Aig_Node_t * pFanin;
- int i;
- // create the manager
- Aig_ManSetDefaultParams( &Params );
- pMan = Aig_ManStart( &Params );
- // create the PIs
- Abc_NtkConst1(pNtkOld)->pCopy = (Abc_Obj_t *)Aig_ManConst1(pMan);
- Abc_NtkForEachCi( pNtkOld, pObj, i )
- pObj->pCopy = (Abc_Obj_t *)Aig_NodeCreatePi(pMan);
- Abc_NtkForEachCo( pNtkOld, pObj, i )
- pObj->pCopy = (Abc_Obj_t *)Aig_NodeCreatePo(pMan);
- // perform the conversion of the internal nodes
- Abc_NtkStrashPerformAig( pNtkOld, pMan );
- // create the POs
- Abc_NtkForEachCo( pNtkOld, pObj, i )
- {
- pFanin = (Aig_Node_t *)Abc_ObjFanin0(pObj)->pCopy;
- pFanin = Aig_NotCond( pFanin, Abc_ObjFaninC0(pObj) );
- Aig_NodeConnectPo( pMan, (Aig_Node_t *)pObj->pCopy, pFanin );
- }
- return pMan;
-}
-
-/**Function*************************************************************
-
- Synopsis [Prepares the network for strashing.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_NtkStrashPerformAig( Abc_Ntk_t * pNtk, Aig_Man_t * pMan )
-{
-// ProgressBar * pProgress;
- Vec_Ptr_t * vNodes;
- Abc_Obj_t * pNode;
- int i;
- vNodes = Abc_NtkDfs( pNtk, 0 );
-// pProgress = Extra_ProgressBarStart( stdout, vNodes->nSize );
- Vec_PtrForEachEntry( vNodes, pNode, i )
- {
-// Extra_ProgressBarUpdate( pProgress, i, NULL );
- pNode->pCopy = (Abc_Obj_t *)Abc_NodeStrashAig( pMan, pNode );
- }
-// Extra_ProgressBarStop( pProgress );
- Vec_PtrFree( vNodes );
-}
-
-/**Function*************************************************************
-
- Synopsis [Strashes one logic node.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Aig_Node_t * Abc_NodeStrashAig( Aig_Man_t * pMan, Abc_Obj_t * pNode )
-{
- int fUseFactor = 1;
- char * pSop;
- Aig_Node_t * pFanin0, * pFanin1;
- extern int Abc_SopIsExorType( char * pSop );
-
- assert( Abc_ObjIsNode(pNode) );
-
- // consider the case when the graph is an AIG
- if ( Abc_NtkIsStrash(pNode->pNtk) )
- {
- if ( Abc_NodeIsConst(pNode) )
- return Aig_ManConst1(pMan);
- pFanin0 = (Aig_Node_t *)Abc_ObjFanin0(pNode)->pCopy;
- pFanin0 = Aig_NotCond( pFanin0, Abc_ObjFaninC0(pNode) );
- pFanin1 = (Aig_Node_t *)Abc_ObjFanin1(pNode)->pCopy;
- pFanin1 = Aig_NotCond( pFanin1, Abc_ObjFaninC1(pNode) );
- return Aig_And( pMan, pFanin0, pFanin1 );
- }
-
- // get the SOP of the node
- if ( Abc_NtkHasMapping(pNode->pNtk) )
- pSop = Mio_GateReadSop(pNode->pData);
- else
- pSop = pNode->pData;
-
- // consider the constant node
- if ( Abc_NodeIsConst(pNode) )
- return Aig_NotCond( Aig_ManConst1(pMan), Abc_SopIsConst0(pSop) );
-
- // consider the special case of EXOR function
- if ( Abc_SopIsExorType(pSop) )
- return Abc_NodeStrashAigExorAig( pMan, pNode, pSop );
-
- // decide when to use factoring
- if ( fUseFactor && Abc_ObjFaninNum(pNode) > 2 && Abc_SopGetCubeNum(pSop) > 1 )
- return Abc_NodeStrashAigFactorAig( pMan, pNode, pSop );
- return Abc_NodeStrashAigSopAig( pMan, pNode, pSop );
-}
-
-/**Function*************************************************************
-
- Synopsis [Strashes one logic node using its SOP.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Aig_Node_t * Abc_NodeStrashAigSopAig( Aig_Man_t * pMan, Abc_Obj_t * pNode, char * pSop )
-{
- Abc_Obj_t * pFanin;
- Aig_Node_t * pAnd, * pSum;
- char * pCube;
- int i, nFanins;
-
- // get the number of node's fanins
- nFanins = Abc_ObjFaninNum( pNode );
- assert( nFanins == Abc_SopGetVarNum(pSop) );
- // go through the cubes of the node's SOP
- pSum = Aig_Not( Aig_ManConst1(pMan) );
- Abc_SopForEachCube( pSop, nFanins, pCube )
- {
- // create the AND of literals
- pAnd = Aig_ManConst1(pMan);
- Abc_ObjForEachFanin( pNode, pFanin, i ) // pFanin can be a net
- {
- if ( pCube[i] == '1' )
- pAnd = Aig_And( pMan, pAnd, (Aig_Node_t *)pFanin->pCopy );
- else if ( pCube[i] == '0' )
- pAnd = Aig_And( pMan, pAnd, Aig_Not((Aig_Node_t *)pFanin->pCopy) );
- }
- // add to the sum of cubes
- pSum = Aig_Or( pMan, pSum, pAnd );
- }
- // decide whether to complement the result
- if ( Abc_SopIsComplement(pSop) )
- pSum = Aig_Not(pSum);
- return pSum;
-}
-
-/**Function*************************************************************
-
- Synopsis [Strashed n-input XOR function.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Aig_Node_t * Abc_NodeStrashAigExorAig( Aig_Man_t * pMan, Abc_Obj_t * pNode, char * pSop )
-{
- Abc_Obj_t * pFanin;
- Aig_Node_t * pSum;
- int i, nFanins;
- // get the number of node's fanins
- nFanins = Abc_ObjFaninNum( pNode );
- assert( nFanins == Abc_SopGetVarNum(pSop) );
- // go through the cubes of the node's SOP
- pSum = Aig_Not( Aig_ManConst1(pMan) );
- for ( i = 0; i < nFanins; i++ )
- {
- pFanin = Abc_ObjFanin( pNode, i );
- pSum = Aig_Xor( pMan, pSum, (Aig_Node_t *)pFanin->pCopy );
- }
- if ( Abc_SopIsComplement(pSop) )
- pSum = Aig_Not(pSum);
- return pSum;
-}
-
-/**Function*************************************************************
-
- Synopsis [Strashes one logic node using its SOP.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Aig_Node_t * Abc_NodeStrashAigFactorAig( Aig_Man_t * pMan, Abc_Obj_t * pRoot, char * pSop )
-{
- Dec_Graph_t * pFForm;
- Dec_Node_t * pNode;
- Aig_Node_t * pAnd;
- int i;
- extern Aig_Node_t * Dec_GraphToNetworkAig( Aig_Man_t * pMan, Dec_Graph_t * pGraph );
-
- // perform factoring
- pFForm = Dec_Factor( pSop );
- // collect the fanins
- Dec_GraphForEachLeaf( pFForm, pNode, i )
- pNode->pFunc = Abc_ObjFanin(pRoot,i)->pCopy;
- // perform strashing
- pAnd = Dec_GraphToNetworkAig( pMan, pFForm );
- Dec_GraphFree( pFForm );
- return pAnd;
-}
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
diff --git a/src/base/abci/abcNtbdd.c b/src/base/abci/abcNtbdd.c
index 0976b652..99ed5636 100644
--- a/src/base/abci/abcNtbdd.c
+++ b/src/base/abci/abcNtbdd.c
@@ -189,7 +189,7 @@ Abc_Obj_t * Abc_NodeBddToMuxes( Abc_Obj_t * pNodeOld, Abc_Ntk_t * pNtkNew )
// create the table mapping BDD nodes into the ABC nodes
tBdd2Node = st_init_table( st_ptrcmp, st_ptrhash );
// add the constant and the elementary vars
- st_insert( tBdd2Node, (char *)b1, (char *)Abc_NtkConst1(pNtkNew) );
+ st_insert( tBdd2Node, (char *)b1, (char *)Abc_AigConst1(pNtkNew) );
Abc_ObjForEachFanin( pNodeOld, pFaninOld, i )
st_insert( tBdd2Node, (char *)Cudd_bddIthVar(dd, i), (char *)pFaninOld->pCopy );
// create the new nodes recursively
@@ -271,7 +271,7 @@ DdManager * Abc_NtkGlobalBdds( Abc_Ntk_t * pNtk, int nBddSizeMax, int fLatchOnly
Cudd_Ref( dd->vars[i] );
}
// assign the constant node BDD
- pNode = Abc_NtkConst1( pNtk );
+ pNode = Abc_AigConst1(pNtk);
if ( Abc_ObjFanoutNum(pNode) > 0 )
{
pNode->pCopy = (Abc_Obj_t *)dd->one;
diff --git a/src/base/abci/abcPrint.c b/src/base/abci/abcPrint.c
index cb32def5..cb1d2a38 100644
--- a/src/base/abci/abcPrint.c
+++ b/src/base/abci/abcPrint.c
@@ -68,7 +68,7 @@ void Abc_NtkPrintStats( FILE * pFile, Abc_Ntk_t * pNtk, int fFactored )
fprintf( pFile, " net = %5d", Abc_NtkNetNum(pNtk) );
fprintf( pFile, " nd = %5d", Abc_NtkNodeNum(pNtk) );
}
- else if ( Abc_NtkHasAig(pNtk) )
+ else if ( Abc_NtkIsStrash(pNtk) || Abc_NtkIsSeq(pNtk) )
{
fprintf( pFile, " and = %5d", Abc_NtkNodeNum(pNtk) );
if ( Num = Abc_NtkGetChoiceNum(pNtk) )
@@ -83,7 +83,10 @@ void Abc_NtkPrintStats( FILE * pFile, Abc_Ntk_t * pNtk, int fFactored )
else
fprintf( pFile, " nd = %5d", Abc_NtkNodeNum(pNtk) );
- if ( Abc_NtkHasSop(pNtk) )
+ if ( Abc_NtkIsStrash(pNtk) || Abc_NtkIsSeq(pNtk) )
+ {
+ }
+ else if ( Abc_NtkHasSop(pNtk) )
{
fprintf( pFile, " cube = %5d", Abc_NtkGetCubeNum(pNtk) );
@@ -91,6 +94,8 @@ void Abc_NtkPrintStats( FILE * pFile, Abc_Ntk_t * pNtk, int fFactored )
if ( fFactored )
fprintf( pFile, " lit(fac) = %5d", Abc_NtkGetLitFactNum(pNtk) );
}
+ else if ( Abc_NtkHasAig(pNtk) )
+ fprintf( pFile, " aig = %5d", Abc_NtkGetAigNodeNum(pNtk) );
else if ( Abc_NtkHasBdd(pNtk) )
fprintf( pFile, " bdd = %5d", Abc_NtkGetBddNodeNum(pNtk) );
else if ( Abc_NtkHasMapping(pNtk) )
@@ -98,7 +103,7 @@ void Abc_NtkPrintStats( FILE * pFile, Abc_Ntk_t * pNtk, int fFactored )
fprintf( pFile, " area = %5.2f", Abc_NtkGetMappedArea(pNtk) );
fprintf( pFile, " delay = %5.2f", Abc_NtkDelayTrace(pNtk) );
}
- else if ( !Abc_NtkHasAig(pNtk) )
+ else if ( !Abc_NtkHasBlackbox(pNtk) )
{
assert( 0 );
}
@@ -661,12 +666,15 @@ void Abc_NtkPrintGates( Abc_Ntk_t * pNtk, int fUseLibrary )
return;
}
+ if ( Abc_NtkIsAigLogic(pNtk) )
+ return;
+
// transform logic functions from BDD to SOP
if ( fHasBdds = Abc_NtkIsBddLogic(pNtk) )
{
if ( !Abc_NtkBddToSop(pNtk, 0) )
{
- printf( "Converting to SOPs has failed.\n" );
+ printf( "Abc_NtkPrintGates(): Converting to SOPs has failed.\n" );
return;
}
}
@@ -785,6 +793,40 @@ void Abc_NtkPrintStrSupports( Abc_Ntk_t * pNtk )
}
}
+/**Function*************************************************************
+
+ Synopsis [Prints information about the clock skew schedule.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+void Abc_NtkPrintSkews( FILE * pFile, Abc_Ntk_t * pNtk, int fPrintAll ) {
+
+ Abc_Obj_t * pObj;
+ int i;
+ int nNonZero = 0;
+ float skew, sum = 0.0, avg;
+
+ if (fPrintAll) fprintf( pFile, "Full Clock Skew Schedule:\n\tGlobal Skew = %.2f\n", pNtk->globalSkew );
+
+ Abc_NtkForEachLatch( pNtk, pObj, i ) {
+ skew = Abc_NtkGetLatSkew( pNtk, i );
+ if ( skew != 0.0 ) {
+ nNonZero++;
+ sum += ABS( skew );
+ }
+ if (fPrintAll) fprintf( pFile, "\tLatch %d (Id = %d) \t Endpoint Skew = %.2f\n", i, pObj->Id, skew);
+ }
+
+ avg = sum / Abc_NtkLatchNum( pNtk );
+
+ fprintf( pFile, "Endpoint Skews : Total |Skew| = %.2f\t Avg |Skew| = %.2f\t Non-Zero Skews = %d\n",
+ sum, avg, nNonZero );
+}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
diff --git a/src/base/abci/abcRefactor.c b/src/base/abci/abcRefactor.c
index 3dd6c519..3d301cd6 100644
--- a/src/base/abci/abcRefactor.c
+++ b/src/base/abci/abcRefactor.c
@@ -109,8 +109,8 @@ int Abc_NtkRefactor( Abc_Ntk_t * pNtk, int nNodeSizeMax, int nConeSizeMax, bool
{
Extra_ProgressBarUpdate( pProgress, i, NULL );
// skip the constant node
- if ( Abc_NodeIsConst(pNode) )
- continue;
+// if ( Abc_NodeIsConst(pNode) )
+// continue;
// skip persistant nodes
if ( Abc_NodeIsPersistant(pNode) )
continue;
diff --git a/src/base/abci/abcRenode.c b/src/base/abci/abcRenode.c
index f7d351d2..2e448ce5 100644
--- a/src/base/abci/abcRenode.c
+++ b/src/base/abci/abcRenode.c
@@ -124,7 +124,7 @@ void Abc_NtkRenodeInt( Abc_Ntk_t * pNtk, Abc_Ntk_t * pNtkNew )
int i;
// set the constant node
- pConst1 = Abc_NtkConst1(pNtk);
+ pConst1 = Abc_AigConst1(pNtk);
if ( Abc_ObjFanoutNum(pConst1) > 0 )
{
pNodeNew = Abc_NtkCreateNode( pNtkNew );
@@ -173,7 +173,7 @@ Abc_Obj_t * Abc_NtkRenode_rec( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pNodeOld )
if ( pNodeOld->pCopy )
return pNodeOld->pCopy;
assert( Abc_ObjIsNode(pNodeOld) );
- assert( !Abc_NodeIsConst(pNodeOld) );
+ assert( !Abc_AigNodeIsConst(pNodeOld) );
assert( pNodeOld->fMarkA );
//printf( "%d ", Abc_NodeMffcSizeSupp(pNodeOld) );
@@ -214,7 +214,7 @@ DdNode * Abc_NtkRenodeDeriveBdd( DdManager * dd, Abc_Obj_t * pNodeOld, Vec_Ptr_t
Abc_Obj_t * pFaninOld;
DdNode * bFunc;
int i;
- assert( !Abc_NodeIsConst(pNodeOld) );
+ assert( !Abc_AigNodeIsConst(pNodeOld) );
assert( Abc_ObjIsNode(pNodeOld) );
// set the elementary BDD variables for the input nodes
for ( i = 0; i < vFaninsOld->nSize; i++ )
@@ -389,8 +389,8 @@ void Abc_NtkRenodeSetBounds( Abc_Ntk_t * pNtk, int nThresh, int nFaninMax )
Abc_NtkForEachNode( pNtk, pNode, i )
{
// skip PI/PO nodes
- if ( Abc_NodeIsConst(pNode) )
- continue;
+// if ( Abc_NodeIsConst(pNode) )
+// continue;
// mark the nodes with multiple fanouts
nFanouts = Abc_ObjFanoutNum(pNode);
nConeSize = Abc_NodeMffcSize(pNode);
@@ -406,8 +406,8 @@ void Abc_NtkRenodeSetBounds( Abc_Ntk_t * pNtk, int nThresh, int nFaninMax )
Abc_NtkForEachNode( pNtk, pNode, i )
{
// skip PI/PO nodes
- if ( Abc_NodeIsConst(pNode) )
- continue;
+// if ( Abc_NodeIsConst(pNode) )
+// continue;
if ( pNode->fMarkA == 0 )
continue;
// continue cutting branches until it meets the fanin limit
@@ -420,8 +420,8 @@ void Abc_NtkRenodeSetBounds( Abc_Ntk_t * pNtk, int nThresh, int nFaninMax )
Abc_NtkForEachNode( pNtk, pNode, i )
{
// skip PI/PO nodes
- if ( Abc_NodeIsConst(pNode) )
- continue;
+// if ( Abc_NodeIsConst(pNode) )
+// continue;
if ( pNode->fMarkA == 0 )
continue;
Abc_NtkRenodeCone( pNode, vCone );
@@ -455,8 +455,8 @@ void Abc_NtkRenodeSetBoundsCnf( Abc_Ntk_t * pNtk )
Abc_NtkForEachNode( pNtk, pNode, i )
{
// skip PI/PO nodes
- if ( Abc_NodeIsConst(pNode) )
- continue;
+// if ( Abc_NodeIsConst(pNode) )
+// continue;
// mark the nodes with multiple fanouts
if ( Abc_ObjFanoutNum(pNode) > 1 )
pNode->fMarkA = 1;
@@ -487,8 +487,8 @@ void Abc_NtkRenodeSetBoundsCnf( Abc_Ntk_t * pNtk )
Abc_NtkForEachNode( pNtk, pNode, i )
{
// skip PI/PO nodes
- if ( Abc_NodeIsConst(pNode) )
- continue;
+// if ( Abc_NodeIsConst(pNode) )
+// continue;
if ( Abc_NodeIsMuxType(pNode) &&
Abc_ObjFanin0(pNode)->fMarkA == 0 &&
Abc_ObjFanin1(pNode)->fMarkA == 0 )
@@ -521,8 +521,8 @@ void Abc_NtkRenodeSetBoundsMulti( Abc_Ntk_t * pNtk, int nThresh )
Abc_NtkForEachNode( pNtk, pNode, i )
{
// skip PI/PO nodes
- if ( Abc_NodeIsConst(pNode) )
- continue;
+// if ( Abc_NodeIsConst(pNode) )
+// continue;
// mark the nodes with multiple fanouts
// if ( Abc_ObjFanoutNum(pNode) > 1 )
// pNode->fMarkA = 1;
diff --git a/src/base/abci/abcRestruct.c b/src/base/abci/abcRestruct.c
index d738123a..9dc84999 100644
--- a/src/base/abci/abcRestruct.c
+++ b/src/base/abci/abcRestruct.c
@@ -132,8 +132,8 @@ pManRst->timeCut += clock() - clk;
{
Extra_ProgressBarUpdate( pProgress, i, NULL );
// skip the constant node
- if ( Abc_NodeIsConst(pNode) )
- continue;
+// if ( Abc_NodeIsConst(pNode) )
+// continue;
// skip persistant nodes
if ( Abc_NodeIsPersistant(pNode) )
continue;
diff --git a/src/base/abci/abcResub.c b/src/base/abci/abcResub.c
index b0061b61..9fcc6979 100644
--- a/src/base/abci/abcResub.c
+++ b/src/base/abci/abcResub.c
@@ -158,8 +158,8 @@ int Abc_NtkResubstitute( Abc_Ntk_t * pNtk, int nCutMax, int nStepsMax, bool fUpd
{
Extra_ProgressBarUpdate( pProgress, i, NULL );
// skip the constant node
- if ( Abc_NodeIsConst(pNode) )
- continue;
+// if ( Abc_NodeIsConst(pNode) )
+// continue;
// skip persistant nodes
if ( Abc_NodeIsPersistant(pNode) )
continue;
diff --git a/src/base/abci/abcRewrite.c b/src/base/abci/abcRewrite.c
index 703f05d9..2af10271 100644
--- a/src/base/abci/abcRewrite.c
+++ b/src/base/abci/abcRewrite.c
@@ -86,8 +86,8 @@ Rwr_ManAddTimeCuts( pManRwr, clock() - clk );
if ( i >= nNodes )
break;
// skip the constant node
- if ( Abc_NodeIsConst(pNode) )
- continue;
+// if ( Abc_NodeIsConst(pNode) )
+// continue;
// skip persistant nodes
if ( Abc_NodeIsPersistant(pNode) )
continue;
diff --git a/src/base/abci/abcRr.c b/src/base/abci/abcRr.c
index b3788d31..61bc8b09 100644
--- a/src/base/abci/abcRr.c
+++ b/src/base/abci/abcRr.c
@@ -120,8 +120,8 @@ int Abc_NtkRR( Abc_Ntk_t * pNtk, int nFaninLevels, int nFanoutLevels, int fUseFa
if ( i >= nNodes )
break;
// skip the constant node
- if ( Abc_NodeIsConst(pNode) )
- continue;
+// if ( Abc_NodeIsConst(pNode) )
+// continue;
// skip persistant nodes
if ( Abc_NodeIsPersistant(pNode) )
continue;
@@ -680,8 +680,7 @@ Abc_Ntk_t * Abc_NtkWindow( Abc_Ntk_t * pNtk, Vec_Ptr_t * vLeaves, Vec_Ptr_t * vC
// duplicate the name and the spec
pNtkNew->pName = Extra_UtilStrsav( "temp" );
// map the constant nodes
- if ( Abc_NtkConst1(pNtk) )
- Abc_NtkConst1(pNtk)->pCopy = Abc_NtkConst1(pNtkNew);
+ Abc_AigConst1(pNtk)->pCopy = Abc_AigConst1(pNtkNew);
// create and map the PIs
Vec_PtrForEachEntry( vLeaves, pObj, i )
pObj->pCopy = Abc_NtkCreatePi(pNtkNew);
@@ -728,7 +727,7 @@ void Abc_NtkRRSimulateStart( Abc_Ntk_t * pNtk )
Abc_Obj_t * pObj;
unsigned uData, uData0, uData1;
int i;
- Abc_NtkConst1(pNtk)->pData = (void *)~((unsigned)0);
+ Abc_AigConst1(pNtk)->pData = (void *)~((unsigned)0);
Abc_NtkForEachCi( pNtk, pObj, i )
pObj->pData = (void *)SIM_RANDOM_UNSIGNED;
Abc_NtkForEachNode( pNtk, pObj, i )
@@ -801,7 +800,7 @@ Vec_Str_t * Abc_NtkRRSimulate( Abc_Ntk_t * pNtk )
}
// simulate patters and store them in copy
- Abc_NtkConst1(pNtk)->pCopy = (Abc_Obj_t *)~((unsigned)0);
+ Abc_AigConst1(pNtk)->pCopy = (Abc_Obj_t *)~((unsigned)0);
Abc_NtkForEachCi( pNtk, pObj, i )
pObj->pCopy = (Abc_Obj_t *)SIM_RANDOM_UNSIGNED;
Abc_NtkForEachNode( pNtk, pObj, i )
diff --git a/src/base/abci/abcSat.c b/src/base/abci/abcSat.c
index b8491d06..86f13884 100644
--- a/src/base/abci/abcSat.c
+++ b/src/base/abci/abcSat.c
@@ -452,7 +452,7 @@ int Abc_NtkMiterSatCreateInt( solver * pSat, Abc_Ntk_t * pNtk, int fJFront )
// vCircuit = Vec_VecStart( 184 );
// add the clause for the constant node
- pNode = Abc_NtkConst1(pNtk);
+ pNode = Abc_AigConst1(pNtk);
pNode->fMarkA = 1;
pNode->pCopy = (Abc_Obj_t *)vNodes->nSize;
Vec_PtrPush( vNodes, pNode );
@@ -488,7 +488,7 @@ int Abc_NtkMiterSatCreateInt( solver * pSat, Abc_Ntk_t * pNtk, int fJFront )
Vec_PtrForEachEntry( vNodes, pNode, i )
{
assert( !Abc_ObjIsComplement(pNode) );
- if ( !Abc_NodeIsAigAnd(pNode) )
+ if ( !Abc_AigNodeIsAnd(pNode) )
continue;
//printf( "%d ", pNode->Id );
diff --git a/src/base/abci/abcStrash.c b/src/base/abci/abcStrash.c
index b546d8be..c69aeabf 100644
--- a/src/base/abci/abcStrash.c
+++ b/src/base/abci/abcStrash.c
@@ -26,13 +26,7 @@
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
-// static functions
-static void Abc_NtkStrashPerform( Abc_Ntk_t * pNtk, Abc_Ntk_t * pNtkAig, bool fAllNodes );
-static Abc_Obj_t * Abc_NodeStrashSop( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pNode, char * pSop );
-static Abc_Obj_t * Abc_NodeStrashExor( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pNode, char * pSop );
-static Abc_Obj_t * Abc_NodeStrashFactor( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pNode, char * pSop );
-
-extern char * Mio_GateReadSop( void * pGate );
+static void Abc_NtkStrashPerform( Abc_Ntk_t * pNtk, Abc_Ntk_t * pNtkNew, bool fAllNodes );
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
@@ -40,10 +34,57 @@ extern char * Mio_GateReadSop( void * pGate );
/**Function*************************************************************
- Synopsis [Creates the strashed AIG network.]
+ Synopsis [Reapplies structural hashing to the AIG.]
+
+ Description [Because of the structural hashing, this procedure should not
+ change the number of nodes. It is useful to detect the bugs in the original AIG.]
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+Abc_Ntk_t * Abc_NtkRestrash( Abc_Ntk_t * pNtk, bool fCleanup )
+{
+ Abc_Ntk_t * pNtkAig;
+ Abc_Obj_t * pObj;
+ int i, nNodes;
+ assert( Abc_NtkIsStrash(pNtk) );
+ // print warning about choice nodes
+ if ( Abc_NtkGetChoiceNum( pNtk ) )
+ printf( "Warning: The choice nodes in the original AIG are removed by strashing.\n" );
+ // start the new network (constants and CIs are already mappined after this step
+ pNtkAig = Abc_NtkStartFrom( pNtk, ABC_NTK_STRASH, ABC_FUNC_AIG );
+ // restrash the nodes (assuming a topological order of the old network)
+ Abc_NtkForEachNode( pNtk, pObj, i )
+ pObj->pCopy = Abc_AigAnd( pNtkAig->pManFunc, Abc_ObjChild0Copy(pObj), Abc_ObjChild1Copy(pObj) );
+ // finalize the network
+ Abc_NtkFinalize( pNtk, pNtkAig );
+ // print warning about self-feed latches
+// if ( Abc_NtkCountSelfFeedLatches(pNtkAig) )
+// printf( "Warning: The network has %d self-feeding latches.\n", Abc_NtkCountSelfFeedLatches(pNtkAig) );
+ // perform cleanup if requested
+ if ( fCleanup && (nNodes = Abc_AigCleanup(pNtkAig->pManFunc)) )
+ printf( "Abc_NtkRestrash(): AIG cleanup removed %d nodes (this is a bug).\n", nNodes );
+ // duplicate EXDC
+ if ( pNtk->pExdc )
+ pNtkAig->pExdc = Abc_NtkDup( pNtk->pExdc );
+ // make sure everything is okay
+ if ( !Abc_NtkCheck( pNtkAig ) )
+ {
+ printf( "Abc_NtkStrash: The network check has failed.\n" );
+ Abc_NtkDelete( pNtkAig );
+ return NULL;
+ }
+ return pNtkAig;
+
+}
+
+/**Function*************************************************************
+
+ Synopsis [Transforms logic network into structurally hashed AIG.]
- Description [Converts the logic network or the AIG into a
- structurally hashed AIG.]
+ Description []
SideEffects []
@@ -54,33 +95,28 @@ Abc_Ntk_t * Abc_NtkStrash( Abc_Ntk_t * pNtk, bool fAllNodes, bool fCleanup )
{
Abc_Ntk_t * pNtkAig;
int nNodes;
-
- assert( !Abc_NtkIsNetlist(pNtk) );
- assert( !Abc_NtkIsSeq(pNtk) );
- if ( Abc_NtkIsBddLogic(pNtk) )
+ assert( Abc_NtkIsLogic(pNtk) || Abc_NtkIsStrash(pNtk) );
+ // consider the special case when the network is already structurally hashed
+ if ( Abc_NtkIsStrash(pNtk) )
+ return Abc_NtkRestrash( pNtk, fCleanup );
+ // convert the node representation in the logic network to the AIG form
+ if ( !Abc_NtkLogicToAig(pNtk) )
{
- if ( !Abc_NtkBddToSop(pNtk, 0) )
- {
- printf( "Converting to SOPs has failed.\n" );
- return NULL;
- }
+ printf( "Converting to AIGs has failed.\n" );
+ return NULL;
}
- // print warning about choice nodes
- if ( Abc_NtkGetChoiceNum( pNtk ) )
- printf( "Warning: The choice nodes in the initial AIG are removed by strashing.\n" );
// perform strashing
+ Abc_NtkCleanCopy( pNtk );
pNtkAig = Abc_NtkStartFrom( pNtk, ABC_NTK_STRASH, ABC_FUNC_AIG );
- if ( Abc_NtkConst1(pNtk) )
- Abc_NtkConst1(pNtk)->pCopy = NULL;
Abc_NtkStrashPerform( pNtk, pNtkAig, fAllNodes );
Abc_NtkFinalize( pNtk, pNtkAig );
// print warning about self-feed latches
// if ( Abc_NtkCountSelfFeedLatches(pNtkAig) )
// printf( "Warning: The network has %d self-feeding latches.\n", Abc_NtkCountSelfFeedLatches(pNtkAig) );
- if ( fCleanup && (nNodes = Abc_AigCleanup(pNtkAig->pManFunc)) )
- {
+ // perform cleanup if requested
+ nNodes = fCleanup? Abc_AigCleanup(pNtkAig->pManFunc) : 0;
+// if ( nNodes )
// printf( "Warning: AIG cleanup removed %d nodes (this is not a bug).\n", nNodes );
- }
// duplicate EXDC
if ( pNtk->pExdc )
pNtkAig->pExdc = Abc_NtkDup( pNtk->pExdc );
@@ -115,13 +151,10 @@ int Abc_NtkAppend( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2 )
// the first network should be an AIG
assert( Abc_NtkIsStrash(pNtk1) );
assert( Abc_NtkIsLogic(pNtk2) || Abc_NtkIsStrash(pNtk2) );
- if ( Abc_NtkIsBddLogic(pNtk2) )
+ if ( Abc_NtkIsLogic(pNtk2) && !Abc_NtkLogicToAig(pNtk2) )
{
- if ( !Abc_NtkBddToSop(pNtk2, 0) )
- {
- printf( "Converting to SOPs has failed.\n" );
- return 0;
- }
+ printf( "Converting to AIGs has failed.\n" );
+ return 0;
}
// check that the networks have the same PIs
// reorder PIs of pNtk2 according to pNtk1
@@ -132,7 +165,11 @@ int Abc_NtkAppend( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2 )
Abc_NtkForEachCi( pNtk2, pObj, i )
pObj->pCopy = Abc_NtkCi(pNtk1, i);
// add pNtk2 to pNtk1 while strashing
- Abc_NtkStrashPerform( pNtk2, pNtk1, 1 );
+ if ( Abc_NtkIsLogic(pNtk2) )
+ Abc_NtkStrashPerform( pNtk2, pNtk1, 1 );
+ else
+ Abc_NtkForEachNode( pNtk2, pObj, i )
+ pObj->pCopy = Abc_AigAnd( pNtk1->pManFunc, Abc_ObjChild0Copy(pObj), Abc_ObjChild1Copy(pObj) );
// make sure that everything is okay
if ( !Abc_NtkCheck( pNtk1 ) )
{
@@ -142,7 +179,6 @@ int Abc_NtkAppend( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2 )
return 1;
}
-
/**Function*************************************************************
Synopsis [Prepares the network for strashing.]
@@ -154,85 +190,28 @@ int Abc_NtkAppend( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2 )
SeeAlso []
***********************************************************************/
-void Abc_NtkStrashPerform( Abc_Ntk_t * pNtk, Abc_Ntk_t * pNtkNew, bool fAllNodes )
+void Abc_NtkStrashPerform( Abc_Ntk_t * pNtkOld, Abc_Ntk_t * pNtkNew, bool fAllNodes )
{
ProgressBar * pProgress;
Vec_Ptr_t * vNodes;
- Abc_Obj_t * pNode, * pNodeNew, * pObj;
+ Abc_Obj_t * pNodeOld;
int i;
-
- // perform strashing
- vNodes = Abc_NtkDfs( pNtk, fAllNodes );
+ assert( Abc_NtkIsLogic(pNtkOld) );
+ assert( Abc_NtkIsStrash(pNtkNew) );
+ vNodes = Abc_NtkDfs( pNtkOld, fAllNodes );
pProgress = Extra_ProgressBarStart( stdout, vNodes->nSize );
- Vec_PtrForEachEntry( vNodes, pNode, i )
+ Vec_PtrForEachEntry( vNodes, pNodeOld, i )
{
Extra_ProgressBarUpdate( pProgress, i, NULL );
- // get the node
- assert( Abc_ObjIsNode(pNode) );
- // strash the node
- pNodeNew = Abc_NodeStrash( pNtkNew, pNode );
- // get the old object
- pObj = Abc_ObjFanout0Ntk( pNode );
- // make sure the node is not yet strashed
- assert( pObj->pCopy == NULL );
- // mark the old object with the new AIG node
- pObj->pCopy = pNodeNew;
- Abc_HManAddProto( pObj->pCopy, pObj );
+ pNodeOld->pCopy = Abc_NodeStrash( pNtkNew, pNodeOld );
}
- Vec_PtrFree( vNodes );
Extra_ProgressBarStop( pProgress );
+ Vec_PtrFree( vNodes );
}
/**Function*************************************************************
- Synopsis [Strashes one logic node.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Obj_t * Abc_NodeStrash( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pNode )
-{
- int fUseFactor = 1;
- char * pSop;
- extern int Abc_SopIsExorType( char * pSop );
-
- assert( Abc_ObjIsNode(pNode) );
-
- // consider the case when the graph is an AIG
- if ( Abc_NtkIsStrash(pNode->pNtk) )
- {
- if ( Abc_NodeIsConst(pNode) )
- return Abc_NtkConst1(pNtkNew);
- return Abc_AigAnd( pNtkNew->pManFunc, Abc_ObjChild0Copy(pNode), Abc_ObjChild1Copy(pNode) );
- }
-
- // get the SOP of the node
- if ( Abc_NtkHasMapping(pNode->pNtk) )
- pSop = Mio_GateReadSop(pNode->pData);
- else
- pSop = pNode->pData;
-
- // consider the constant node
- if ( Abc_NodeIsConst(pNode) )
- return Abc_ObjNotCond( Abc_NtkConst1(pNtkNew), Abc_SopIsConst0(pSop) );
-
- // consider the special case of EXOR function
- if ( Abc_SopIsExorType(pSop) )
- return Abc_NodeStrashExor( pNtkNew, pNode, pSop );
-
- // decide when to use factoring
- if ( fUseFactor && Abc_ObjFaninNum(pNode) > 2 && Abc_SopGetCubeNum(pSop) > 1 )
- return Abc_NodeStrashFactor( pNtkNew, pNode, pSop );
- return Abc_NodeStrashSop( pNtkNew, pNode, pSop );
-}
-
-/**Function*************************************************************
-
- Synopsis [Strashes one logic node using its SOP.]
+ Synopsis [Transfers the AIG from one manager into another.]
Description []
@@ -241,96 +220,56 @@ Abc_Obj_t * Abc_NodeStrash( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pNode )
SeeAlso []
***********************************************************************/
-Abc_Obj_t * Abc_NodeStrashSop( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pNode, char * pSop )
+void Abc_NodeStrash_rec( Abc_Aig_t * pMan, Aig_Obj_t * pObj )
{
- Abc_Aig_t * pMan = pNtkNew->pManFunc;
- Abc_Obj_t * pFanin, * pAnd, * pSum;
- char * pCube;
- int i, nFanins;
-
- // get the number of node's fanins
- nFanins = Abc_ObjFaninNum( pNode );
- assert( nFanins == Abc_SopGetVarNum(pSop) );
- // go through the cubes of the node's SOP
- pSum = Abc_ObjNot( Abc_NtkConst1(pNtkNew) );
- Abc_SopForEachCube( pSop, nFanins, pCube )
- {
- // create the AND of literals
- pAnd = Abc_NtkConst1(pNtkNew);
- Abc_ObjForEachFanin( pNode, pFanin, i ) // pFanin can be a net
- {
- if ( pCube[i] == '1' )
- pAnd = Abc_AigAnd( pMan, pAnd, pFanin->pCopy );
- else if ( pCube[i] == '0' )
- pAnd = Abc_AigAnd( pMan, pAnd, Abc_ObjNot(pFanin->pCopy) );
- }
- // add to the sum of cubes
- pSum = Abc_AigOr( pMan, pSum, pAnd );
- }
- // decide whether to complement the result
- if ( Abc_SopIsComplement(pSop) )
- pSum = Abc_ObjNot(pSum);
- return pSum;
+ assert( !Aig_IsComplement(pObj) );
+ if ( !Aig_ObjIsNode(pObj) || Aig_ObjIsMarkA(pObj) )
+ return;
+ Abc_NodeStrash_rec( pMan, Aig_ObjFanin0(pObj) );
+ Abc_NodeStrash_rec( pMan, Aig_ObjFanin1(pObj) );
+ pObj->pData = Abc_AigAnd( pMan, (Abc_Obj_t *)Aig_ObjChild0Copy(pObj), (Abc_Obj_t *)Aig_ObjChild1Copy(pObj) );
+ assert( !Aig_ObjIsMarkA(pObj) ); // loop detection
+ Aig_ObjSetMarkA( pObj );
}
/**Function*************************************************************
- Synopsis [Strashed n-input XOR function.]
+ Synopsis [Strashes one logic node.]
- Description []
+ Description [Assume the network is in the AIG form]
SideEffects []
-
+
SeeAlso []
***********************************************************************/
-Abc_Obj_t * Abc_NodeStrashExor( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pNode, char * pSop )
+Abc_Obj_t * Abc_NodeStrash( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pNodeOld )
{
- Abc_Aig_t * pMan = pNtkNew->pManFunc;
- Abc_Obj_t * pFanin, * pSum;
- int i, nFanins;
- // get the number of node's fanins
- nFanins = Abc_ObjFaninNum( pNode );
- assert( nFanins == Abc_SopGetVarNum(pSop) );
- // go through the cubes of the node's SOP
- pSum = Abc_ObjNot( Abc_NtkConst1(pNtkNew) );
- for ( i = 0; i < nFanins; i++ )
- {
- pFanin = Abc_ObjFanin( pNode, i );
- pSum = Abc_AigXor( pMan, pSum, pFanin->pCopy );
- }
- if ( Abc_SopIsComplement(pSop) )
- pSum = Abc_ObjNot(pSum);
- return pSum;
+ Aig_Man_t * pMan;
+ Aig_Obj_t * pRoot;
+ Abc_Obj_t * pFanin;
+ int i;
+ assert( Abc_ObjIsNode(pNodeOld) );
+ assert( Abc_NtkIsAigLogic(pNodeOld->pNtk) );
+ // get the local AIG manager and the local root node
+ pMan = pNodeOld->pNtk->pManFunc;
+ pRoot = pNodeOld->pData;
+ // check the constant case
+ if ( Abc_NodeIsConst(pNodeOld) )
+ return Abc_ObjNotCond( Abc_AigConst1(pNtkNew), Aig_IsComplement(pRoot) );
+ // set elementary variables
+ Abc_ObjForEachFanin( pNodeOld, pFanin, i )
+ Aig_IthVar(pMan, i)->pData = pFanin->pCopy;
+ // strash the AIG of this node
+ Abc_NodeStrash_rec( pNtkNew->pManFunc, Aig_Regular(pRoot) );
+ Aig_ConeUnmark_rec( Aig_Regular(pRoot) );
+ // return the final node
+ return Abc_ObjNotCond( Aig_Regular(pRoot)->pData, Aig_IsComplement(pRoot) );
}
-/**Function*************************************************************
-
- Synopsis [Strashes one logic node using its SOP.]
- Description []
-
- SideEffects []
- SeeAlso []
-***********************************************************************/
-Abc_Obj_t * Abc_NodeStrashFactor( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pRoot, char * pSop )
-{
- Dec_Graph_t * pFForm;
- Dec_Node_t * pNode;
- Abc_Obj_t * pAnd;
- int i;
- // perform factoring
- pFForm = Dec_Factor( pSop );
- // collect the fanins
- Dec_GraphForEachLeaf( pFForm, pNode, i )
- pNode->pFunc = Abc_ObjFanin(pRoot,i)->pCopy;
- // perform strashing
- pAnd = Dec_GraphToNetwork( pNtkNew, pFForm );
- Dec_GraphFree( pFForm );
- return pAnd;
-}
@@ -380,7 +319,7 @@ Abc_Ntk_t * Abc_NtkTopmost( Abc_Ntk_t * pNtk, int nLevels )
// start the network
pNtkNew = Abc_NtkAlloc( ABC_NTK_STRASH, ABC_FUNC_AIG );
pNtkNew->pName = Extra_UtilStrsav(pNtk->pName);
- Abc_NtkConst1(pNtk)->pCopy = Abc_NtkConst1(pNtkNew);
+ Abc_AigConst1(pNtk)->pCopy = Abc_AigConst1(pNtkNew);
// create PIs below the cut and nodes above the cut
Abc_NtkCleanCopy( pNtk );
pObjNew = Abc_NtkTopmost_rec( pNtkNew, Abc_ObjFanin0(Abc_NtkPo(pNtk, 0)), LevelCut );
diff --git a/src/base/abci/abcSweep.c b/src/base/abci/abcSweep.c
index 3665584e..8f1ab180 100644
--- a/src/base/abci/abcSweep.c
+++ b/src/base/abci/abcSweep.c
@@ -448,7 +448,7 @@ int Abc_NtkCleanup( Abc_Ntk_t * pNtk, int fVerbose )
{
Vec_Ptr_t * vNodes;
int Counter;
- assert( !Abc_NtkHasAig(pNtk) );
+ assert( Abc_NtkIsLogic(pNtk) );
// mark the nodes reachable from the POs
vNodes = Abc_NtkDfs( pNtk, 0 );
Counter = Abc_NtkReduceNodes( pNtk, vNodes );
@@ -473,7 +473,7 @@ int Abc_NtkReduceNodes( Abc_Ntk_t * pNtk, Vec_Ptr_t * vNodes )
{
Abc_Obj_t * pNode;
int i, Counter;
- assert( !Abc_NtkIsStrash(pNtk) );
+ assert( Abc_NtkIsLogic(pNtk) );
// mark the nodes reachable from the POs
for ( i = 0; i < vNodes->nSize; i++ )
{
@@ -481,9 +481,6 @@ int Abc_NtkReduceNodes( Abc_Ntk_t * pNtk, Vec_Ptr_t * vNodes )
assert( Abc_ObjIsNode(pNode) );
pNode->fMarkA = 1;
}
- // if it is an AIG, also mark the constant 1 node
- if ( Abc_NtkConst1(pNtk) )
- Abc_NtkConst1(pNtk)->fMarkA = 1;
// remove the non-marked nodes
Counter = 0;
Abc_NtkForEachNode( pNtk, pNode, i )
diff --git a/src/base/abci/abcTiming.c b/src/base/abci/abcTiming.c
index d2d731d9..5add0dda 100644
--- a/src/base/abci/abcTiming.c
+++ b/src/base/abci/abcTiming.c
@@ -37,9 +37,9 @@ struct Abc_ManTime_t_
// static functions
static Abc_ManTime_t * Abc_ManTimeStart();
static void Abc_ManTimeExpand( Abc_ManTime_t * p, int nSize, int fProgressive );
-static void Abc_NtkTimePrepare( Abc_Ntk_t * pNtk );
+void Abc_NtkTimePrepare( Abc_Ntk_t * pNtk );
-static void Abc_NodeDelayTraceArrival( Abc_Obj_t * pNode );
+void Abc_NodeDelayTraceArrival( Abc_Obj_t * pNode );
// accessing the arrival and required times of a node
static inline Abc_Time_t * Abc_NodeArrival( Abc_Obj_t * pNode ) { return pNode->pNtk->pManTime->vArrs->pArray[pNode->Id]; }
@@ -595,13 +595,12 @@ void Abc_NodeDelayTraceArrival( Abc_Obj_t * pNode )
// start the arrival time of the node
pTimeOut = Abc_NodeArrival(pNode);
- pTimeOut->Rise = pTimeOut->Fall = 0;
+ pTimeOut->Rise = pTimeOut->Fall = -ABC_INFINITY;
// go through the pins of the gate
pPin = Mio_GateReadPins(pNode->pData);
Abc_ObjForEachFanin( pNode, pFanin, i )
{
pTimeIn = Abc_NodeArrival(pFanin);
- assert( pTimeIn->Worst != -ABC_INFINITY );
// get the interesting parameters of this pin
PinPhase = Mio_PinReadPhase(pPin);
tDelayBlockRise = (float)Mio_PinReadDelayBlockRise( pPin );
@@ -647,7 +646,7 @@ void Abc_NtkStartReverseLevels( Abc_Ntk_t * pNtk )
Vec_Ptr_t * vNodes;
Abc_Obj_t * pObj, * pFanout;
int i, k, nLevelsCur;
-// assert( Abc_NtkIsStrash(pNtk) );
+ assert( Abc_NtkIsStrash(pNtk) );
// remember the maximum number of direct levels
// pNtk->LevelMax = Abc_AigGetLevelNum(pNtk);
pNtk->LevelMax = Abc_NtkGetLevelNum(pNtk);
diff --git a/src/base/abci/abcTrace.c b/src/base/abci/abcTrace.c
deleted file mode 100644
index 4abe235e..00000000
--- a/src/base/abci/abcTrace.c
+++ /dev/null
@@ -1,804 +0,0 @@
-/**CFile****************************************************************
-
- FileName [abcHistory.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Network and node package.]
-
- Synopsis []
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: abcHistory.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "abc.h"
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-#define ABC_SIM_VARS 16 // the max number of variables in the cone
-#define ABC_SIM_OBJS 200 // the max number of objects in the cone
-
-typedef struct Abc_HMan_t_ Abc_HMan_t;
-typedef struct Abc_HObj_t_ Abc_HObj_t;
-typedef struct Abc_HNum_t_ Abc_HNum_t;
-
-struct Abc_HNum_t_
-{
- unsigned fCompl : 1; // set to 1 if the node is complemented
- unsigned NtkId : 6; // the network ID
- unsigned ObjId : 24; // the node ID
-};
-
-struct Abc_HObj_t_
-{
- // object info
- unsigned fProof : 1; // set to 1 if the node is proved
- unsigned fPhase : 1; // set to 1 if the node's phase differs from Old
- unsigned fPi : 1; // the node is a PI
- unsigned fPo : 1; // the node is a PO
- unsigned fConst : 1; // the node is a constant
- unsigned fVisited: 1; // the flag shows if the node is visited
- unsigned NtkId : 10; // the network ID
- unsigned Num : 16; // a temporary number
- // history record
- Abc_HNum_t Fan0; // immediate fanin
- Abc_HNum_t Fan1; // immediate fanin
- Abc_HNum_t Proto; // old node if present
-// Abc_HNum_t Equ; // equiv node if present
-};
-
-struct Abc_HMan_t_
-{
- // storage for history information
- Vec_Vec_t * vNtks; // the history nodes belonging to each network
- Vec_Int_t * vProof; // flags showing if the network is proved
- // storage for simulation info
- int nVarsMax; // the max number of cone leaves
- int nObjsMax; // the max number of cone nodes
- Vec_Ptr_t * vObjs; // the cone nodes
- int nBits; // the number of simulation bits
- int nWords; // the number of unsigneds for siminfo
- int nWordsCur; // the current number of words
- Vec_Ptr_t * vSims; // simulation info
- unsigned * pInfo; // pointer to simulation info
- // other info
- Vec_Ptr_t * vCone0;
- Vec_Ptr_t * vCone1;
- // memory manager
- Extra_MmFixed_t* pMmObj; // memory manager for objects
-};
-
-static Abc_HMan_t * s_pHMan = NULL;
-
-static inline int Abc_HObjProof( Abc_HObj_t * p ) { return p->fProof; }
-static inline int Abc_HObjPhase( Abc_HObj_t * p ) { return p->fPhase; }
-static inline int Abc_HObjPi ( Abc_HObj_t * p ) { return p->fPi; }
-static inline int Abc_HObjPo ( Abc_HObj_t * p ) { return p->fPo; }
-static inline int Abc_HObjConst( Abc_HObj_t * p ) { return p->fConst; }
-static inline int Abc_HObjNtkId( Abc_HObj_t * p ) { return p->NtkId; }
-static inline int Abc_HObjNum ( Abc_HObj_t * p ) { return p->Num; }
-static inline Abc_HObj_t * Abc_HObjFanin0( Abc_HObj_t * p ) { return !p->Fan0.NtkId ? NULL : Vec_PtrEntry( Vec_VecEntry(s_pHMan->vNtks, p->Fan0.NtkId), p->Fan0.ObjId ); }
-static inline Abc_HObj_t * Abc_HObjFanin1( Abc_HObj_t * p ) { return !p->Fan1.NtkId ? NULL : Vec_PtrEntry( Vec_VecEntry(s_pHMan->vNtks, p->Fan1.NtkId), p->Fan1.ObjId ); }
-static inline Abc_HObj_t * Abc_HObjProto ( Abc_HObj_t * p ) { return !p->Proto.NtkId ? NULL : Vec_PtrEntry( Vec_VecEntry(s_pHMan->vNtks, p->Proto.NtkId), p->Proto.ObjId ); }
-static inline int Abc_HObjFaninC0( Abc_HObj_t * p ) { return p->Fan0.fCompl; }
-static inline int Abc_HObjFaninC1( Abc_HObj_t * p ) { return p->Fan1.fCompl; }
-
-static inline Abc_HObj_t * Abc_ObjHObj( Abc_Obj_t * p ) { return Vec_PtrEntry( Vec_VecEntry(s_pHMan->vNtks, p->pNtk->Id), p->Id ); }
-
-static int Abc_HManVerifyPair( int NtkIdOld, int NtkIdNew );
-static int Abc_HManVerifyNodes_rec( Abc_HObj_t * pHOld, Abc_HObj_t * pHNew );
-
-static Vec_Ptr_t * Abc_HManCollectLeaves( Abc_HObj_t * pHNew );
-static Vec_Ptr_t * Abc_HManCollectCone( Abc_HObj_t * pHOld, Vec_Ptr_t * vLeaves, Vec_Ptr_t * vCone );
-static int Abc_HManSimulate( Vec_Ptr_t * vCone0, Vec_Ptr_t * vCone1, int nLeaves, int * pPhase );
-
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_HManStart()
-{
- Abc_HMan_t * p;
- unsigned * pData;
- int i, k;
- assert( s_pHMan == NULL );
- assert( sizeof(unsigned) == 4 );
- // allocate manager
- p = ALLOC( Abc_HMan_t, 1 );
- memset( p, 0, sizeof(Abc_HMan_t) );
- // allocate storage for all nodes
- p->vNtks = Vec_VecStart( 1 );
- p->vProof = Vec_IntStart( 1 );
- // allocate temporary storage for objects
- p->nVarsMax = ABC_SIM_VARS;
- p->nObjsMax = ABC_SIM_OBJS;
- p->vObjs = Vec_PtrAlloc( p->nObjsMax );
- // allocate simulation info
- p->nBits = (1 << p->nVarsMax);
- p->nWords = (p->nBits <= 32)? 1 : (p->nBits / 32);
- p->pInfo = ALLOC( unsigned, p->nWords * p->nObjsMax );
- memset( p->pInfo, 0, sizeof(unsigned) * p->nWords * p->nVarsMax );
- p->vSims = Vec_PtrAlloc( p->nObjsMax );
- for ( i = 0; i < p->nObjsMax; i++ )
- Vec_PtrPush( p->vSims, p->pInfo + i * p->nWords );
- // set elementary truth tables
- for ( k = 0; k < p->nVarsMax; k++ )
- {
- pData = p->vSims->pArray[k];
- for ( i = 0; i < p->nBits; i++ )
- if ( i & (1 << k) )
- pData[i>>5] |= (1 << (i&31));
- }
- // allocate storage for the nodes
- p->pMmObj = Extra_MmFixedStart( sizeof(Abc_HObj_t) );
- p->vCone0 = Vec_PtrAlloc( p->nObjsMax );
- p->vCone1 = Vec_PtrAlloc( p->nObjsMax );
- s_pHMan = p;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_HManStop()
-{
- assert( s_pHMan != NULL );
- Extra_MmFixedStop( s_pHMan->pMmObj, 0 );
- Vec_PtrFree( s_pHMan->vObjs );
- Vec_PtrFree( s_pHMan->vSims );
- Vec_VecFree( s_pHMan->vNtks );
- Vec_IntFree( s_pHMan->vProof );
- Vec_PtrFree( s_pHMan->vCone0 );
- Vec_PtrFree( s_pHMan->vCone1 );
- free( s_pHMan->pInfo );
- free( s_pHMan );
- s_pHMan = NULL;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_HManIsRunning()
-{
- return s_pHMan != NULL;
-}
-
-/**Function*************************************************************
-
- Synopsis [Called when a new network is created.]
-
- Description [Returns the new ID for the network.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_HManGetNewNtkId()
-{
- if ( s_pHMan == NULL )
- return 0;
- return Vec_VecSize( s_pHMan->vNtks ); // what if the new network has no nodes?
-}
-
-/**Function*************************************************************
-
- Synopsis [Called when the object is created.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_HManAddObj( Abc_Obj_t * pObj )
-{
- Abc_HObj_t * pHObj;
- if ( s_pHMan == NULL )
- return;
- pHObj = (Abc_HObj_t *)Extra_MmFixedEntryFetch( s_pHMan->pMmObj );
- memset( pHObj, 0, sizeof(Abc_HObj_t) );
- // set the object type
- pHObj->NtkId = pObj->pNtk->Id;
- if ( Abc_ObjIsCi(pObj) )
- pHObj->fPi = 1;
- else if ( Abc_ObjIsCo(pObj) )
- pHObj->fPo = 1;
- Vec_VecPush( s_pHMan->vNtks, pObj->pNtk->Id, pHObj );
- // set the proof parameter for the network
- if ( Vec_IntSize( s_pHMan->vProof ) == pObj->pNtk->Id )
- Vec_IntPush( s_pHMan->vProof, 0 );
-}
-
-/**Function*************************************************************
-
- Synopsis [Called when the fanin is added to the object.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_HManAddFanin( Abc_Obj_t * pObj, Abc_Obj_t * pFanin )
-{
- Abc_HObj_t * pHObj;
- int fCompl;
- if ( s_pHMan == NULL )
- return;
- // take off the complemented attribute
- assert( !Abc_ObjIsComplement(pObj) );
- fCompl = Abc_ObjIsComplement(pFanin);
- pFanin = Abc_ObjRegular(pFanin);
- // add the fanin
- assert( pObj->pNtk == pFanin->pNtk );
- pHObj = Abc_ObjHObj(pObj);
- if ( pHObj->Fan0.NtkId == 0 )
- {
- pHObj->Fan0.NtkId = pFanin->pNtk->Id;
- pHObj->Fan0.ObjId = pFanin->Id;
- pHObj->Fan0.fCompl = fCompl;
- }
- else if ( pHObj->Fan1.NtkId == 0 )
- {
- pHObj->Fan1.NtkId = pFanin->pNtk->Id;
- pHObj->Fan1.ObjId = pFanin->Id;
- pHObj->Fan1.fCompl = fCompl;
- }
- else assert( 0 );
-}
-
-/**Function*************************************************************
-
- Synopsis [Called when the fanin's input should be complemented.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_HManXorFaninC( Abc_Obj_t * pObj, int iFanin )
-{
- Abc_HObj_t * pHObj;
- if ( s_pHMan == NULL )
- return;
- assert( iFanin < 2 );
- pHObj = Abc_ObjHObj(pObj);
- if ( iFanin == 0 )
- pHObj->Fan0.fCompl ^= 1;
- else if ( iFanin == 1 )
- pHObj->Fan1.fCompl ^= 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Called when the fanin is added to the object.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_HManRemoveFanins( Abc_Obj_t * pObj )
-{
- Abc_HObj_t * pHObj;
- if ( s_pHMan == NULL )
- return;
- assert( !Abc_ObjIsComplement(pObj) );
- pHObj = Abc_ObjHObj(pObj);
- pHObj->Fan0.NtkId = 0;
- pHObj->Fan0.ObjId = 0;
- pHObj->Fan0.fCompl = 0;
- pHObj->Fan1.NtkId = 0;
- pHObj->Fan1.ObjId = 0;
- pHObj->Fan1.fCompl = 0;
-}
-
-/**Function*************************************************************
-
- Synopsis [Called when a new prototype of the old object is set.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_HManAddProto( Abc_Obj_t * pObj, Abc_Obj_t * pProto )
-{
- Abc_HObj_t * pHObj;
- if ( s_pHMan == NULL )
- return;
- // ignore polarity for now
- pObj = Abc_ObjRegular(pObj);
- pProto = Abc_ObjRegular(pProto);
- // set the prototype
- assert( pObj->pNtk != pProto->pNtk );
- if ( pObj->pNtk->Id == 0 )
- return;
- pHObj = Abc_ObjHObj(pObj);
- pHObj->Proto.NtkId = pProto->pNtk->Id;
- pHObj->Proto.ObjId = pProto->Id;
-}
-
-/**Function*************************************************************
-
- Synopsis [Called when an equivalent node is created.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_HManMapAddEqu( Abc_Obj_t * pObj, Abc_Obj_t * pEqu )
-{
-/*
- Abc_HObj_t * pHObj;
- if ( s_pHMan == NULL )
- return;
- // ignore polarity for now
- pObj = Abc_ObjRegular(pObj);
- pEqu = Abc_ObjRegular(pEqu);
- // set the equivalent node
- assert( pObj->pNtk == pEqu->pNtk );
- pHObj = Abc_ObjHObj(pObj);
- Abc_ObjHObj(pObj)->Equ.NtkId = pEqu->pNtk->Id;
- Abc_ObjHObj(pObj)->Equ.ObjId = pEqu->Id;
-*/
-}
-
-
-
-/**Function*************************************************************
-
- Synopsis [Starts the verification procedure.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_HManPopulate( Abc_Ntk_t * pNtk )
-{
- Abc_Obj_t * pObj;
- int i;
- if ( !Abc_NtkIsStrash(pNtk) )
- return 0;
- // allocate the network ID
- pNtk->Id = Abc_HManGetNewNtkId();
- assert( pNtk->Id == 1 );
- // create the objects
- Abc_NtkForEachObj( pNtk, pObj, i )
- {
- Abc_HManAddObj( pObj );
- if ( Abc_ObjFaninNum(pObj) > 0 )
- Abc_HManAddFanin( pObj, Abc_ObjChild0(pObj) );
- if ( Abc_ObjFaninNum(pObj) > 1 )
- Abc_HManAddFanin( pObj, Abc_ObjChild1(pObj) );
- }
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [The main verification procedure.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_HManVerify( int NtkIdOld, int NtkIdNew )
-{
- int i;
- // prove the equality pairwise
- for ( i = NtkIdOld; i < NtkIdNew; i++ )
- {
- if ( Vec_IntEntry(s_pHMan->vProof, i) )
- continue;
- if ( !Abc_HManVerifyPair( i, i+1 ) )
- return 0;
- Vec_IntWriteEntry( s_pHMan->vProof, i, 1 );
- }
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Verifies two networks.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_HManVerifyPair( int NtkIdOld, int NtkIdNew )
-{
- Vec_Ptr_t * vNtkNew, * vNtkOld, * vPosNew;
- Abc_HObj_t * pHObj;
- int i;
- // get hold of the network nodes
- vNtkNew = Vec_VecEntry( s_pHMan->vNtks, NtkIdNew );
- vNtkOld = Vec_VecEntry( s_pHMan->vNtks, NtkIdOld );
- Vec_PtrForEachEntry( vNtkNew, pHObj, i )
- pHObj->fVisited = 0;
- Vec_PtrForEachEntry( vNtkOld, pHObj, i )
- pHObj->fVisited = 0;
- // collect new POs
- vPosNew = Vec_PtrAlloc( 100 );
- Vec_PtrForEachEntry( vNtkNew, pHObj, i )
- if ( pHObj->fPo )
- Vec_PtrPush( vPosNew, pHObj );
- // prove them recursively (assuming PO ordering is the same)
- Vec_PtrForEachEntry( vPosNew, pHObj, i )
- {
- if ( Abc_HObjProto(pHObj) == NULL )
- {
- printf( "History: PO %d has no prototype\n", i );
- return 0;
- }
- if ( !Abc_HManVerifyNodes_rec( Abc_HObjProto(pHObj), pHObj ) )
- {
- printf( "History: Verification failed for outputs of PO pair number %d\n", i );
- return 0;
- }
- }
- printf( "History: Verification succeeded.\n" );
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Recursively verifies two nodes.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_HManVerifyNodes_rec( Abc_HObj_t * pHOld, Abc_HObj_t * pHNew )
-{
- Vec_Ptr_t * vLeaves;
- Abc_HObj_t * pHObj, * pHPro0, * pHPro1;
- int i, fPhase;
-
- assert( Abc_HObjProto(pHNew) == pHOld );
- if ( pHNew->fProof )
- return 1;
- pHNew->fProof = 1;
- // consider simple cases
- if ( pHNew->fPi || pHNew->fConst )
- return 1;
- if ( pHNew->fPo )
- {
- if ( !Abc_HManVerifyNodes_rec( Abc_HObjFanin0(pHOld), Abc_HObjFanin0(pHNew) ) )
- return 0;
- if ( (Abc_HObjFaninC0(pHOld) ^ Abc_HObjFaninC0(pHNew)) != (int)pHNew->fPhase )
- {
- printf( "History: Phase of PO nodes does not agree.\n" );
- return 0;
- }
- return 1;
- }
- // the elementary node
- pHPro0 = Abc_HObjProto( Abc_HObjFanin0(pHNew) );
- pHPro1 = Abc_HObjProto( Abc_HObjFanin1(pHNew) );
- if ( pHPro0 && pHPro1 )
- {
- if ( !Abc_HManVerifyNodes_rec( pHPro0, Abc_HObjFanin0(pHNew) ) )
- return 0;
- if ( !Abc_HManVerifyNodes_rec( pHPro1, Abc_HObjFanin1(pHNew) ) )
- return 0;
- if ( Abc_HObjFanin0(pHOld) != pHPro0 || Abc_HObjFanin1(pHOld) != pHPro1 )
- {
- printf( "History: Internal node does not match.\n" );
- return 0;
- }
- if ( Abc_HObjFaninC0(pHOld) != Abc_HObjFaninC0(pHNew) ||
- Abc_HObjFaninC1(pHOld) != Abc_HObjFaninC1(pHNew) )
- {
- printf( "History: Phase of internal node does not match.\n" );
- return 0;
- }
- return 1;
- }
- // collect the leaves
- vLeaves = Abc_HManCollectLeaves( pHNew );
- if ( Vec_PtrSize(vLeaves) > 16 )
- {
- printf( "History: The bound on the number of inputs is exceeded.\n" );
- return 0;
- }
- s_pHMan->nWordsCur = ((1 << Vec_PtrSize(vLeaves)) <= 32)? 1 : ((1 << Vec_PtrSize(vLeaves)) / 32);
- // prove recursively
- Vec_PtrForEachEntry( vLeaves, pHObj, i )
- if ( !Abc_HManVerifyNodes_rec( Abc_HObjProto(pHObj), pHObj ) )
- {
- Vec_PtrFree( vLeaves );
- return 0;
- }
- // get the first node
- Abc_HManCollectCone( pHNew, vLeaves, s_pHMan->vCone1 );
- if ( Vec_PtrSize(s_pHMan->vCone1) > ABC_SIM_OBJS - ABC_SIM_VARS - 1 )
- {
- printf( "History: The bound on the number of cone nodes is exceeded.\n" );
- return 0;
- }
- // get the second cone
- Vec_PtrForEachEntry( vLeaves, pHObj, i )
- Vec_PtrWriteEntry( vLeaves, i, Abc_HObjProto(pHObj) );
- Abc_HManCollectCone( pHOld, vLeaves, s_pHMan->vCone0 );
- if ( Vec_PtrSize(s_pHMan->vCone0) > ABC_SIM_OBJS - ABC_SIM_VARS - 1 )
- {
- printf( "History: The bound on the number of cone nodes is exceeded.\n" );
- return 0;
- }
- // compare the truth tables
- if ( !Abc_HManSimulate( s_pHMan->vCone0, s_pHMan->vCone1, Vec_PtrSize(vLeaves), &fPhase ) )
- {
- Vec_PtrFree( vLeaves );
- printf( "History: Verification failed at an internal node.\n" );
- return 0;
- }
- printf( "Succeeded.\n" );
- pHNew->fPhase = fPhase;
- Vec_PtrFree( vLeaves );
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Finds the leaves of the TFI cone.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_HManCollectLeaves_rec( Abc_HObj_t * pHNew, Vec_Ptr_t * vLeaves )
-{
- Abc_HObj_t * pHPro;
- if ( pHPro = Abc_HObjProto( pHNew ) )
- {
- Vec_PtrPushUnique( vLeaves, pHNew );
- return;
- }
- assert( !pHNew->fPi && !pHNew->fPo && !pHNew->fConst );
- Abc_HManCollectLeaves_rec( Abc_HObjFanin0(pHNew), vLeaves );
- Abc_HManCollectLeaves_rec( Abc_HObjFanin1(pHNew), vLeaves );
-}
-
-/**Function*************************************************************
-
- Synopsis [Finds the leaves of the TFI cone.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Vec_Ptr_t * Abc_HManCollectLeaves( Abc_HObj_t * pHNew )
-{
- Vec_Ptr_t * vLeaves;
- vLeaves = Vec_PtrAlloc( 100 );
- Abc_HManCollectLeaves_rec( Abc_HObjFanin0(pHNew), vLeaves );
- Abc_HManCollectLeaves_rec( Abc_HObjFanin1(pHNew), vLeaves );
- return vLeaves;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Collects the TFI cone.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_HManCollectCone_rec( Abc_HObj_t * pHObj, Vec_Ptr_t * vLeaves, Vec_Ptr_t * vCone )
-{
- if ( pHObj->fVisited )
- return;
- pHObj->fVisited = 1;
- assert( !pHObj->fPi && !pHObj->fPo && !pHObj->fConst );
- Abc_HManCollectCone_rec( Abc_HObjFanin0(pHObj), vLeaves, vCone );
- Abc_HManCollectCone_rec( Abc_HObjFanin1(pHObj), vLeaves, vCone );
- pHObj->Num = Vec_PtrSize(vCone);
- Vec_PtrPush( vCone, pHObj );
-}
-
-/**Function*************************************************************
-
- Synopsis [Collects the TFI cone.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Vec_Ptr_t * Abc_HManCollectCone( Abc_HObj_t * pHRoot, Vec_Ptr_t * vLeaves, Vec_Ptr_t * vCone )
-{
- Abc_HObj_t * pHObj;
- int i;
- Vec_PtrClear( vCone );
- Vec_PtrForEachEntry( vLeaves, pHObj, i )
- {
- pHObj->fVisited = 1;
- pHObj->Num = Vec_PtrSize(vCone);
- Vec_PtrPush( vCone, pHObj );
- }
- Abc_HManCollectCone_rec( Abc_HObjFanin0(pHRoot), vLeaves, vCone );
- Abc_HManCollectCone_rec( Abc_HObjFanin1(pHRoot), vLeaves, vCone );
- return vCone;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_HManSimulateOne( Vec_Ptr_t * vCone, int nLeaves, int fUsePhase )
-{
- Abc_HObj_t * pHObj, * pHFan0, * pHFan1;
- unsigned * puData0, * puData1, * puData;
- int k, i, fComp0, fComp1;
- // set the leaves
- Vec_PtrForEachEntryStart( vCone, pHObj, i, nLeaves )
- {
- pHFan0 = Abc_HObjFanin0(pHObj);
- pHFan1 = Abc_HObjFanin1(pHObj);
- // consider the case of interver or buffer
- if ( pHFan1 == NULL )
- {
- puData = Vec_PtrEntry(s_pHMan->vSims, ABC_SIM_VARS+i-nLeaves);
- puData0 = ((int)pHFan0->Num < nLeaves)? Vec_PtrEntry(s_pHMan->vSims, pHFan0->Num) :
- Vec_PtrEntry(s_pHMan->vSims, ABC_SIM_VARS+pHFan0->Num-nLeaves);
- fComp0 = Abc_HObjFaninC0(pHObj) ^ (fUsePhase && (int)pHFan0->Num < nLeaves && pHFan0->fPhase);
- if ( fComp0 )
- for ( k = 0; k < s_pHMan->nWordsCur; k++ )
- puData[k] = ~puData0[k];
- else
- for ( k = 0; k < s_pHMan->nWordsCur; k++ )
- puData[k] = puData0[k];
- continue;
- }
- // get the pointers to simulation data
- puData = Vec_PtrEntry(s_pHMan->vSims, ABC_SIM_VARS+i-nLeaves);
- puData0 = ((int)pHFan0->Num < nLeaves)? Vec_PtrEntry(s_pHMan->vSims, pHFan0->Num) :
- Vec_PtrEntry(s_pHMan->vSims, ABC_SIM_VARS+pHFan0->Num-nLeaves);
- puData1 = ((int)pHFan1->Num < nLeaves)? Vec_PtrEntry(s_pHMan->vSims, pHFan1->Num) :
- Vec_PtrEntry(s_pHMan->vSims, ABC_SIM_VARS+pHFan1->Num-nLeaves);
- // here are the phases
- fComp0 = Abc_HObjFaninC0(pHObj) ^ (fUsePhase && (int)pHFan0->Num < nLeaves && pHFan0->fPhase);
- fComp1 = Abc_HObjFaninC1(pHObj) ^ (fUsePhase && (int)pHFan1->Num < nLeaves && pHFan1->fPhase);
- // simulate
- if ( fComp0 && fComp1 )
- for ( k = 0; k < s_pHMan->nWordsCur; k++ )
- puData[k] = ~puData0[k] & ~puData1[k];
- else if ( fComp0 )
- for ( k = 0; k < s_pHMan->nWordsCur; k++ )
- puData[k] = ~puData0[k] & puData1[k];
- else if ( fComp1 )
- for ( k = 0; k < s_pHMan->nWordsCur; k++ )
- puData[k] = puData0[k] & ~puData1[k];
- else
- for ( k = 0; k < s_pHMan->nWordsCur; k++ )
- puData[k] = puData0[k] & puData1[k];
- }
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_HManSimulate( Vec_Ptr_t * vCone0, Vec_Ptr_t * vCone1, int nLeaves, int * pPhase )
-{
- unsigned * pDataTop, * pDataLast;
- int w;
- // simulate the first one
- Abc_HManSimulateOne( vCone0, nLeaves, 0 );
- // save the last simulation value
- pDataTop = Vec_PtrEntry( s_pHMan->vSims, ((Abc_HObj_t *)Vec_PtrEntryLast(vCone0))->Num );
- pDataLast = Vec_PtrEntry( s_pHMan->vSims, Vec_PtrSize(s_pHMan->vSims)-1 );
- for ( w = 0; w < s_pHMan->nWordsCur; w++ )
- pDataLast[w] = pDataTop[w];
- // simulate the other one
- Abc_HManSimulateOne( vCone1, nLeaves, 1 );
- // complement the output if needed
- pDataTop = Vec_PtrEntry( s_pHMan->vSims, ((Abc_HObj_t *)Vec_PtrEntryLast(vCone1))->Num );
- // mask unused bits
- if ( nLeaves < 5 )
- {
- pDataTop[0] &= ((~((unsigned)0)) >> (32-(1<<nLeaves)));
- pDataLast[0] &= ((~((unsigned)0)) >> (32-(1<<nLeaves)));
- }
- if ( *pPhase = ((pDataTop[0] & 1) != (pDataLast[0] & 1)) )
- for ( w = 0; w < s_pHMan->nWordsCur; w++ )
- pDataTop[w] = ~pDataTop[w];
- // compare
- for ( w = 0; w < s_pHMan->nWordsCur; w++ )
- if ( pDataLast[w] != pDataTop[w] )
- return 0;
- return 1;
-}
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
diff --git a/src/base/abci/abcUnreach.c b/src/base/abci/abcUnreach.c
index f1ec3847..b5306bea 100644
--- a/src/base/abci/abcUnreach.c
+++ b/src/base/abci/abcUnreach.c
@@ -333,7 +333,7 @@ Abc_Ntk_t * Abc_NtkConstructExdc( DdManager * dd, Abc_Ntk_t * pNtk, DdNode * bUn
// transform the network to the SOP representation
if ( !Abc_NtkBddToSop( pNtkNew, 0 ) )
{
- printf( "Converting to SOPs has failed.\n" );
+ printf( "Abc_NtkConstructExdc(): Converting to SOPs has failed.\n" );
return NULL;
}
return pNtkNew;
diff --git a/src/base/abci/abcVanEijk.c b/src/base/abci/abcVanEijk.c
index 81423c30..58d9f64e 100644
--- a/src/base/abci/abcVanEijk.c
+++ b/src/base/abci/abcVanEijk.c
@@ -526,7 +526,7 @@ Abc_Ntk_t * Abc_NtkVanEijkFrames( Abc_Ntk_t * pNtk, Vec_Ptr_t * vCorresp, int nF
pNtkFrames->pName = Extra_UtilStrsav(Buffer);
}
// map the constant nodes
- Abc_NtkConst1(pNtk)->pCopy = Abc_NtkConst1(pNtkFrames);
+ Abc_AigConst1(pNtk)->pCopy = Abc_AigConst1(pNtkFrames);
// create new latches and remember them in the new latches
Abc_NtkForEachLatch( pNtk, pLatch, i )
Abc_NtkDupObj( pNtkFrames, pLatch );
@@ -589,7 +589,7 @@ void Abc_NtkVanEijkAddFrame( Abc_Ntk_t * pNtkFrames, Abc_Ntk_t * pNtk, int iFram
// remember the CI mapping
if ( vCorresp )
{
- pNode = Abc_NtkConst1(pNtk);
+ pNode = Abc_AigConst1(pNtk);
Abc_NodeVanEijkWriteCorresp( pNode, vCorresp, iFrame, Abc_ObjRegular(pNode->pCopy) );
Abc_NtkForEachCi( pNtk, pNode, i )
Abc_NodeVanEijkWriteCorresp( pNode, vCorresp, iFrame, Abc_ObjRegular(pNode->pCopy) );
@@ -667,7 +667,7 @@ Fraig_Man_t * Abc_NtkVanEijkFraig( Abc_Ntk_t * pMulti, int fInit )
// clean the copy fields in the old network
Abc_NtkCleanCopy( pMulti );
// map the constant nodes
- Abc_NtkConst1(pMulti)->pCopy = (Abc_Obj_t *)Fraig_ManReadConst1(pMan);
+ Abc_AigConst1(pMulti)->pCopy = (Abc_Obj_t *)Fraig_ManReadConst1(pMan);
if ( fInit )
{
// map the PI nodes
@@ -724,14 +724,14 @@ Abc_Ntk_t * Abc_NtkVanEijkDeriveExdc( Abc_Ntk_t * pNtk, Vec_Ptr_t * vClasses )
pNtkNew->pSpec = NULL;
// map the constant nodes
- Abc_NtkConst1(pNtk)->pCopy = Abc_NtkConst1(pNtkNew);
+ Abc_AigConst1(pNtk)->pCopy = Abc_AigConst1(pNtkNew);
// for each CI, create PI
Abc_NtkForEachCi( pNtk, pObj, i )
Abc_NtkLogicStoreName( pObj->pCopy = Abc_NtkCreatePi(pNtkNew), Abc_ObjName(pObj) );
// cannot add latches here because pLatch->pCopy pointers are used
// create the cones for each pair of nodes in an equivalence class
- pTotal = Abc_ObjNot( Abc_NtkConst1(pNtkNew) );
+ pTotal = Abc_ObjNot( Abc_AigConst1(pNtkNew) );
Vec_PtrForEachEntry( vClasses, pClass, i )
{
assert( pClass->pNext );
@@ -783,7 +783,7 @@ Abc_Ntk_t * Abc_NtkVanEijkDeriveExdc( Abc_Ntk_t * pNtk, Vec_Ptr_t * vClasses )
Abc_NtkDeleteObj( pObjNew );
// make the old network point to the new things
- Abc_NtkConst1(pNtk)->pCopy = Abc_NtkConst1(pNtkNew);
+ Abc_AigConst1(pNtk)->pCopy = Abc_AigConst1(pNtkNew);
Abc_NtkForEachCi( pNtk, pObj, i )
pObj->pCopy = Abc_NtkPi( pNtkNew, i );
*/
diff --git a/src/base/abci/abcVanImp.c b/src/base/abci/abcVanImp.c
index 77de5185..29b5d3a6 100644
--- a/src/base/abci/abcVanImp.c
+++ b/src/base/abci/abcVanImp.c
@@ -487,7 +487,7 @@ printf( "PO = %d\n", pNode1->Id );
// go through the pairs of signals in the frames
pProgress = Extra_ProgressBarStart( stdout, p->nIdMax );
- pConst1 = Abc_NtkConst1( p->pNtkSingle );
+ pConst1 = Abc_AigConst1(p->pNtkSingle);
p->vImps = Vec_IntAlloc( 100 );
p->vZeros = Vec_PtrAlloc( 100 );
Abc_NtkForEachObj( p->pNtkSingle, pNode1, i )
@@ -882,14 +882,14 @@ Abc_Ntk_t * Abc_NtkVanImpDeriveExdc( Abc_Ntk_t * pNtk, Vec_Ptr_t * vZeros, Vec_I
pNtkNew->pSpec = NULL;
// map the constant nodes
- Abc_NtkConst1(pNtk)->pCopy = Abc_NtkConst1(pNtkNew);
+ Abc_AigConst1(pNtk)->pCopy = Abc_AigConst1(pNtkNew);
// for each CI, create PI
Abc_NtkForEachCi( pNtk, pObj, i )
Abc_NtkLogicStoreName( pObj->pCopy = Abc_NtkCreatePi(pNtkNew), Abc_ObjName(pObj) );
// cannot add latches here because pLatch->pCopy pointers are used
// build logic cone for zero nodes
- pTotal = Abc_ObjNot( Abc_NtkConst1(pNtkNew) );
+ pTotal = Abc_ObjNot( Abc_AigConst1(pNtkNew) );
Vec_PtrForEachEntry( vZeros, pNode, i )
{
// build the logic cone for the node
@@ -961,7 +961,7 @@ Abc_Ntk_t * Abc_NtkVanImpDeriveExdc( Abc_Ntk_t * pNtk, Vec_Ptr_t * vZeros, Vec_I
Abc_NtkDeleteObj( pObjNew );
// make the old network point to the new things
- Abc_NtkConst1(pNtk)->pCopy = Abc_NtkConst1(pNtkNew);
+ Abc_AigConst1(pNtk)->pCopy = Abc_AigConst1(pNtkNew);
Abc_NtkForEachCi( pNtk, pObj, i )
pObj->pCopy = Abc_NtkPi( pNtkNew, i );
*/
diff --git a/src/base/abci/abcVerify.c b/src/base/abci/abcVerify.c
index d9478b04..c6782b07 100644
--- a/src/base/abci/abcVerify.c
+++ b/src/base/abci/abcVerify.c
@@ -422,9 +422,9 @@ int * Abc_NtkVerifySimulatePattern( Abc_Ntk_t * pNtk, int * pModel )
vNodes = Abc_NtkDfs( pNtk, 1 );
Vec_PtrForEachEntry( vNodes, pNode, i )
{
- if ( Abc_NodeIsConst(pNode) )
- pNode->pCopy = NULL;
- else
+// if ( Abc_NodeIsConst(pNode) )
+// pNode->pCopy = NULL;
+// else
{
Value0 = ((int)Abc_ObjFanin0(pNode)->pCopy) ^ Abc_ObjFaninC0(pNode);
Value1 = ((int)Abc_ObjFanin1(pNode)->pCopy) ^ Abc_ObjFaninC1(pNode);
diff --git a/src/base/abci/module.make b/src/base/abci/module.make
index 2e338e48..54c6f05c 100644
--- a/src/base/abci/module.make
+++ b/src/base/abci/module.make
@@ -31,7 +31,6 @@ SRC += src/base/abci/abc.c \
src/base/abci/abcSweep.c \
src/base/abci/abcSymm.c \
src/base/abci/abcTiming.c \
- src/base/abci/abcTrace.c \
src/base/abci/abcUnate.c \
src/base/abci/abcUnreach.c \
src/base/abci/abcVanEijk.c \
diff --git a/src/base/cmd/cmd.c b/src/base/cmd/cmd.c
index ac012516..41299790 100644
--- a/src/base/cmd/cmd.c
+++ b/src/base/cmd/cmd.c
@@ -1261,7 +1261,7 @@ int CmdCommandSis( Abc_Frame_t * pAbc, int argc, char **argv )
if ( Abc_NtkIsMappedLogic(pNtk) )
{
- Abc_NtkUnmap(pNtk);
+ Abc_NtkMapToSop(pNtk);
printf( "The current network is unmapped before calling SIS.\n" );
}
@@ -1402,7 +1402,7 @@ int CmdCommandMvsis( Abc_Frame_t * pAbc, int argc, char **argv )
if ( Abc_NtkIsMappedLogic(pNtk) )
{
- Abc_NtkUnmap(pNtk);
+ Abc_NtkMapToSop(pNtk);
printf( "The current network is unmapped before calling MVSIS.\n" );
}
@@ -1548,7 +1548,7 @@ int CmdCommandCapo( Abc_Frame_t * pAbc, int argc, char **argv )
if ( Abc_NtkIsMappedLogic(pNtk) )
{
- Abc_NtkUnmap(pNtk);
+ Abc_NtkMapToSop(pNtk);
printf( "The current network is unmapped before calling Capo.\n" );
}
diff --git a/src/base/io/io.c b/src/base/io/io.c
index 6da1f4d8..0cc3c7d9 100644
--- a/src/base/io/io.c
+++ b/src/base/io/io.c
@@ -667,13 +667,13 @@ usage:
***********************************************************************/
int IoCommandReadVer( Abc_Frame_t * pAbc, int argc, char ** argv )
{
- Abc_Ntk_t * pNtk, * pTemp;
- st_table * tDesign;
+ Abc_Ntk_t * pNtk;
+ Abc_Lib_t * pDesign;
char * FileName;
FILE * pFile;
int fCheck;
int c;
- extern st_table * Ver_ParseFile( char * pFileName, st_table * pGateLib, int fCheck );
+ extern Abc_Lib_t * Ver_ParseFile( char * pFileName, Abc_Lib_t * pGateLib, int fCheck );
fCheck = 1;
Extra_UtilGetoptReset();
@@ -709,41 +709,21 @@ int IoCommandReadVer( Abc_Frame_t * pAbc, int argc, char ** argv )
fclose( pFile );
// set the new network
- tDesign = Ver_ParseFile( FileName, Abc_FrameReadLibVer(), fCheck );
- if ( tDesign == NULL )
+ pDesign = Ver_ParseFile( FileName, Abc_FrameReadLibVer(), fCheck );
+ if ( pDesign == NULL )
{
fprintf( pAbc->Err, "Reading network from the verilog file has failed.\n" );
return 1;
}
-
- if ( st_count(tDesign) == 1 )
- {
- st_generator * gen;
- char * pName;
- // find the network
- st_foreach_item( tDesign, gen, (char**)&pName, (char**)&pNtk )
- {
- st_free_gen(gen);
- break;
- }
- st_free_table( tDesign );
-
- // convert it into a logic network
- pNtk = Abc_NtkNetlistToLogic( pTemp = pNtk );
- Abc_NtkDelete( pTemp );
- if ( pNtk == NULL )
- {
- fprintf( pAbc->Err, "Converting to logic network after reading has failed.\n" );
- return 1;
- }
- // replace the current network
- Abc_FrameReplaceCurrentNetwork( pAbc, pNtk );
- }
- else
+ // derive root design
+ pNtk = Abc_LibDeriveRoot( pDesign );
+ if ( pNtk == NULL )
{
- printf( "The design includes more than one module and is currently not used.\n" );
+ fprintf( pAbc->Err, "Deriving root module has failed.\n" );
+ return 1;
}
-
+ // replace the current network
+ Abc_FrameReplaceCurrentNetwork( pAbc, pNtk );
return 0;
usage:
@@ -768,14 +748,12 @@ usage:
***********************************************************************/
int IoCommandReadVerLib( Abc_Frame_t * pAbc, int argc, char ** argv )
{
- Abc_Ntk_t * pNtk, * pTemp;
- st_table * tDesign;
+ Abc_Lib_t * pLibrary;
char * FileName;
FILE * pFile;
int fCheck;
int c;
- extern st_table * Ver_ParseFile( char * pFileName, st_table * pGateLib, int fCheck );
- extern void Ver_ParseFreeLibrary( st_table * pLibVer );
+ extern Abc_Lib_t * Ver_ParseFile( char * pFileName, Abc_Lib_t * pGateLib, int fCheck );
fCheck = 1;
Extra_UtilGetoptReset();
@@ -811,41 +789,18 @@ int IoCommandReadVerLib( Abc_Frame_t * pAbc, int argc, char ** argv )
fclose( pFile );
// set the new network
- tDesign = Ver_ParseFile( FileName, NULL, fCheck );
- if ( tDesign == NULL )
+ pLibrary = Ver_ParseFile( FileName, NULL, fCheck );
+ if ( pLibrary == NULL )
{
fprintf( pAbc->Err, "Reading library from the verilog file has failed.\n" );
return 1;
}
- printf( "The library contains %d gates.\n", st_count(tDesign) );
-
- // convert gates into AIGs
- {
- st_table * tLibrary;
- st_generator * gen;
- char * pName;
- // transform the gates into the library AIGs
- tLibrary = st_init_table( strcmp, st_strhash );
- st_foreach_item( tDesign, gen, (char**)&pName, (char**)&pNtk )
- {
- // convert the netlist into SOP logic network
- pNtk = Abc_NtkNetlistToLogic( pTemp = pNtk );
- Abc_NtkDelete( pTemp );
- // perform structural hashing
- pNtk = Abc_NtkStrash( pTemp = pNtk, 0, 1 );
- Abc_NtkDelete( pTemp );
- // insert the new network into the new library
- st_insert( tLibrary, pNtk->pName, (char *)pNtk );
- }
- st_free_table( tDesign );
-
- // free old library
- if ( Abc_FrameReadLibVer() )
- Ver_ParseFreeLibrary( Abc_FrameReadLibVer() );
- // read new library
- Abc_FrameSetLibVer( tLibrary );
- }
-
+ printf( "The library contains %d gates.\n", st_count(pLibrary->tModules) );
+ // free old library
+ if ( Abc_FrameReadLibVer() )
+ Abc_LibFree( Abc_FrameReadLibVer() );
+ // read new library
+ Abc_FrameSetLibVer( pLibrary );
return 0;
usage:
diff --git a/src/base/io/ioReadBaf.c b/src/base/io/ioReadBaf.c
index 8f4a8ec4..83b642a0 100644
--- a/src/base/io/ioReadBaf.c
+++ b/src/base/io/ioReadBaf.c
@@ -79,7 +79,7 @@ Abc_Ntk_t * Io_ReadBaf( char * pFileName, int fCheck )
// prepare the array of nodes
vNodes = Vec_PtrAlloc( 1 + nInputs + nLatches + nAnds );
- Vec_PtrPush( vNodes, Abc_NtkConst1(pNtkNew) );
+ Vec_PtrPush( vNodes, Abc_AigConst1(pNtkNew) );
// create the PIs
for ( i = 0; i < nInputs; i++ )
diff --git a/src/base/io/ioWriteDot.c b/src/base/io/ioWriteDot.c
index ed6acb24..8ce837e2 100644
--- a/src/base/io/ioWriteDot.c
+++ b/src/base/io/ioWriteDot.c
@@ -415,7 +415,7 @@ void Io_WriteDotNtk( Abc_Ntk_t * pNtk, Vec_Ptr_t * vNodes, Vec_Ptr_t * vNodesSho
{
if ( !Abc_NtkBddToSop(pNtk, 0) )
{
- printf( "Converting to SOPs has failed.\n" );
+ printf( "Io_WriteDotNtk(): Converting to SOPs has failed.\n" );
return;
}
}
diff --git a/src/base/io/ioWriteList.c b/src/base/io/ioWriteList.c
index f0981a8e..c2bea884 100644
--- a/src/base/io/ioWriteList.c
+++ b/src/base/io/ioWriteList.c
@@ -117,8 +117,8 @@ void Io_WriteList( Abc_Ntk_t * pNtk, char * pFileName, int fUseHost )
fprintf( pFile, "# written by ABC on %s\n", Extra_TimeStamp() );
// write the constant node
- if ( Abc_ObjFanoutNum( Abc_NtkConst1(pNtk) ) > 0 )
- Io_WriteListEdge( pFile, Abc_NtkConst1(pNtk) );
+ if ( Abc_ObjFanoutNum( Abc_AigConst1(pNtk) ) > 0 )
+ Io_WriteListEdge( pFile, Abc_AigConst1(pNtk) );
// write the PI edges
Abc_NtkForEachPi( pNtk, pObj, i )
diff --git a/src/base/io/ioWriteVerAux.c b/src/base/io/ioWriteVerAux.c
index f0814c84..9fd71750 100644
--- a/src/base/io/ioWriteVerAux.c
+++ b/src/base/io/ioWriteVerAux.c
@@ -265,7 +265,6 @@ void Io_WriteVerilogAuxNodes( FILE * pFile, Abc_Ntk_t * pNtk )
Abc_Obj_t * pObj;
int i, nCubes, nFanins, Counter, nDigits, fPadZeros;
char * pName;
- extern int Abc_SopIsExorType( char * pSop );
nDigits = Extra_Base10Log( Abc_NtkNodeNum(pNtk) );
Counter = 1;
diff --git a/src/base/main/mainFrame.c b/src/base/main/mainFrame.c
index 068a8bfb..46834e3f 100644
--- a/src/base/main/mainFrame.c
+++ b/src/base/main/mainFrame.c
@@ -137,13 +137,12 @@ void Abc_FrameDeallocate( Abc_Frame_t * p )
{
extern void Rwt_ManGlobalStop();
extern void undefine_cube_size();
- extern void Ver_ParseFreeLibrary( st_table * pLibVer );
// extern void Ivy_TruthManStop();
// Abc_HManStop();
undefine_cube_size();
Rwt_ManGlobalStop();
// Ivy_TruthManStop();
- if ( p->pLibVer ) Ver_ParseFreeLibrary( p->pLibVer );
+ if ( p->pLibVer ) Abc_LibFree( p->pLibVer );
if ( p->pManDec ) Dec_ManStop( p->pManDec );
if ( p->dd ) Extra_StopManager( p->dd );
Abc_FrameDeleteAllNetworks( p );
@@ -427,7 +426,7 @@ void Abc_FrameUnmapAllNetworks( Abc_Frame_t * p )
Abc_Ntk_t * pNtk;
for ( pNtk = p->pNtkCur; pNtk; pNtk = Abc_NtkBackup(pNtk) )
if ( Abc_NtkHasMapping(pNtk) )
- Abc_NtkUnmap( pNtk );
+ Abc_NtkMapToSop( pNtk );
}
/**Function*************************************************************
diff --git a/src/base/seq/module.make b/src/base/seq/module.make
index fbb1015a..c7716180 100644
--- a/src/base/seq/module.make
+++ b/src/base/seq/module.make
@@ -7,6 +7,7 @@ SRC += src/base/seq/seqAigCore.c \
src/base/seq/seqMan.c \
src/base/seq/seqMapCore.c \
src/base/seq/seqMapIter.c \
+ src/base/seq/seqMaxMeanCycle.c \
src/base/seq/seqRetCore.c \
src/base/seq/seqRetIter.c \
src/base/seq/seqShare.c \
diff --git a/src/base/seq/seq.h b/src/base/seq/seq.h
index b66799b5..d3c9abda 100644
--- a/src/base/seq/seq.h
+++ b/src/base/seq/seq.h
@@ -64,6 +64,9 @@ extern int Seq_NodeCompareLats( Abc_Obj_t * pObj1, int Edge1, Abc_Ob
extern Abc_Seq_t * Seq_Create( Abc_Ntk_t * pNtk );
extern void Seq_Resize( Abc_Seq_t * p, int nMaxId );
extern void Seq_Delete( Abc_Seq_t * p );
+/*=== seqMaxMeanCycle.c ======================================================*/
+extern float Seq_NtkHoward( Abc_Ntk_t * pNtk, int fVerbose );
+extern void Seq_NtkSkewForward( Abc_Ntk_t * pNtk, float period, int fMinimize );
/*=== abcSeq.c ===============================================================*/
extern Abc_Ntk_t * Abc_NtkAigToSeq( Abc_Ntk_t * pNtk );
extern Abc_Ntk_t * Abc_NtkSeqToLogicSop( Abc_Ntk_t * pNtk );
diff --git a/src/base/seq/seqCreate.c b/src/base/seq/seqCreate.c
index a553e06f..30a21086 100644
--- a/src/base/seq/seqCreate.c
+++ b/src/base/seq/seqCreate.c
@@ -93,11 +93,11 @@ Abc_Ntk_t * Abc_NtkAigToSeq( Abc_Ntk_t * pNtk )
// map the constant nodes
Abc_NtkCleanCopy( pNtk );
- Abc_NtkConst1(pNtk)->pCopy = Abc_NtkConst1(pNtkNew);
+ Abc_AigConst1(pNtk)->pCopy = Abc_AigConst1(pNtkNew);
// copy all objects, except the latches and constant
Vec_PtrFill( pNtkNew->vObjs, Abc_NtkObjNumMax(pNtk), NULL );
- Vec_PtrWriteEntry( pNtkNew->vObjs, 0, Abc_NtkConst1(pNtk)->pCopy );
+ Vec_PtrWriteEntry( pNtkNew->vObjs, 0, Abc_AigConst1(pNtk)->pCopy );
Abc_NtkForEachObj( pNtk, pObj, i )
{
if ( i == 0 || Abc_ObjIsLatch(pObj) )
@@ -236,7 +236,7 @@ void Abc_NtkAigCutsetCopy( Abc_Ntk_t * pNtk )
Abc_NtkForEachLatch( pNtk, pLatch, i )
{
pDriver = Abc_ObjFanin0(pLatch);
- if ( Abc_NodeIsTravIdCurrent(pDriver) || !Abc_NodeIsAigAnd(pDriver) )
+ if ( Abc_NodeIsTravIdCurrent(pDriver) || !Abc_AigNodeIsAnd(pDriver) )
continue;
Abc_NodeSetTravIdCurrent(pDriver);
pDriverNew = pDriver->pCopy;
@@ -428,7 +428,7 @@ bool Abc_NtkSeqCheck( Abc_Ntk_t * pNtk )
nFanins = Abc_ObjFaninNum(pObj);
if ( nFanins == 0 )
{
- if ( pObj != Abc_NtkConst1(pNtk) )
+ if ( pObj != Abc_AigConst1(pNtk) )
{
printf( "Abc_SeqCheck: The AIG has non-standard constant nodes.\n" );
return 0;
diff --git a/src/base/seq/seqFpgaCore.c b/src/base/seq/seqFpgaCore.c
index 79e44caf..c6360363 100644
--- a/src/base/seq/seqFpgaCore.c
+++ b/src/base/seq/seqFpgaCore.c
@@ -382,7 +382,7 @@ int Seq_FpgaMappingCount_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Vec_Ptr_t * vL
if ( SeqEdge == (unsigned)pLeaf )
return 0;
// continue unfolding
- assert( Abc_NodeIsAigAnd(pObj) );
+ assert( Abc_AigNodeIsAnd(pObj) );
// get new sequential edges
assert( Lag + Seq_ObjFaninL0(pObj) < 255 );
assert( Lag + Seq_ObjFaninL1(pObj) < 255 );
@@ -417,7 +417,7 @@ Abc_Obj_t * Seq_FpgaMappingBuild_rec( Abc_Ntk_t * pNtkNew, Abc_Ntk_t * pNtk, uns
if ( SeqEdge == (unsigned)pLeaf )
return pObj->pCopy;
// continue unfolding
- assert( Abc_NodeIsAigAnd(pObj) );
+ assert( Abc_AigNodeIsAnd(pObj) );
// get new sequential edges
assert( Lag + Seq_ObjFaninL0(pObj) < 255 );
assert( Lag + Seq_ObjFaninL1(pObj) < 255 );
@@ -464,7 +464,7 @@ DdNode * Seq_FpgaMappingBdd_rec( DdManager * dd, Abc_Ntk_t * pNtk, unsigned SeqE
if ( SeqEdge == (unsigned)pLeaf )
return Cudd_bddIthVar( dd, i );
// continue unfolding
- assert( Abc_NodeIsAigAnd(pObj) );
+ assert( Abc_AigNodeIsAnd(pObj) );
// get new sequential edges
assert( Lag + Seq_ObjFaninL0(pObj) < 255 );
assert( Lag + Seq_ObjFaninL1(pObj) < 255 );
@@ -514,7 +514,7 @@ void Seq_FpgaMappingEdges_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Abc_Obj_t * p
}
}
// continue unfolding
- assert( Abc_NodeIsAigAnd(pObj) );
+ assert( Abc_AigNodeIsAnd(pObj) );
// get new sequential edges
assert( Lag + Seq_ObjFaninL0(pObj) < 255 );
assert( Lag + Seq_ObjFaninL1(pObj) < 255 );
@@ -564,7 +564,7 @@ void Seq_FpgaMappingConnect_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Abc_Obj_t *
}
}
// continue unfolding
- assert( Abc_NodeIsAigAnd(pObj) );
+ assert( Abc_AigNodeIsAnd(pObj) );
// get new sequential edges
assert( Lag + Seq_ObjFaninL0(pObj) < 255 );
assert( Lag + Seq_ObjFaninL1(pObj) < 255 );
@@ -616,7 +616,7 @@ DdNode * Seq_FpgaMappingConnectBdd_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Abc_
}
}
// continue unfolding
- assert( Abc_NodeIsAigAnd(pObj) );
+ assert( Abc_AigNodeIsAnd(pObj) );
// get new sequential edges
assert( Lag + Seq_ObjFaninL0(pObj) < 255 );
assert( Lag + Seq_ObjFaninL1(pObj) < 255 );
diff --git a/src/base/seq/seqFpgaIter.c b/src/base/seq/seqFpgaIter.c
index ae411881..a300b362 100644
--- a/src/base/seq/seqFpgaIter.c
+++ b/src/base/seq/seqFpgaIter.c
@@ -116,7 +116,7 @@ void Seq_FpgaMappingCollectNode_rec( Abc_Obj_t * pAnd, Vec_Ptr_t * vMapping, Vec
int k;
// skip if this is a non-PI node
- if ( !Abc_NodeIsAigAnd(pAnd) )
+ if ( !Abc_AigNodeIsAnd(pAnd) )
return;
// skip a visited node
if ( Abc_NodeIsTravIdCurrent(pAnd) )
@@ -203,7 +203,7 @@ static inline int Seq_FpgaCutUpdateLValue( Cut_Cut_t * pCut, Abc_Obj_t * pObj, i
{
Abc_Obj_t * pFanin;
int i, lValueMax, lValueCur;
- assert( Abc_NodeIsAigAnd(pObj) );
+ assert( Abc_AigNodeIsAnd(pObj) );
lValueMax = -ABC_INFINITY;
for ( i = 0; i < (int)pCut->nLeaves; i++ )
{
diff --git a/src/base/seq/seqMapCore.c b/src/base/seq/seqMapCore.c
index a444ec58..3db29abd 100644
--- a/src/base/seq/seqMapCore.c
+++ b/src/base/seq/seqMapCore.c
@@ -474,7 +474,7 @@ int Seq_MapMappingCount_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Vec_Ptr_t * vLe
if ( SeqEdge == (unsigned)pLeaf )
return 0;
// continue unfolding
- assert( Abc_NodeIsAigAnd(pObj) );
+ assert( Abc_AigNodeIsAnd(pObj) );
// get new sequential edges
assert( Lag + Seq_ObjFaninL0(pObj) < 255 );
assert( Lag + Seq_ObjFaninL1(pObj) < 255 );
@@ -519,7 +519,7 @@ Abc_Obj_t * Seq_MapMappingBuild_rec( Abc_Ntk_t * pNtkNew, Abc_Ntk_t * pNtk, unsi
return pObj->pCopy;
}
// continue unfolding
- assert( Abc_NodeIsAigAnd(pObj) );
+ assert( Abc_AigNodeIsAnd(pObj) );
// get new sequential edges
assert( Lag + Seq_ObjFaninL0(pObj) < 255 );
assert( Lag + Seq_ObjFaninL1(pObj) < 255 );
@@ -572,7 +572,7 @@ void Seq_MapMappingEdges_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Abc_Obj_t * pP
}
}
// continue unfolding
- assert( Abc_NodeIsAigAnd(pObj) );
+ assert( Abc_AigNodeIsAnd(pObj) );
// get new sequential edges
assert( Lag + Seq_ObjFaninL0(pObj) < 255 );
assert( Lag + Seq_ObjFaninL1(pObj) < 255 );
@@ -625,7 +625,7 @@ DdNode * Seq_MapMappingConnectBdd_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Abc_O
}
}
// continue unfolding
- assert( Abc_NodeIsAigAnd(pObj) );
+ assert( Abc_AigNodeIsAnd(pObj) );
// get new sequential edges
assert( Lag + Seq_ObjFaninL0(pObj) < 255 );
assert( Lag + Seq_ObjFaninL1(pObj) < 255 );
diff --git a/src/base/seq/seqMapIter.c b/src/base/seq/seqMapIter.c
index 185c05f3..30333cea 100644
--- a/src/base/seq/seqMapIter.c
+++ b/src/base/seq/seqMapIter.c
@@ -540,7 +540,7 @@ float Seq_MapCollectNode_rec( Abc_Obj_t * pAnd, float FiBest, Vec_Ptr_t * vMappi
}
// skip if this is a PI or a constant
- if ( !Abc_NodeIsAigAnd(pAnd) )
+ if ( !Abc_AigNodeIsAnd(pAnd) )
{
if ( Abc_ObjIsPi(pAnd) && fCompl )
return AreaInv;
diff --git a/src/base/seq/seqMaxMeanCycle.c b/src/base/seq/seqMaxMeanCycle.c
new file mode 100644
index 00000000..46d73cbd
--- /dev/null
+++ b/src/base/seq/seqMaxMeanCycle.c
@@ -0,0 +1,567 @@
+/**CFile****************************************************************
+
+ FileName [seqMaxMeanCycle.c]
+
+ SystemName [ABC: Logic synthesis and verification system.]
+
+ PackageName [Construction and manipulation of sequential AIGs.]
+
+ Synopsis [Efficient computation of maximum mean cycle times.]
+
+ Author [Aaron P. Hurst]
+
+ Affiliation [UC Berkeley]
+
+ Date [Ver. 1.0. Started - May 15, 2006.]
+
+ Revision [$Id: seqMaxMeanCycle.c,v 1.00 2005/05/15 00:00:00 ahurst Exp $]
+
+***********************************************************************/
+
+#include "seqInt.h"
+#include "hash.h"
+
+////////////////////////////////////////////////////////////////////////
+/// DECLARATIONS ///
+////////////////////////////////////////////////////////////////////////
+
+struct Abc_ManTime_t_
+{
+ Abc_Time_t tArrDef;
+ Abc_Time_t tReqDef;
+ Vec_Ptr_t * vArrs;
+ Vec_Ptr_t * vReqs;
+};
+
+typedef struct Seq_HowardData_t_
+{
+ char visited;
+ int mark;
+ int policy;
+ float cycle;
+ float skew;
+ float delay;
+} Seq_HowardData_t;
+
+// accessing the arrival and required times of a node
+static inline Abc_Time_t * Abc_NodeArrival( Abc_Obj_t * pNode ) { return pNode->pNtk->pManTime->vArrs->pArray[pNode->Id]; }
+static inline Abc_Time_t * Abc_NodeRequired( Abc_Obj_t * pNode ) { return pNode->pNtk->pManTime->vReqs->pArray[pNode->Id]; }
+
+Hash_Ptr_t * Seq_NtkPathDelays( Abc_Ntk_t * pNtk, int fVerbose );
+void Seq_NtkMergePios( Abc_Ntk_t * pNtk, Hash_Ptr_t * hFwdDelays, int fVerbose );
+
+void Seq_NtkHowardLoop( Abc_Ntk_t * pNtk, Hash_Ptr_t * hFwdDelays,
+ Hash_Ptr_t * hNodeData, int node,
+ int *howardDepth, float *howardDelay, int *howardSink,
+ float *maxMeanCycle);
+void Abc_NtkDfsReverse_rec2( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes, Vec_Ptr_t * vEndpoints );
+
+#define Seq_NtkGetPathDelay( hFwdDelays, from, to ) \
+ (Hash_PtrExists(hFwdDelays, from)?Hash_FltEntry( ((Hash_Flt_t *)Hash_PtrEntry(hFwdDelays, from, 0)), to, 0):0 )
+
+#define HOWARD_EPSILON 1e-3
+#define ZERO_SLOP 1e-5
+#define REMOVE_ZERO_SLOP( x ) \
+ (x = (x > -ZERO_SLOP && x < ZERO_SLOP)?0:x)
+
+////////////////////////////////////////////////////////////////////////
+/// FUNCTION DEFINITIONS ///
+////////////////////////////////////////////////////////////////////////
+
+/**Function*************************************************************
+
+ Synopsis [Computes maximum mean cycle time.]
+
+ Description [Uses Howard's algorithm.]
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+float Seq_NtkHoward( Abc_Ntk_t * pNtk, int fVerbose ) {
+
+ Abc_Obj_t * pObj;
+ Hash_Ptr_t * hFwdDelays;
+ Hash_Flt_t * hOutgoing;
+ Hash_Ptr_Entry_t * pSourceEntry, * pNodeEntry;
+ Hash_Flt_Entry_t * pSinkEntry;
+ int i, j, iteration = 0;
+ int source, sink;
+ int fChanged;
+ int howardDepth, howardSink = 0;
+ float delay, howardDelay, t;
+ float maxMeanCycle = -ABC_INFINITY;
+ Hash_Ptr_t * hNodeData;
+ Seq_HowardData_t * pNodeData, * pSourceData, * pSinkData;
+
+ // gather timing constraints
+ hFwdDelays = Seq_NtkPathDelays( pNtk, fVerbose );
+ Seq_NtkMergePios( pNtk, hFwdDelays, fVerbose );
+
+ // initialize data, create initial policy
+ hNodeData = Hash_PtrAlloc( hFwdDelays->nSize );
+ Hash_PtrForEachEntry( hFwdDelays, pSourceEntry, i ) {
+ Hash_PtrWriteEntry( hNodeData, pSourceEntry->key,
+ (pNodeData = ALLOC(Seq_HowardData_t, 1)) );
+ pNodeData->skew = 0.0;
+ pNodeData->policy = 0;
+ hOutgoing = (Hash_Flt_t *)(pSourceEntry->data);
+ assert(hOutgoing);
+
+ Hash_FltForEachEntry( hOutgoing, pSinkEntry, j ) {
+ sink = pSinkEntry->key;
+ delay = pSinkEntry->data;
+ if (delay > pNodeData->skew) {
+ pNodeData->policy = sink;
+ pNodeData->skew = delay;
+ }
+ }
+ }
+
+ // iteratively refine policy
+ do {
+ iteration++;
+ fChanged = 0;
+ howardDelay = 0.0;
+ howardDepth = 0;
+
+ // reset data
+ Hash_PtrForEachEntry( hNodeData, pNodeEntry, i ) {
+ pNodeData = (Seq_HowardData_t *)pNodeEntry->data;
+ pNodeData->skew = -ABC_INFINITY;
+ pNodeData->cycle = -ABC_INFINITY;
+ pNodeData->mark = 0;
+ pNodeData->visited = 0;
+ }
+
+ // find loops in policy graph
+ Hash_PtrForEachEntry( hNodeData, pNodeEntry, i ) {
+ pNodeData = (Seq_HowardData_t *)(pNodeEntry->data);
+ assert(pNodeData);
+ if (!pNodeData->visited)
+ Seq_NtkHowardLoop( pNtk, hFwdDelays,
+ hNodeData, pNodeEntry->key,
+ &howardDepth, &howardDelay, &howardSink, &maxMeanCycle);
+ }
+
+ if (!howardSink) {
+ return -1;
+ }
+
+ // improve policy by tightening loops
+ Hash_PtrForEachEntry( hFwdDelays, pSourceEntry, i ) {
+ source = pSourceEntry->key;
+ pSourceData = (Seq_HowardData_t *)Hash_PtrEntry( hNodeData, source, 0 );
+ assert(pSourceData);
+ hOutgoing = (Hash_Flt_t *)(pSourceEntry->data);
+ assert(hOutgoing);
+ Hash_FltForEachEntry( hOutgoing, pSinkEntry, j ) {
+ sink = pSinkEntry->key;
+ pSinkData = (Seq_HowardData_t *)Hash_PtrEntry( hNodeData, sink, 0 );
+ assert(pSinkData);
+ delay = pSinkEntry->data;
+
+ if (pSinkData->cycle > pSourceData->cycle + HOWARD_EPSILON) {
+ fChanged = 1;
+ pSourceData->cycle = pSinkData->cycle;
+ pSourceData->policy = sink;
+ }
+ }
+ }
+
+ // improve policy by correcting skews
+ if (!fChanged) {
+ Hash_PtrForEachEntry( hFwdDelays, pSourceEntry, i ) {
+ source = pSourceEntry->key;
+ pSourceData = (Seq_HowardData_t *)Hash_PtrEntry( hNodeData, source, 0 );
+ assert(pSourceData);
+ hOutgoing = (Hash_Flt_t *)(pSourceEntry->data);
+ assert(hOutgoing);
+ Hash_FltForEachEntry( hOutgoing, pSinkEntry, j ) {
+ sink = pSinkEntry->key;
+ pSinkData = (Seq_HowardData_t *)Hash_PtrEntry( hNodeData, sink, 0 );
+ assert(pSinkData);
+ delay = pSinkEntry->data;
+
+ if (pSinkData->cycle < 0.0 || pSinkData->cycle < pSourceData->cycle)
+ continue;
+
+ t = delay - pSinkData->cycle + pSinkData->skew;
+ if (t > pSourceData->skew + HOWARD_EPSILON) {
+ fChanged = 1;
+ pSourceData->skew = t;
+ pSourceData->policy = sink;
+ }
+ }
+ }
+ }
+
+ if (fVerbose) printf("Iteration %d \t Period = %.2f\n", iteration, maxMeanCycle);
+ } while (fChanged);
+
+ // set global skew, mmct
+ pNodeData = Hash_PtrEntry( hNodeData, -1, 0 );
+ pNtk->globalSkew = -pNodeData->skew;
+ pNtk->maxMeanCycle = maxMeanCycle;
+
+ // set endpoint skews
+ Vec_FltGrow( pNtk->vSkews, Abc_NtkLatchNum( pNtk ) );
+ pNtk->vSkews->nSize = Abc_NtkLatchNum( pNtk );
+ Abc_NtkForEachLatch( pNtk, pObj, i ) {
+ pNodeData = Hash_PtrEntry( hNodeData, pObj->Id, 0 );
+ // skews are set based on latch # NOT id #
+ Abc_NtkSetLatSkew( pNtk, i, pNodeData->skew );
+ }
+
+ // free node data
+ Hash_PtrForEachEntry( hNodeData, pNodeEntry, i ) {
+ pNodeData = (Seq_HowardData_t *)(pNodeEntry->data);
+ FREE( pNodeData );
+ }
+ Hash_PtrFree(hNodeData);
+
+ // free delay data
+ Hash_PtrForEachEntry( hFwdDelays, pSourceEntry, i ) {
+ Hash_FltFree( (Hash_Flt_t *)(pSourceEntry->data) );
+ }
+ Hash_PtrFree(hFwdDelays);
+
+ return maxMeanCycle;
+}
+
+/**Function*************************************************************
+
+ Synopsis [Computes the mean cycle times of current policy graph.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+void Seq_NtkHowardLoop( Abc_Ntk_t * pNtk, Hash_Ptr_t * hFwdDelays,
+ Hash_Ptr_t * hNodeData, int node,
+ int *howardDepth, float *howardDelay, int *howardSink,
+ float *maxMeanCycle) {
+
+ Seq_HowardData_t * pNodeData, *pToData;
+ float delay, t;
+
+ pNodeData = (Seq_HowardData_t *)Hash_PtrEntry( hNodeData, node, 0 );
+ assert(pNodeData);
+ pNodeData->visited = 1;
+ pNodeData->mark = ++(*howardDepth);
+ pNodeData->delay = (*howardDelay);
+ if (pNodeData->policy) {
+ pToData = (Seq_HowardData_t *)Hash_PtrEntry( hNodeData, pNodeData->policy, 0 );
+ assert(pToData);
+ delay = Seq_NtkGetPathDelay( hFwdDelays, node, pNodeData->policy );
+ assert(delay > 0.0);
+ (*howardDelay) += delay;
+ if (pToData->mark) {
+ t = (*howardDelay - pToData->delay) / (*howardDepth - pToData->mark + 1);
+ pNodeData->cycle = t;
+ pNodeData->skew = 0.0;
+ if (*maxMeanCycle < t) {
+ *maxMeanCycle = t;
+ *howardSink = pNodeData->policy;
+ }
+ } else {
+ if(!pToData->visited) {
+ Seq_NtkHowardLoop(pNtk, hFwdDelays, hNodeData, pNodeData->policy,
+ howardDepth, howardDelay, howardSink, maxMeanCycle);
+ }
+ if(pToData->cycle > 0) {
+ t = delay - pToData->cycle + pToData->skew;
+ pNodeData->skew = t;
+ pNodeData->cycle = pToData->cycle;
+ }
+ }
+ }
+ *howardDelay = pNodeData->delay;
+ pNodeData->mark = 0;
+ --(*howardDepth);
+}
+
+/**Function*************************************************************
+
+ Synopsis [Computes the register-to-register delays.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+Hash_Ptr_t * Seq_NtkPathDelays( Abc_Ntk_t * pNtk, int fVerbose ) {
+
+ Abc_Time_t * pTime, ** ppTimes;
+ Abc_Obj_t * pObj, * pDriver, * pStart, * pFanout;
+ Vec_Ptr_t * vNodes, * vEndpoints;
+ int i, j, nPaths = 0;
+ Hash_Flt_t * hOutgoing;
+ Hash_Ptr_t * hFwdDelays;
+ float nMaxPath = 0, nSumPath = 0;
+
+ extern void Abc_NtkTimePrepare( Abc_Ntk_t * pNtk );
+ extern void Abc_NodeDelayTraceArrival( Abc_Obj_t * pNode );
+
+ if (fVerbose) printf("Gathering path delays...\n");
+
+ hFwdDelays = Hash_PtrAlloc( Abc_NtkCiNum( pNtk ) );
+
+ assert( Abc_NtkIsMappedLogic(pNtk) );
+
+ Abc_NtkTimePrepare( pNtk );
+ ppTimes = (Abc_Time_t **)pNtk->pManTime->vArrs->pArray;
+ vNodes = Vec_PtrAlloc( 100 );
+ vEndpoints = Vec_PtrAlloc( 100 );
+
+ // set the initial times (i.e. ignore all inputs)
+ Abc_NtkForEachObj( pNtk, pObj, i) {
+ pTime = ppTimes[pObj->Id];
+ pTime->Fall = pTime->Rise = pTime->Worst = -ABC_INFINITY;
+ }
+
+ // starting at each Ci, compute timing forward
+ Abc_NtkForEachCi( pNtk, pStart, j ) {
+
+ hOutgoing = Hash_FltAlloc( 10 );
+ Hash_PtrWriteEntry( hFwdDelays, pStart->Id, (void *)(hOutgoing) );
+
+ // seed the starting point of interest
+ pTime = ppTimes[pStart->Id];
+ pTime->Fall = pTime->Rise = pTime->Worst = 0.0;
+
+ // find a DFS ordering from the start
+ Abc_NtkIncrementTravId( pNtk );
+ Abc_NodeSetTravIdCurrent( pStart );
+ pObj = Abc_ObjFanout0Ntk(pStart);
+ Abc_ObjForEachFanout( pObj, pFanout, i )
+ Abc_NtkDfsReverse_rec2( pFanout, vNodes, vEndpoints );
+ if ( Abc_ObjIsCo( pStart ) )
+ Vec_PtrPush( vEndpoints, pStart );
+
+ // do timing analysis
+ for ( i = vNodes->nSize-1; i >= 0; --i )
+ Abc_NodeDelayTraceArrival( vNodes->pArray[i] );
+
+ // there is a path to each set of Co endpoints
+ Vec_PtrForEachEntry( vEndpoints, pObj, i )
+ {
+ assert(pObj);
+ assert( Abc_ObjIsCo( pObj ) );
+ pDriver = Abc_ObjFanin0(pObj);
+ pTime = Abc_NodeArrival(pDriver);
+ if ( pTime->Worst > 0 ) {
+ Hash_FltWriteEntry( hOutgoing, pObj->Id, pTime->Worst );
+ nPaths++;
+ // if (fVerbose) printf("\tpath %d,%d delay = %f\n", pStart->Id, pObj->Id, pTime->Worst);
+ nSumPath += pTime->Worst;
+ if (pTime->Worst > nMaxPath)
+ nMaxPath = pTime->Worst;
+ }
+ }
+
+ // clear the times that were altered
+ for ( i = 0; i < vNodes->nSize; i++ ) {
+ pObj = (Abc_Obj_t *)(vNodes->pArray[i]);
+ pTime = ppTimes[pObj->Id];
+ pTime->Fall = pTime->Rise = pTime->Worst = -ABC_INFINITY;
+ }
+ pTime = ppTimes[pStart->Id];
+ pTime->Fall = pTime->Rise = pTime->Worst = -ABC_INFINITY;
+
+ Vec_PtrClear( vNodes );
+ Vec_PtrClear( vEndpoints );
+ }
+
+ Vec_PtrFree( vNodes );
+
+ // rezero Cis (note: these should be restored to values if they were nonzero)
+ Abc_NtkForEachCi( pNtk, pObj, i) {
+ pTime = ppTimes[pObj->Id];
+ pTime->Fall = pTime->Rise = pTime->Worst = 0.0;
+ }
+
+ if (fVerbose) printf("Num. paths = %d\tMax. Path Delay = %.2f\tAvg. Path Delay = %.2f\n", nPaths, nMaxPath, nSumPath / nPaths);
+ return hFwdDelays;
+}
+
+
+/**Function*************************************************************
+
+ Synopsis [Merges all the Pios together into one ID = -1.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+void Seq_NtkMergePios( Abc_Ntk_t * pNtk, Hash_Ptr_t * hFwdDelays,
+ int fVerbose ) {
+
+ Abc_Obj_t * pObj;
+ Hash_Flt_Entry_t * pSinkEntry;
+ Hash_Ptr_Entry_t * pSourceEntry;
+ Hash_Flt_t * hOutgoing, * hPioSource;
+ int i, j;
+ int source, sink, nMerges = 0;
+ float delay = 0, max_delay = 0;
+ Vec_Int_t * vFreeList;
+
+ vFreeList = Vec_IntAlloc( 10 );
+
+ // create a new "-1" source entry for the Pios
+ hPioSource = Hash_FltAlloc( 100 );
+ Hash_PtrWriteEntry( hFwdDelays, -1, (void *)(hPioSource) );
+
+ // merge all edges with a Pio as a source
+ Abc_NtkForEachPi( pNtk, pObj, i ) {
+ source = pObj->Id;
+ hOutgoing = (Hash_Flt_t *)Hash_PtrEntry( hFwdDelays, source, 0 );
+ if (!hOutgoing) continue;
+
+ Hash_PtrForEachEntry( hOutgoing, pSinkEntry, j ) {
+ nMerges++;
+ sink = pSinkEntry->key;
+ delay = pSinkEntry->data;
+ if (Hash_FltEntry( hPioSource, sink, 1 ) < delay) {
+ Hash_FltWriteEntry( hPioSource, sink, delay );
+ }
+ }
+
+ Hash_FltFree( hOutgoing );
+ Hash_PtrRemove( hFwdDelays, source );
+ }
+
+ // merge all edges with a Pio as a sink
+ Hash_PtrForEachEntry( hFwdDelays, pSourceEntry, i ) {
+ hOutgoing = (Hash_Flt_t *)(pSourceEntry->data);
+ Hash_FltForEachEntry( hOutgoing, pSinkEntry, j ) {
+ sink = pSinkEntry->key;
+ delay = pSinkEntry->data;
+
+ max_delay = -ABC_INFINITY;
+ if (Abc_ObjIsPo( Abc_NtkObj( pNtk, sink ) )) {
+ nMerges++;
+ if (delay > max_delay)
+ max_delay = delay;
+ Vec_IntPush( vFreeList, sink );
+ }
+ }
+ if (max_delay != -ABC_INFINITY)
+ Hash_FltWriteEntry( hOutgoing, -1, delay );
+ // do freeing
+ while( vFreeList->nSize > 0 ) {
+ Hash_FltRemove( hOutgoing, Vec_IntPop( vFreeList ) );
+ }
+ }
+
+ if (fVerbose) printf("Merged %d paths into one Pio node\n", nMerges);
+
+}
+
+/**Function*************************************************************
+
+ Synopsis [This is a modification of routine from abcDfs.c]
+
+ Description [Recursive DFS from a starting point. Keeps the endpoints.]
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+void Abc_NtkDfsReverse_rec2( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes, Vec_Ptr_t * vEndpoints )
+{
+ Abc_Obj_t * pFanout;
+ int i;
+ assert( !Abc_ObjIsNet(pNode) );
+ // if this node is already visited, skip
+ if ( Abc_NodeIsTravIdCurrent( pNode ) )
+ return;
+ // mark the node as visited
+ Abc_NodeSetTravIdCurrent( pNode );
+ // terminate at the Co
+ if ( Abc_ObjIsCo(pNode) ) {
+ Vec_PtrPush( vEndpoints, pNode );
+ return;
+ }
+ assert( Abc_ObjIsNode( pNode ) );
+ // visit the transitive fanin of the node
+ pNode = Abc_ObjFanout0Ntk(pNode);
+ Abc_ObjForEachFanout( pNode, pFanout, i )
+ Abc_NtkDfsReverse_rec2( pFanout, vNodes, vEndpoints );
+ // add the node after the fanins have been added
+ Vec_PtrPush( vNodes, pNode );
+}
+
+/**Function*************************************************************
+
+ Synopsis [Converts all skews into forward skews 0<skew<T.]
+
+ Description [Can also minimize total skew by changing global skew.]
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+void Seq_NtkSkewForward( Abc_Ntk_t * pNtk, float period, int fMinimize ) {
+
+ Abc_Obj_t * pObj;
+ int i;
+ float skew;
+ float currentSum = 0, bestSum = ABC_INFINITY;
+ float currentOffset = 0, nextStep, bestOffset = 0;
+
+ assert( pNtk->vSkews->nSize >= Abc_NtkLatchNum( pNtk )-1 );
+
+ if (fMinimize) {
+ // search all offsets for the one that minimizes sum of skews
+ while(currentOffset < period) {
+ currentSum = 0;
+ nextStep = period;
+ Abc_NtkForEachLatch( pNtk, pObj, i ) {
+ skew = Abc_NtkGetLatSkew( pNtk, i ) + currentOffset;
+ skew = (float)(skew - period*floor(skew/period));
+ currentSum += skew;
+ if (skew > ZERO_SLOP && skew < nextStep) {
+ nextStep = skew;
+ }
+ }
+
+ if (currentSum < bestSum) {
+ bestSum = currentSum;
+ bestOffset = currentOffset;
+ }
+ currentOffset += nextStep;
+ }
+ printf("Offseting all skews by %.2f\n", bestOffset);
+ }
+
+ // convert global skew into forward skew
+ pNtk->globalSkew = pNtk->globalSkew - bestOffset;
+ pNtk->globalSkew = (float)(pNtk->globalSkew - period*floor(pNtk->globalSkew/period));
+ assert(pNtk->globalSkew>= 0 && pNtk->globalSkew < period);
+
+ // convert endpoint skews into forward skews
+ Abc_NtkForEachLatch( pNtk, pObj, i ) {
+ skew = Abc_NtkGetLatSkew( pNtk, i ) + bestOffset;
+ skew = (float)(skew - period*floor(skew/period));
+ REMOVE_ZERO_SLOP( skew );
+ assert(skew >=0 && skew < period);
+
+ Abc_NtkSetLatSkew( pNtk, i, skew );
+ }
+}
+
+////////////////////////////////////////////////////////////////////////
+/// END OF FILE ///
+////////////////////////////////////////////////////////////////////////
diff --git a/src/base/seq/seqRetCore.c b/src/base/seq/seqRetCore.c
index ba66a881..080abcb2 100644
--- a/src/base/seq/seqRetCore.c
+++ b/src/base/seq/seqRetCore.c
@@ -110,7 +110,7 @@ Abc_Ntk_t * Seq_NtkRetimeDerive( Abc_Ntk_t * pNtk, int fVerbose )
{
if ( !Abc_NtkBddToSop(pNtk, 0) )
{
- printf( "Converting to SOPs has failed.\n" );
+ printf( "Seq_NtkRetimeDerive(): Converting to SOPs has failed.\n" );
return NULL;
}
}
@@ -140,7 +140,7 @@ Abc_Ntk_t * Seq_NtkRetimeDerive( Abc_Ntk_t * pNtk, int fVerbose )
{
if ( pObj->Id == 0 )
{
- pObj->pCopy = Abc_NtkConst1(pNtkNew);
+ pObj->pCopy = Abc_AigConst1(pNtkNew);
continue;
}
pObj->pCopy = Abc_NtkCreateNode( pNtkNew );
@@ -275,9 +275,9 @@ Abc_Obj_t * Seq_NodeRetimeDerive( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pRoot, char *
if ( nFanins < 2 )
{
if ( Abc_SopIsConst1(pSop) )
- pFanin = Abc_NtkConst1(pNtkNew);
+ pFanin = Abc_AigConst1(pNtkNew);
else if ( Abc_SopIsConst0(pSop) )
- pFanin = Abc_ObjNot( Abc_NtkConst1(pNtkNew) );
+ pFanin = Abc_ObjNot( Abc_AigConst1(pNtkNew) );
else if ( Abc_SopIsBuf(pSop) )
pFanin = Abc_ObjFanin0(pRoot)->pCopy;
else if ( Abc_SopIsInv(pSop) )
@@ -342,8 +342,8 @@ Abc_Ntk_t * Seq_NtkRetimeReconstruct( Abc_Ntk_t * pNtkOld, Abc_Ntk_t * pNtkSeq )
pNtkNew = Abc_NtkStartFrom( pNtkSeq, pNtkOld->ntkType, pNtkOld->ntkFunc );
// transfer the pointers to the old network
- if ( Abc_NtkConst1(pNtkOld) )
- Abc_NtkConst1(pNtkOld)->pCopy = Abc_NtkConst1(pNtkNew);
+ if ( Abc_AigConst1(pNtkOld) )
+ Abc_AigConst1(pNtkOld)->pCopy = Abc_AigConst1(pNtkNew);
Abc_NtkForEachPi( pNtkOld, pObj, i )
pObj->pCopy = pObj->pNext->pCopy;
Abc_NtkForEachPo( pNtkOld, pObj, i )
@@ -433,7 +433,7 @@ Abc_Obj_t * Seq_EdgeReconstruct_rec( Abc_Obj_t * pGoal, Abc_Obj_t * pNode )
Seq_Lat_t * pRing;
Abc_Obj_t * pFanin, * pRes = NULL;
- if ( !Abc_NodeIsAigAnd(pNode) )
+ if ( !Abc_AigNodeIsAnd(pNode) )
return NULL;
// consider the first fanin
diff --git a/src/base/seq/seqRetIter.c b/src/base/seq/seqRetIter.c
index 512a521e..99c50914 100644
--- a/src/base/seq/seqRetIter.c
+++ b/src/base/seq/seqRetIter.c
@@ -316,7 +316,7 @@ int Seq_NtkNodeUpdateLValue( Abc_Obj_t * pObj, float Fi, Vec_Ptr_t * vLeaves, Ve
void Seq_NodeRetimeSetLag_rec( Abc_Obj_t * pNode, char Lag )
{
Abc_Obj_t * pFanin;
- if ( !Abc_NodeIsAigAnd(pNode) )
+ if ( !Abc_AigNodeIsAnd(pNode) )
return;
Seq_NodeSetLag( pNode, Lag );
// consider the first fanin
diff --git a/src/base/seq/seqShare.c b/src/base/seq/seqShare.c
index fd2e8189..742de46b 100644
--- a/src/base/seq/seqShare.c
+++ b/src/base/seq/seqShare.c
@@ -319,7 +319,7 @@ void Seq_NtkShareLatchesMapping( Abc_Ntk_t * pNtkNew, Abc_Ntk_t * pNtk, Vec_Ptr_
// create the array of all nodes with sharable fanouts
vNodes = Vec_PtrAlloc( 100 );
- Vec_PtrPush( vNodes, Abc_NtkConst1(pNtk) );
+ Vec_PtrPush( vNodes, Abc_AigConst1(pNtk) );
Abc_NtkForEachPi( pNtk, pObj, i )
Vec_PtrPush( vNodes, pObj );
if ( fFpga )
diff --git a/src/base/seq/seqUtil.c b/src/base/seq/seqUtil.c
index 39fde28e..af2a0a7a 100644
--- a/src/base/seq/seqUtil.c
+++ b/src/base/seq/seqUtil.c
@@ -476,7 +476,7 @@ int Seq_MapComputeAreaFlows( Abc_Ntk_t * pNtk, int fVerbose )
void Seq_NtkReachNodesFromPos_rec( Abc_Obj_t * pAnd, Vec_Ptr_t * vNodes )
{
// skip if this is a non-PI node
- if ( !Abc_NodeIsAigAnd(pAnd) )
+ if ( !Abc_AigNodeIsAnd(pAnd) )
return;
// skip a visited node
if ( Abc_NodeIsTravIdCurrent(pAnd) )
@@ -505,7 +505,7 @@ void Seq_NtkReachNodesFromPis_rec( Abc_Obj_t * pAnd, Vec_Ptr_t * vNodes )
Abc_Obj_t * pFanout;
int k;
// skip if this is a non-PI node
- if ( !Abc_NodeIsAigAnd(pAnd) )
+ if ( !Abc_AigNodeIsAnd(pAnd) )
return;
// skip a visited node
if ( Abc_NodeIsTravIdCurrent(pAnd) )
@@ -546,7 +546,7 @@ Vec_Ptr_t * Seq_NtkReachNodes( Abc_Ntk_t * pNtk, int fFromPos )
else
{
// tranvers the reverse cone of the constant node
- pObj = Abc_NtkConst1( pNtk );
+ pObj = Abc_AigConst1( pNtk );
Abc_ObjForEachFanout( pObj, pFanout, k )
Seq_NtkReachNodesFromPis_rec( pFanout, vNodes );
// tranvers the reverse cone of the PIs