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author | Alan Mishchenko <alanmi@berkeley.edu> | 2012-02-17 13:19:09 -0800 |
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committer | Alan Mishchenko <alanmi@berkeley.edu> | 2012-02-17 13:19:09 -0800 |
commit | ee9f66e2c4dba55e5ab4c7ce16223054b291d5fb (patch) | |
tree | 4bbd0d53e29589963f061a0cb5a965dd8efe57e7 /src/base/main/mainInt.h | |
parent | f2a413029ca91c8fadf8b23d8eb5b4ab2dc8aea4 (diff) | |
download | abc-ee9f66e2c4dba55e5ab4c7ce16223054b291d5fb.tar.gz abc-ee9f66e2c4dba55e5ab4c7ce16223054b291d5fb.tar.bz2 abc-ee9f66e2c4dba55e5ab4c7ce16223054b291d5fb.zip |
Isomorphism checking code.
Diffstat (limited to 'src/base/main/mainInt.h')
-rw-r--r-- | src/base/main/mainInt.h | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/src/base/main/mainInt.h b/src/base/main/mainInt.h index 979d376c..2eca004e 100644 --- a/src/base/main/mainInt.h +++ b/src/base/main/mainInt.h @@ -90,10 +90,11 @@ struct Abc_Frame_t_ void * pLibVer; // the current Verilog library // new code - Gia_Man_t * pGia; - Gia_Man_t * pGia2; - Abc_Cex_t * pCex; - Vec_Ptr_t * vCexVec; + Gia_Man_t * pGia; // alternative current network as a light-weight AIG + Gia_Man_t * pGia2; // copy of the above + Abc_Cex_t * pCex; // a counter-example to fail the current network + Vec_Ptr_t * vCexVec; // a vector of counter-examples if more than one PO fails + Vec_Ptr_t * vPoEquivs; // equivalence classes of isomorphic primary outputs void * pSave1; void * pSave2; |