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authorAlan Mishchenko <alanmi@berkeley.edu>2010-11-01 01:35:04 -0700
committerAlan Mishchenko <alanmi@berkeley.edu>2010-11-01 01:35:04 -0700
commit6130e39b18b5f53902e4eab14f6d5cdde5219563 (patch)
tree0db0628479a1b750e9af1f66cb8379ebd0913d31 /src/base/io/ioReadVerilog.c
parentf0e77f6797c0504b0da25a56152b707d3357f386 (diff)
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initial commit of public abc
Diffstat (limited to 'src/base/io/ioReadVerilog.c')
-rw-r--r--src/base/io/ioReadVerilog.c10
1 files changed, 8 insertions, 2 deletions
diff --git a/src/base/io/ioReadVerilog.c b/src/base/io/ioReadVerilog.c
index 9847c2da..94147745 100644
--- a/src/base/io/ioReadVerilog.c
+++ b/src/base/io/ioReadVerilog.c
@@ -19,12 +19,16 @@
***********************************************************************/
#include "ioAbc.h"
+#include "ver.h"
+
+ABC_NAMESPACE_IMPL_START
+
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
-extern Abc_Lib_t * Ver_ParseFile( char * pFileName, Abc_Lib_t * pGateLib, int fCheck, int fUseMemMan );
+//extern Abc_Lib_t * Ver_ParseFile( char * pFileName, Abc_Lib_t * pGateLib, int fCheck, int fUseMemMan );
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
@@ -54,7 +58,7 @@ Abc_Ntk_t * Io_ReadVerilog( char * pFileName, int fCheck )
// detect top-level model
RetValue = Abc_LibFindTopLevelModels( pDesign );
- pNtk = Vec_PtrEntry( pDesign->vTops, 0 );
+ pNtk = (Abc_Ntk_t *)Vec_PtrEntry( pDesign->vTops, 0 );
if ( RetValue > 1 )
printf( "Warning: The design has %d root-level modules. The first one (%s) will be used.\n",
Vec_PtrSize(pDesign->vTops), pNtk->pName );
@@ -88,3 +92,5 @@ Abc_Ntk_t * Io_ReadVerilog( char * pFileName, int fCheck )
+ABC_NAMESPACE_IMPL_END
+