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authorAlan Mishchenko <alanmi@berkeley.edu>2009-02-20 08:01:00 -0800
committerAlan Mishchenko <alanmi@berkeley.edu>2009-02-20 08:01:00 -0800
commitc03f9b516bed2c06ec2bfc78617eba5fc9a11c32 (patch)
tree58b8a5447d5ae7554fd5e9599f1fbe5a4f072617 /src/aig/ssw
parent28d4f8696dd2cf60f71fca5d83e5f038678f4828 (diff)
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Version abc90220
Diffstat (limited to 'src/aig/ssw')
-rw-r--r--src/aig/ssw/sswCore.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/aig/ssw/sswCore.c b/src/aig/ssw/sswCore.c
index 485a5146..16430ace 100644
--- a/src/aig/ssw/sswCore.c
+++ b/src/aig/ssw/sswCore.c
@@ -50,7 +50,7 @@ void Ssw_ManSetDefaultParams( Ssw_Pars_t * p )
p->nBTLimit = 1000; // conflict limit at a node
p->nBTLimitGlobal = 5000000; // conflict limit for all runs
p->nMinDomSize = 100; // min clock domain considered for optimization
- p->nItersStop = 0; // stop after the given number of iterations
+ p->nItersStop = -1; // stop after the given number of iterations
p->nResimDelta = 1000; // the internal of nodes to resimulate
p->fPolarFlip = 0; // uses polarity adjustment
p->fLatchCorr = 0; // performs register correspondence
@@ -199,7 +199,7 @@ clk = clock();
if ( !RetValue )
break;
- if ( p->pPars->nItersStop && p->pPars->nItersStop == nIter )
+ if ( p->pPars->nItersStop >= 0 && p->pPars->nItersStop == nIter )
{
Aig_Man_t * pSRed = Ssw_SpeculativeReduction( p );
Aig_ManDumpBlif( pSRed, "srm.blif", NULL, NULL );