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authorAlan Mishchenko <alanmi@berkeley.edu>2013-05-27 15:09:23 -0700
committerAlan Mishchenko <alanmi@berkeley.edu>2013-05-27 15:09:23 -0700
commit19c25fd6aab057b2373717f996fe538507c1b1e1 (patch)
tree7aa7cd7609a5de31d11b3455b6388fd9300c8d0f /src/aig/saig/saigSimMv.c
parent94356f0d1fa8e671303299717f631ecf0ca2f17e (diff)
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Adding a wrapper around clock() for more accurate time counting in ABC.
Diffstat (limited to 'src/aig/saig/saigSimMv.c')
-rw-r--r--src/aig/saig/saigSimMv.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/aig/saig/saigSimMv.c b/src/aig/saig/saigSimMv.c
index 71259930..3621cdd3 100644
--- a/src/aig/saig/saigSimMv.c
+++ b/src/aig/saig/saigSimMv.c
@@ -882,13 +882,13 @@ Vec_Ptr_t * Saig_MvManSimulate( Aig_Man_t * pAig, int nFramesSymb, int nFramesSa
Saig_MvMan_t * p;
Saig_MvObj_t * pEntry;
int f, i, iState;
- clock_t clk = clock();
+ abctime clk = Abc_Clock();
assert( nFramesSymb >= 1 && nFramesSymb <= nFramesSatur );
// start manager
p = Saig_MvManStart( pAig, nFramesSatur );
if ( fVerbose )
-ABC_PRT( "Constructing the problem", clock() - clk );
+ABC_PRT( "Constructing the problem", Abc_Clock() - clk );
// initialize registers
Vec_PtrForEachEntry( Saig_MvObj_t *, p->vFlops, pEntry, i )
@@ -897,7 +897,7 @@ ABC_PRT( "Constructing the problem", clock() - clk );
if ( fVeryVerbose )
Saig_MvPrintState( 0, p );
// simulate until convergence
- clk = clock();
+ clk = Abc_Clock();
for ( f = 0; ; f++ )
{
if ( f == nFramesSatur )
@@ -937,7 +937,7 @@ ABC_PRT( "Constructing the problem", clock() - clk );
}
// printf( "Coverged after %d frames.\n", f );
if ( fVerbose )
-ABC_PRT( "Multi-valued simulation", clock() - clk );
+ABC_PRT( "Multi-valued simulation", Abc_Clock() - clk );
// implement equivalences
// Saig_MvManPostProcess( p, iState-1 );
vMap = Saig_MvManDeriveMap( p, fVerbose );