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| author | Alan Mishchenko <alanmi@berkeley.edu> | 2012-08-31 00:05:10 -0700 |
|---|---|---|
| committer | Alan Mishchenko <alanmi@berkeley.edu> | 2012-08-31 00:05:10 -0700 |
| commit | a49ba2d2806f96121f1fdd5c37ff2f6e369b9762 (patch) | |
| tree | 0e67a5f8c30b7ab2aea3ff5f4935eabfcf70350f | |
| parent | 5a009b677411e34c94b4bf379d2f01a0f1487de0 (diff) | |
| download | abc-a49ba2d2806f96121f1fdd5c37ff2f6e369b9762.tar.gz abc-a49ba2d2806f96121f1fdd5c37ff2f6e369b9762.tar.bz2 abc-a49ba2d2806f96121f1fdd5c37ff2f6e369b9762.zip | |
Fixing the way constants are written into mapped Verilog files.
| -rw-r--r-- | src/base/io/ioWriteVerilog.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/base/io/ioWriteVerilog.c b/src/base/io/ioWriteVerilog.c index ae233879..0b5ad269 100644 --- a/src/base/io/ioWriteVerilog.c +++ b/src/base/io/ioWriteVerilog.c @@ -523,6 +523,11 @@ void Io_WriteVerilogObjects( FILE * pFile, Abc_Ntk_t * pNtk ) { Mio_Gate_t * pGate = (Mio_Gate_t *)pObj->pData; Mio_Pin_t * pGatePin; + if ( Abc_ObjFaninNum(pObj) == 0 ) + { + fprintf( pFile, " %-*s %s = 1\'b%d;\n", Length, "assign", Io_WriteVerilogGetName(Abc_ObjName( Abc_ObjFanout0(pObj) )), !strcmp(Mio_GateReadName(pGate), "_const1_") ); + continue; + } // write the node fprintf( pFile, " %-*s g%0*d", Length, Mio_GateReadName(pGate), nDigits, Counter++ ); fprintf( pFile, "(" ); |