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| author | Alan Mishchenko <alanmi@berkeley.edu> | 2015-02-18 09:18:01 -0800 |
|---|---|---|
| committer | Alan Mishchenko <alanmi@berkeley.edu> | 2015-02-18 09:18:01 -0800 |
| commit | 874d394089932a50cc3d9797018f2c398e74444e (patch) | |
| tree | 10c0c9997c17bb5db2bb05ac11911691541b9e72 | |
| parent | 525137926db6a6c4dce90d35d1ce233d6a0cf27a (diff) | |
| download | abc-874d394089932a50cc3d9797018f2c398e74444e.tar.gz abc-874d394089932a50cc3d9797018f2c398e74444e.tar.bz2 abc-874d394089932a50cc3d9797018f2c398e74444e.zip | |
Corner case bug in wire-cap estimation.
| -rw-r--r-- | src/map/scl/sclLoad.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/map/scl/sclLoad.c b/src/map/scl/sclLoad.c index a30a411e..0032ed33 100644 --- a/src/map/scl/sclLoad.c +++ b/src/map/scl/sclLoad.c @@ -56,6 +56,8 @@ Vec_Flt_t * Abc_SclFindWireCaps( SC_WireLoad * pWL, int nFanoutMax ) vCaps = Vec_FltStart( Abc_MaxInt(nFanoutMax, EntryMax) + 1 ); Vec_IntForEachEntry( pWL->vFanout, Entry, i ) Vec_FltWriteEntry( vCaps, Entry, Vec_FltEntry(pWL->vLen, i) * pWL->cap ); + if ( Vec_FltEntry(vCaps, 1) == 0 ) + return vCaps; // interpolate between the values assert( Vec_FltEntry(vCaps, 1) != 0 ); iPrev = 1; |