GEN_VSRCS=${IPS:%.vhdl=${BUILD}/%.vhd}
QIP=${GEN_VSRCS:%.vhd=%.qip}

BASE=${BUILD}/${DESIGN_NAME}
QSF=${BASE}.qsf
QPF=${BASE}.qpf
MAP=${BUILD}/${OF}/$(PROJECT).map.rpt
FIT=${BUILD}/${OF}/$(PROJECT).fit.rpt
ASM=${BUILD}/${OF}/$(PROJECT).asm.rpt
ASM=${BUILD}/${OF}/$(PROJECT).sta.rpt
SOF=${BUILD}/${OF}/${PROJECT}.sof
COF=${BUILD}/${OF}/${PROJECT}.cof
JIC=${BUILD}/${OF}/${PROJECT}.jic
CDF=${BUILD}/${OF}/${PROJECT}.cdf
SVF=${BUILD}/${PROJECT}.svf
PSVF=${BUILD}/${PROJECT}-p.svf

default:${SVF} #${PSVF}
	echo ${PSVF}


${BUILD}/%.vhd ${BUILD}/%.qip:%.vhdl
	cat $< > ${BUILD}/${<:%.vhdl=%.vhd}
	(cd ${BUILD} && ../scripts/run_in_x run_quartus qmegawiz -silent $(call relpath,${BUILD}/${<:%.vhdl=%.vhd},${BUILD}))


${QSF}: ${PRJ} ${DESIGN_NAME}.${BOARD}_qsft
	mkdir -p ${BUILD}
	rm -f  $@
	echo 'set_global_assignment -name TOP_LEVEL_ENTITY ${TOP}' >> $@
	echo 'set_global_assignment -name FAMILY "${FAMILY}"' >> $@
	echo 'set_global_assignment -name PROJECT_OUTPUT_DIRECTORY ${OF}' >> $@
	echo 'set_global_assignment -name DEVICE ${PART}' >> $@
	cat  ${DESIGN_NAME}.${BOARD}_qsft >> $@
	for file in ${GEN_VSRCS} ${VSRCS}; do \
	echo "set_global_assignment -name VHDL_FILE $$(realpath -m --relative-to=${BUILD} $${file})" >> $@; \
	done



${QPF}:
	mkdir -p ${BUILD}
	rm -f $@
	echo 'PROJECT_REVISION = "${TOP}"' > $@


map: ${MAP}
${MAP}: ${VSRCS} ${QPF} ${QSF} ${GEN_VSRCS}  ${QIP}
	(cd ${BUILD} && run_quartus quartus_map $(MAP_ARGS) ${PROJECT}) 

fit: ${FIT}
${FIT}:${MAP}
	(cd ${BUILD} && run_quartus quartus_fit $(FIT_ARGS) $(PROJECT))

asm: ${ASM}
sof: ${ASM}
${SOF} ${ASM}:${FIT}
	(cd ${BUILD} && run_quartus quartus_asm $(ASM_ARGS) $(PROJECT))

sta: ${STA}
${STA}:${FIT}
	(cd ${BUILD} && run_quartus quartus_sta $(STA_ARGS) $(PROJECT))


svf:${SVF}
${SVF}:${SOF}
	(cd ${BUILD} && run_quartus quartus_cpf ${CPF_ARGS} $(call relpath,$<,${BUILD}) $(call relpath,$@,${BUILD}) )

${JIC}:${SOF} 
	(cd ${BUILD} && run_quartus quartus_cpf -c  -s ${PART} -d ${CPART} $(call relpath,$<,${BUILD}) $(call relpath,$@,${BUILD}) )


${CDF}:${JIC}
	echo 'JedecChain;' > $@
	echo '	FileRevision(JESD32A);' >> $@
	echo '	DefaultMfr(6E);' >> $@
	echo '' >> $@
	echo '	P ActionCode(Ign)' >> $@
	echo '          Device PartName(EP4CE15F23) Path("$(call abspath,build_loader/output_files)/") File("flash_loader.sof") MfrSpec(OpMask(1) SEC_Device(EPCS16) Child_OpMask(1 1) SFLPath("$(call abspath,${JIC})"));' >> $@
	echo '' >> $@
	echo 'ChainEnd;' >> $@
	echo '' >> $@
	echo 'AlteraBegin;' >> $@
	echo '	ChainType(JTAG);' >> $@
	echo 'AlteraEnd;' >> $@

${PSVF}:${CDF}
	(cd ${BUILD} && run_quartus quartus_cpf ${CPF_ARGS} $(call relpath,$<,${BUILD}) $(call relpath,$@,${BUILD}) )



tidy:
	git diff --exit-code -s ${VSRCS}	
	for i in ${VSRCS}; do /bin/cp -f $$i $$i.orig && scripts/vhdl-pretty < $$i.orig > $$i; done



#
#
##OPENOCD=openocd -f interface/altera-usb-blaster.cfg -f cpld/altera-epm240.cfg
#
#FIT_ARGS = 
#ASM_ARGS =
#
#SVF=${PROJECT}.svf
#
#
#
#default: ${SVF}
#
#${SVF}: ${BUILD}/${PROJECT}.svf
#	cat $< > $@ || /bin/rm -f $@
#
#program: ${SVF}
#	${OPENOCD} -c "init; svf $<; exit"
#
#all: ${BUILD}/$(PROJECT).asm.rpt ${BUILD}/$(PROJECT).sta.rpt  ${BUILD}/${PROJECT}.svf
#
clean:
	rm -rf db ${BUILD} *.orig *.bak incremental_db db

#
#
#
#
#
#

#tidy:
#	for i in ${SOURCE_FILES}; do /bin/cp -f $$i $$i.orig && scripts/vhdl-pretty < $$i.orig > $$i; done
#
#

.PRECIOUS: