From bc24ae901b74c5b673837d7f83423c1f7aa45c29 Mon Sep 17 00:00:00 2001 From: James McKenzie Date: Fri, 18 Apr 2025 12:37:26 +0100 Subject: fish --- smh-ac415-fpga/examples/01_led/led/led.qpf | 30 +++++++++++++ smh-ac415-fpga/examples/01_led/led/led.qsf | 65 +++++++++++++++++++++++++++++ smh-ac415-fpga/examples/01_led/led/led.qws | Bin 0 -> 1287 bytes smh-ac415-fpga/examples/01_led/led/led.v | 21 ++++++++++ 4 files changed, 116 insertions(+) create mode 100644 smh-ac415-fpga/examples/01_led/led/led.qpf create mode 100644 smh-ac415-fpga/examples/01_led/led/led.qsf create mode 100644 smh-ac415-fpga/examples/01_led/led/led.qws create mode 100644 smh-ac415-fpga/examples/01_led/led/led.v (limited to 'smh-ac415-fpga/examples/01_led/led') diff --git a/smh-ac415-fpga/examples/01_led/led/led.qpf b/smh-ac415-fpga/examples/01_led/led/led.qpf new file mode 100644 index 0000000..5592af6 --- /dev/null +++ b/smh-ac415-fpga/examples/01_led/led/led.qpf @@ -0,0 +1,30 @@ +# -------------------------------------------------------------------------- # +# +# Copyright (C) 1991-2013 Altera Corporation +# Your use of Altera Corporation's design tools, logic functions +# and other software and tools, and its AMPP partner logic +# functions, and any output files from any of the foregoing +# (including device programming or simulation files), and any +# associated documentation or information are expressly subject +# to the terms and conditions of the Altera Program License +# Subscription Agreement, Altera MegaCore Function License +# Agreement, or other applicable license agreement, including, +# without limitation, that your use is for the sole purpose of +# programming logic devices manufactured by Altera and sold by +# Altera or its authorized distributors. Please refer to the +# applicable agreement for further details. +# +# -------------------------------------------------------------------------- # +# +# Quartus II 64-Bit +# Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version +# Date created = 01:45:54 June 02, 2023 +# +# -------------------------------------------------------------------------- # + +QUARTUS_VERSION = "13.0" +DATE = "01:45:54 June 02, 2023" + +# Revisions + +PROJECT_REVISION = "led" diff --git a/smh-ac415-fpga/examples/01_led/led/led.qsf b/smh-ac415-fpga/examples/01_led/led/led.qsf new file mode 100644 index 0000000..1b5ae22 --- /dev/null +++ b/smh-ac415-fpga/examples/01_led/led/led.qsf @@ -0,0 +1,65 @@ +# -------------------------------------------------------------------------- # +# +# Copyright (C) 1991-2013 Altera Corporation +# Your use of Altera Corporation's design tools, logic functions +# and other software and tools, and its AMPP partner logic +# functions, and any output files from any of the foregoing +# (including device programming or simulation files), and any +# associated documentation or information are expressly subject +# to the terms and conditions of the Altera Program License +# Subscription Agreement, Altera MegaCore Function License +# Agreement, or other applicable license agreement, including, +# without limitation, that your use is for the sole purpose of +# programming logic devices manufactured by Altera and sold by +# Altera or its authorized distributors. Please refer to the +# applicable agreement for further details. +# +# -------------------------------------------------------------------------- # +# +# Quartus II 64-Bit +# Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version +# Date created = 01:45:54 June 02, 2023 +# +# -------------------------------------------------------------------------- # +# +# Notes: +# +# 1) The default values for assignments are stored in the file: +# led_assignment_defaults.qdf +# If this file doesn't exist, see file: +# assignment_defaults.qdf +# +# 2) Altera recommends that you do not modify this file. This +# file is updated automatically by the Quartus II software +# and any changes you make may be lost or overwritten. +# +# -------------------------------------------------------------------------- # + + +set_global_assignment -name FAMILY "Cyclone IV E" +set_global_assignment -name DEVICE EP4CE15F23C8 +set_global_assignment -name TOP_LEVEL_ENTITY led +set_global_assignment -name ORIGINAL_QUARTUS_VERSION "13.0 SP1" +set_global_assignment -name PROJECT_CREATION_TIME_DATE "01:45:54 JUNE 02, 2023" +set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1" +set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files +set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0 +set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85 +set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1 +set_global_assignment -name NOMINAL_CORE_SUPPLY_VOLTAGE 1.2V +set_global_assignment -name VERILOG_FILE led.v +set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top +set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top +set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top +set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V" +set_location_assignment PIN_F12 -to key1 +set_location_assignment PIN_F13 -to key2 +set_location_assignment PIN_F14 -to key3 +set_location_assignment PIN_F15 -to key4 +set_location_assignment PIN_U20 -to key5 +set_location_assignment PIN_AB16 -to led1 +set_location_assignment PIN_AA17 -to led2 +set_location_assignment PIN_AA21 -to led3 +set_location_assignment PIN_W22 -to led4 +set_location_assignment PIN_W17 -to led5 +set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top \ No newline at end of file diff --git a/smh-ac415-fpga/examples/01_led/led/led.qws b/smh-ac415-fpga/examples/01_led/led/led.qws new file mode 100644 index 0000000..5433526 Binary files /dev/null and b/smh-ac415-fpga/examples/01_led/led/led.qws differ diff --git a/smh-ac415-fpga/examples/01_led/led/led.v b/smh-ac415-fpga/examples/01_led/led/led.v new file mode 100644 index 0000000..6c849bc --- /dev/null +++ b/smh-ac415-fpga/examples/01_led/led/led.v @@ -0,0 +1,21 @@ +module led( +input key1, +input key2, +input key3, +input key4, +input key5, +output led1, +output led2, +output led3, +output led4, +output led5 + ); + + assign led1=key1; + assign led2=key2; + assign led3=key3; + assign led4=key4; + assign led5=key5; + + +endmodule \ No newline at end of file -- cgit v1.2.3