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| author | root <root@new-fish.medaka.james.internal> | 2025-12-08 17:49:12 +0000 |
|---|---|---|
| committer | root <root@new-fish.medaka.james.internal> | 2025-12-08 17:49:12 +0000 |
| commit | 271f0539b50e024b6b0f79d2d550b6457a979f23 (patch) | |
| tree | f6cf35274fec5dc7d11c03e660149b7eaab3953a | |
| parent | c3b18e3ff5ed5e1e028dbe1052c977f46d913805 (diff) | |
| download | hp_instrument_lcds-master.tar.gz hp_instrument_lcds-master.tar.bz2 hp_instrument_lcds-master.zip | |
| -rw-r--r-- | fpga/ebaz4205/Makefile | 2 | ||||
| -rw-r--r-- | fpga/ebaz4205/src/ebaz4205-zynq7.dts | 6 | ||||
| -rw-r--r-- | fpga/hp_lcd_driver/ebaz4205.xdc | 16 | ||||
| -rw-r--r-- | fpga/hp_lcd_driver/zynq7_wrapper.vhdl | 36 |
4 files changed, 30 insertions, 30 deletions
diff --git a/fpga/ebaz4205/Makefile b/fpga/ebaz4205/Makefile index 4c02b0f..fb05b0d 100644 --- a/fpga/ebaz4205/Makefile +++ b/fpga/ebaz4205/Makefile @@ -8,7 +8,7 @@ LD=linux-6.16.4 FD=../hp_lcd_driver DP=${DIP}:/boot/uboot/ -DIP=10.16.66.234 +DIP=10.16.66.224 VIVO=${FD}/build_ebaz4205/out/hp_lcd_driver.bin diff --git a/fpga/ebaz4205/src/ebaz4205-zynq7.dts b/fpga/ebaz4205/src/ebaz4205-zynq7.dts index 2f70a82..a7b1ff2 100644 --- a/fpga/ebaz4205/src/ebaz4205-zynq7.dts +++ b/fpga/ebaz4205/src/ebaz4205-zynq7.dts @@ -34,7 +34,8 @@ status = "okay"; reg = <0x80000000 0x1000>; reg-shift = <2>; - clock-frequency = <1843200>; + clock-frequency = <50000000>; + //clock-frequency = <1843200>; #address-cells = <1>; #size-cells = <1>; iinterrupt-parent = <&intc>; @@ -45,7 +46,8 @@ status = "okay"; reg = <0x80001000 0x1000>; reg-shift = <2>; - clock-frequency = <1843200>; + clock-frequency = <50000000>; + //clock-frequency = <1843200>; #address-cells = <1>; #size-cells = <1>; iinterrupt-parent = <&intc>; diff --git a/fpga/hp_lcd_driver/ebaz4205.xdc b/fpga/hp_lcd_driver/ebaz4205.xdc index 9d345be..a74beb6 100644 --- a/fpga/hp_lcd_driver/ebaz4205.xdc +++ b/fpga/hp_lcd_driver/ebaz4205.xdc @@ -117,14 +117,14 @@ set_property IOSTANDARD LVCMOS33 [get_ports {hsync_in}] #set_property PULLTYPE PULLUP [get_ports {sys_rst_n}] # -set_property PACKAGE_PIN M19 [get_ports {u1_tx}]; #data3-5 -set_property IOSTANDARD LVCMOS33 [get_ports {u1_tx}] -set_property PACKAGE_PIN N20 [get_ports {u0_tx}]; #data3-6 -set_property IOSTANDARD LVCMOS33 [get_ports {u0_tx}] -set_property PACKAGE_PIN P18 [get_ports {u1_rx}]; #data3-7 -set_property IOSTANDARD LVCMOS33 [get_ports {u1_rx}] -set_property PACKAGE_PIN M17 [get_ports {u0_rx}]; #data3-8 -set_property IOSTANDARD LVCMOS33 [get_ports {u0_rx}] +set_property PACKAGE_PIN M19 [get_ports {scope_rx}]; #data3-5 +set_property IOSTANDARD LVCMOS33 [get_ports {scope_rx}] +set_property PACKAGE_PIN N20 [get_ports {kbd_rx}]; #data3-6 +set_property IOSTANDARD LVCMOS33 [get_ports {kbd_rx}] +set_property PACKAGE_PIN P18 [get_ports {scope_tx}]; #data3-7 +set_property IOSTANDARD LVCMOS33 [get_ports {scope_tx}] +set_property PACKAGE_PIN M17 [get_ports {kbd_tx}]; #data3-8 +set_property IOSTANDARD LVCMOS33 [get_ports {kbd_tx}] set_property PACKAGE_PIN M20 [get_ports {scope_ch1}]; #data2-19 set_property IOSTANDARD LVCMOS33 [get_ports {scope_ch1}] diff --git a/fpga/hp_lcd_driver/zynq7_wrapper.vhdl b/fpga/hp_lcd_driver/zynq7_wrapper.vhdl index 8efbbb5..18dfe0f 100644 --- a/fpga/hp_lcd_driver/zynq7_wrapper.vhdl +++ b/fpga/hp_lcd_driver/zynq7_wrapper.vhdl @@ -91,10 +91,10 @@ entity zynq7_wrapper is hdmi_b_n : out std_logic; hdmi_vcc : out std_logic; - u0_tx : out std_logic; - u0_rx : in std_logic; - u1_tx : out std_logic; - u1_rx : in std_logic; + kbd_rx : out std_logic; + kbd_tx : in std_logic; + scope_rx : out std_logic; + scope_tx : in std_logic; scope_ch1 : out std_logic ); @@ -240,13 +240,10 @@ architecture arch of zynq7_wrapper is signal overlay_g : std_logic_vector(7 downto 0); signal overlay_b : std_logic_vector(7 downto 0); +signal u0_tx :std_logic; +signal u1_tx :std_logic; --- signal u0_t0 : std_logic; --- signal u0_t1 : std_logic; --- signal u1_t0 : std_logic; --- signal u1_t1 : std_logic; - - + signal interpose_keyboard : std_logic; begin @@ -615,23 +612,21 @@ begin s_axi_rdata => gp1_rdata, u0_tx => u0_tx, - u0_rx => u0_rx, + u0_rx => kbd_tx, u1_tx => u1_tx, - u1_rx => u1_rx, + u1_rx => scope_tx, u0_int => pl_irqs(0), u1_int => pl_irqs(1) ); + --- u0_t1 <= u0_rx and u0_t0; --- u1_t1 <= u1_rx and u1_t0; - --- u1_tx <= u0_rx; --- u0_tx <= u1_rx; - - + scope_rx <= kbd_tx and u1_tx when interpose_keyboard = '0' + else u1_tx; + kbd_rx <= scope_tx and u0_tx when interpose_keyboard = '0' + else u0_tx; hp0_araddr <= (others => '0'); hp0_arvalid <= '0'; @@ -649,6 +644,9 @@ begin run <= emio_o(2); overlay_off <= emio_o(3); overlay_on <= emio_o(4); + interpose_keyboard <= emio_o(5); + + end architecture arch; |