connectbot-yubikey/open-keychain - open-keychain with patches to support ssh authentication

diff options

Diffstat (limited to 'OpenKeychain')

-rw-r--r--

OpenKeychain/src/main/java/org/sufficientlysecure/keychain/ui/EncryptTextActivity.java

1 files changed, 34 insertions, 6 deletions

/* * This file is part of the flashrom project. * * Copyright (C) 2000 Silicon Integrated System Corporation * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com> * Copyright (C) 2005-2009 coresystems GmbH * Copyright (C) 2006-2009 Carl-Daniel Hailfinger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #ifndef __PROGRAMMER_H__ #define __PROGRAMMER_H__ 1 #include <stdint.h> #include "flash.h" /* for chipaddr and flashctx */ enum programmer { #if CONFIG_INTERNAL == 1 PROGRAMMER_INTERNAL, #endif #if CONFIG_DUMMY == 1 PROGRAMMER_DUMMY, #endif #if CONFIG_MEC1308 == 1 PROGRAMMER_MEC1308, #endif #if CONFIG_NIC3COM == 1 PROGRAMMER_NIC3COM, #endif #if CONFIG_NICREALTEK == 1 PROGRAMMER_NICREALTEK, #endif #if CONFIG_NICNATSEMI == 1 PROGRAMMER_NICNATSEMI, #endif #if CONFIG_GFXNVIDIA == 1 PROGRAMMER_GFXNVIDIA, #endif #if CONFIG_RAIDEN_DEBUG_SPI == 1 PROGRAMMER_RAIDEN_DEBUG_SPI, #endif #if CONFIG_DRKAISER == 1 PROGRAMMER_DRKAISER, #endif #if CONFIG_SATASII == 1 PROGRAMMER_SATASII, #endif #if CONFIG_ATAHPT == 1 PROGRAMMER_ATAHPT, #endif #if CONFIG_ATAVIA == 1 PROGRAMMER_ATAVIA, #endif #if CONFIG_ATAPROMISE == 1 PROGRAMMER_ATAPROMISE, #endif #if CONFIG_IT8212 == 1 PROGRAMMER_IT8212, #endif #if CONFIG_FT2232_SPI == 1 PROGRAMMER_FT2232_SPI, #endif #if CONFIG_SERPROG == 1 PROGRAMMER_SERPROG, #endif #if CONFIG_BUSPIRATE_SPI == 1 PROGRAMMER_BUSPIRATE_SPI, #endif #if CONFIG_DEDIPROG == 1 PROGRAMMER_DEDIPROG, #endif #if CONFIG_DEVELOPERBOX_SPI == 1 PROGRAMMER_DEVELOPERBOX_SPI, #endif #if CONFIG_ENE_LPC == 1 PROGRAMMER_ENE_LPC, #endif #if CONFIG_RAYER_SPI == 1 PROGRAMMER_RAYER_SPI, #endif #if CONFIG_PONY_SPI == 1 PROGRAMMER_PONY_SPI, #endif #if CONFIG_NICINTEL == 1 PROGRAMMER_NICINTEL, #endif #if CONFIG_NICINTEL_SPI == 1 PROGRAMMER_NICINTEL_SPI, #endif #if CONFIG_NICINTEL_EEPROM == 1 PROGRAMMER_NICINTEL_EEPROM, #endif #if CONFIG_OGP_SPI == 1 PROGRAMMER_OGP_SPI, #endif #if CONFIG_SATAMV == 1 PROGRAMMER_SATAMV, #endif #if CONFIG_LINUX_MTD == 1 PROGRAMMER_LINUX_MTD, #endif #if CONFIG_LINUX_SPI == 1 PROGRAMMER_LINUX_SPI, #endif #if CONFIG_USBBLASTER_SPI == 1 PROGRAMMER_USBBLASTER_SPI, #endif #if CONFIG_MSTARDDC_SPI == 1 PROGRAMMER_MSTARDDC_SPI, #endif #if CONFIG_PICKIT2_SPI == 1 PROGRAMMER_PICKIT2_SPI, #endif #if CONFIG_CH341A_SPI == 1 PROGRAMMER_CH341A_SPI, #endif #if CONFIG_DIGILENT_SPI == 1 PROGRAMMER_DIGILENT_SPI, #endif #if CONFIG_JLINK_SPI == 1 PROGRAMMER_JLINK_SPI, #endif #if CONFIG_NI845X_SPI == 1 PROGRAMMER_NI845X_SPI, #endif #if CONFIG_STLINKV3_SPI == 1 PROGRAMMER_STLINKV3_SPI, #endif #if CONFIG_LSPCON_I2C_SPI == 1 PROGRAMMER_LSPCON_I2C_SPI, #endif #if CONFIG_REALTEK_MST_I2C_SPI == 1 PROGRAMMER_REALTEK_MST_I2C_SPI, #endif PROGRAMMER_INVALID /* This must always be the last entry. */ }; enum programmer_type { PCI = 1, /* to detect uninitialized values */ USB, OTHER, }; struct dev_entry { uint16_t vendor_id; uint16_t device_id; const enum test_state status; const char *vendor_name; const char *device_name; }; struct programmer_entry { const char *name; const enum programmer_type type; union { const struct dev_entry *const dev; const char *const note; } devs; int (*init) (void); void *(*map_flash_region) (const char *descr, uintptr_t phys_addr, size_t len); void (*unmap_flash_region) (void *virt_addr, size_t len); void (*delay) (unsigned int usecs); }; extern const struct programmer_entry programmer_table[]; int programmer_init(enum programmer prog, const char *param); int programmer_shutdown(void); struct bitbang_spi_master { /* Note that CS# is active low, so val=0 means the chip is active. */ void (*set_cs) (int val); void (*set_sck) (int val); void (*set_mosi) (int val); int (*get_miso) (void); void (*request_bus) (void); void (*release_bus) (void); /* optional functions to optimize xfers */ void (*set_sck_set_mosi) (int sck, int mosi); int (*set_sck_get_miso) (int sck); /* Length of half a clock period in usecs. */ unsigned int half_period; }; #if NEED_PCI == 1 struct pci_dev; /* pcidev.c */ // FIXME: This needs to be local, not global(?) extern struct pci_access *pacc; int pci_init_common(void); uintptr_t pcidev_readbar(struct pci_dev *dev, int bar); struct pci_dev *pcidev_init(const struct dev_entry *devs, int bar); /* rpci_write_* are reversible writes. The original PCI config space register * contents will be restored on shutdown. * To clone the pci_dev instances internally, the `pacc` global * variable has to reference a pci_access method that is compatible * with the given pci_dev handle. The referenced pci_access (not * the variable) has to stay valid until the shutdown handlers are * finished. */ int rpci_write_byte(struct pci_dev *dev, int reg, uint8_t data); int rpci_write_word(struct pci_dev *dev, int reg, uint16_t data); int rpci_write_long(struct pci_dev *dev, int reg, uint32_t data); #endif #if CONFIG_INTERNAL == 1 struct penable { uint16_t vendor_id; uint16_t device_id; enum chipbustype buses; const enum test_state status; const char *vendor_name; const char *device_name; int (*doit) (struct pci_dev *dev, const char *name); }; extern const struct penable chipset_enables[]; enum board_match_phase { P1, P2, P3 }; struct board_match { /* Any device, but make it sensible, like the ISA bridge. */ uint16_t first_vendor; uint16_t first_device; uint16_t first_card_vendor; uint16_t first_card_device; /* Any device, but make it sensible, like * the host bridge. May be NULL. */ uint16_t second_vendor; uint16_t second_device; uint16_t second_card_vendor; uint16_t second_card_device; /* Pattern to match DMI entries. May be NULL. */ const char *dmi_pattern; /* The vendor / part name from the coreboot table. May be NULL. */ const char *lb_vendor; const char *lb_part; enum board_match_phase phase; const char *vendor_name; const char *board_name; int max_rom_decode_parallel; const enum test_state status; int (*enable) (void); /* May be NULL. */ }; extern const struct board_match board_matches[]; struct board_info { const char *vendor; const char *name; const enum test_state working; #ifdef CONFIG_PRINT_WIKI const char *url; const char *note; #endif }; extern const struct board_info boards_known[]; extern const struct board_info laptops_known[]; #endif /* udelay.c */ void myusec_delay(unsigned int usecs); void myusec_calibrate_delay(void); void internal_sleep(unsigned int usecs); void internal_delay(unsigned int usecs); #if CONFIG_INTERNAL == 1 /* board_enable.c */ int selfcheck_board_enables(void); int board_parse_parameter(const char *boardstring, char **vendor, char **model); void w836xx_ext_enter(uint16_t port); void w836xx_ext_leave(uint16_t port); void probe_superio_winbond(void); int it8705f_write_enable(uint8_t port); uint8_t sio_read(uint16_t port, uint8_t reg); void sio_write(uint16_t port, uint8_t reg, uint8_t data); void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask); void board_handle_before_superio(void); void board_handle_before_laptop(void); int board_flash_enable(const char *vendor, const char *model, const char *cb_vendor, const char *cb_model); /* chipset_enable.c */ int chipset_flash_enable(void); /* processor_enable.c */ int processor_flash_enable(void); #endif /* physmap.c */ void *physmap(const char *descr, uintptr_t phys_addr, size_t len); void *rphysmap(const char *descr, uintptr_t phys_addr, size_t len); void *physmap_ro(const char *descr, uintptr_t phys_addr, size_t len); void *physmap_ro_unaligned(const char *descr, uintptr_t phys_addr, size_t len); void physunmap(void *virt_addr, size_t len); void physunmap_unaligned(void *virt_addr, size_t len); #if CONFIG_INTERNAL == 1 int setup_cpu_msr(int cpu); void cleanup_cpu_msr(void); /* cbtable.c */ int cb_parse_table(const char **vendor, const char **model); int cb_check_image(const uint8_t *bios, unsigned int size); /* dmi.c */ #if defined(__i386__) || defined(__x86_64__) extern int has_dmi_support; void dmi_init(void); int dmi_match(const char *pattern); #endif // defined(__i386__) || defined(__x86_64__) /* internal.c */ struct superio { uint16_t vendor; uint16_t port; uint16_t model; }; extern struct superio superios[]; extern int superio_count; #define SUPERIO_VENDOR_NONE 0x0 #define SUPERIO_VENDOR_ITE 0x1 #define SUPERIO_VENDOR_WINBOND 0x2 #endif #if NEED_PCI == 1 struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t devclass); struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device); struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device, uint16_t card_vendor, uint16_t card_device); #endif int rget_io_perms(void); #if CONFIG_INTERNAL == 1 extern int is_laptop; extern int laptop_ok; extern int force_boardenable; extern int force_boardmismatch; void probe_superio(void); int register_superio(struct superio s); extern enum chipbustype internal_buses_supported; int internal_init(void); #endif /* hwaccess.c */ void mmio_writeb(uint8_t val, void *addr); void mmio_writew(uint16_t val, void *addr); void mmio_writel(uint32_t val, void *addr); uint8_t mmio_readb(const void *addr); uint16_t mmio_readw(const void *addr); uint32_t mmio_readl(const void *addr); void mmio_readn(const void *addr, uint8_t *buf, size_t len); void mmio_le_writeb(uint8_t val, void *addr); void mmio_le_writew(uint16_t val, void *addr); void mmio_le_writel(uint32_t val, void *addr); uint8_t mmio_le_readb(const void *addr); uint16_t mmio_le_readw(const void *addr); uint32_t mmio_le_readl(const void *addr); #define pci_mmio_writeb mmio_le_writeb #define pci_mmio_writew mmio_le_writew #define pci_mmio_writel mmio_le_writel #define pci_mmio_readb mmio_le_readb #define pci_mmio_readw mmio_le_readw #define pci_mmio_readl mmio_le_readl void rmmio_writeb(uint8_t val, void *addr); void rmmio_writew(uint16_t val, void *addr); void rmmio_writel(uint32_t val, void *addr); void rmmio_le_writeb(uint8_t val, void *addr); void rmmio_le_writew(uint16_t val, void *addr); void rmmio_le_writel(uint32_t val, void *addr); #define pci_rmmio_writeb rmmio_le_writeb #define pci_rmmio_writew rmmio_le_writew #define pci_rmmio_writel rmmio_le_writel void rmmio_valb(void *addr); void rmmio_valw(void *addr); void rmmio_vall(void *addr); /* dummyflasher.c */ #if CONFIG_DUMMY == 1 int dummy_init(void); void *dummy_map(const char *descr, uintptr_t phys_addr, size_t len); void dummy_unmap(void *virt_addr, size_t len); #endif /* nic3com.c */ #if CONFIG_NIC3COM == 1 int nic3com_init(void); extern const struct dev_entry nics_3com[]; #endif /* gfxnvidia.c */ #if CONFIG_GFXNVIDIA == 1 int gfxnvidia_init(void); extern const struct dev_entry gfx_nvidia[]; #endif /* raiden_debug_spi.c */ #if CONFIG_RAIDEN_DEBUG_SPI == 1 int raiden_debug_spi_init(void); extern const struct dev_entry devs_raiden[]; #endif /* drkaiser.c */ #if CONFIG_DRKAISER == 1 int drkaiser_init(void); extern const struct dev_entry drkaiser_pcidev[];


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