avr/qmk/uGFX - [no description]

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/* * Miscellaneous process/domain related routines * * Copyright (C) 2004 Hewlett-Packard Co. * Dan Magenheimer (dan.magenheimer@hp.com) * */ #include <xen/config.h> #include <xen/lib.h> #include <xen/errno.h> #include <xen/sched.h> #include <xen/smp.h> #include <asm/ptrace.h> #include <xen/delay.h> #include <linux/efi.h> /* FOR EFI_UNIMPLEMENTED */ #include <asm/sal.h> /* FOR struct ia64_sal_retval */ #include <asm/system.h> #include <asm/io.h> #include <asm/processor.h> #include <asm/desc.h> //#include <asm/ldt.h> #include <xen/irq.h> #include <xen/event.h> #include <asm/regionreg.h> #include <asm/privop.h> #include <asm/vcpu.h> #include <asm/ia64_int.h> #include <asm/hpsim_ssc.h> #include <asm/dom_fw.h> extern unsigned long vcpu_get_itir_on_fault(struct exec_domain *, UINT64); extern struct ia64_sal_retval pal_emulator_static(UINT64); extern struct ia64_sal_retval sal_emulator(UINT64,UINT64,UINT64,UINT64,UINT64,UINT64,UINT64,UINT64); extern unsigned long dom0_start, dom0_size; #define IA64_PSR_CPL1 (__IA64_UL(1) << IA64_PSR_CPL1_BIT) // note IA64_PSR_PK removed from following, why is this necessary? #define DELIVER_PSR_SET (IA64_PSR_IC | IA64_PSR_I | \ IA64_PSR_DT | IA64_PSR_RT | IA64_PSR_CPL1 | \ IA64_PSR_IT | IA64_PSR_BN) #define DELIVER_PSR_CLR (IA64_PSR_AC | IA64_PSR_DFL | IA64_PSR_DFH | \ IA64_PSR_SP | IA64_PSR_DI | IA64_PSR_SI | \ IA64_PSR_DB | IA64_PSR_LP | IA64_PSR_TB | \ IA64_PSR_CPL | IA64_PSR_MC | IA64_PSR_IS | \ IA64_PSR_ID | IA64_PSR_DA | IA64_PSR_DD | \ IA64_PSR_SS | IA64_PSR_RI | IA64_PSR_ED | IA64_PSR_IA) #define PSCB(x,y) x->vcpu_info->arch.y extern unsigned long vcpu_verbose; long do_iopl(domid_t domain, unsigned int new_io_pl) { dummy(); return 0; } void schedule_tail(struct exec_domain *next) { unsigned long rr7; printk("current=%lx,shared_info=%lx\n",current,current->vcpu_info); printk("next=%lx,shared_info=%lx\n",next,next->vcpu_info); if (rr7 = load_region_regs(current)) { printk("schedule_tail: change to rr7 not yet implemented\n"); } } extern TR_ENTRY *match_tr(struct exec_domain *ed, unsigned long ifa); void tdpfoo(void) { } // given a domain virtual address, pte and pagesize, extract the metaphysical // address, convert the pte for a physical address for (possibly different) // Xen PAGE_SIZE and return modified pte. (NOTE: TLB insert should use // PAGE_SIZE!) unsigned long translate_domain_pte(unsigned long pteval, unsigned long address, unsigned long itir) { struct domain *d = current->domain; unsigned long mask, pteval2, mpaddr; unsigned long lookup_domain_mpa(struct domain *,unsigned long); extern struct domain *dom0; extern unsigned long dom0_start, dom0_size; // FIXME address had better be pre-validated on insert mask = (1L << ((itir >> 2) & 0x3f)) - 1; mpaddr = ((pteval & _PAGE_PPN_MASK) & ~mask) | (address & mask); if (d == dom0) { if (mpaddr < dom0_start || mpaddr >= dom0_start + dom0_size) { //printk("translate_domain_pte: out-of-bounds dom0 mpaddr %p! itc=%lx...\n",mpaddr,ia64_get_itc()); tdpfoo(); } } else if ((mpaddr >> PAGE_SHIFT) > d->max_pages) { printf("translate_domain_pte: bad mpa=%p (> %p),vadr=%p,pteval=%p,itir=%p\n", mpaddr,d->max_pages<<PAGE_SHIFT,address,pteval,itir); tdpfoo(); } pteval2 = lookup_domain_mpa(d,mpaddr); pteval2 &= _PAGE_PPN_MASK; // ignore non-addr bits pteval2 |= _PAGE_PL_2; // force PL0->2 (PL3 is unaffected) pteval2 = (pteval & ~_PAGE_PPN_MASK) | pteval2; return pteval2; } // given a current domain metaphysical address, return the physical address unsigned long translate_domain_mpaddr(unsigned long mpaddr) { extern unsigned long lookup_domain_mpa(struct domain *,unsigned long); unsigned long pteval; if (current->domain == dom0) { if (mpaddr < dom0_start || mpaddr >= dom0_start + dom0_size) { printk("translate_domain_mpaddr: out-of-bounds dom0 mpaddr %p! continuing...\n",mpaddr); tdpfoo(); } } pteval = lookup_domain_mpa(current->domain,mpaddr); return ((pteval & _PAGE_PPN_MASK) | (mpaddr & ~PAGE_MASK)); } void reflect_interruption(unsigned long ifa, unsigned long isr, unsigned long itiriim, struct pt_regs *regs, unsigned long vector) { unsigned long vcpu_get_ipsr_int_state(struct exec_domain *,unsigned long); unsigned long vcpu_get_rr_ve(struct exec_domain *,unsigned long); struct domain *d = current->domain; struct exec_domain *ed = current; if (vector == IA64_EXTINT_VECTOR) { extern unsigned long vcpu_verbose, privop_trace; static first_extint = 1; if (first_extint) { printf("Delivering first extint to domain: ifa=%p, isr=%p, itir=%p, iip=%p\n",ifa,isr,itiriim,regs->cr_iip); //privop_trace = 1; vcpu_verbose = 1; first_extint = 0; } } if (!PSCB(ed,interrupt_collection_enabled)) { if (!(PSCB(ed,ipsr) & IA64_PSR_DT)) { printf("psr.dt off, trying to deliver nested dtlb!\n"); while(1); } vector &= ~0xf; if (vector != IA64_DATA_TLB_VECTOR && vector != IA64_DATA_TLB_VECTOR) { printf("psr.ic off, delivering fault=%lx,iip=%p,isr=%p,PSCB.iip=%p\n", vector,regs->cr_iip,isr,PSCB(ed,iip)); while(1); } //printf("Delivering NESTED DATA TLB fault\n"); vector = IA64_DATA_NESTED_TLB_VECTOR; regs->cr_iip = ((unsigned long) PSCB(ed,iva) + vector) & ~0xffUL; regs->cr_ipsr = (regs->cr_ipsr & ~DELIVER_PSR_CLR) | DELIVER_PSR_SET; // NOTE: nested trap must NOT pass PSCB address //regs->r31 = (unsigned long) &PSCB(ed); return; } if ((vector & 0xf) != IA64_FORCED_IFA) PSCB(ed,ifa) = ifa; else ifa = PSCB(ed,ifa); vector &= ~0xf; // always deliver on ALT vector (for now?) because no VHPT // if (!vcpu_get_rr_ve(ed,ifa)) { if (vector == IA64_DATA_TLB_VECTOR) vector = IA64_ALT_DATA_TLB_VECTOR; else if (vector == IA64_INST_TLB_VECTOR) vector = IA64_ALT_INST_TLB_VECTOR; // } PSCB(ed,unat) = regs->ar_unat; // not sure if this is really needed? PSCB(ed,precover_ifs) = regs->cr_ifs; vcpu_bsw0(ed); PSCB(ed,ipsr) = vcpu_get_ipsr_int_state(ed,regs->cr_ipsr); if (vector == IA64_BREAK_VECTOR || vector == IA64_SPECULATION_VECTOR) PSCB(ed,iim) = itiriim; else PSCB(ed,itir) = vcpu_get_itir_on_fault(ed,ifa); PSCB(ed,isr) = isr; // this is unnecessary except for interrupts! PSCB(ed,iip) = regs->cr_iip; PSCB(ed,ifs) = 0; PSCB(ed,incomplete_regframe) = 0; regs->cr_iip = ((unsigned long) PSCB(ed,iva) + vector) & ~0xffUL; regs->cr_ipsr = (regs->cr_ipsr & ~DELIVER_PSR_CLR) | DELIVER_PSR_SET; // FIXME: NEED TO PASS PSCB, BUT **NOT** IN R31 WHICH IS BEING USED FOR ar.pr // IN ANY CASE, PASS PINNED ADDRESS, NOT THIS ONE //regs->r31 = (unsigned long) &PSCB(ed); PSCB(ed,interrupt_delivery_enabled) = 0; PSCB(ed,interrupt_collection_enabled) = 0; } void foodpi(void) {} // ONLY gets called from ia64_leave_kernel // ONLY call with interrupts disabled?? (else might miss one?) // NEVER successful if already reflecting a trap/fault because psr.i==0 void deliver_pending_interrupt(struct pt_regs *regs) { struct domain *d = current->domain; struct exec_domain *ed = current; // FIXME: Will this work properly if doing an RFI??? if (!is_idle_task(d) && user_mode(regs)) { vcpu_poke_timer(ed); if (vcpu_deliverable_interrupts(ed)) { unsigned long isr = regs->cr_ipsr & IA64_PSR_RI; foodpi(); reflect_interruption(0,isr,0,regs,IA64_EXTINT_VECTOR); } } } int handle_lazy_cover(struct exec_domain *ed, unsigned long isr, struct pt_regs *regs) { if (!PSCB(ed,interrupt_collection_enabled)) { if (isr & IA64_ISR_IR) { // printf("Handling lazy cover\n"); PSCB(ed,ifs) = regs->cr_ifs; PSCB(ed,incomplete_regframe) = 1; regs->cr_ifs = 0; return(1); // retry same instruction with cr.ifs off } } return(0); } #define IS_XEN_ADDRESS(d,a) ((a >= d->xen_vastart) && (a <= d->xen_vaend)) void xen_handle_domain_access(unsigned long address, unsigned long isr, struct pt_regs *regs, unsigned long itir) { struct domain *d = (struct domain *) current->domain; struct domain *ed = (struct exec_domain *) current; TR_ENTRY *trp; unsigned long psr = regs->cr_ipsr, mask, flags; unsigned long iip = regs->cr_iip; // FIXME should validate address here unsigned long pteval, mpaddr; unsigned long lookup_domain_mpa(struct domain *,unsigned long); IA64FAULT fault; extern void __get_domain_bundle(void); // NEED TO HANDLE THREE CASES: // 1) domain is in metaphysical mode // 2) domain address is in TR // 3) domain address is not in TR (reflect data miss) // got here trying to read a privop bundle //if (d->metaphysical_mode) { if (PSCB(current,metaphysical_mode) && !(address>>61)) { //FIXME if (d == dom0) { if (address < dom0_start || address >= dom0_start + dom0_size) { printk("xen_handle_domain_access: out-of-bounds" "dom0 mpaddr %p! continuing...\n",mpaddr); tdpfoo(); } } pteval = lookup_domain_mpa(d,address); //FIXME: check return value? // would be nice to have a counter here vcpu_itc_no_srlz(ed,2,address,pteval,PAGE_SHIFT); return; } if (address < 0x4000) printf("WARNING: page_fault @%p, iip=%p\n",address,iip); if (*(unsigned long *)__get_domain_bundle != iip) { printf("Bad user space access @%p ",address); printf("iip=%p, ipsr=%p, b0=%p\n",iip,psr,regs->b0); while(1); } fault = vcpu_tpa(ed,address,&mpaddr); if (fault != IA64_NO_FAULT) { // this is hardcoded to handle __get_domain_bundle only regs->r8 = 0; regs->r9 = 0; regs->cr_iip += 0x20; //regs->cr_iip |= (2UL << IA64_PSR_RI_BIT); return; } if (d == dom0) { if (mpaddr < dom0_start || mpaddr >= dom0_start + dom0_size) { printk("xen_handle_domain_access: vcpu_tpa returned out-of-bounds dom0 mpaddr %p! continuing...\n",mpaddr); tdpfoo(); } } pteval = lookup_domain_mpa(d,mpaddr); // would be nice to have a counter here //printf("Handling privop data TLB miss\n"); // FIXME, must be inlined or potential for nested fault here! vcpu_itc_no_srlz(ed,2,address,pteval,PAGE_SHIFT); } void ia64_do_page_fault (unsigned long address, unsigned long isr, struct pt_regs *regs, unsigned long itir)


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