/* * vmx_platform.c: handling x86 platform related MMIO instructions * Copyright (c) 2004, Intel Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, * version 2, as published by the Free Software Foundation. * * This program is distributed in the hope it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., 59 Temple * Place - Suite 330, Boston, MA 02111-1307 USA. * */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #if CONFIG_PAGING_LEVELS >= 3 #include #endif #ifdef CONFIG_VMX #define DECODE_success 1 #define DECODE_failure 0 #if defined (__x86_64__) void store_cpu_user_regs(struct cpu_user_regs *regs) { __vmread(GUEST_SS_SELECTOR, ®s->ss); __vmread(GUEST_RSP, ®s->rsp); __vmread(GUEST_RFLAGS, ®s->rflags); __vmread(GUEST_CS_SELECTOR, ®s->cs); __vmread(GUEST_DS_SELECTOR, ®s->ds); __vmread(GUEST_ES_SELECTOR, ®s->es); __vmread(GUEST_RIP, ®s->rip); } static inline long __get_reg_value(unsigned long reg, int size) { switch(size) { case BYTE_64: return (char)(reg & 0xFF); case WORD: return (short)(reg & 0xFFFF); case LONG: return (int)(reg & 0xFFFFFFFF); case QUAD: return (long)(reg); default: printk("Error: <__get_reg_value>Invalid reg size\n"); domain_crash_synchronous(); } } static long get_reg_value(int size, int index, int seg, struct cpu_user_regs *regs) { if (size == BYTE) { switch (index) { case 0: //%al return (char)(regs->rax & 0xFF); case 1: //%cl return (char)(regs->rcx & 0xFF); case 2: //%dl return (char)(regs->rdx & 0xFF); case 3: //%bl return (char)(regs->rbx & 0xFF); case 4: //%ah return (char)((regs->rax & 0xFF00) >> 8); case 5: //%ch return (char)((regs->rcx & 0xFF00) >> 8); case 6: //%dh return (char)((regs->rdx & 0xFF00) >> 8); case 7: //%bh return (char)((regs->rbx & 0xFF00) >> 8); default: printk("Error: (get_reg_value)Invalid index value\n"); domain_crash_synchronous(); } } switch (index) { case 0: return __get_reg_value(regs->rax, size); case 1: return __get_reg_value(regs->rcx, size); case 2: return __get_reg_value(regs->rdx, size); case 3: return __get_reg_value(regs->rbx, size); case 4: return __get_reg_value(regs->rsp, size); case 5: return __get_reg_value(regs->rbp, size); case 6: return __get_reg_value(regs->rsi, size); case 7: return __get_reg_value(regs->rdi, size); case 8: return __get_reg_value(regs->r8, size); case 9: return __get_reg_value(regs->r9, size); case 10: return __get_reg_value(regs->r10, size); case 11: return __get_reg_value(regs->r11, size); case 12: return __get_reg_value(regs->r12, size); case 13: return __get_reg_value(regs->r13, size); case 14: return __get_reg_value(regs->r14, size); case 15: return __get_reg_value(regs->r15, size); default: printk("Error: (get_reg_value)Invalid index value\n"); domain_crash_synchronous(); } } #elif defined (__i386__) void store_cpu_user_regs(struct cpu_user_regs *regs) { __vmread(GUEST_SS_SELECTOR, ®s->ss); __vmread(GUEST_RSP, ®s->esp); __vmread(GUEST_RFLAGS, ®s->eflags); __vmread(GUEST_CS_SELECTOR, ®s->cs); __vmread(GUEST_DS_SELECTOR, ®s->ds); __vmread(GUEST_ES_SELECTOR, ®s->es); __vmread(GUEST_RIP, ®s->eip); } static long get_reg_value(int size, int index, int seg, struct cpu_user_regs *regs) { /* * Reference the db_reg[] table */ switch (size) { case BYTE: switch (index) { case 0: //%al return (char)(regs->eax & 0xFF); case 1: //%cl return (char)(regs->ecx & 0xFF); case 2: //%dl return (char)(regs->edx & 0xFF); case 3: //%bl return (char)(regs->ebx & 0xFF); case 4: //%ah return (char)((regs->eax & 0xFF00) >> 8); case 5: //%ch return (char)((regs->ecx & 0xFF00) >> 8); case 6: //%dh return (char)((regs->edx & 0xFF00) >> 8); case 7: //%bh return (char)((regs->ebx & 0xFF00) >> 8); default: printk("Error: (get_reg_value)size case 0 error\n"); domain_crash_synchronous(); } case WORD: switch (index) { case 0: //%ax return (short)(regs->eax & 0xFFFF); case 1: //%cx return (short)(regs->ecx & 0xFFFF); case 2: //%dx return (short)(regs->edx & 0xFFFF); case 3: //%bx return (short)(regs->ebx & 0xFFFF); case 4: //%sp return (short)(regs->esp & 0xFFFF); break; case 5: //%bp return (short)(regs->ebp & 0xFFFF); case 6: //%si return (short)(regs->esi & 0xFFFF); case 7: //%di return (short)(regs->edi & 0xFFFF); default: printk("Error: (get_reg_value)size case 1 error\n"); domain_crash_synchronous(); } case LONG: switch (index) { case 0: //%eax return regs->eax; case 1: //%ecx return regs->ecx; case 2: //%edx return regs->edx; case 3: //%ebx return regs->ebx; case 4: //%esp return regs->esp; case 5: //%ebp return regs->ebp; case 6: //%esi return regs->esi; case 7: //%edi return regs->edi; default: printk("Error: (get_reg_value)size case 2 error\n"); domain_crash_synchronous(); } default: printk("Error: (get_reg_value)size case error\n"); domain_crash_synchronous(); } } #endif static inline const unsigned char *check_prefix(const unsigned char *inst, struct instruction *thread_inst, unsigned char *rex_p) { while (1) { switch (*inst) { /* rex prefix for em64t instructions*/ case 0x40 ... 0x4e: *rex_p = *inst; break; case 0xf3: //REPZ thread_inst->flags = REPZ; break; case 0xf2: //REPNZ thread_inst->flags = REPNZ; break; case 0xf0: //LOCK break; case 0x2e: //CS case 0x36: //SS case 0x3e: //DS case 0x26: //ES case 0x64: //FS case 0x65: //GS thread_inst->seg_sel = *inst; break; case 0x66: //32bit->16bit thread_inst->op_size = WORD; break; case 0x67: printf("Error: Not handling 0x67 (yet)\n"); domain_crash_synchronous(); break; default: return inst; } inst++; } } static inline unsigned long get_immediate(int op16, const unsigned char *inst, int op_size) { int mod, reg, rm; unsigned long val = 0; int i; mod = (*inst >> 6) & 3; reg = (*inst >> 3) & 7; rm = *inst & 7; inst++; //skip ModR/M byte if (mod != 3 && rm == 4) { inst++; //skip SIB byte } switch(mod) { case 0: if (rm == 5 || rm == 4) { if (op16) inst = inst + 2; //disp16, skip 2 bytes else inst = inst + 4; //disp32, skip 4 bytes } break; case 1: inst++; //disp8, skip 1 byte break; case 2: if (op16) 
/*
             LUFA Library
     Copyright (C) Dean Camera, 2017.

  dean [at] fourwalledcubicle [dot] com
           www.lufa-lib.org
*/

/*
  Copyright 2010  David Prentice (david.prentice [at] farming [dot] uk)
  Copyright 2010  Peter Danneger
  Copyright 2017  Dean Camera (dean [at] fourwalledcubicle [dot] com)

  Permission to use, copy, modify, distribute, and sell this
  software and its documentation for any purpose is hereby granted
  without fee, provided that the above copyright notice appear in
  all copies and that both that the copyright notice and this
  permission notice and warranty disclaimer appear in supporting
  documentation, and that the name of the author not be used in
  advertising or publicity pertaining to distribution of the
  software without specific, written prior permission.

  The author disclaims all warranties with regard to this
  software, including all implied warranties of merchantability
  and fitness.  In no event shall the author be liable for any
  special, indirect or consequential damages or any damages
  whatsoever resulting from loss of use, data or profits, whether
  in an action of contract, negligence or other tortious action,
  arising out of or in connection with the use or performance of
  this software.
*/

/** \file
 *
 *  Software UART for both data transmission and reception. This
 *  code continuously monitors the ring buffers set up by the main
 *  project source file and reads/writes data as it becomes available.
 */

#include "SoftUART.h"

/** Total number of bits remaining to be sent in the current frame */
static uint8_t TX_BitsRemaining;

/** Temporary data variable to hold the byte being transmitted as it is shifted out */
static uint8_t TX_Data;

/** Total number of bits remaining to be received in the current frame */
static uint8_t RX_BitsRemaining;

/** Temporary data variable to hold the byte being received as it is shifted in */
static uint8_t RX_Data;


/** Initializes the software UART, ready for data transmission and reception into the global ring buffers. */
void SoftUART_Init(void)
{
	/* Set TX pin to output high, enable RX pull-up */
	STXPORT |= (1 << STX);
	STXDDR  |= (1 << STX);
	SRXPORT |= (1 << SRX);

	/* Enable INT0 for the detection of incoming start bits that signal the start of a byte */
	EICRA  = (1 << ISC01);
	EIMSK  = (1 << INT0);

	/* Set the transmission and reception timer compare values for the default baud rate */
	SoftUART_SetBaud(9600);

	/* Setup reception timer compare ISR */
	TIMSK1 = (1 << OCIE1A);

	/* Setup transmission timer compare ISR and start the timer */
	TIMSK3 = (1 << OCIE3A);
	TCCR3B = ((1 << CS30) | (1 << WGM32));
}

/** ISR to detect the start of a bit being sent to the software UART. */
ISR(INT0_vect, ISR_BLOCK)
{
	/* Reset the number of reception bits remaining counter */
	RX_BitsRemaining = 8;

	/* Reset the bit reception timer to -(1/2) of the total bit time, so that the first data bit is
	 * sampled mid way through the total bit time, making reception more robust.
	 */
	TCNT1 = -(OCR1A >> 1);

	/* Check to see that the pin is still low (prevents glitches from starting a frame reception) */
	if (!(SRXPIN & (1 << SRX)))
	{
		/* Disable start bit detection ISR while the next byte is received */
		EIMSK = 0;

		/* Start the reception timer */
		TCCR1B = ((1 << CS10) | (1 << WGM12));
	}
}

/** ISR to manage the reception of bits to the software UART. */
ISR(TIMER1_COMPA_vect, ISR_BLOCK)
{
	/* Cache the current RX pin value for later checking */
	uint8_t SRX_Cached = (SRXPIN & (1 << SRX));

	/* Check if reception has finished */
	if (RX_BitsRemaining)
	{
		/* Shift the current received bit mask to the next bit position */
		RX_Data >>= 1;
		RX_BitsRemaining--;

		/* Store next bit into the received data variable */
		if (SRX_Cached)
		  RX_Data |= (1 << 7);
	}
	else
	{
		/* Disable the reception timer as all data has now been received, re-enable start bit detection ISR */
		TCCR1B = 0;
		EIFR   = (1 << INTF0);
		EIMSK  = (1 << INT0);

		/* Reception complete, store the received byte if stop bit valid */
		if (SRX_Cached)
		  RingBuffer_Insert(&UARTtoUSB_Buffer, RX_Data);
	}
}

/** ISR to manage the transmission of bits via the software UART. */
ISR(TIMER3_COMPA_vect, ISR_BLOCK)
{
	/* Check if transmission has finished */
	if (TX_BitsRemaining)
	{
		/* Set the TX line to the value of the next bit in the byte to send */
		if (TX_Data & (1 << 0))
		  STXPORT &= ~(1 << STX);
		else
		  STXPORT |=  (1 << STX);

		/* Shift the transmission byte to move the next bit into position and decrement the bits remaining counter */
		TX_Data >>= 1;
		TX_BitsRemaining--;
	}
	else if (!(RX_BitsRemaining) && !(RingBuffer_IsEmpty(&USBtoUART_Buffer)))
	{
		/* Start bit - TX line low */
		STXPORT &= ~(1 << STX);

		/* Transmission complete, get the next byte to send (if available) */
		TX_Data          = ~RingBuffer_Remove(&USBtoUART_Buffer);
		TX_BitsRemaining = 9;
	}
}
generated by cgit v1.2.3 (git 2.25.1) at 2025-12-18 19:15:12 +0000