/* LUFA Library Copyright (C) Dean Camera, 2010. dean [at] fourwalledcubicle [dot] com www.fourwalledcubicle.com */ /* Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com) Permission to use, copy, modify, distribute, and sell this software and its documentation for any purpose is hereby granted without fee, provided that the above copyright notice appear in all copies and that both that the copyright notice and this permission notice and warranty disclaimer appear in supporting documentation, and that the name of the author not be used in advertising or publicity pertaining to distribution of the software without specific, written prior permission. The author disclaim all warranties with regard to this software, including all implied warranties of merchantability and fitness. In no event shall the author be liable for any special, indirect or consequential damages or any damages whatsoever resulting from loss of use, data or profits, whether in an action of contract, negligence or other tortious action, arising out of or in connection with the use or performance of this software. */ /** \file * * Target-related functions for the XMEGA target's NVM module. */ #define INCLUDE_FROM_XMEGA_NVM_C #include "XMEGANVM.h" #if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__) /** Sends the given 32-bit absolute address to the target. * * \param[in] AbsoluteAddress Absolute address to send to the target */ static void XMEGANVM_SendAddress(const uint32_t AbsoluteAddress) { /* Send the given 32-bit address to the target, LSB first */ XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[0]); XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[1]); XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[2]); XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[3]); } /** Sends the given NVM register address to the target. * * \param[in] Register NVM register whose absolute address is to be sent */ static void XMEGANVM_SendNVMRegAddress(const uint8_t Register) { /* Determine the absolute register address from the NVM base memory address and the NVM register address */ uint32_t Address = XPROG_Param_NVMBase | Register; /* Send the calculated 32-bit address to the target, LSB first */ XMEGANVM_SendAddress(Address); } /** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read or CRC * calculation. * * \return Boolean true if the NVM controller became ready within the timeout period, false otherwise */ bool XMEGANVM_WaitWhileNVMBusBusy(void) { /* Poll the STATUS register to check to see if NVM access has been enabled */ for (;;) { /* Send the LDCS command to read the PDI STATUS register to see the NVM bus is active */ XPROGTarget_SendByte(PDI_CMD_LDCS | PDI_STATUS_REG); uint8_t StatusRegister = XPROGTarget_ReceiveByte(); /* We might have timed out waiting for the status register read response, check here */ if (!(TimeoutMSRemaining)) return false; /* Check the status register read response to see if the NVM bus is enabled */ if (StatusRegister & PDI_STATUS_NVM) { TimeoutMSRemaining = COMMAND_TIMEOUT_MS; return true; } } } /** Waits while the target's NVM controller is busy performing an operation, exiting if the * timeout period expires. * * \return Boolean true if the NVM controller became ready within the timeout period, false otherwise */ bool XMEGANVM_WaitWhileNVMControllerBusy(void) { /* Poll the NVM STATUS register while the NVM controller is busy */ for (;;) { /* Send a LDS command to read the NVM STATUS register to check the BUSY flag */ XPROGTarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2)); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_STATUS); uint8_t StatusRegister = XPROGTarget_ReceiveByte(); /* We might have timed out waiting for the status register read response, check here */ if (!(TimeoutMSRemaining)) return false; /* Check to see if the BUSY flag is still set */ if (!(StatusRegister & (1 << 7))) { TimeoutMSRemaining = COMMAND_TIMEOUT_MS; return true; } } } /** Retrieves the CRC value of the given memory space. * * \param[in] CRCCommand NVM CRC command to issue to the target * \param[out] CRCDest CRC Destination when read from the target * * \return Boolean true if the command sequence complete successfully */ bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest) { /* Wait until the NVM controller is no longer busy */ if (!(XMEGANVM_WaitWhileNVMControllerBusy())) return false; /* Set the NVM command to the correct CRC read command */ XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD); XPROGTarget_SendByte(CRCCommand); /* Set CMDEX bit in NVM CTRLA register to start the CRC generation */ XPROGTarget
#include <stdint.h>
#include <stdlib.h>
#include <stdio.h>

#include <LUFA/Common/Common.h>

#include "clock.h"

//Counted time
volatile clock_time_t clock_datetime = 0;

//Overflow interrupt
ISR(TIMER1_COMPA_vect, ISR_BLOCK)
{
	clock_datetime += 1;
}

//Initialise the clock
void clock_init()
{
	OCR1A  = (((F_CPU / 1024) / 100) - 1);
	TCCR1B = ((1 << WGM12) | (1 << CS12) | (1 << CS10));
	TIMSK1 = (1 << OCIE1A);
}

//Return time
clock_time_t clock_time()
{
	clock_time_t time;

	GlobalInterruptDisable();
	time = clock_datetime;
	GlobalInterruptEnable();

	return time;
}
generated by cgit v1.2.3 (git 2.25.1) at 2025-12-03 19:56:16 +0000
XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD); XPROGTarget_SendByte(XMEGA_NVM_CMD_LOADEEPROMPAGEBUFF); /* Load the PDI pointer register with the EEPROM page start address */ XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES); XMEGANVM_SendAddress(Address); /* Send the REPEAT command with the specified number of bytes to write */ XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE); XPROGTarget_SendByte(XPROG_Param_EEPageSize - 1); /* Send a ST command with indirect access and post-increment to tag each byte in the EEPROM page buffer */ XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE); for (uint8_t PageByte = 0; PageByte < XPROG_Param_EEPageSize; PageByte++) XPROGTarget_SendByte(0x00); /* Send the memory erase command to the target */ XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD); XPROGTarget_SendByte(EraseCommand); /* Set CMDEX bit in NVM CTRLA register to start the EEPROM erase sequence */ XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA); XPROGTarget_SendByte(1 << 0); } else { /* Send the memory erase command to the target */ XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD); XPROGTarget_SendByte(EraseCommand); /* Other erase modes just need us to address a byte within the target memory space */ XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); XMEGANVM_SendAddress(Address); XPROGTarget_SendByte(0x00); } /* Wait until the NVM bus is ready again */ if (!(XMEGANVM_WaitWhileNVMBusBusy())) return false; return true; } #endif