/* * QEMU CUDA support * * Copyright (c) 2004 Fabrice Bellard * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ #include "vl.h" /* XXX: implement all timer modes */ //#define DEBUG_CUDA //#define DEBUG_CUDA_PACKET /* Bits in B data register: all active low */ #define TREQ 0x08 /* Transfer request (input) */ #define TACK 0x10 /* Transfer acknowledge (output) */ #define TIP 0x20 /* Transfer in progress (output) */ /* Bits in ACR */ #define SR_CTRL 0x1c /* Shift register control bits */ #define SR_EXT 0x0c /* Shift on external clock */ #define SR_OUT 0x10 /* Shift out if 1 */ /* Bits in IFR and IER */ #define IER_SET 0x80 /* set bits in IER */ #define IER_CLR 0 /* clear bits in IER */ #define SR_INT 0x04 /* Shift register full/empty */ #define T1_INT 0x40 /* Timer 1 interrupt */ #define T2_INT 0x20 /* Timer 2 interrupt */ /* Bits in ACR */ #define T1MODE 0xc0 /* Timer 1 mode */ #define T1MODE_CONT 0x40 /* continuous interrupts */ /* commands (1st byte) */ #define ADB_PACKET 0 #define CUDA_PACKET 1 #define ERROR_PACKET 2 #define TIMER_PACKET 3 #define POWER_PACKET 4 #define MACIIC_PACKET 5 #define PMU_PACKET 6 /* CUDA commands (2nd byte) */ #define CUDA_WARM_START 0x0 #define CUDA_AUTOPOLL 0x1 #define CUDA_GET_6805_ADDR 0x2 #define CUDA_GET_TIME 0x3 #define CUDA_GET_PRAM 0x7 #define CUDA_SET_6805_ADDR 0x8 #define CUDA_SET_TIME 0x9 #define CUDA_POWERDOWN 0xa #define CUDA_POWERUP_TIME 0xb #define CUDA_SET_PRAM 0xc #define CUDA_MS_RESET 0xd #define CUDA_SEND_DFAC 0xe #define CUDA_BATTERY_SWAP_SENSE 0x10 #define CUDA_RESET_SYSTEM 0x11 #define CUDA_SET_IPL 0x12 #define CUDA_FILE_SERVER_FLAG 0x13 #define CUDA_SET_AUTO_RATE 0x14 #define CUDA_GET_AUTO_RATE 0x16 #define CUDA_SET_DEVICE_LIST 0x19 #define CUDA_GET_DEVICE_LIST 0x1a #define CUDA_SET_ONE_SECOND_MODE 0x1b #define CUDA_SET_POWER_MESSAGES 0x21 #define CUDA_GET_SET_IIC 0x22 #define CUDA_WAKEUP 0x23 #define CUDA_TIMER_TICKLE 0x24 #define CUDA_COMBINED_FORMAT_IIC 0x25 #define CUDA_TIMER_FREQ (4700000 / 6) #define CUDA_ADB_POLL_FREQ 50 /* CUDA returns time_t's offset from Jan 1, 1904, not 1970 */ #define RTC_OFFSET 2082844800 typedef struct CUDATimer { int index; uint16_t latch; uint16_t counter_value; /* counter value at load time */ int64_t load_time; int64_t next_irq_time; QEMUTimer *timer; } CUDATimer; typedef struct CUDAState { /* cuda registers */ uint8_t b; /* B-side data */ uint8_t a; /* A-side data */ uint8_t dirb; /* B-side direction (1=output) */ uint8_t dira; /* A-side direction (1=output) */ uint8_t sr; /* Shift register */ uint8_t acr; /* Auxiliary control register */ uint8_t pcr; /* Peripheral control register */ uint8_t ifr; /* Interrupt flag register */ uint8_t ier; /* Interrupt enable register */ uint8_t anh; /* A-side data, no handshake */ CUDATimer timers[2]; uint8_t last_b; /* last value of B register */ uint8_t last_acr; /* last value of B register */ int data_in_size; int data_in_index; int data_out_index; SetIRQFunc *set_irq; int irq; void *irq_opaque; uint8_t autopoll; uint8_t data_in[128]; uint8_t data_out[16]; QEMUTimer *adb_poll_timer; } CUDAState; static CUDAState cuda_state; ADBBusState adb_bus; static void cuda_update(CUDAState *s); static void cuda_receive_packet_from_host(CUDAState *s, const uint8_t *data, int len); static void cuda_timer_update(CUDAState *s, CUDATimer *ti, int64_t current_time); static void cuda_update_irq(CUDAState *s) { if (s->ifr & s->ier & (SR_INT | T1_INT)) { s->set_irq(s->irq_opaque, s->irq, 1); } else { s->set_irq(s->irq_opaque, s->irq, 0); } } static unsigned int get_counter(CUDATimer *s) { int64_t d; unsigned int counter; d = muldiv64(qemu_get_clock(vm_clock) - s->load_time, CUDA_TIMER_FREQ, ticks_per_sec); if (s->index == 0) { /* the timer goes down from latch to -1 (period of latch + 2) */ if (d <= (s->counter_value + 1)) { counter = (s->counter_value - d) & 0xffff; } else { counter = (d - (s->counter_value + 1)) % (s->latch + 2); counter = (s->latch - counter) & 0xffff; } } else { counter = (s->counter_value - d) & 0xffff; } return counter; } static void set_counter(CUDAState *s, CUDATimer *ti, unsigned int val) { #ifdef DEBUG_CUDA printf("cuda: T%d.counter=%d\n", 1 + (ti->timer == NULL), val); #endif ti->load_time = qemu_get_clock(vm_clock); ti->counter_value = val; cuda_timer_update(s, ti, ti->load_time); } static int64_t get_next_irq_time(CUDATimer *s, int64_t current_time) { int64_t d, next_time; unsigned int counter; /* current counter value */ d = muldiv64(current_time - s->load_time, CUDA_TIMER_FREQ, ticks_per_sec); /* the timer goes down from latch to -1 (period of latch + 2) */ if (d <= (s->counter_value + 1)) { counter = (s->counter_value - d) & 0xffff; } else { counter = (d - (s->counter_value + 1)) % (s->latch + 2); counter = (s->latch - counter) & 0xffff; } /* Note: we consider
/*
             LUFA Library
     Copyright (C) Dean Camera, 2017.

  dean [at] fourwalledcubicle [dot] com
           www.lufa-lib.org
*/

/*
  Copyright 2017  Dean Camera (dean [at] fourwalledcubicle [dot] com)

  Permission to use, copy, modify, distribute, and sell this
  software and its documentation for any purpose is hereby granted
  without fee, provided that the above copyright notice appear in
  all copies and that both that the copyright notice and this
  permission notice and warranty disclaimer appear in supporting
  documentation, and that the name of the author not be used in
  advertising or publicity pertaining to distribution of the
  software without specific, written prior permission.

  The author disclaims all warranties with regard to this
  software, including all implied warranties of merchantability
  and fitness.  In no event shall the author be liable for any
  special, indirect or consequential damages or any damages
  whatsoever resulting from loss of use, data or profits, whether
  in an action of contract, negligence or other tortious action,
  arising out of or in connection with the use or performance of
  this software.
*/

/** \file
 *
 *  Header file for DataflashManager.c.
 */

#ifndef _DATAFLASH_MANAGER_H_
#define _DATAFLASH_MANAGER_H_

	/* Includes: */
		#include <avr/io.h>

		#include "../Descriptors.h"

		#include <LUFA/Common/Common.h>
		#include <LUFA/Drivers/USB/USB.h>
		#include <LUFA/Drivers/Board/Dataflash.h>

	/* Preprocessor Checks: */
		#if (DATAFLASH_PAGE_SIZE % 16)
			#error Dataflash page size must be a multiple of 16 bytes.
		#endif

	/* Defines: */
		/** Total number of bytes of the storage medium, comprised of one or more Dataflash ICs. */
		#define VIRTUAL_MEMORY_BYTES                ((uint32_t)DATAFLASH_PAGES * DATAFLASH_PAGE_SIZE * DATAFLASH_TOTALCHIPS)

		/** Block size of the device. This is kept at 512 to remain compatible with the OS despite the underlying
		 *  storage media (Dataflash) using a different native block size. Do not change this value.
		 */
		#define VIRTUAL_MEMORY_BLOCK_SIZE           512

		/** Total number of blocks of the virtual memory for reporting to the host as the device's total capacity. Do not
		 *  change this value; change VIRTUAL_MEMORY_BYTES instead to alter the media size.
		 */
		#define VIRTUAL_MEMORY_BLOCKS               (VIRTUAL_MEMORY_BYTES / VIRTUAL_MEMORY_BLOCK_SIZE)

		/** Indicates if the disk is write protected or not. */
		#define DISK_READ_ONLY                      false

	/* Function Prototypes: */
		void DataflashManager_WriteBlocks(USB_ClassInfo_MS_Device_t* const MSInterfaceInfo,
		                                  const uint32_t BlockAddress,
		                                  uint16_t TotalBlocks);
		void DataflashManager_ReadBlocks(USB_ClassInfo_MS_Device_t* const MSInterfaceInfo,
		                                 const uint32_t BlockAddress,
		                                 uint16_t TotalBlocks);
		void DataflashManager_WriteBlocks_RAM(const uint32_t BlockAddress,
		                                      uint16_t TotalBlocks,
		                                      const uint8_t* BufferPtr) ATTR_NON_NULL_PTR_ARG(3);
		void DataflashManager_ReadBlocks_RAM(const uint32_t BlockAddress,
		                                     uint16_t TotalBlocks,
		                                     uint8_t* BufferPtr) ATTR_NON_NULL_PTR_ARG(3);
		void DataflashManager_ResetDataflashProtections(void);
		bool DataflashManager_CheckDataflashOperation(void);

#endif
generated by cgit v1.2.3 (git 2.25.1) at 2025-12-13 17:45:24 +0000