/* * Arm PrimeCell PL110 Color LCD Controller * * Copyright (c) 2005-2006 CodeSourcery. * Written by Paul Brook * * This code is licenced under the GNU LGPL */ #include "vl.h" #define PL110_CR_EN 0x001 #define PL110_CR_BEBO 0x200 #define PL110_CR_BEPO 0x400 #define PL110_CR_PWR 0x800 enum pl110_bppmode { BPP_1, BPP_2, BPP_4, BPP_8, BPP_16, BPP_32 }; typedef struct { uint32_t base; DisplayState *ds; /* The Versatile/PB uses a slightly modified PL110 controller. */ int versatile; void *pic; uint32_t timing[4]; uint32_t cr; uint32_t upbase; uint32_t lpbase; uint32_t int_status; uint32_t int_mask; int cols; int rows; enum pl110_bppmode bpp; int invalidate; uint32_t pallette[256]; uint32_t raw_pallette[128]; int irq; } pl110_state; static const unsigned char pl110_id[] = { 0x10, 0x11, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 }; /* The Arm documentation (DDI0224C) says the CLDC on the Versatile board has a different ID. However Linux only looks for the normal ID. */ #if 0 static const unsigned char pl110_versatile_id[] = { 0x93, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 }; #else #define pl110_versatile_id pl110_id #endif static inline uint32_t rgb_to_pixel8(unsigned int r, unsigned int g, unsigned b) { return ((r >> 5) << 5) | ((g >> 5) << 2) | (b >> 6); } static inline uint32_t rgb_to_pixel15(unsigned int r, unsigned int g, unsigned b) { return ((r >> 3) << 10) | ((g >> 3) << 5) | (b >> 3); } static inline uint32_t rgb_to_pixel16(unsigned int r, unsigned int g, unsigned b) { return ((r >> 3) << 11) | ((g >> 2) << 5) | (b >> 3); } static inline uint32_t rgb_to_pixel24(unsigned int r, unsigned int g, unsigned b) { return (r << 16) | (g << 8) | b; } static inline uint32_t rgb_to_pixel32(unsigned int r, unsigned int g, unsigned b) { return (r << 16) | (g << 8) | b; } typedef void (*drawfn)(uint32_t *, uint8_t *, const uint8_t *, int); #define BITS 8 #include "pl110_template.h" #define BITS 15 #include "pl110_template.h" #define BITS 16 #include "pl110_template.h" #define BITS 24 #include "pl110_template.h" #define BITS 32 #include "pl110_template.h" static int pl110_enabled(pl110_state *s) { return (s->cr & PL110_CR_EN) && (s->cr & PL110_CR_PWR); } static void pl110_update_display(void *opaque) { pl110_state *s = (pl110_state *)opaque; drawfn* fntable; drawfn fn; uint32_t *pallette; uint32_t addr; uint32_t base; int dest_width; int src_width; uint8_t *dest; uint8_t *src; int first, last = 0; int dirty, new_dirty; int i; if (!pl110_enabled(s)) return; switch (s->ds->depth) { case 0: return; case 8: fntable = pl110_draw_fn_8; dest_width = 1; break; case 15: fntable = pl110_draw_fn_15; dest_width = 2; break; case 16: fntable = pl110_draw_fn_16; dest_width = 2; break; case 24: fntable = pl110_draw_fn_24; dest_width = 3; break; case 32: fntable = pl110_draw_fn_32; dest_width = 4; break; default: fprintf(stderr, "pl110: Bad color depth\n"); exit(1); } if (s->cr & PL110_CR_BEBO) fn = fntable[s->bpp + 6]; else if (s->cr & PL110_CR_BEPO) fn = fntable[s->bpp + 12]; else fn = fntable[s->bpp]; src_width = s->cols; switch (s->bpp) { case BPP_1: src_width >>= 3; break; case BPP_2: src_width >>= 2; break; case BPP_4: src_width >>= 1; break; case BPP_8: break; case BPP_16: src_width <<= 1; break; case BPP_32: src_width <<= 2; break; } dest_width *= s->cols; pallette = s->pallette; base = s->upbase; /* HACK: Arm aliases physical memory at 0x80000000. */ if (base > 0x80000000) base -= 0x80000000; src = phys_ram_base + base; dest = s->ds->data; first = -1; addr = base; dirty = cpu_physical_memory_get_dirty(addr, VGA_DIRTY_FLAG); new_dirty = dirty; for (i = 0; i < s->rows; i++) { if ((addr & ~TARGET_PAGE_MASK) + src_width >= TARGET_PAGE_SIZE) { uint32_t tmp; new_dirty = 0; for (tmp = 0; tmp < src_width; tmp += TARGET_PAGE_SIZE) { new_dirty |= cpu_physical_memory_get_dirty(addr + tmp, VGA_DIRTY_FLAG); } } if (dirty || new_dirty || s->invalidate) { fn(pallette, dest, src, s->cols); if (first == -1) first = i; last = i; } dirty = new_dirty; addr += src_width; dest += dest_width; src += src_width; } if (first < 0) return; s->invalidate = 0; cpu_physical_memory_reset_dirty(base + first * src_width, base + (last + 1) * src_width, VGA_DIRTY_FLAG); dpy_update(s->ds, 0, first, s->cols, last - first + 1); } static void pl110_invalidate_display(void * opaque) { pl110_state *s = (pl110_state *)opaque; s->invalidate = 1; } static void pl110_update_pallette(pl110_state *s, int n) { int i; uint32_t raw; unsigned int r, g, b; raw = s->raw_pallette[n]; n <<= 1; for (i = 0; i < 2; i++) { r = (raw & 0x1f) << 3; raw >>= 5; g = (raw & 0x1f) << 3; raw >>= 5; b = (raw & 0x1f) << 3; /* The I bit is ignored. */ raw >>= 6; switch (s->ds->depth) { case 8: s->pallette[n] = rgb_to_pixel8(r, g, b); break; case 15: s->pallette[n] = rgb_to_pixel15(r, g, b); break; case 16: s->pallette[n] = rgb_to_pixel16(r, g, b); break; case 24: case 32: s->pallette[n] = rgb_to_pixel32(r, g, b); break; } n++; } } static void pl110_resize(pl110_state *s, int width, int height) { if (width != s->cols || height != s->rows) { if (pl110_enabled(s)) { dpy_resize(s->ds, width, height); } } s->cols = width; s->rows = height; } /* Update interrupts. */ static void pl110_update(pl110_state *s) { /* TODO: Implement interrupts. */ } static uint32_t pl110_read(void *opaque, target_phys_addr_t offset) { pl110_state *s = (pl110_state *)opaque; offset -= s->base; if (offset >= 0xfe0 && offset < 0x1000) { if (s->versatile) return pl110_versatile_id[(offset - 0xfe0) >> 2]; else return pl110_id[(offset - 0xfe0) >> 2]; } if (offset >= 0x200 && offset < 0x400) { return s->raw_pallette[(offset - 0x200) >> 2]; } switch (offset >> 2) { case 0: /* LCDTiming0 */ return s->timing[0]; case 1: /* LCDTiming1 */ return s->timing[1]; case 2: /* LCDTiming2 */ return s->timing[2]; case 3: /* LCDTiming3 */ return s->timing[3]; case 4: /* LCDUPBASE */ return s->upbase; case 5: /* LCDLPBASE */ return s->lpbase; case 6: /* LCDIMSC */ return s->int_mask; case 7: /* LCDControl */ return s->cr; case 8: /* LCDRIS */ return s->int_status; case 9: /* LCDMIS */ return s->int_status & s->int_mask; case 11: /* LCDUPCURR */ /* TODO: Implement vertical refresh. */ return s->upbase; case 12: /* LCDLPCURR */ return s->lpbase; default: cpu_abort (cpu_single_env, "pl110_read: Bad offset %x\n", offset); return 0; } } static void pl110_write(void *opaque, target_phys_addr_t offset, uint32_t val) { pl110_state *s = (pl110_state *)opaque; int n; /* For simplicity invalidate the display whenever a control register is writen to. */ s->invalidate = 1; offset -= s->base; if (offset >= 0x200 && offset < 0x400) { /* Pallette. */ n = (offset - 0x200) >> 2; s->raw_pallette[(offset - 0x200) >> 2] = val; 
/*
             LUFA Library
     Copyright (C) Dean Camera, 2017.

  dean [at] fourwalledcubicle [dot] com
           www.lufa-lib.org
*/

/*
  Copyright 2017  Dean Camera (dean [at] fourwalledcubicle [dot] com)

  Permission to use, copy, modify, distribute, and sell this
  software and its documentation for any purpose is hereby granted
  without fee, provided that the above copyright notice appear in
  all copies and that both that the copyright notice and this
  permission notice and warranty disclaimer appear in supporting
  documentation, and that the name of the author not be used in
  advertising or publicity pertaining to distribution of the
  software without specific, written prior permission.

  The author disclaims all warranties with regard to this
  software, including all implied warranties of merchantability
  and fitness.  In no event shall the author be liable for any
  special, indirect or consequential damages or any damages
  whatsoever resulting from loss of use, data or profits, whether
  in an action of contract, negligence or other tortious action,
  arising out of or in connection with the use or performance of
  this software.
*/

/** \file
 *
 *  Header file for XPROGTarget.c.
 */

#ifndef _XPROG_TARGET_
#define _XPROG_TARGET_

	/* Includes: */
		#include <avr/io.h>
		#include <avr/interrupt.h>
		#include <stdbool.h>

		#include <LUFA/Common/Common.h>

		#include "../V2Protocol.h"
		#include "XPROGProtocol.h"
		#include "Config/AppConfig.h"

	/* Preprocessor Checks: */
		#if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))
			#undef ENABLE_ISP_PROTOCOL

			#if !defined(ENABLE_XPROG_PROTOCOL)
				#define ENABLE_XPROG_PROTOCOL
			#endif
		#endif

		/** Serial carrier TPI/PDI speed in Hz, when hardware TPI/PDI mode is used. */
		#define XPROG_HARDWARE_SPEED       2000000

		/** Total number of bits in a single USART frame. */
		#define BITS_IN_USART_FRAME        12

 		/** \name PDI Related Constants
 		 * @{
 		 */
		#define PDI_CMD_LDS(AddressSize, DataSize)  (0x00 | (  AddressSize << 2) | DataSize)
		#define PDI_CMD_LD(PointerAccess, DataSize) (0x20 | (PointerAccess << 2) | DataSize)
		#define PDI_CMD_STS(AddressSize, DataSize)  (0x40 | (  AddressSize << 2) | DataSize)
		#define PDI_CMD_ST(PointerAccess, DataSize) (0x60 | (PointerAccess << 2) | DataSize)
		#define PDI_CMD_LDCS(PDIReg)                (0x80 | PDIReg)
		#define PDI_CMD_REPEAT(DataSize)            (0xA0 | DataSize)
		#define PDI_CMD_STCS(PDIReg)                (0xC0 | PDIReg)
		#define PDI_CMD_KEY                         0xE0

		#define PDI_REG_STATUS             0
		#define PDI_REG_RESET              1
		#define PDI_REG_CTRL               2

		#define PDI_STATUS_NVM             (1 << 1)

		#define PDI_RESET_KEY              0x59
		#define PDI_NVMENABLE_KEY          (uint8_t[]){0x12, 0x89, 0xAB, 0x45, 0xCD, 0xD8, 0x88, 0xFF}

		#define PDI_DATASIZE_1BYTE         0
		#define PDI_DATASIZE_2BYTES        1
		#define PDI_DATASIZE_3BYTES        2
		#define PDI_DATASIZE_4BYTES        3

		#define PDI_POINTER_INDIRECT       0
		#define PDI_POINTER_INDIRECT_PI    1
		#define PDI_POINTER_DIRECT         2
 		/** @} */

 		/** \name TPI Related Constants
 		 * @{
 		 */
 		#define TPI_CMD_SLD(PointerAccess) (0x20 | PointerAccess)
		#define TPI_CMD_SST(PointerAccess) (0x60 | PointerAccess)
		#define TPI_CMD_SSTPR              0x68
		#define TPI_CMD_SIN(Address)       (0x10 | ((Address & 0x30) << 1) | (Address & 0x0F))
		#define TPI_CMD_SOUT(Address)      (0x90 | ((Address & 0x30) << 1) | (Address & 0x0F))
		#define TPI_CMD_SLDCS(TPIReg)      (0x80 | TPIReg)
		#define TPI_CMD_SSTCS(TPIReg)      (0xC0 | TPIReg)
		#define TPI_CMD_SKEY               0xE0

		#define TPI_REG_STATUS             0x00
		#define TPI_REG_CTRL               0x02
		#define TPI_REG_ID                 0x0F

		#define TPI_STATUS_NVM             (1 << 1)

		#define TPI_NVMENABLE_KEY          (uint8_t[]){0x12, 0x89, 0xAB, 0x45, 0xCD, 0xD8, 0x88, 0xFF}

		#define TPI_POINTER_INDIRECT       0
		#define TPI_POINTER_INDIRECT_PI    4
 		/** @} */

	/* Function Prototypes: */
		void    XPROGTarget_EnableTargetPDI(void);
		void    XPROGTarget_EnableTargetTPI(void);
		void    XPROGTarget_DisableTargetPDI(void);
		void    XPROGTarget_DisableTargetTPI(void);
		void    XPROGTarget_SendByte(const uint8_t Byte);
		uint8_t XPROGTarget_ReceiveByte(void);
		void    XPROGTarget_SendIdle(void);
		bool    XPROGTarget_WaitWhileNVMBusBusy(void);

		#if (defined(INCLUDE_FROM_XPROGTARGET_C) && defined(ENABLE_XPROG_PROTOCOL))
			static void XPROGTarget_SetTxMode(void);
			static void XPROGTarget_SetRxMode(void);
		#endif

#endif
generated by cgit v1.2.3 (git 2.25.1) at 2025-10-20 13:59:08 +0000