/* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. ChibiOS/RT is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3 of the License, or (at your option) any later version. ChibiOS/RT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program. If not, see . */ /** * @defgroup STM32F1xx_DRIVERS STM32F1xx Drivers * @details This section describes all the supported drivers on the STM32F1xx * platform and the implementation details of the single drivers. * * @ingroup platforms */ /** * @defgroup STM32F1xx_HAL STM32F1xx Initialization Support * @details The STM32F1xx HAL support is responsible for system initialization. * * @section stm32f1xx_hal_1 Supported HW resources * - PLL1. * - PLL2 (where present). * - RCC. * - Flash. * . * @section stm32f1xx_hal_2 STM32F1xx HAL driver implementation features * - PLLs startup and stabilization. * - Clock tree initialization. * - Clock source selection. * - Flash wait states initialization based on the selected clock options. * - SYSTICK initialization based on current clock and kernel required rate. * - DMA support initialization. * . * @ingroup STM32F1xx_DRIVERS */ /** * @defgroup STM32F1xx_ADC STM32F1xx ADC Support * @details The STM32F1xx ADC driver supports the ADC peripherals using DMA * channels for maximum performance. * * @section stm32f1xx_adc_1 Supported HW resources * - ADC1. * - DMA1. * . * @section stm32f1xx_adc_2 STM32F1xx ADC driver implementation features * - Clock stop for reduced power usage when the driver is in stop state. * - Streaming conversion using DMA for maximum performance. * - Programmable ADC interrupt priority level. * - Programmable DMA bus priority for each DMA channel. * - Programmable DMA interrupt priority for each DMA channel. * - Programmable DMA error hook. * . * @ingroup STM32F1xx_DRIVERS */ /** * @defgroup STM32F1xx_CAN STM32F1xx CAN Support * @details The STM32F1xx CAN driver uses the CAN peripherals. * * @section stm32f1xx_can_1 Supported HW resources * - bxCAN1. * . * @section stm32f1xx_can_2 STM32F1xx CAN driver implementation features * - Clock stop for reduced power usage when the driver is in stop state. * - Support for bxCAN sleep mode. * - Programmable bxCAN interrupts priority level. * . * @ingroup STM32F1xx_DRIVERS */ /** * @defgroup STM32F1xx_DMA STM32F1xx DMA Support * @details This DMA helper driver is used by the other drivers in order to * access the shared DMA resources in a consistent way. * * @section stm32f1xx_dma_1 Supported HW resources * The DMA driver can support any of the following hardware resources: * - DMA1. * - DMA2 (where present). * . * @section stm32f1xx_dma_2 STM32F1xx DMA driver implementation features * - Automatic DMA clock stop when not in use by other drivers. * - Exports helper functions/macros to the other drivers that share the * DMA resource. * . * @ingroup STM32F1xx_DRIVERS */ /** * @defgroup STM32F1xx_GPT STM32F1xx GPT Support * @details The STM32F1xx GPT driver uses the TIMx peripherals. * * @section stm32f1xx_gpt_1 Supported HW resources * - TIM1. * - TIM2. * - TIM3. * - TIM4. * - TIM5. * . * @section stm32f1xx_gpt_2 STM32F1xx GPT driver implementation features * - Each timer can be independently enabled and programmed. Unused * peripherals are left in low power mode. * - Programmable TIMx interrupts priority level. * . * @ingroup STM32F1xx_DRIVERS */ /** * @defgroup STM32F1xx_ICU STM32F1xx ICU Support * @details The STM32F1xx ICU driver uses the TIMx peripherals. * * @section stm32f1xx_icu_1 Supported HW resources * - TIM1. * - TIM2. * - TIM3. * - TIM4. * - TIM5. * . * @section stm32f1xx_icu_2 STM32F1xx ICU driver implementation features * - Each timer can be independently enabled and programmed. Unused * peripherals are left in low power mode. * - Programmable TIMx interrupts priority level. * . * @ingroup STM32F1xx_DRIVERS */ /** * @defgroup STM32F1xx_PAL STM32F1xx PAL Support * @details The STM32F1xx PAL driver uses the GPIO peripherals. * * @section stm32f1xx_pal_1 Supported HW resources * - AFIO. * - GPIOA. * - GPIOB. * - GPIOC. * - GPIOD. * - GPIOE (where present). * - GPIOF (where present). * - GPIOG (where present). * . * @section stm32f1xx_pal_2 STM32F1xx PAL driver implementation features * The PAL driver implementation fully supports the following hardware * capabilities: * - 16 bits wide ports. * - Atomic set/reset functions. * - Atomic set+reset function (atomic bus operations). * - Output latched regardless of the pad setting. * - Direct read of input pads regardless of the pad setting. * . * @section stm32f1xx_pal_3 Supported PAL setup modes * The STM32F1xx PAL driver supports the following I/O modes: * - @p PAL_MODE_RESET. * - @p PAL_MODE_UNCONNECTED. * - @p PAL_MODE_INPUT. * - @p PAL_MODE_INPUT_PULLUP. * - @p PAL_MODE_INPUT_PULLDOWN. * - @p PAL_MODE_INPUT_ANALOG. * - @p PAL_MODE_OUTPUT_PUSHPULL. * - @p PAL_MODE_OUTPUT_OPENDRAIN. * - @p PAL_MODE_STM32F1xx_ALTERNATE_PUSHPULL (non standard). * - @p PAL_MODE_STM32F1xx_ALTERNATE_OPENDRAIN (non standard). * . * Any attempt to setup an invalid mode is ignored. * * @section stm32f1xx_pal_4 Suboptimal behavior * The STM32F1xx GPIO is less than optimal in several areas, the limitations * should be taken in account while using the PAL driver: * - Pad/port toggling operations are not atomic. * - Pad/group mode setup is not atomic. * - Writing on pads/groups/ports programmed as input with pull-up/down * resistor can change the resistor setting because the output latch is * used for resistor selection. * . * @ingroup STM32F1xx_DRIVERS */ /** * @defgroup STM32F1xx_PWM STM32F1xx PWM Support * @details The STM32F1xx PWM driver uses the TIMx peripherals. * * @section stm32f1xx_pwm_1 Supported HW resources * - TIM1. * - TIM2. * - TIM3. * - TIM4. * - TIM5. * . * @section stm32f1xx_pwm_2 STM32F1xx PWM driver implementation features * - Each timer can be independently enabled and programmed. Unused * peripherals are left in low power mode. * - Four independent PWM channels per timer. * - Programmable TIMx interrupts priority level. * . * @ingroup STM32F1xx_DRIVERS */ /** * @defgroup STM32F1xx_SDC STM32F1xx SDC Support * @details The STM32F1xx SDC driver uses the SDIO peripheral. * * @section stm32f1xx_sdc_1 Supported HW resources * - SDIO. * - DMA2. * . * @section stm32f1xx_sdc_2 STM32F1xx SDC driver implementation features * - Clock stop for reduced power usage when the driver is in stop state. * - Programmable interrupt priority. * - DMA is used for receiving and transmitting. * - Programmable DMA bus priority for each DMA channel. * . * @ingroup STM32F1xx_DRIVERS */ /** * @defgroup STM32F1xx_SERIAL STM32F1xx Serial Support * @details The STM32F1xx Serial driver uses the USART/UART peripherals in a * buffered, interrupt driven, implementation. * * @section stm32f1xx_serial_1 Supported HW resources * The serial driver can support any of the following hardware resources: * - USART1. * - USART2. * - USART3 (where present). * - UART4 (where present). * - UART5 (where present). * . * @section stm32f1xx_serial_2 STM32F1xx Serial driver implementation features * - Clock stop for reduced pow
/*
             LUFA Library
     Copyright (C) Dean Camera, 2017.

  dean [at] fourwalledcubicle [dot] com
           www.lufa-lib.org
*/

/*
  Copyright 2017  Dean Camera (dean [at] fourwalledcubicle [dot] com)

  Permission to use, copy, modify, distribute, and sell this
  software and its documentation for any purpose is hereby granted
  without fee, provided that the above copyright notice appear in
  all copies and that both that the copyright notice and this
  permission notice and warranty disclaimer appear in supporting
  documentation, and that the name of the author not be used in
  advertising or publicity pertaining to distribution of the
  software without specific, written prior permission.

  The author disclaims all warranties with regard to this
  software, including all implied warranties of merchantability
  and fitness.  In no event shall the author be liable for any
  special, indirect or consequential damages or any damages
  whatsoever resulting from loss of use, data or profits, whether
  in an action of contract, negligence or other tortious action,
  arising out of or in connection with the use or performance of
  this software.
*/

/** \file
 *
 *  Header file for BootloaderCDC.c.
 */

#ifndef _CDC_H_
#define _CDC_H_

	/* Includes: */
		#include <avr/io.h>
		#include <avr/wdt.h>
		#include <avr/boot.h>
		#include <avr/eeprom.h>
		#include <avr/power.h>
		#include <avr/interrupt.h>
		#include <stdbool.h>

		#include "Descriptors.h"
		#include "BootloaderAPI.h"
		#include "Config/AppConfig.h"

		#include <LUFA/Drivers/USB/USB.h>
		#include <LUFA/Drivers/Board/LEDs.h>
		#include <LUFA/Platform/Platform.h>

	/* Preprocessor Checks: */
		#if !defined(__OPTIMIZE_SIZE__)
			#error This bootloader requires that it be optimized for size, not speed, to fit into the target device. Change optimization settings and try again.
		#endif

	/* Macros: */
		/** Version major of the CDC bootloader. */
		#define BOOTLOADER_VERSION_MAJOR     0x01

		/** Version minor of the CDC bootloader. */
		#define BOOTLOADER_VERSION_MINOR     0x00

		/** Hardware version major of the CDC bootloader. */
		#define BOOTLOADER_HWVERSION_MAJOR   0x01

		/** Hardware version minor of the CDC bootloader. */
		#define BOOTLOADER_HWVERSION_MINOR   0x00

		/** Eight character bootloader firmware identifier reported to the host when requested. */
		#define SOFTWARE_IDENTIFIER          "LUFACDC"

		/** Magic bootloader key to unlock forced application start mode. */
		#define MAGIC_BOOT_KEY               0xDC42

	/* Enums: */
		/** Possible memory types that can be addressed via the bootloader. */
		enum AVR109_Memories
		{
			MEMORY_TYPE_FLASH  = 'F',
			MEMORY_TYPE_EEPROM = 'E',
		};

		/** Possible commands that can be issued to the bootloader. */
		enum AVR109_Commands
		{
			AVR109_COMMAND_Sync                     = 27,
			AVR109_COMMAND_ReadEEPROM               = 'd',
			AVR109_COMMAND_WriteEEPROM              = 'D',
			AVR109_COMMAND_ReadFLASHWord            = 'R',
			AVR109_COMMAND_WriteFlashPage           = 'm',
			AVR109_COMMAND_FillFlashPageWordLow     = 'c',
			AVR109_COMMAND_FillFlashPageWordHigh    = 'C',
			AVR109_COMMAND_GetBlockWriteSupport     = 'b',
			AVR109_COMMAND_BlockWrite               = 'B',
			AVR109_COMMAND_BlockRead                = 'g',
			AVR109_COMMAND_ReadExtendedFuses        = 'Q',
			AVR109_COMMAND_ReadHighFuses            = 'N',
			AVR109_COMMAND_ReadLowFuses             = 'F',
			AVR109_COMMAND_ReadLockbits             = 'r',
			AVR109_COMMAND_WriteLockbits            = 'l',
			AVR109_COMMAND_EraseFLASH               = 'e',
			AVR109_COMMAND_ReadSignature            = 's',
			AVR109_COMMAND_ReadBootloaderSWVersion  = 'V',
			AVR109_COMMAND_ReadBootloaderHWVersion  = 'v',
			AVR109_COMMAND_ReadBootloaderIdentifier = 'S',
			AVR109_COMMAND_ReadBootloaderInterface  = 'p',
			AVR109_COMMAND_SetCurrentAddress        = 'A',
			AVR109_COMMAND_ReadAutoAddressIncrement = 'a',
			AVR109_COMMAND_ReadPartCode             = 't',
			AVR109_COMMAND_EnterProgrammingMode     = 'P',
			AVR109_COMMAND_LeaveProgrammingMode     = 'L',
			AVR109_COMMAND_SelectDeviceType         = 'T',
			AVR109_COMMAND_SetLED                   = 'x',
			AVR109_COMMAND_ClearLED                 = 'y',
			AVR109_COMMAND_ExitBootloader           = 'E',
		};

	/* Type Defines: */
		/** Type define for a non-returning pointer to the start of the loaded application in flash memory. */
		typedef void (*AppPtr_t)(void) ATTR_NO_RETURN;

	/* Function Prototypes: */
		static void CDC_Task(void);
		static void SetupHardware(void);

		void Application_Jump_Check(void) ATTR_INIT_SECTION(3);

		void EVENT_USB_Device_ConfigurationChanged(void);

		#if defined(INCLUDE_FROM_BOOTLOADERCDC_C) || defined(__DOXYGEN__)
			#if !defined(NO_BLOCK_SUPPORT)
			static void    ReadWriteMemoryBlock(const uint8_t Command);
			#endif
			static uint8_t FetchNextCommandByte(void);
			static void    WriteNextResponseByte(const uint8_t Response);
		#endif

#endif