/* ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. */ #define STM32F103_MCUCONF /* * STM32F103 drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole * driver is enabled in halconf.h. * * IRQ priorities: * 15...0 Lowest...Highest. * * DMA priorities: * 0...3 Lowest...Highest. */ /* * HAL driver system settings. */ #define STM32_NO_INIT FALSE #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED FALSE #define STM32_HSE_ENABLED TRUE #define STM32_LSE_ENABLED FALSE #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSE #define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 #define STM32_PLLMUL_VALUE 9 #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE1 STM32_PPRE1_DIV2 #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_ADCPRE STM32_ADCPRE_DIV4 #define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK #define STM32_RTCSEL STM32_RTCSEL_HSEDIV #define STM32_PVD_ENABLE FALSE #define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. */ #define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 6 /* * CAN driver system settings. */ #define STM32_CAN_USE_CAN1 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 /* * EXT driver system settings. */ #define STM32_EXT_EXTI0_IRQ_PRIORITY 6 #define STM32_EXT_EXTI1_IRQ_PRIORITY 6 #define STM32_EXT_EXTI2_IRQ_PRIORITY 6 #define STM32_EXT_EXTI3_IRQ_PRIORITY 6 #define STM32_EXT_EXTI4_IRQ_PRIORITY 6 #define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 #define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 #define STM32_EXT_EXTI16_IRQ_PRIORITY 6 #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 /* * GPT driver system settings. */ #define STM32_GPT_USE_TIM1 FALSE #define STM32_GPT_USE_TIM2 FALSE #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE #define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 /* * I2C driver system settings. */ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_I2C1_IRQ_PRIORITY 5 #define STM32_I2C_I2C2_IRQ_PRIORITY 5 #define STM32_I2C_I2C1_DMA_PRIORITY 3 #define STM32_I2C_I2C2_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() /* * ICU driver system settings. */ #define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 /* * PWM driver system settings. */ #define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM8 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 #define STM32_PWM_TIM8_IRQ_PRIORITY 7 /* * RTC driver system settings. */ #define STM32_RTC_IRQ_PRIORITY 15 /* * SERIAL driver system settings. */ #define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 TRUE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 /* * SPI driver system settings. */ #define STM32_SPI_USE_SPI1 FALSE #define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 #define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() /* * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE #define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 #define STM32_UART_USART3_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* * USB driver system settings. */ #define STM32_USB_USE_USB1 FALSE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE #define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 ef='#n123'>123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 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/*
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file hal_flash.h
* @brief Generic flash driver class header.
*
* @addtogroup HAL_FLASH
* @{
*/
#ifndef HAL_FLASH_H
#define HAL_FLASH_H
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
/**
* @name Flash attributes
* @{
*/
#define FLASH_ATTR_ERASED_IS_ONE 0x00000001
#define FLASH_ATTR_MEMORY_MAPPED 0x00000002
#define FLASH_ATTR_REWRITABLE 0x00000004
#define FLASH_ATTR_READ_ECC_CAPABLE 0x00000008
#define FLASH_ATTR_SUSPEND_ERASE_CAPABLE 0x00000010
/** @} */
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
/**
* @brief Driver state machine possible states.
*/
typedef enum {
FLASH_UNINIT = 0,
FLASH_STOP = 1,
FLASH_READY = 2,
FLASH_READ = 3,
FLASH_PGM = 4,
FLASH_ERASE = 5
} flash_state_t;
/**
* @brief Type of a flash error code.
*/
typedef enum {
FLASH_NO_ERROR = 0, /* No error. */
FLASH_BUSY_ERASING = 1, /* Erase operation in progress. */
FLASH_ERROR_READ = 2, /* ECC or other error during read operation.*/
FLASH_ERROR_PROGRAM = 3, /* Program operation failed. */
FLASH_ERROR_ERASE = 4, /* Erase operation failed. */
FLASH_ERROR_VERIFY = 5, /* Verify operation failed. */
FLASH_ERROR_HW_FAILURE = 6 /* Controller or communication error. */
} flash_error_t;
/**
* @brief Type of a flash offset.
*/
typedef uint32_t flash_offset_t;
/**
* @brief Type of a flash sector number.
*/
typedef uint32_t flash_sector_t;
/**
* @brief Flash sector descriptor.
*/
typedef struct {
/**
* @brief Sector offset.
*/
flash_offset_t offset;
/**
* @brief Sector size.
*/
uint32_t size;
} flash_sector_descriptor_t;
/**
* @brief Type of a flash device descriptor.
*/
typedef struct {
/**
* @brief Device_attributes.
*/
uint32_t attributes;
/**
* @brief Size of write page.
*/
uint32_t page_size;
/**
* @brief Number of sectors in the device.
*/
flash_sector_t sectors_count;
/**
* @brief List of sectors for devices with non-uniform sector sizes.
* @note If @p NULL then the device has uniform sectors size equal
* to @p sector_size.
*/
const flash_sector_descriptor_t *sectors;
/**
* @brief Size of sectors for devices with uniform sector size.
* @note If zero then the device has non uniform sectors described
* by the @p sectors array.
*/
uint32_t sectors_size;
/**
* @brief Flash address if memory mapped or zero.
* @note Conventionally, non memory mapped devices have address zero.
*/
flash_offset_t address;
} flash_descriptor_t;
/**
* @brief @p BaseFlash specific methods.
* @note No methods so far, just a common ancestor interface.
*/
#define _base_flash_methods_alone \
/* Get flash device attributes.*/ \
const flash_descriptor_t * (*get_descriptor)(void *instance); \
/* Read operation.*/ \
flash_error_t (*read)(void *instance, flash_offset_t offset, \
size_t n, uint8_t *rp); \
/* Program operation.*/ \
flash_error_t (*program)(void *instance, flash_offset_t offset, \
size_t n, const uint8_t *pp); \
/* Erase whole flash device.*/ \
flash_error_t (*start_erase_all)(void *instance); \
/* Erase single sector.*/ \
flash_error_t (*start_erase_sector)(void *instance, \
flash_sector_t sector); \
flash_error_t (*query_erase)(void *instance, uint32_t *wait_time); \
/* Verify erase single sector.*/ \
flash_error_t (*verify_erase)(void *instance, flash_sector_t sector);
/**
* @brief @p BaseFlash specific methods with inherited ones.
*/
#define _base_flash_methods \
_base_object_methods \
_base_flash_methods_alone
/**
* @brief @p BaseFlash virtual methods table.
*/
struct BaseFlashVMT {
_base_flash_methods
};
/**
* @brief @p BaseFlash specific data.
*/
#define _base_flash_data \
_base_object_data \
/* Driver state.*/ \
flash_state_t state;
/**
* @extends BaseObject
*
* @brief Base flash class.
*/
typedef struct {
/** @brief Virtual Methods Table.*/
const struct BaseFlashVMT *vmt;
_base_flash_data
} BaseFlash;
/*===========================================================================*/
/* Driver macros. */
/*===========================================================================*/
/**
* @name Macro Functions (BaseFlash)
* @{
*/
/**
* @brief Instance getter.
* @details This special method is used to get the instance of this class
* object from a derived class.
*/
#define getBaseFlash(ip) ((BaseFlash *)&(ip)->vmt)
/**
* @brief Sensors get axes number.
*
* @param[in] ip pointer to a @p BaseFlash or derived class
* @return A flash device descriptor.
*
* @api
*/
#define flashGetDescriptor(ip) \
(ip)->vmt->get_descriptor(ip)
/**
* @brief Read operation.
*
* @param[in] ip pointer to a @p BaseFlash or derived class
* @param[in] offset flash offset
* @param[in] n number of bytes to be read
* @param[out] rp pointer to the data buffer
* @return An error code.
* @retval FLASH_NO_ERROR if there is no erase operation in progress.
* @retval FLASH_BUSY_ERASING if there is an erase operation in progress.
* @retval FLASH_ERROR_READ if the read operation failed.
* @retval FLASH_ERROR_HW_FAILURE if access to the memory failed.
*
* @api
*/
#define flashRead(ip, offset, n, rp) \
(ip)->vmt->read(ip, offset, n, rp)
/**
* @brief Program operation.
*
* @param[in] ip pointer to a @p BaseFlash or derived class
* @param[in] offset flash offset
* @param[in] n number of bytes to be programmed
* @param[in] pp pointer to the data buffer
* @return An error code.
* @retval FLASH_NO_ERROR if there is no erase operation in progress.
* @retval FLASH_BUSY_ERASING if there is an erase operation in progress.
* @retval FLASH_ERROR_PROGRAM if the program operation failed.
* @retval FLASH_ERROR_HW_FAILURE if access to the memory failed.
*
* @api
*/
#define flashProgram(ip, offset, n, pp) \
(ip)->vmt->program(ip, offset, n, pp)
/**
* @brief Starts a whole-device erase operation.
*
* @param[in] ip pointer to a @p BaseFlash or derived class
* @return An error code.
* @retval FLASH_NO_ERROR if there is no erase operation in progress.
* @retval FLASH_BUSY_ERASING if there is an erase operation in progress.
* @retval FLASH_ERROR_HW_FAILURE if access to the memory failed.
*
* @api
*/
#define flashStartEraseAll(ip) \
(ip)->vmt->start_erase_all(ip)
/**
* @brief Starts an sector erase operation.
*
* @param[in] ip pointer to a @p BaseFlash or derived class
* @param[in] sector sector to be erased
* @return An error code.
* @retval FLASH_NO_ERROR if there is no erase operation in progress.
* @retval FLASH_BUSY_ERASING if there is an erase operation in progress.
* @retval FLASH_ERROR_HW_FAILURE if access to the memory failed.
*
* @api
*/
#define flashStartEraseSector(ip, sector) \
(ip)->vmt->start_erase_sector(ip, sector)
/**
* @brief Queries the driver for erase operation progress.
*
* @param[in] ip pointer to a @p BaseFlash or derived class
* @param[out] msec recommended time, in milliseconds, that what should be
* spent before calling this function again, can be @p NULL
* @return An error code.
* @retval FLASH_NO_ERROR if there is no erase operation in progress.
* @retval FLASH_BUSY_ERASING if there is an erase operation in progress.
* @retval FLASH_ERROR_ERASE if the erase operation failed.
* @retval FLASH_ERROR_HW_FAILURE if access to the memory failed.
*
* @api
*/
#define flashQueryErase(ip, msec) \
(ip)->vmt->query_erase(ip, msec)
/**
* @brief Returns the erase state of a sector.
*
* @param[in] ip pointer to a @p BaseFlash or derived class
* @param[in] sector sector to be verified
* @return An error code.
* @retval FLASH_NO_ERROR if the sector is erased.
* @retval FLASH_BUSY_ERASING if there is an erase operation in progress.
* @retval FLASH_ERROR_VERIFY if the verify operation failed.
* @retval FLASH_ERROR_HW_FAILURE if access to the memory failed.
*
* @api
*/
#define flashVerifyErase(ip, sector) \
(ip)->vmt->verify_erase(ip, sector)
/** @} */
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#ifdef __cplusplus
extern "C" {
#endif
flash_error_t flashWaitErase(BaseFlash *devp);
flash_offset_t flashGetSectorOffset(BaseFlash *devp, flash_sector_t sector);
uint32_t flashGetSectorSize(BaseFlash *devp, flash_sector_t sector);
#ifdef __cplusplus
}
#endif
#endif /* HAL_FLASH_H */
/** @} */