From cccd652cb580ed98ab53eeef2ddda9fed2fa682b Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Mon, 8 Jan 2018 09:30:23 +0000 Subject: Added SRAMs cache settings to STM32H7 mcuconf.h. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11235 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/multi/SPI/cfg-stm32h743_nucleo144/mcuconf.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32/multi/SPI/cfg-stm32h743_nucleo144/mcuconf.h b/testhal/STM32/multi/SPI/cfg-stm32h743_nucleo144/mcuconf.h index c46fbb3a4..8a8304dc0 100644 --- a/testhal/STM32/multi/SPI/cfg-stm32h743_nucleo144/mcuconf.h +++ b/testhal/STM32/multi/SPI/cfg-stm32h743_nucleo144/mcuconf.h @@ -39,6 +39,12 @@ #define STM32_NO_INIT FALSE #define STM32_SYS_CK_ENFORCED_VALUE STM32_HSICLK +/* + * Memory attributes settings. + */ +#define STM32_NOCACHE_SRAM1_SRAM2 FALSE +#define STM32_NOCACHE_SRAM3 TRUE + /* * PWR system settings. * Reading STM32 Reference Manual is required. -- cgit v1.2.3