From 92d9ec18b5d6ddc1cc63fbb83568f39e27313b20 Mon Sep 17 00:00:00 2001 From: isiora Date: Tue, 27 Feb 2018 00:25:39 +0000 Subject: Small changes. git-svn-id: https://svn.code.sf.net/p/chibios/svn2/trunk@11582 110e8d01-0319-4d1e-a829-52ad28d1bb01 --- testhal/ATSAMA5D2/FLEX-SPI/chconf.h | 9 +-------- testhal/ATSAMA5D2/FLEX-SPI/main.c | 22 +++++++++++----------- 2 files changed, 12 insertions(+), 19 deletions(-) (limited to 'testhal') diff --git a/testhal/ATSAMA5D2/FLEX-SPI/chconf.h b/testhal/ATSAMA5D2/FLEX-SPI/chconf.h index 49b16647b..e1530c020 100644 --- a/testhal/ATSAMA5D2/FLEX-SPI/chconf.h +++ b/testhal/ATSAMA5D2/FLEX-SPI/chconf.h @@ -419,7 +419,7 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_ASSERTS FALSE +#define CH_DBG_ENABLE_ASSERTS TRUE /** * @brief Debug option, trace buffer. @@ -603,13 +603,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -/** - * @brief Trust zone configuration. - * @details If enabled the kernel is configured for the secure world - * and can access specific devices. - */ -#define CH_CFG_SEC_WORLD TRUE - #endif /* CHCONF_H */ /** @} */ diff --git a/testhal/ATSAMA5D2/FLEX-SPI/main.c b/testhal/ATSAMA5D2/FLEX-SPI/main.c index 077d6c1f9..c870f6b7e 100644 --- a/testhal/ATSAMA5D2/FLEX-SPI/main.c +++ b/testhal/ATSAMA5D2/FLEX-SPI/main.c @@ -26,26 +26,26 @@ static uint8_t rxbuf[BUFFER_SIZE]; * SPI high speed configuration (peripheral clock / 3 = 27,6 Mhz, CPHA=0, CPOL=0, MSb first). */ static const SPIConfig hs_spicfg = { - NULL, /* callback if present */ - 0, /* cs pad number */ - SPI_MR_MODFDIS | SPI_MR_LLB, /* mr register */ - SPI_CSR_SCBR(3) /* csr */ + NULL, /* callback if present */ + 0, /* cs pad number */ + SPI_MR_MODFDIS | SPI_MR_LLB, /* mr register */ + SPI_CSR_SCBR(1) /* csr */ }; /* * SPI low speed configuration (peripheral clock / 166 = 500KHz, CPHA=0, CPOL=0, MSb first). */ static const SPIConfig ls_spicfg = { - NULL, /* callback if present */ - 0, /* cs pad number */ - SPI_MR_MODFDIS | SPI_MR_LLB, /* mr register */ - SPI_CSR_SCBR(166) /* csr */ + NULL, /* callback if present */ + 0, /* cs pad number */ + SPI_MR_MODFDIS | SPI_MR_LLB, /* mr register */ + SPI_CSR_SCBR(1) /* csr */ }; /* * SPI bus contender 1. */ -static THD_WORKING_AREA(spi_thread_1_wa, 256); +static THD_WORKING_AREA(spi_thread_1_wa, 1024); static THD_FUNCTION(spi_thread_1, p) { (void)p; @@ -65,7 +65,7 @@ static THD_FUNCTION(spi_thread_1, p) { /* * SPI bus contender 2. */ -static THD_WORKING_AREA(spi_thread_2_wa, 256); +static THD_WORKING_AREA(spi_thread_2_wa, 1024); static THD_FUNCTION(spi_thread_2, p) { (void)p; @@ -75,7 +75,7 @@ static THD_FUNCTION(spi_thread_2, p) { spiAcquireBus(&FSPID2); /* Acquire ownership of the bus. */ palSetLine(LINE_LED_RED); /* LED OFF. */ spiStart(&FSPID2, &ls_spicfg); /* Setup transfer parameters. */ - spiExchange(&FSPID2, 512, + spiExchange(&FSPID2, BUFFER_SIZE, txbuf, rxbuf); /* Atomic transfer operations. */ cacheInvalidateRegion(&rxbuf, sizeof(rxbuf)); spiReleaseBus(&FSPID2); /* Ownership release. */ -- cgit v1.2.3