From 46870077b874696c09704da37dc4c33c8eb21402 Mon Sep 17 00:00:00 2001
From: gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>
Date: Thu, 24 Nov 2011 17:58:27 +0000
Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3523
 35acf78f-673a-0410-8e92-d51de3d6d3f4

---
 testhal/STM32L1xx/ADC/main.c          | 18 ++++++++++--------
 testhal/STM32L1xx/ADC/mcuconf.h       |  3 ++-
 testhal/STM32L1xx/EXT/mcuconf.h       |  3 ++-
 testhal/STM32L1xx/GPT/mcuconf.h       |  3 ++-
 testhal/STM32L1xx/IRQ_STORM/mcuconf.h |  3 ++-
 testhal/STM32L1xx/PWM-ICU/mcuconf.h   |  3 ++-
 testhal/STM32L1xx/SPI/mcuconf.h       |  3 ++-
 testhal/STM32L1xx/UART/mcuconf.h      |  3 ++-
 8 files changed, 24 insertions(+), 15 deletions(-)

(limited to 'testhal/STM32L1xx')

diff --git a/testhal/STM32L1xx/ADC/main.c b/testhal/STM32L1xx/ADC/main.c
index c13ebfe2a..2af3703e8 100644
--- a/testhal/STM32L1xx/ADC/main.c
+++ b/testhal/STM32L1xx/ADC/main.c
@@ -61,12 +61,13 @@ static const ADCConversionGroup adcgrpcfg1 = {
   ADC_GRP1_NUM_CHANNELS,
   NULL,
   adcerrorcallback,
-  0, 0,         /* CR1, CR2 */
-  0,            /* SMPR1 */
+  0,                        /* CR1 */
+  ADC_CR2_SWSTART,          /* CR2 */
+  0,                        /* SMPR1 */
   ADC_SMPR2_SMP_AN10(ADC_SAMPLE_4),
-  0,            /* SMPR3 */
+  0,                        /* SMPR3 */
   ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS),
-  0, 0, 0,      /* SQR2, SQR3, SQR4 */
+  0, 0, 0,                  /* SQR2, SQR3, SQR4 */
   ADC_SQR5_SQ1_N(ADC_CHANNEL_IN10)
 };
 
@@ -80,13 +81,14 @@ static const ADCConversionGroup adcgrpcfg2 = {
   ADC_GRP2_NUM_CHANNELS,
   adccallback,
   adcerrorcallback,
-  0, 0,         /* CR1, CR2 */
-  0,            /* SMPR1 */
+  0,                        /* CR1 */
+  ADC_CR2_SWSTART,          /* CR2 */
+  0,                        /* SMPR1 */
   ADC_SMPR2_SMP_AN11(ADC_SAMPLE_48) | ADC_SMPR2_SMP_AN10(ADC_SAMPLE_48) |
   ADC_SMPR2_SMP_SENSOR(ADC_SAMPLE_192) | ADC_SMPR2_SMP_VREF(ADC_SAMPLE_192),
-  0,            /* SMPR3 */
+  0,                        /* SMPR3 */
   ADC_SQR1_NUM_CH(ADC_GRP2_NUM_CHANNELS),
-  0, 0,         /* SQR2, SQR3 */
+  0, 0,                     /* SQR2, SQR3 */
   ADC_SQR4_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR4_SQ7_N(ADC_CHANNEL_VREFINT),
   ADC_SQR5_SQ6_N(ADC_CHANNEL_IN11)   | ADC_SQR5_SQ5_N(ADC_CHANNEL_IN10) |
   ADC_SQR5_SQ4_N(ADC_CHANNEL_IN11)   | ADC_SQR5_SQ3_N(ADC_CHANNEL_IN10) |
diff --git a/testhal/STM32L1xx/ADC/mcuconf.h b/testhal/STM32L1xx/ADC/mcuconf.h
index b2ad1faca..a75fb49cf 100644
--- a/testhal/STM32L1xx/ADC/mcuconf.h
+++ b/testhal/STM32L1xx/ADC/mcuconf.h
@@ -61,7 +61,8 @@
  */
 #define STM32_ADC_USE_ADC1                  TRUE
 #define STM32_ADC_ADC1_DMA_PRIORITY         2
-#define STM32_ADC_ADC1_IRQ_PRIORITY         5
+#define STM32_ADC_IRQ_PRIORITY              5
+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5
 
 /*
  * CAN driver system settings.
diff --git a/testhal/STM32L1xx/EXT/mcuconf.h b/testhal/STM32L1xx/EXT/mcuconf.h
index b2ad1faca..a75fb49cf 100644
--- a/testhal/STM32L1xx/EXT/mcuconf.h
+++ b/testhal/STM32L1xx/EXT/mcuconf.h
@@ -61,7 +61,8 @@
  */
 #define STM32_ADC_USE_ADC1                  TRUE
 #define STM32_ADC_ADC1_DMA_PRIORITY         2
-#define STM32_ADC_ADC1_IRQ_PRIORITY         5
+#define STM32_ADC_IRQ_PRIORITY              5
+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5
 
 /*
  * CAN driver system settings.
diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h
index b2ad1faca..a75fb49cf 100644
--- a/testhal/STM32L1xx/GPT/mcuconf.h
+++ b/testhal/STM32L1xx/GPT/mcuconf.h
@@ -61,7 +61,8 @@
  */
 #define STM32_ADC_USE_ADC1                  TRUE
 #define STM32_ADC_ADC1_DMA_PRIORITY         2
-#define STM32_ADC_ADC1_IRQ_PRIORITY         5
+#define STM32_ADC_IRQ_PRIORITY              5
+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5
 
 /*
  * CAN driver system settings.
diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h
index b4e3ea258..b17805089 100644
--- a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h
+++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h
@@ -61,7 +61,8 @@
  */
 #define STM32_ADC_USE_ADC1                  TRUE
 #define STM32_ADC_ADC1_DMA_PRIORITY         2
-#define STM32_ADC_ADC1_IRQ_PRIORITY         5
+#define STM32_ADC_IRQ_PRIORITY              5
+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5
 
 /*
  * CAN driver system settings.
diff --git a/testhal/STM32L1xx/PWM-ICU/mcuconf.h b/testhal/STM32L1xx/PWM-ICU/mcuconf.h
index 433013b38..b1e760697 100644
--- a/testhal/STM32L1xx/PWM-ICU/mcuconf.h
+++ b/testhal/STM32L1xx/PWM-ICU/mcuconf.h
@@ -61,7 +61,8 @@
  */
 #define STM32_ADC_USE_ADC1                  TRUE
 #define STM32_ADC_ADC1_DMA_PRIORITY         2
-#define STM32_ADC_ADC1_IRQ_PRIORITY         5
+#define STM32_ADC_IRQ_PRIORITY              5
+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5
 
 /*
  * CAN driver system settings.
diff --git a/testhal/STM32L1xx/SPI/mcuconf.h b/testhal/STM32L1xx/SPI/mcuconf.h
index 116f26170..0e6333b7a 100644
--- a/testhal/STM32L1xx/SPI/mcuconf.h
+++ b/testhal/STM32L1xx/SPI/mcuconf.h
@@ -61,7 +61,8 @@
  */
 #define STM32_ADC_USE_ADC1                  TRUE
 #define STM32_ADC_ADC1_DMA_PRIORITY         2
-#define STM32_ADC_ADC1_IRQ_PRIORITY         5
+#define STM32_ADC_IRQ_PRIORITY              5
+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5
 
 /*
  * CAN driver system settings.
diff --git a/testhal/STM32L1xx/UART/mcuconf.h b/testhal/STM32L1xx/UART/mcuconf.h
index d1b9069be..8a232fe4d 100644
--- a/testhal/STM32L1xx/UART/mcuconf.h
+++ b/testhal/STM32L1xx/UART/mcuconf.h
@@ -61,7 +61,8 @@
  */
 #define STM32_ADC_USE_ADC1                  TRUE
 #define STM32_ADC_ADC1_DMA_PRIORITY         2
-#define STM32_ADC_ADC1_IRQ_PRIORITY         5
+#define STM32_ADC_IRQ_PRIORITY              5
+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5
 
 /*
  * CAN driver system settings.
-- 
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