From e9c2b923593c2823ab61152fd4a2d23f7583aa1b Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Sun, 28 May 2017 13:11:05 +0000 Subject: Fixed bug #835. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10209 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/STM32F7xx/GPT-ADC/mcuconf.h | 8 +++++--- testhal/STM32/STM32F7xx/IRQ_STORM/mcuconf.h | 13 ++++++++++--- testhal/STM32/STM32F7xx/PWM-ICU/mcuconf.h | 12 +++++++----- testhal/STM32/STM32F7xx/SPI/mcuconf.h | 8 +++++--- testhal/STM32/STM32F7xx/USB_CDC/mcuconf.h | 8 +++++--- testhal/STM32/STM32F7xx/USB_RAW/mcuconf.h | 8 +++++--- 6 files changed, 37 insertions(+), 20 deletions(-) (limited to 'testhal/STM32') diff --git a/testhal/STM32/STM32F7xx/GPT-ADC/mcuconf.h b/testhal/STM32/STM32F7xx/GPT-ADC/mcuconf.h index 06ee27313..6eeb93bcb 100644 --- a/testhal/STM32/STM32F7xx/GPT-ADC/mcuconf.h +++ b/testhal/STM32/STM32F7xx/GPT-ADC/mcuconf.h @@ -18,7 +18,7 @@ #define MCUCONF_H /* - * STM32F4xx drivers configuration. + * STM32F7xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -60,7 +60,7 @@ #define STM32_MCO1PRE STM32_MCO1PRE_DIV1 #define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK #define STM32_MCO2PRE STM32_MCO2PRE_DIV4 -#define STM32_I2SSRC STM32_I2SSRC_PLLI2S +#define STM32_I2SSRC STM32_I2SSRC_OFF #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SP_VALUE 4 #define STM32_PLLI2SQ_VALUE 4 @@ -69,9 +69,11 @@ #define STM32_PLLSAIP_VALUE 4 #define STM32_PLLSAIQ_VALUE 4 #define STM32_PLLSAIR_VALUE 4 -#define STM32_PLLSAIDIVR STM32_PLLSAIDIVR_OFF +#define STM32_PLLSAIDIVQ_VALUE 2 +#define STM32_PLLSAIDIVR_VALUE 2 #define STM32_SAI1SEL STM32_SAI1SEL_OFF #define STM32_SAI2SEL STM32_SAI2SEL_OFF +#define STM32_LCDTFT_REQUIRED FALSE #define STM32_USART1SEL STM32_USART1SEL_PCLK2 #define STM32_USART2SEL STM32_USART2SEL_PCLK1 #define STM32_USART3SEL STM32_USART3SEL_PCLK1 diff --git a/testhal/STM32/STM32F7xx/IRQ_STORM/mcuconf.h b/testhal/STM32/STM32F7xx/IRQ_STORM/mcuconf.h index 065719f06..8b25dc014 100644 --- a/testhal/STM32/STM32F7xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32/STM32F7xx/IRQ_STORM/mcuconf.h @@ -18,7 +18,7 @@ #define MCUCONF_H /* - * STM32F4xx drivers configuration. + * STM32F7xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -60,7 +60,7 @@ #define STM32_MCO1PRE STM32_MCO1PRE_DIV1 #define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK #define STM32_MCO2PRE STM32_MCO2PRE_DIV4 -#define STM32_I2SSRC STM32_I2SSRC_PLLI2S +#define STM32_I2SSRC STM32_I2SSRC_OFF #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SP_VALUE 4 #define STM32_PLLI2SQ_VALUE 4 @@ -69,9 +69,11 @@ #define STM32_PLLSAIP_VALUE 4 #define STM32_PLLSAIQ_VALUE 4 #define STM32_PLLSAIR_VALUE 4 -#define STM32_PLLSAIDIVR STM32_PLLSAIDIVR_OFF +#define STM32_PLLSAIDIVQ_VALUE 2 +#define STM32_PLLSAIDIVR_VALUE 2 #define STM32_SAI1SEL STM32_SAI1SEL_OFF #define STM32_SAI2SEL STM32_SAI2SEL_OFF +#define STM32_LCDTFT_REQUIRED FALSE #define STM32_USART1SEL STM32_USART1SEL_PCLK2 #define STM32_USART2SEL STM32_USART2SEL_PCLK1 #define STM32_USART3SEL STM32_USART3SEL_PCLK1 @@ -183,6 +185,7 @@ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_USE_I2C4 FALSE #define STM32_I2C_BUSY_TIMEOUT 50 #define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) #define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) @@ -190,12 +193,16 @@ #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C4_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_I2C_I2C1_IRQ_PRIORITY 5 #define STM32_I2C_I2C2_IRQ_PRIORITY 5 #define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C4_IRQ_PRIORITY 5 #define STM32_I2C_I2C1_DMA_PRIORITY 3 #define STM32_I2C_I2C2_DMA_PRIORITY 3 #define STM32_I2C_I2C3_DMA_PRIORITY 3 +#define STM32_I2C_I2C4_DMA_PRIORITY 3 #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") /* diff --git a/testhal/STM32/STM32F7xx/PWM-ICU/mcuconf.h b/testhal/STM32/STM32F7xx/PWM-ICU/mcuconf.h index 90fb60cff..dd3ebf8e6 100644 --- a/testhal/STM32/STM32F7xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32/STM32F7xx/PWM-ICU/mcuconf.h @@ -18,7 +18,7 @@ #define MCUCONF_H /* - * STM32F4xx drivers configuration. + * STM32F7xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -60,7 +60,7 @@ #define STM32_MCO1PRE STM32_MCO1PRE_DIV1 #define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK #define STM32_MCO2PRE STM32_MCO2PRE_DIV4 -#define STM32_I2SSRC STM32_I2SSRC_PLLI2S +#define STM32_I2SSRC STM32_I2SSRC_OFF #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SP_VALUE 4 #define STM32_PLLI2SQ_VALUE 4 @@ -69,9 +69,11 @@ #define STM32_PLLSAIP_VALUE 4 #define STM32_PLLSAIQ_VALUE 4 #define STM32_PLLSAIR_VALUE 4 -#define STM32_PLLSAIDIVR STM32_PLLSAIDIVR_OFF +#define STM32_PLLSAIDIVQ_VALUE 2 +#define STM32_PLLSAIDIVR_VALUE 2 #define STM32_SAI1SEL STM32_SAI1SEL_OFF #define STM32_SAI2SEL STM32_SAI2SEL_OFF +#define STM32_LCDTFT_REQUIRED FALSE #define STM32_USART1SEL STM32_USART1SEL_PCLK2 #define STM32_USART2SEL STM32_USART2SEL_PCLK1 #define STM32_USART3SEL STM32_USART3SEL_PCLK1 @@ -94,7 +96,7 @@ * ADC driver system settings. */ #define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_USE_ADC2 FALSE #define STM32_ADC_USE_ADC3 FALSE #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) @@ -155,7 +157,7 @@ #define STM32_GPT_USE_TIM1 FALSE #define STM32_GPT_USE_TIM2 FALSE #define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE #define STM32_GPT_USE_TIM6 FALSE #define STM32_GPT_USE_TIM7 FALSE diff --git a/testhal/STM32/STM32F7xx/SPI/mcuconf.h b/testhal/STM32/STM32F7xx/SPI/mcuconf.h index 7b23aed48..295196690 100644 --- a/testhal/STM32/STM32F7xx/SPI/mcuconf.h +++ b/testhal/STM32/STM32F7xx/SPI/mcuconf.h @@ -18,7 +18,7 @@ #define MCUCONF_H /* - * STM32F4xx drivers configuration. + * STM32F7xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -60,7 +60,7 @@ #define STM32_MCO1PRE STM32_MCO1PRE_DIV1 #define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK #define STM32_MCO2PRE STM32_MCO2PRE_DIV4 -#define STM32_I2SSRC STM32_I2SSRC_PLLI2S +#define STM32_I2SSRC STM32_I2SSRC_OFF #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SP_VALUE 4 #define STM32_PLLI2SQ_VALUE 4 @@ -69,9 +69,11 @@ #define STM32_PLLSAIP_VALUE 4 #define STM32_PLLSAIQ_VALUE 4 #define STM32_PLLSAIR_VALUE 4 -#define STM32_PLLSAIDIVR STM32_PLLSAIDIVR_OFF +#define STM32_PLLSAIDIVQ_VALUE 2 +#define STM32_PLLSAIDIVR_VALUE 2 #define STM32_SAI1SEL STM32_SAI1SEL_OFF #define STM32_SAI2SEL STM32_SAI2SEL_OFF +#define STM32_LCDTFT_REQUIRED FALSE #define STM32_USART1SEL STM32_USART1SEL_PCLK2 #define STM32_USART2SEL STM32_USART2SEL_PCLK1 #define STM32_USART3SEL STM32_USART3SEL_PCLK1 diff --git a/testhal/STM32/STM32F7xx/USB_CDC/mcuconf.h b/testhal/STM32/STM32F7xx/USB_CDC/mcuconf.h index 6fb3bd0d6..ab94b0003 100644 --- a/testhal/STM32/STM32F7xx/USB_CDC/mcuconf.h +++ b/testhal/STM32/STM32F7xx/USB_CDC/mcuconf.h @@ -18,7 +18,7 @@ #define MCUCONF_H /* - * STM32F4xx drivers configuration. + * STM32F7xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -60,7 +60,7 @@ #define STM32_MCO1PRE STM32_MCO1PRE_DIV1 #define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK #define STM32_MCO2PRE STM32_MCO2PRE_DIV4 -#define STM32_I2SSRC STM32_I2SSRC_PLLI2S +#define STM32_I2SSRC STM32_I2SSRC_OFF #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SP_VALUE 4 #define STM32_PLLI2SQ_VALUE 4 @@ -69,9 +69,11 @@ #define STM32_PLLSAIP_VALUE 4 #define STM32_PLLSAIQ_VALUE 4 #define STM32_PLLSAIR_VALUE 4 -#define STM32_PLLSAIDIVR STM32_PLLSAIDIVR_OFF +#define STM32_PLLSAIDIVQ_VALUE 2 +#define STM32_PLLSAIDIVR_VALUE 2 #define STM32_SAI1SEL STM32_SAI1SEL_OFF #define STM32_SAI2SEL STM32_SAI2SEL_OFF +#define STM32_LCDTFT_REQUIRED FALSE #define STM32_USART1SEL STM32_USART1SEL_PCLK2 #define STM32_USART2SEL STM32_USART2SEL_PCLK1 #define STM32_USART3SEL STM32_USART3SEL_PCLK1 diff --git a/testhal/STM32/STM32F7xx/USB_RAW/mcuconf.h b/testhal/STM32/STM32F7xx/USB_RAW/mcuconf.h index 6fb3bd0d6..ab94b0003 100644 --- a/testhal/STM32/STM32F7xx/USB_RAW/mcuconf.h +++ b/testhal/STM32/STM32F7xx/USB_RAW/mcuconf.h @@ -18,7 +18,7 @@ #define MCUCONF_H /* - * STM32F4xx drivers configuration. + * STM32F7xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -60,7 +60,7 @@ #define STM32_MCO1PRE STM32_MCO1PRE_DIV1 #define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK #define STM32_MCO2PRE STM32_MCO2PRE_DIV4 -#define STM32_I2SSRC STM32_I2SSRC_PLLI2S +#define STM32_I2SSRC STM32_I2SSRC_OFF #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SP_VALUE 4 #define STM32_PLLI2SQ_VALUE 4 @@ -69,9 +69,11 @@ #define STM32_PLLSAIP_VALUE 4 #define STM32_PLLSAIQ_VALUE 4 #define STM32_PLLSAIR_VALUE 4 -#define STM32_PLLSAIDIVR STM32_PLLSAIDIVR_OFF +#define STM32_PLLSAIDIVQ_VALUE 2 +#define STM32_PLLSAIDIVR_VALUE 2 #define STM32_SAI1SEL STM32_SAI1SEL_OFF #define STM32_SAI2SEL STM32_SAI2SEL_OFF +#define STM32_LCDTFT_REQUIRED FALSE #define STM32_USART1SEL STM32_USART1SEL_PCLK2 #define STM32_USART2SEL STM32_USART2SEL_PCLK1 #define STM32_USART3SEL STM32_USART3SEL_PCLK1 -- cgit v1.2.3