From 4f3674f5f22d41dd58a6ea51d3a5fed89ef1990b Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Fri, 19 Feb 2016 16:32:09 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8912 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/STM32F7xx/GPT-ADC/chconf.h | 2 ++ testhal/STM32/STM32F7xx/IRQ_STORM/chconf.h | 2 ++ testhal/STM32/STM32F7xx/PWM-ICU/chconf.h | 2 ++ testhal/STM32/STM32F7xx/SPI/chconf.h | 2 ++ testhal/STM32/STM32F7xx/USB_CDC/chconf.h | 2 ++ testhal/STM32/STM32F7xx/USB_CDC/main.c | 29 ++++++++++++++++------------- testhal/STM32/STM32F7xx/USB_RAW/chconf.h | 2 ++ 7 files changed, 28 insertions(+), 13 deletions(-) (limited to 'testhal/STM32/STM32F7xx') diff --git a/testhal/STM32/STM32F7xx/GPT-ADC/chconf.h b/testhal/STM32/STM32F7xx/GPT-ADC/chconf.h index edd657ac1..95b002cc3 100644 --- a/testhal/STM32/STM32F7xx/GPT-ADC/chconf.h +++ b/testhal/STM32/STM32F7xx/GPT-ADC/chconf.h @@ -524,6 +524,8 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ +#define CORTEX_VTOR_INIT 0x00200000U + #endif /* _CHCONF_H_ */ /** @} */ diff --git a/testhal/STM32/STM32F7xx/IRQ_STORM/chconf.h b/testhal/STM32/STM32F7xx/IRQ_STORM/chconf.h index edd657ac1..95b002cc3 100644 --- a/testhal/STM32/STM32F7xx/IRQ_STORM/chconf.h +++ b/testhal/STM32/STM32F7xx/IRQ_STORM/chconf.h @@ -524,6 +524,8 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ +#define CORTEX_VTOR_INIT 0x00200000U + #endif /* _CHCONF_H_ */ /** @} */ diff --git a/testhal/STM32/STM32F7xx/PWM-ICU/chconf.h b/testhal/STM32/STM32F7xx/PWM-ICU/chconf.h index edd657ac1..95b002cc3 100644 --- a/testhal/STM32/STM32F7xx/PWM-ICU/chconf.h +++ b/testhal/STM32/STM32F7xx/PWM-ICU/chconf.h @@ -524,6 +524,8 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ +#define CORTEX_VTOR_INIT 0x00200000U + #endif /* _CHCONF_H_ */ /** @} */ diff --git a/testhal/STM32/STM32F7xx/SPI/chconf.h b/testhal/STM32/STM32F7xx/SPI/chconf.h index edd657ac1..95b002cc3 100644 --- a/testhal/STM32/STM32F7xx/SPI/chconf.h +++ b/testhal/STM32/STM32F7xx/SPI/chconf.h @@ -524,6 +524,8 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ +#define CORTEX_VTOR_INIT 0x00200000U + #endif /* _CHCONF_H_ */ /** @} */ diff --git a/testhal/STM32/STM32F7xx/USB_CDC/chconf.h b/testhal/STM32/STM32F7xx/USB_CDC/chconf.h index edd657ac1..95b002cc3 100644 --- a/testhal/STM32/STM32F7xx/USB_CDC/chconf.h +++ b/testhal/STM32/STM32F7xx/USB_CDC/chconf.h @@ -524,6 +524,8 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ +#define CORTEX_VTOR_INIT 0x00200000U + #endif /* _CHCONF_H_ */ /** @} */ diff --git a/testhal/STM32/STM32F7xx/USB_CDC/main.c b/testhal/STM32/STM32F7xx/USB_CDC/main.c index 16b298bc1..b75c37cda 100644 --- a/testhal/STM32/STM32F7xx/USB_CDC/main.c +++ b/testhal/STM32/STM32F7xx/USB_CDC/main.c @@ -34,17 +34,18 @@ #define TEST_WA_SIZE THD_WORKING_AREA_SIZE(256) static void cmd_mem(BaseSequentialStream *chp, int argc, char *argv[]) { - size_t n, size; + size_t n, total, largest; (void)argv; if (argc > 0) { chprintf(chp, "Usage: mem\r\n"); return; } - n = chHeapStatus(NULL, &size); + n = chHeapStatus(NULL, &total, &largest); chprintf(chp, "core free memory : %u bytes\r\n", chCoreGetStatusX()); chprintf(chp, "heap fragments : %u\r\n", n); - chprintf(chp, "heap free total : %u bytes\r\n", size); + chprintf(chp, "heap free total : %u bytes\r\n", total); + chprintf(chp, "heap free largest: %u bytes\r\n", largest); } static void cmd_threads(BaseSequentialStream *chp, int argc, char *argv[]) { @@ -56,13 +57,13 @@ static void cmd_threads(BaseSequentialStream *chp, int argc, char *argv[]) { chprintf(chp, "Usage: threads\r\n"); return; } - chprintf(chp, " addr stack prio refs state time\r\n"); + chprintf(chp, "stklimit stack addr prio state name\r\n"); tp = chRegFirstThread(); do { - chprintf(chp, "%08lx %08lx %4lu %4lu %9s\r\n", - (uint32_t)tp, (uint32_t)tp->p_ctx.r13, - (uint32_t)tp->p_prio, (uint32_t)(tp->p_refs - 1), - states[tp->p_state]); + chprintf(chp, "%08lx %08lx %08lx %4lu %9s %12s\r\n", + (uint32_t)tp->stklimit, (uint32_t)tp->ctx.r13, (uint32_t)tp, + (uint32_t)tp->prio, states[tp->state], + tp->name == NULL ? "" : tp->name); tp = chRegNextThread(tp); } while (tp != NULL); } @@ -209,14 +210,16 @@ int main(void) { chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); /* - * Normal main() thread activity, in this demo it does nothing except - * sleeping in a loop and check the button state. + * Normal main() thread activity, spawning shells. */ while (true) { - if (!shelltp && (SDU2.config->usbp->state == USB_ACTIVE)) - shelltp = shellCreate(&shell_cfg1, SHELL_WA_SIZE, NORMALPRIO); + if (!shelltp && (SDU2.config->usbp->state == USB_ACTIVE)) { + shelltp = chThdCreateFromHeap(NULL, SHELL_WA_SIZE, NORMALPRIO + 1, + shellThread, (void *)&shell_cfg1); + } else if (chThdTerminatedX(shelltp)) { - chThdRelease(shelltp); /* Recovers memory of the previous shell. */ + chThdWait(shelltp); + chHeapFree(chthdGetStackLimitX(shelltp)); shelltp = NULL; /* Triggers spawning of a new shell. */ } #if 0 diff --git a/testhal/STM32/STM32F7xx/USB_RAW/chconf.h b/testhal/STM32/STM32F7xx/USB_RAW/chconf.h index edd657ac1..95b002cc3 100644 --- a/testhal/STM32/STM32F7xx/USB_RAW/chconf.h +++ b/testhal/STM32/STM32F7xx/USB_RAW/chconf.h @@ -524,6 +524,8 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ +#define CORTEX_VTOR_INIT 0x00200000U + #endif /* _CHCONF_H_ */ /** @} */ -- cgit v1.2.3