From 6b5ddb71fcb396ec826a283427b4771018d193e8 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 28 Feb 2011 18:44:46 +0000 Subject: GPT driver model, STM32 GPT driver implementation, not tested, documentation not done yet. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2779 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/GPT/Makefile | 204 +++++++++++++++++ testhal/STM32/GPT/ch.ld | 113 ++++++++++ testhal/STM32/GPT/chconf.h | 507 ++++++++++++++++++++++++++++++++++++++++++ testhal/STM32/GPT/halconf.h | 280 +++++++++++++++++++++++ testhal/STM32/GPT/main.c | 71 ++++++ testhal/STM32/GPT/mcuconf.h | 142 ++++++++++++ testhal/STM32/GPT/openocd.bat | 3 + testhal/STM32/GPT/openocd.cfg | 13 ++ testhal/STM32/GPT/readme.txt | 26 +++ testhal/STM32/GPT/run | 8 + 10 files changed, 1367 insertions(+) create mode 100644 testhal/STM32/GPT/Makefile create mode 100644 testhal/STM32/GPT/ch.ld create mode 100644 testhal/STM32/GPT/chconf.h create mode 100644 testhal/STM32/GPT/halconf.h create mode 100644 testhal/STM32/GPT/main.c create mode 100644 testhal/STM32/GPT/mcuconf.h create mode 100644 testhal/STM32/GPT/openocd.bat create mode 100644 testhal/STM32/GPT/openocd.cfg create mode 100644 testhal/STM32/GPT/readme.txt create mode 100644 testhal/STM32/GPT/run (limited to 'testhal/STM32/GPT') diff --git a/testhal/STM32/GPT/Makefile b/testhal/STM32/GPT/Makefile new file mode 100644 index 000000000..a5c76f1c8 --- /dev/null +++ b/testhal/STM32/GPT/Makefile @@ -0,0 +1,204 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/GPT/ch.ld b/testhal/STM32/GPT/ch.ld new file mode 100644 index 000000000..44f494121 --- /dev/null +++ b/testhal/STM32/GPT/ch.ld @@ -0,0 +1,113 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103 memory setup. + */ +__main_stack_size__ = 0x0400; +__process_stack_size__ = 0x0400; +__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; + +MEMORY +{ + flash : org = 0x08000000, len = 128k + ram : org = 0x20000000, len = 20k +} + +__ram_start__ = ORIGIN(ram); +__ram_size__ = LENGTH(ram); +__ram_end__ = __ram_start__ + __ram_size__; + +SECTIONS +{ + . = 0; + + .text : ALIGN(16) SUBALIGN(16) + { + _text = .; + KEEP(*(vectors)) + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ctors : + { + PROVIDE(_ctors_start_ = .); + KEEP(*(SORT(.ctors.*))) + KEEP(*(.ctors)) + PROVIDE(_ctors_end_ = .); + } > flash + + .dtors : + { + PROVIDE(_dtors_start_ = .); + KEEP(*(SORT(.dtors.*))) + KEEP(*(.dtors)) + PROVIDE(_dtors_end_ = .); + } > flash + + .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} + + __exidx_start = .; + .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash + __exidx_end = .; + + .eh_frame_hdr : {*(.eh_frame_hdr)} + + .eh_frame : ONLY_IF_RO {*(.eh_frame)} + + . = ALIGN(4); + _etext = .; + _textdata = _etext; + + .data : + { + _data = .; + *(.data) + . = ALIGN(4); + *(.data.*) + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + _edata = .; + } > ram AT > flash + + .bss : + { + _bss_start = .; + *(.bss) + . = ALIGN(4); + *(.bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + _bss_end = .; + } > ram +} + +PROVIDE(end = .); +_end = .; + +__heap_base__ = _end; +__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/GPT/chconf.h b/testhal/STM32/GPT/chconf.h new file mode 100644 index 000000000..3353391ca --- /dev/null +++ b/testhal/STM32/GPT/chconf.h @@ -0,0 +1,507 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_COREMEM. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** + * @brief Exotic optimization. + * @details If defined then a CPU register is used as storage for the global + * @p currp variable. Caching this variable in a register greatly + * improves both space and time OS efficiency. A side effect is that + * one less register has to be saved during the context switch + * resulting in lower RAM usage and faster context switch. + * + * @note This option is only usable with the GCC compiler and is only useful + * on processors with many registers like ARM cores. + * @note If this option is enabled then ALL the libraries linked to the + * ChibiOS/RT code must be recompiled with the GCC option @p + * -ffixed-@. + * @note This option must be enabled in the Makefile, it is listed here for + * documentation only. + */ +#if defined(__DOXYGEN__) +#define CH_CURRP_REGISTER_CACHE "reg" +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/GPT/halconf.h b/testhal/STM32/GPT/halconf.h new file mode 100644 index 000000000..ce33dc633 --- /dev/null +++ b/testhal/STM32/GPT/halconf.h @@ -0,0 +1,280 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT TRUE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/GPT/main.c b/testhal/STM32/GPT/main.c new file mode 100644 index 000000000..771434029 --- /dev/null +++ b/testhal/STM32/GPT/main.c @@ -0,0 +1,71 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * Red LEDs blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + while (TRUE) { + palClearPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + palSetPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Initializes the GPT driver 1. + */ +// gptStart(&GPTD1, &pwmcfg); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32/GPT/mcuconf.h b/testhal/STM32/GPT/mcuconf.h new file mode 100644 index 000000000..6e869607a --- /dev/null +++ b/testhal/STM32/GPT/mcuconf.h @@ -0,0 +1,142 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 3 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 TRUE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 2 +#define STM32_SPI_SPI2_DMA_PRIORITY 2 +#define STM32_SPI_SPI3_DMA_PRIORITY 2 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32/GPT/openocd.bat b/testhal/STM32/GPT/openocd.bat new file mode 100644 index 000000000..a8b306318 --- /dev/null +++ b/testhal/STM32/GPT/openocd.bat @@ -0,0 +1,3 @@ +@echo off +start /MIN openocd.exe +start telnet 127.0.0.1 4444 diff --git a/testhal/STM32/GPT/openocd.cfg b/testhal/STM32/GPT/openocd.cfg new file mode 100644 index 000000000..f40febe66 --- /dev/null +++ b/testhal/STM32/GPT/openocd.cfg @@ -0,0 +1,13 @@ +#daemon configuration +telnet_port 4444 +gdb_port 3333 + +# GDB can also flash my flash! +gdb_memory_map enable +gdb_flash_program enable +gdb_breakpoint_override hard + +set WORKAREASIZE 0x5000 + +source [find interface/olimex-arm-usb-ocd.cfg] +source [find target/stm32.cfg] diff --git a/testhal/STM32/GPT/readme.txt b/testhal/STM32/GPT/readme.txt new file mode 100644 index 000000000..4c3fdf2fa --- /dev/null +++ b/testhal/STM32/GPT/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - PWM driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo will on an Olimex STM32-P103 board. + +** The Demo ** + +The application demonstrates the use of the STM32 PWM driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32/GPT/run b/testhal/STM32/GPT/run new file mode 100644 index 000000000..818d0e307 --- /dev/null +++ b/testhal/STM32/GPT/run @@ -0,0 +1,8 @@ +soft_reset_halt +wait_halt +poll +flash probe 0 +stm32x mass_erase 0 +flash write_bank 0 ch.bin 0 +soft_reset_halt +resume -- cgit v1.2.3 From ab3e72edaa76d549f42947f1cfd1479545d9341c Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 28 Feb 2011 18:58:07 +0000 Subject: GPT tested. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2780 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/GPT/main.c | 35 +++++++++++++++++------------------ 1 file changed, 17 insertions(+), 18 deletions(-) (limited to 'testhal/STM32/GPT') diff --git a/testhal/STM32/GPT/main.c b/testhal/STM32/GPT/main.c index 771434029..6790e5eb0 100644 --- a/testhal/STM32/GPT/main.c +++ b/testhal/STM32/GPT/main.c @@ -21,21 +21,22 @@ #include "hal.h" /* - * Red LEDs blinker thread, times are in milliseconds. + * GPT1 callback. */ -static WORKING_AREA(waThread1, 128); -static msg_t Thread1(void *arg) { +static void gpt1cb(GPTDriver *gptp) { - (void)arg; - while (TRUE) { - palClearPad(IOPORT3, GPIOC_LED); - chThdSleepMilliseconds(500); - palSetPad(IOPORT3, GPIOC_LED); - chThdSleepMilliseconds(500); - } - return 0; + (void)gptp; + palTogglePad(IOPORT3, GPIOC_LED); } +/* + * GPT1 configuration. + */ +static const GPTConfig gpt1cfg = { + 10000, /* 10KHz timer clock.*/ + gpt1cb /* Timer callback.*/ +}; + /* * Application entry point. */ @@ -51,21 +52,19 @@ int main(void) { halInit(); chSysInit(); - /* - * Creates the blinker thread. - */ - chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); - /* * Initializes the GPT driver 1. */ -// gptStart(&GPTD1, &pwmcfg); + gptStart(&GPTD1, &gpt1cfg); /* * Normal main() thread activity, in this demo it does nothing. */ while (TRUE) { - chThdSleepMilliseconds(500); + gptStartContinuous(&GPTD1, 5000); + chThdSleepMilliseconds(5000); + gptStartContinuous(&GPTD1, 2500); + chThdSleepMilliseconds(5000); } return 0; } -- cgit v1.2.3 From 006c13952ffee23f7384b60efa95186333fbf69f Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 28 Feb 2011 19:16:52 +0000 Subject: Better GPT test. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2781 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/GPT/main.c | 28 +++++++++++++++++++++++++--- 1 file changed, 25 insertions(+), 3 deletions(-) (limited to 'testhal/STM32/GPT') diff --git a/testhal/STM32/GPT/main.c b/testhal/STM32/GPT/main.c index 6790e5eb0..8a07efec4 100644 --- a/testhal/STM32/GPT/main.c +++ b/testhal/STM32/GPT/main.c @@ -26,7 +26,19 @@ static void gpt1cb(GPTDriver *gptp) { (void)gptp; - palTogglePad(IOPORT3, GPIOC_LED); + palClearPad(IOPORT3, GPIOC_LED); + chSysLockFromIsr(); + gptStartOneShotI(&GPTD2, 200); /* 0.02 second pulse.*/ + chSysUnlockFromIsr(); +} + +/* + * GPT2 callback. + */ +static void gpt2cb(GPTDriver *gptp) { + + (void)gptp; + palSetPad(IOPORT3, GPIOC_LED); } /* @@ -37,6 +49,14 @@ static const GPTConfig gpt1cfg = { gpt1cb /* Timer callback.*/ }; +/* + * GPT2 configuration. + */ +static const GPTConfig gpt2cfg = { + 10000, /* 10KHz timer clock.*/ + gpt2cb /* Timer callback.*/ +}; + /* * Application entry point. */ @@ -53,12 +73,14 @@ int main(void) { chSysInit(); /* - * Initializes the GPT driver 1. + * Initializes the GPT drivers 1 and 2. */ gptStart(&GPTD1, &gpt1cfg); + gptStart(&GPTD2, &gpt2cfg); /* - * Normal main() thread activity, in this demo it does nothing. + * Normal main() thread activity, it changes the GPT1 period every + * five seconds. */ while (TRUE) { gptStartContinuous(&GPTD1, 5000); -- cgit v1.2.3 From a5138f8fac4b576c67e70e00453982492055ef15 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 28 Feb 2011 20:30:51 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2783 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/GPT/main.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'testhal/STM32/GPT') diff --git a/testhal/STM32/GPT/main.c b/testhal/STM32/GPT/main.c index 8a07efec4..636940584 100644 --- a/testhal/STM32/GPT/main.c +++ b/testhal/STM32/GPT/main.c @@ -76,7 +76,9 @@ int main(void) { * Initializes the GPT drivers 1 and 2. */ gptStart(&GPTD1, &gpt1cfg); + gptPolledDelay(&GPTD1, 10); /* Small dealy.*/ gptStart(&GPTD2, &gpt2cfg); + gptPolledDelay(&GPTD2, 10); /* Small dealy.*/ /* * Normal main() thread activity, it changes the GPT1 period every -- cgit v1.2.3 From b122874af2de2ed2243c274b363caf789eeed157 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 5 Mar 2011 09:02:15 +0000 Subject: IRQ STORM test for the STM32 added. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2791 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/GPT/readme.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal/STM32/GPT') diff --git a/testhal/STM32/GPT/readme.txt b/testhal/STM32/GPT/readme.txt index 4c3fdf2fa..3f3164120 100644 --- a/testhal/STM32/GPT/readme.txt +++ b/testhal/STM32/GPT/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/RT HAL - PWM driver demo for STM32. ** +** ChibiOS/RT HAL - GPT driver demo for STM32. ** ***************************************************************************** ** TARGET ** @@ -8,7 +8,7 @@ The demo will on an Olimex STM32-P103 board. ** The Demo ** -The application demonstrates the use of the STM32 PWM driver. +The application demonstrates the use of the STM32 GPT driver. ** Build Procedure ** -- cgit v1.2.3 From e7e79a6ccb4f3e320b2b8b7bad1b14d65218641d Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 18 Mar 2011 18:38:08 +0000 Subject: License updated. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2827 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/GPT/ch.ld | 3 ++- testhal/STM32/GPT/chconf.h | 3 ++- testhal/STM32/GPT/halconf.h | 3 ++- testhal/STM32/GPT/main.c | 3 ++- testhal/STM32/GPT/mcuconf.h | 3 ++- 5 files changed, 10 insertions(+), 5 deletions(-) (limited to 'testhal/STM32/GPT') diff --git a/testhal/STM32/GPT/ch.ld b/testhal/STM32/GPT/ch.ld index 44f494121..ae79ddd40 100644 --- a/testhal/STM32/GPT/ch.ld +++ b/testhal/STM32/GPT/ch.ld @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/GPT/chconf.h b/testhal/STM32/GPT/chconf.h index 3353391ca..04fa822cc 100644 --- a/testhal/STM32/GPT/chconf.h +++ b/testhal/STM32/GPT/chconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/GPT/halconf.h b/testhal/STM32/GPT/halconf.h index ce33dc633..f804593b0 100644 --- a/testhal/STM32/GPT/halconf.h +++ b/testhal/STM32/GPT/halconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/GPT/main.c b/testhal/STM32/GPT/main.c index 636940584..57b2977d1 100644 --- a/testhal/STM32/GPT/main.c +++ b/testhal/STM32/GPT/main.c @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/GPT/mcuconf.h b/testhal/STM32/GPT/mcuconf.h index 6e869607a..32fbe68ef 100644 --- a/testhal/STM32/GPT/mcuconf.h +++ b/testhal/STM32/GPT/mcuconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. -- cgit v1.2.3 From be4c72c7a3e9e11a23ad5d6de709957adffa06ff Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 1 Apr 2011 09:11:35 +0000 Subject: Updated the various STM32 mcuconf.h files with the ICU settings. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2859 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/GPT/mcuconf.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'testhal/STM32/GPT') diff --git a/testhal/STM32/GPT/mcuconf.h b/testhal/STM32/GPT/mcuconf.h index 32fbe68ef..90a7e9fc7 100644 --- a/testhal/STM32/GPT/mcuconf.h +++ b/testhal/STM32/GPT/mcuconf.h @@ -74,6 +74,20 @@ #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 + /* * PWM driver system settings. */ -- cgit v1.2.3 From d8420eb83a4b843ad23d0fbe77fea36272adc525 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 1 Apr 2011 13:06:44 +0000 Subject: Added advanced mode and BTRD handling to the STM32 PWM driver. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2861 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/GPT/mcuconf.h | 1 + 1 file changed, 1 insertion(+) (limited to 'testhal/STM32/GPT') diff --git a/testhal/STM32/GPT/mcuconf.h b/testhal/STM32/GPT/mcuconf.h index 90a7e9fc7..c7dc8742c 100644 --- a/testhal/STM32/GPT/mcuconf.h +++ b/testhal/STM32/GPT/mcuconf.h @@ -91,6 +91,7 @@ /* * PWM driver system settings. */ +#define STM32_PWM_USE_ADVANCED TRUE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE -- cgit v1.2.3 From 618a978da8f1b570236914e034fb91aa980b9ffc Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 10 Apr 2011 16:45:41 +0000 Subject: Added DMA sharing in the STM32 HAL. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2874 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/GPT/mcuconf.h | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) (limited to 'testhal/STM32/GPT') diff --git a/testhal/STM32/GPT/mcuconf.h b/testhal/STM32/GPT/mcuconf.h index c7dc8742c..023c2ef9f 100644 --- a/testhal/STM32/GPT/mcuconf.h +++ b/testhal/STM32/GPT/mcuconf.h @@ -52,7 +52,7 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 3 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. @@ -129,9 +129,7 @@ #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() /* * UART driver system settings. @@ -145,9 +143,7 @@ #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* * USB driver system settings. -- cgit v1.2.3 From c878b791ebb49dc5fca876ec3b53dfaeb38b016d Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 17 Apr 2011 16:46:51 +0000 Subject: Cortex-Mx linker scripts updated. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2885 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/GPT/ch.ld | 66 ++++++++++++++++++++++++++++++------------------- 1 file changed, 41 insertions(+), 25 deletions(-) (limited to 'testhal/STM32/GPT') diff --git a/testhal/STM32/GPT/ch.ld b/testhal/STM32/GPT/ch.ld index ae79ddd40..4d97e7682 100644 --- a/testhal/STM32/GPT/ch.ld +++ b/testhal/STM32/GPT/ch.ld @@ -38,11 +38,32 @@ __ram_end__ = __ram_start__ + __ram_size__; SECTIONS { . = 0; + _text = .; - .text : ALIGN(16) SUBALIGN(16) + startup : ALIGN(16) SUBALIGN(16) { - _text = .; KEEP(*(vectors)) + } > flash + + constructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE(__init_array_end = .); + } > flash + + destructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__fini_array_start = .); + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + PROVIDE(__fini_array_end = .); + } > flash + + .text : ALIGN(16) SUBALIGN(16) + { + *(.text.startup.*) *(.text) *(.text.*) *(.rodata) @@ -52,31 +73,26 @@ SECTIONS *(.gcc*) } > flash - .ctors : + .ARM.extab : { - PROVIDE(_ctors_start_ = .); - KEEP(*(SORT(.ctors.*))) - KEEP(*(.ctors)) - PROVIDE(_ctors_end_ = .); + *(.ARM.extab* .gnu.linkonce.armextab.*) } > flash - .dtors : + .ARM.exidx : { + PROVIDE(__exidx_start = .); + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + PROVIDE(__exidx_end = .); + } > flash + + .eh_frame_hdr : { - PROVIDE(_dtors_start_ = .); - KEEP(*(SORT(.dtors.*))) - KEEP(*(.dtors)) - PROVIDE(_dtors_end_ = .); + *(.eh_frame_hdr) } > flash - .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} - - __exidx_start = .; - .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash - __exidx_end = .; - - .eh_frame_hdr : {*(.eh_frame_hdr)} - - .eh_frame : ONLY_IF_RO {*(.eh_frame)} + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash . = ALIGN(4); _etext = .; @@ -84,26 +100,26 @@ SECTIONS .data : { - _data = .; + PROVIDE(_data = .); *(.data) . = ALIGN(4); *(.data.*) . = ALIGN(4); *(.ramtext) . = ALIGN(4); - _edata = .; + PROVIDE(_edata = .); } > ram AT > flash .bss : { - _bss_start = .; + PROVIDE(_bss_start = .); *(.bss) . = ALIGN(4); *(.bss.*) . = ALIGN(4); *(COMMON) . = ALIGN(4); - _bss_end = .; + PROVIDE(_bss_end = .); } > ram } -- cgit v1.2.3 From dfc2c1e189dff36c57dfa521ac33289fe34972d2 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 23 Apr 2011 17:37:09 +0000 Subject: Updated all the HAL configuration files. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2900 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/GPT/halconf.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'testhal/STM32/GPT') diff --git a/testhal/STM32/GPT/halconf.h b/testhal/STM32/GPT/halconf.h index f804593b0..a2439fda3 100644 --- a/testhal/STM32/GPT/halconf.h +++ b/testhal/STM32/GPT/halconf.h @@ -69,6 +69,13 @@ #define HAL_USE_I2C FALSE #endif +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + /** * @brief Enables the MAC subsystem. */ -- cgit v1.2.3 From 82215e70199aa16ccad770a0e47ca5131a3f8b93 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 8 May 2011 09:16:22 +0000 Subject: All halcof.h files updated for the SDC driver. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2932 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/GPT/halconf.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'testhal/STM32/GPT') diff --git a/testhal/STM32/GPT/halconf.h b/testhal/STM32/GPT/halconf.h index a2439fda3..db8540b7e 100644 --- a/testhal/STM32/GPT/halconf.h +++ b/testhal/STM32/GPT/halconf.h @@ -97,6 +97,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC TRUE +#endif + /** * @brief Enables the SERIAL subsystem. */ -- cgit v1.2.3 From 85f17ebe017f0ef2a42d96eb3525346db5b9c65e Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 13 May 2011 17:20:39 +0000 Subject: Customer CR. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2951 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/GPT/chconf.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'testhal/STM32/GPT') diff --git a/testhal/STM32/GPT/chconf.h b/testhal/STM32/GPT/chconf.h index 04fa822cc..14109b635 100644 --- a/testhal/STM32/GPT/chconf.h +++ b/testhal/STM32/GPT/chconf.h @@ -90,6 +90,23 @@ #define CH_MEMCORE_SIZE 0 #endif +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + /*===========================================================================*/ /* Performance options. */ /*===========================================================================*/ -- cgit v1.2.3 From 8af2607871d3a2f5bc92ce9fb095a23d7adab27b Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 14 May 2011 05:24:10 +0000 Subject: Updated HAL configuration files with SDC driver settings. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2953 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/GPT/halconf.h | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) (limited to 'testhal/STM32/GPT') diff --git a/testhal/STM32/GPT/halconf.h b/testhal/STM32/GPT/halconf.h index db8540b7e..9595fe9b7 100644 --- a/testhal/STM32/GPT/halconf.h +++ b/testhal/STM32/GPT/halconf.h @@ -242,6 +242,36 @@ /* PWM driver related settings. */ /*===========================================================================*/ +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + /*===========================================================================*/ /* SERIAL driver related settings. */ /*===========================================================================*/ -- cgit v1.2.3 From 67e6534f658113f8bdfccab5fb6373214501d32b Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 14 May 2011 07:05:46 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2955 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/GPT/halconf.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal/STM32/GPT') diff --git a/testhal/STM32/GPT/halconf.h b/testhal/STM32/GPT/halconf.h index 9595fe9b7..c5ea28ae7 100644 --- a/testhal/STM32/GPT/halconf.h +++ b/testhal/STM32/GPT/halconf.h @@ -101,7 +101,7 @@ * @brief Enables the SDC subsystem. */ #if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC TRUE +#define HAL_USE_SDC FALSE #endif /** -- cgit v1.2.3 From 391474c15f0695d4b1bbe1549fefc98ef3cf9e4d Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 14 May 2011 07:11:40 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2956 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/GPT/halconf.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal/STM32/GPT') diff --git a/testhal/STM32/GPT/halconf.h b/testhal/STM32/GPT/halconf.h index c5ea28ae7..b4361f9b9 100644 --- a/testhal/STM32/GPT/halconf.h +++ b/testhal/STM32/GPT/halconf.h @@ -73,7 +73,7 @@ * @brief Enables the ICU subsystem. */ #if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU TRUE +#define HAL_USE_ICU FALSE #endif /** -- cgit v1.2.3 From b4aa14e88c9e28a16a5f9c0c220fac6cc36750ad Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 18 May 2011 09:03:50 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2971 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/GPT/chconf.h | 20 -------------------- 1 file changed, 20 deletions(-) (limited to 'testhal/STM32/GPT') diff --git a/testhal/STM32/GPT/chconf.h b/testhal/STM32/GPT/chconf.h index 14109b635..ccde82347 100644 --- a/testhal/STM32/GPT/chconf.h +++ b/testhal/STM32/GPT/chconf.h @@ -123,26 +123,6 @@ #define CH_OPTIMIZE_SPEED TRUE #endif -/** - * @brief Exotic optimization. - * @details If defined then a CPU register is used as storage for the global - * @p currp variable. Caching this variable in a register greatly - * improves both space and time OS efficiency. A side effect is that - * one less register has to be saved during the context switch - * resulting in lower RAM usage and faster context switch. - * - * @note This option is only usable with the GCC compiler and is only useful - * on processors with many registers like ARM cores. - * @note If this option is enabled then ALL the libraries linked to the - * ChibiOS/RT code must be recompiled with the GCC option @p - * -ffixed-@. - * @note This option must be enabled in the Makefile, it is listed here for - * documentation only. - */ -#if defined(__DOXYGEN__) -#define CH_CURRP_REGISTER_CACHE "reg" -#endif - /*===========================================================================*/ /* Subsystem options. */ /*===========================================================================*/ -- cgit v1.2.3 From 3495905f51318549a2bd6764360a4812aac869fa Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 19 May 2011 17:46:52 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2974 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/GPT/chconf.h | 1 - 1 file changed, 1 deletion(-) (limited to 'testhal/STM32/GPT') diff --git a/testhal/STM32/GPT/chconf.h b/testhal/STM32/GPT/chconf.h index ccde82347..1bfd36e58 100644 --- a/testhal/STM32/GPT/chconf.h +++ b/testhal/STM32/GPT/chconf.h @@ -278,7 +278,6 @@ * @details If enabled then the I/O queues APIs are included in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. */ #if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) #define CH_USE_QUEUES TRUE -- cgit v1.2.3 From 6b6790350e7861f2a15b308d84bc052681d1d150 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 19 May 2011 18:54:35 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2980 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/GPT/chconf.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'testhal/STM32/GPT') diff --git a/testhal/STM32/GPT/chconf.h b/testhal/STM32/GPT/chconf.h index 1bfd36e58..c9c4c286a 100644 --- a/testhal/STM32/GPT/chconf.h +++ b/testhal/STM32/GPT/chconf.h @@ -84,7 +84,7 @@ * * @note In order to let the OS manage the whole RAM the linker script must * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_COREMEM. + * @note Requires @p CH_USE_MEMCORE. */ #if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) #define CH_MEMCORE_SIZE 0 @@ -300,7 +300,7 @@ * in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or * @p CH_USE_SEMAPHORES. * @note Mutexes are recommended. */ @@ -315,7 +315,7 @@ * * @note The default is @p FALSE. * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the * appropriate documentation. */ #if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -- cgit v1.2.3 From b3ab17b27821114133e2ef8ffa46edb7a5a74097 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 22 May 2011 09:45:47 +0000 Subject: Reordered STM32 drivers default DMA priorities. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2994 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/GPT/mcuconf.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'testhal/STM32/GPT') diff --git a/testhal/STM32/GPT/mcuconf.h b/testhal/STM32/GPT/mcuconf.h index 023c2ef9f..b2b7c525c 100644 --- a/testhal/STM32/GPT/mcuconf.h +++ b/testhal/STM32/GPT/mcuconf.h @@ -50,7 +50,7 @@ * ADC driver system settings. */ #define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 3 +#define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 #define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() @@ -123,9 +123,9 @@ #define STM32_SPI_USE_SPI1 TRUE #define STM32_SPI_USE_SPI2 TRUE #define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 2 -#define STM32_SPI_SPI2_DMA_PRIORITY 2 -#define STM32_SPI_SPI3_DMA_PRIORITY 2 +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10 -- cgit v1.2.3