From ec0a1f48ad75964af7486c8a4687202b5cb3853d Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 13 Feb 2013 12:54:44 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5177 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/ports/GCC/PPC/SPC56ELxx/core.s | 85 ++++++++++++++++++++++++--------------- 1 file changed, 53 insertions(+), 32 deletions(-) (limited to 'os') diff --git a/os/ports/GCC/PPC/SPC56ELxx/core.s b/os/ports/GCC/PPC/SPC56ELxx/core.s index 7d2f29370..166b62a3d 100644 --- a/os/ports/GCC/PPC/SPC56ELxx/core.s +++ b/os/ports/GCC/PPC/SPC56ELxx/core.s @@ -107,6 +107,13 @@ #define MAS3_SR 0x00000001 /** @} */ +/** + * @name LICSR1 registers definitions + * @{ + */ +#define LICSR1_ICE 0x00000001 +/** @} */ + /** * @name MSR default settings */ @@ -144,6 +151,13 @@ MAS3_UW | MAS3_SW | MAS3_UR | MAS3_SR) /** @} */ +/** + * @name LICSR1 default settings + * @{ + */ +#define LICSR1_DEFAULT (LICSR1_ICE) +/** @} */ + #if !defined(__DOXYGEN__) .section .handlers, "ax" @@ -300,7 +314,7 @@ _coreinit: mtspr 413, %r3 mtspr 414, %r3 mtspr 415, %r3 - mtspr 528, %r3 /* IVOR32-34 */ + mtspr 528, %r3 /* IVOR32-34 */ mtspr 529, %r3 mtspr 530, %r3 @@ -308,110 +322,117 @@ _coreinit: * TLB0 allocated to flash. */ lis %r3, TLB0_MAS0@h - mtspr 624, %r3 /* MAS0 */ + mtspr 624, %r3 /* MAS0 */ lis %r3, TLB0_MAS1@h ori %r3, %r3, TLB0_MAS1@l - mtspr 625, %r3 /* MAS1 */ + mtspr 625, %r3 /* MAS1 */ lis %r3, TLB0_MAS2@h ori %r3, %r3, TLB0_MAS2@l - mtspr 626, %r3 /* MAS2 */ + mtspr 626, %r3 /* MAS2 */ lis %r3, TLB0_MAS3@h ori %r3, %r3, TLB0_MAS3@l - mtspr 627, %r3 /* MAS3 */ + mtspr 627, %r3 /* MAS3 */ tlbwe /* * TLB1 allocated to internal RAM. */ lis %r3, TLB1_MAS0@h - mtspr 624, %r3 /* MAS0 */ + mtspr 624, %r3 /* MAS0 */ lis %r3, TLB1_MAS1@h ori %r3, %r3, TLB1_MAS1@l - mtspr 625, %r3 /* MAS1 */ + mtspr 625, %r3 /* MAS1 */ lis %r3, TLB1_MAS2@h ori %r3, %r3, TLB1_MAS2@l - mtspr 626, %r3 /* MAS2 */ + mtspr 626, %r3 /* MAS2 */ lis %r3, TLB1_MAS3@h ori %r3, %r3, TLB1_MAS3@l - mtspr 627, %r3 /* MAS3 */ + mtspr 627, %r3 /* MAS3 */ tlbwe /* * TLB2 allocated to internal Peripherals Bridge A. */ lis %r3, TLB2_MAS0@h - mtspr 624, %r3 /* MAS0 */ + mtspr 624, %r3 /* MAS0 */ lis %r3, TLB2_MAS1@h ori %r3, %r3, TLB2_MAS1@l - mtspr 625, %r3 /* MAS1 */ + mtspr 625, %r3 /* MAS1 */ lis %r3, TLB2_MAS2@h ori %r3, %r3, TLB2_MAS2@l - mtspr 626, %r3 /* MAS2 */ + mtspr 626, %r3 /* MAS2 */ lis %r3, TLB2_MAS3@h ori %r3, %r3, TLB2_MAS3@l - mtspr 627, %r3 /* MAS3 */ + mtspr 627, %r3 /* MAS3 */ tlbwe /* * TLB3 allocated to internal Peripherals Bridge B. */ lis %r3, TLB3_MAS0@h - mtspr 624, %r3 /* MAS0 */ + mtspr 624, %r3 /* MAS0 */ lis %r3, TLB3_MAS1@h ori %r3, %r3, TLB3_MAS1@l - mtspr 625, %r3 /* MAS1 */ + mtspr 625, %r3 /* MAS1 */ lis %r3, TLB3_MAS2@h ori %r3, %r3, TLB3_MAS2@l - mtspr 626, %r3 /* MAS2 */ + mtspr 626, %r3 /* MAS2 */ lis %r3, TLB3_MAS3@h ori %r3, %r3, TLB3_MAS3@l - mtspr 627, %r3 /* MAS3 */ + mtspr 627, %r3 /* MAS3 */ tlbwe /* * Invalidating the remaining TLBs (because debuggers). */ lis %r3, 0 - mtspr 625, %r3 /* MAS1 */ - mtspr 626, %r3 /* MAS2 */ - mtspr 627, %r3 /* MAS3 */ + mtspr 625, %r3 /* MAS1 */ + mtspr 626, %r3 /* MAS2 */ + mtspr 627, %r3 /* MAS3 */ lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(4))@h - mtspr 624, %r3 /* MAS0 */ + mtspr 624, %r3 /* MAS0 */ tlbwe lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(5))@h - mtspr 624, %r3 /* MAS0 */ + mtspr 624, %r3 /* MAS0 */ tlbwe lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(6))@h - mtspr 624, %r3 /* MAS0 */ + mtspr 624, %r3 /* MAS0 */ tlbwe lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(7))@h - mtspr 624, %r3 /* MAS0 */ + mtspr 624, %r3 /* MAS0 */ tlbwe lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(8))@h - mtspr 624, %r3 /* MAS0 */ + mtspr 624, %r3 /* MAS0 */ tlbwe lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(9))@h - mtspr 624, %r3 /* MAS0 */ + mtspr 624, %r3 /* MAS0 */ tlbwe lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(10))@h - mtspr 624, %r3 /* MAS0 */ + mtspr 624, %r3 /* MAS0 */ tlbwe lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(11))@h - mtspr 624, %r3 /* MAS0 */ + mtspr 624, %r3 /* MAS0 */ tlbwe lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(12))@h - mtspr 624, %r3 /* MAS0 */ + mtspr 624, %r3 /* MAS0 */ tlbwe lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(13))@h - mtspr 624, %r3 /* MAS0 */ + mtspr 624, %r3 /* MAS0 */ tlbwe lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(14))@h - mtspr 624, %r3 /* MAS0 */ + mtspr 624, %r3 /* MAS0 */ tlbwe lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(15))@h - mtspr 624, %r3 /* MAS0 */ + mtspr 624, %r3 /* MAS0 */ tlbwe + /* + * Cache enabled. + */ + mfspr %r3, 1011 /* LICSR1 */ + ori %r3, %r3, LICSR1_DEFAULT + mtspr 1011, %r3 /* LICSR1 */ + blr #endif /* !defined(__DOXYGEN__) */ -- cgit v1.2.3