From da02a90b8cbe29a6304e7af0c1396c0274a4a9ce Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 24 Sep 2011 10:34:03 +0000 Subject: Fixed bug 3413558. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3396 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/STM32/icu_lld.c | 18 +++++++++--------- os/hal/platforms/STM32/icu_lld.h | 4 ++++ os/hal/platforms/STM32/pwm_lld.c | 18 +++++++++--------- os/hal/platforms/STM32/pwm_lld.h | 4 ++++ 4 files changed, 26 insertions(+), 18 deletions(-) (limited to 'os') diff --git a/os/hal/platforms/STM32/icu_lld.c b/os/hal/platforms/STM32/icu_lld.c index eaf98ec12..33eff67d5 100644 --- a/os/hal/platforms/STM32/icu_lld.c +++ b/os/hal/platforms/STM32/icu_lld.c @@ -281,7 +281,7 @@ void icu_lld_init(void) { * @notapi */ void icu_lld_start(ICUDriver *icup) { - uint32_t clock, psc; + uint32_t psc; if (icup->state == ICU_STOP) { /* Clock activation and timer reset.*/ @@ -291,7 +291,7 @@ void icu_lld_start(ICUDriver *icup) { rccResetTIM1(); NVICEnableVector(TIM1_CC_IRQn, CORTEX_PRIORITY_MASK(STM32_ICU_TIM1_IRQ_PRIORITY)); - clock = STM32_TIMCLK2; + icup->clock = STM32_TIMCLK2; } #endif #if STM32_ICU_USE_TIM2 @@ -300,7 +300,7 @@ void icu_lld_start(ICUDriver *icup) { rccResetTIM2(); NVICEnableVector(TIM2_IRQn, CORTEX_PRIORITY_MASK(STM32_ICU_TIM2_IRQ_PRIORITY)); - clock = STM32_TIMCLK1; + icup->clock = STM32_TIMCLK1; } #endif #if STM32_ICU_USE_TIM3 @@ -309,7 +309,7 @@ void icu_lld_start(ICUDriver *icup) { rccResetTIM3(); NVICEnableVector(TIM3_IRQn, CORTEX_PRIORITY_MASK(STM32_ICU_TIM3_IRQ_PRIORITY)); - clock = STM32_TIMCLK1; + icup->clock = STM32_TIMCLK1; } #endif #if STM32_ICU_USE_TIM4 @@ -318,7 +318,7 @@ void icu_lld_start(ICUDriver *icup) { rccResetTIM4(); NVICEnableVector(TIM4_IRQn, CORTEX_PRIORITY_MASK(STM32_ICU_TIM4_IRQ_PRIORITY)); - clock = STM32_TIMCLK1; + icup->clock = STM32_TIMCLK1; } #endif @@ -328,7 +328,7 @@ void icu_lld_start(ICUDriver *icup) { rccResetTIM5(); NVICEnableVector(TIM5_IRQn, CORTEX_PRIORITY_MASK(STM32_ICU_TIM5_IRQ_PRIORITY)); - clock = STM32_TIMCLK1; + icup->clock = STM32_TIMCLK1; } #endif #if STM32_ICU_USE_TIM8 @@ -337,7 +337,7 @@ void icu_lld_start(ICUDriver *icup) { rccResetTIM5(); NVICEnableVector(TIM8_CC_IRQn, CORTEX_PRIORITY_MASK(STM32_ICU_TIM8_IRQ_PRIORITY)); - clock = STM32_TIMCLK2; + icup->clock = STM32_TIMCLK2; } #endif } @@ -352,9 +352,9 @@ void icu_lld_start(ICUDriver *icup) { } /* Timer configuration.*/ - psc = (clock / icup->config->frequency) - 1; + psc = (icup->clock / icup->config->frequency) - 1; chDbgAssert((psc <= 0xFFFF) && - ((psc + 1) * icup->config->frequency) == clock, + ((psc + 1) * icup->config->frequency) == icup->clock, "icu_lld_start(), #1", "invalid frequency"); icup->tim->PSC = (uint16_t)psc; icup->tim->ARR = 0xFFFF; diff --git a/os/hal/platforms/STM32/icu_lld.h b/os/hal/platforms/STM32/icu_lld.h index e7321e794..4c440b868 100644 --- a/os/hal/platforms/STM32/icu_lld.h +++ b/os/hal/platforms/STM32/icu_lld.h @@ -233,6 +233,10 @@ struct ICUDriver { ICU_DRIVER_EXT_FIELDS #endif /* End of the mandatory fields.*/ + /** + * @brief Timer base clock. + */ + uint32_t clock; /** * @brief Pointer to the TIMx registers block. */ diff --git a/os/hal/platforms/STM32/pwm_lld.c b/os/hal/platforms/STM32/pwm_lld.c index 901474091..d8f98a432 100644 --- a/os/hal/platforms/STM32/pwm_lld.c +++ b/os/hal/platforms/STM32/pwm_lld.c @@ -341,7 +341,7 @@ void pwm_lld_init(void) { * @notapi */ void pwm_lld_start(PWMDriver *pwmp) { - uint32_t clock, psc; + uint32_t psc; uint16_t ccer; if (pwmp->state == PWM_STOP) { @@ -354,7 +354,7 @@ void pwm_lld_start(PWMDriver *pwmp) { CORTEX_PRIORITY_MASK(STM32_PWM_TIM1_IRQ_PRIORITY)); NVICEnableVector(TIM1_CC_IRQn, CORTEX_PRIORITY_MASK(STM32_PWM_TIM1_IRQ_PRIORITY)); - clock = STM32_TIMCLK2; + pwmp->clock = STM32_TIMCLK2; } #endif #if STM32_PWM_USE_TIM2 @@ -363,7 +363,7 @@ void pwm_lld_start(PWMDriver *pwmp) { rccResetTIM2(); NVICEnableVector(TIM2_IRQn, CORTEX_PRIORITY_MASK(STM32_PWM_TIM2_IRQ_PRIORITY)); - clock = STM32_TIMCLK1; + pwmp->clock = STM32_TIMCLK1; } #endif #if STM32_PWM_USE_TIM3 @@ -372,7 +372,7 @@ void pwm_lld_start(PWMDriver *pwmp) { rccResetTIM3(); NVICEnableVector(TIM3_IRQn, CORTEX_PRIORITY_MASK(STM32_PWM_TIM3_IRQ_PRIORITY)); - clock = STM32_TIMCLK1; + pwmp->clock = STM32_TIMCLK1; } #endif #if STM32_PWM_USE_TIM4 @@ -381,7 +381,7 @@ void pwm_lld_start(PWMDriver *pwmp) { rccResetTIM4(); NVICEnableVector(TIM4_IRQn, CORTEX_PRIORITY_MASK(STM32_PWM_TIM4_IRQ_PRIORITY)); - clock = STM32_TIMCLK1; + pwmp->clock = STM32_TIMCLK1; } #endif @@ -391,7 +391,7 @@ void pwm_lld_start(PWMDriver *pwmp) { rccResetTIM5(); NVICEnableVector(TIM5_IRQn, CORTEX_PRIORITY_MASK(STM32_PWM_TIM5_IRQ_PRIORITY)); - clock = STM32_TIMCLK1; + pwmp->clock = STM32_TIMCLK1; } #endif #if STM32_PWM_USE_TIM8 @@ -402,7 +402,7 @@ void pwm_lld_start(PWMDriver *pwmp) { CORTEX_PRIORITY_MASK(STM32_PWM_TIM8_IRQ_PRIORITY)); NVICEnableVector(TIM8_CC_IRQn, CORTEX_PRIORITY_MASK(STM32_PWM_TIM8_IRQ_PRIORITY)); - clock = STM32_TIMCLK2; + pwmp->clock = STM32_TIMCLK2; } #endif @@ -430,9 +430,9 @@ void pwm_lld_start(PWMDriver *pwmp) { } /* Timer configuration.*/ - psc = (clock / pwmp->config->frequency) - 1; + psc = (pwmp->clock / pwmp->config->frequency) - 1; chDbgAssert((psc <= 0xFFFF) && - ((psc + 1) * pwmp->config->frequency) == clock, + ((psc + 1) * pwmp->config->frequency) == pwmp->clock, "pwm_lld_start(), #1", "invalid frequency"); pwmp->tim->PSC = (uint16_t)psc; pwmp->tim->ARR = (uint16_t)(pwmp->period - 1); diff --git a/os/hal/platforms/STM32/pwm_lld.h b/os/hal/platforms/STM32/pwm_lld.h index fb5a83790..d084b3dc7 100644 --- a/os/hal/platforms/STM32/pwm_lld.h +++ b/os/hal/platforms/STM32/pwm_lld.h @@ -315,6 +315,10 @@ struct PWMDriver { PWM_DRIVER_EXT_FIELDS #endif /* End of the mandatory fields.*/ + /** + * @brief Timer base clock. + */ + uint32_t clock; /** * @brief Pointer to the TIMx registers block. */ -- cgit v1.2.3