From 23740a113919b5186340d65a63778dcee8a270b2 Mon Sep 17 00:00:00 2001
From: Giovanni Di Sirio <gdisirio@gmail.com>
Date: Fri, 13 Apr 2018 08:52:44 +0000
Subject: Fixed bug #936.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11917 110e8d01-0319-4d1e-a829-52ad28d1bb01
---
 os/hal/ports/STM32/STM32L4xx/stm32_rcc.h | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

(limited to 'os')

diff --git a/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h b/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h
index 3a6c1f50c..e034f9ce8 100644
--- a/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h
+++ b/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h
@@ -446,6 +446,29 @@
  * @api
  */
 #define rccResetCAN1() rccResetAPB1R1(RCC_APB1RSTR1_CAN1RST)
+
+/**
+ * @brief   Enables the CAN2 peripheral clock.
+ *
+ * @param[in] lp        low power enable flag
+ *
+ * @api
+ */
+#define rccEnableCAN2(lp) rccEnableAPB1R1(RCC_APB1ENR1_CAN2EN, lp)
+
+/**
+ * @brief   Disables the CAN2 peripheral clock.
+ *
+ * @api
+ */
+#define rccDisableCAN2() rccDisableAPB1R1(RCC_APB1ENR1_CAN2EN)
+
+/**
+ * @brief   Resets the CAN2 peripheral.
+ *
+ * @api
+ */
+#define rccResetCAN2() rccResetAPB1R1(RCC_APB1RSTR1_CAN2RST)
 /** @} */
 
 /**
-- 
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