From 9bbb4ac554e3a32d5d9ffad9b4901e2e8ddb99ed Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 29 Apr 2013 09:17:13 +0000 Subject: Added wait states to the RAM accesses as specified on the DS. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5643 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/ports/GCC/PPC/SPC564Axx/core.s | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'os/ports') diff --git a/os/ports/GCC/PPC/SPC564Axx/core.s b/os/ports/GCC/PPC/SPC564Axx/core.s index eb07085ae..da14e7236 100644 --- a/os/ports/GCC/PPC/SPC564Axx/core.s +++ b/os/ports/GCC/PPC/SPC564Axx/core.s @@ -111,7 +111,7 @@ */ #define TLB0_MAS0 (MAS0_TBLMAS_TBL | MAS0_ESEL(0)) #define TLB0_MAS1 (MAS1_VALID | MAS1_IPROT | MAS1_TSISE_256K) -#define TLB0_MAS2 (MAS2_EPN(0x40000000) | MAS2_VLE | MAS2_I) +#define TLB0_MAS2 (MAS2_EPN(0x40000000) | MAS2_VLE) #define TLB0_MAS3 (MAS3_RPN(0x40000000) | \ MAS3_UX | MAS3_SX | MAS3_UW | MAS3_SW | \ MAS3_UR | MAS3_SR) -- cgit v1.2.3