From 5fa5b9ef5616c00ed5ae936a2efadfba47bcaa1f Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 30 Mar 2010 15:22:13 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1813 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/ports/GCC/ARMCMx/chcore.c | 15 ++++++++++++--- os/ports/GCC/ARMCMx/chcore.h | 36 +++++++++++++++++++++++++++--------- 2 files changed, 39 insertions(+), 12 deletions(-) (limited to 'os/ports') diff --git a/os/ports/GCC/ARMCMx/chcore.c b/os/ports/GCC/ARMCMx/chcore.c index f547ea60c..9cb2b9ea5 100644 --- a/os/ports/GCC/ARMCMx/chcore.c +++ b/os/ports/GCC/ARMCMx/chcore.c @@ -104,7 +104,7 @@ void _port_switch_from_irq(void) { "pop {pc}"); } -#if CORTEX_MODEL == CORTEX_M0 +#if defined(CH_ARCHITECTURE_ARM_v6M) #define PUSH_CONTEXT(sp) { \ asm volatile ("push {r4, r5, r6, r7, lr} \n\t" \ "mov r4, r8 \n\t" \ @@ -122,8 +122,17 @@ void _port_switch_from_irq(void) { "mov r11, r7 \n\t" \ "pop {r4, r5, r6, r7, pc}" : : "r" (sp)); \ } -#else /* CORTEX_MODEL != CORTEX_M0 */ -#endif /* CORTEX_MODEL != CORTEX_M0 */ +#elif defined(CH_ARCHITECTURE_ARM_v7M) +#define PUSH_CONTEXT(sp) { \ + asm volatile ("push {r4, r5, r6, r7, r8, r9, r10, r11, lr} \n\t"); \ +} + +#define POP_CONTEXT(sp) { \ + asm volatile ("pop {r4, r5, r6, r7, r8, r9, r10, r11, pc} \n\t" \ + : : "r" (sp)); \ +} +#else +#endif /** * @brief Performs a context switch between two threads. diff --git a/os/ports/GCC/ARMCMx/chcore.h b/os/ports/GCC/ARMCMx/chcore.h index 01c50ef17..779485385 100644 --- a/os/ports/GCC/ARMCMx/chcore.h +++ b/os/ports/GCC/ARMCMx/chcore.h @@ -129,32 +129,36 @@ /* Port exported info. */ /*===========================================================================*/ +#if defined(__DOXYGEN__) /** - * @brief Name of the implemented architecture. + * @brief Macro defining the ARM architecture. */ -#define CH_ARCHITECTURE_NAME "ARM" +#define CH_ARCHITECTURE_ARM_vxm -#if defined(__DOXYGEN__) /** - * @brief Macro defining the ARM Cortex-M3 architecture. + * @brief Name of the implemented architecture. */ -#define CH_ARCHITECTURE_ARMCMx +#define CH_ARCHITECTURE_NAME "ARMvx-M" /** * @brief Name of the architecture variant (optional). */ #define CH_CORE_VARIANT_NAME "Cortex-Mx" #elif CORTEX_MODEL == CORTEX_M4 -#define CH_ARCHITECTURE_ARMCM4 +#define CH_ARCHITECTURE_ARM_v7M +#define CH_ARCHITECTURE_NAME "ARMv7-M" #define CH_CORE_VARIANT_NAME "Cortex-M4" #elif CORTEX_MODEL == CORTEX_M3 -#define CH_ARCHITECTURE_ARMCM3 +#define CH_ARCHITECTURE_ARM_v7M +#define CH_ARCHITECTURE_NAME "ARMv7-M" #define CH_CORE_VARIANT_NAME "Cortex-M3" #elif CORTEX_MODEL == CORTEX_M1 -#define CH_ARCHITECTURE_ARMCM1 +#define CH_ARCHITECTURE_ARM_v6M +#define CH_ARCHITECTURE_NAME "ARMv6-M" #define CH_CORE_VARIANT_NAME "Cortex-M1" #elif CORTEX_MODEL == CORTEX_M0 -#define CH_ARCHITECTURE_ARMCM0 +#define CH_ARCHITECTURE_ARM_v6M +#define CH_ARCHITECTURE_NAME "ARMv6-M" #define CH_CORE_VARIANT_NAME "Cortex-M0" #endif @@ -210,6 +214,7 @@ struct extctx { * @details This structure represents the inner stack frame during a context * switching. */ +#if defined(CH_ARCHITECTURE_ARM_v6M) struct intctx { regarm_t r8; regarm_t r9; @@ -221,6 +226,19 @@ struct intctx { regarm_t r7; regarm_t lr; }; +#elif defined(CH_ARCHITECTURE_ARM_v7M) +struct intctx { + regarm_t r4; + regarm_t r5; + regarm_t r6; + regarm_t r7; + regarm_t r8; + regarm_t r9; + regarm_t r10; + regarm_t r11; + regarm_t lr; +}; +#endif #endif #if !defined(__DOXYGEN__) -- cgit v1.2.3