From 58e000a8366bad3848fe20e84b3cee95836861b1 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 31 Aug 2010 18:56:49 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2153 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/ports/GCC/ARMCMx/chcore_v6m.c | 8 ++++---- os/ports/GCC/ARMCMx/chcore_v7m.c | 24 ++++++++++++++---------- os/ports/GCC/MSP430/chcore.c | 4 ++-- os/ports/GCC/MSP430/chcore.h | 12 ++++++------ 4 files changed, 26 insertions(+), 22 deletions(-) (limited to 'os/ports') diff --git a/os/ports/GCC/ARMCMx/chcore_v6m.c b/os/ports/GCC/ARMCMx/chcore_v6m.c index d331b203d..c8ee32387 100644 --- a/os/ports/GCC/ARMCMx/chcore_v6m.c +++ b/os/ports/GCC/ARMCMx/chcore_v6m.c @@ -71,7 +71,7 @@ void _port_switch_from_irq(void) { "ldr r0, =_port_saved_pc \n\t" "ldr r0, [r0] \n\t" "add r0, r0, #1 \n\t" - "str r0, [sp, #28]"); + "str r0, [sp, #28]" : : : "memory"); chSchDoRescheduleI(); @@ -85,7 +85,7 @@ void _port_switch_from_irq(void) { "msr APSR, r0 \n\t" "mov lr, r2 \n\t" "cpsie i \n\t" - "pop {r0, r1, r2, r3, pc}"); + "pop {r0, r1, r2, r3, pc}" : : : "memory"); } #define PUSH_CONTEXT(sp) { \ @@ -94,7 +94,7 @@ void _port_switch_from_irq(void) { "mov r5, r9 \n\t" \ "mov r6, r10 \n\t" \ "mov r7, r11 \n\t" \ - "push {r4, r5, r6, r7}"); \ + "push {r4, r5, r6, r7}" : : : "memory"); \ } #define POP_CONTEXT(sp) { \ @@ -103,7 +103,7 @@ void _port_switch_from_irq(void) { "mov r9, r5 \n\t" \ "mov r10, r6 \n\t" \ "mov r11, r7 \n\t" \ - "pop {r4, r5, r6, r7, pc}" : : "r" (sp)); \ + "pop {r4, r5, r6, r7, pc}" : : "r" (sp) : "memory"); \ } /** diff --git a/os/ports/GCC/ARMCMx/chcore_v7m.c b/os/ports/GCC/ARMCMx/chcore_v7m.c index f546a11fa..527161ebf 100644 --- a/os/ports/GCC/ARMCMx/chcore_v7m.c +++ b/os/ports/GCC/ARMCMx/chcore_v7m.c @@ -32,34 +32,38 @@ * @brief Internal context stacking. */ #define PUSH_CONTEXT() { \ - asm volatile ("push {r4, r5, r6, r7, r8, r9, r10, r11, lr}"); \ + asm volatile ("push {r4, r5, r6, r7, r8, r9, r10, r11, lr}" \ + : : : "memory"); \ } /** * @brief Internal context unstacking. */ #define POP_CONTEXT() { \ - asm volatile ("pop {r4, r5, r6, r7, r8, r9, r10, r11, pc}"); \ + asm volatile ("pop {r4, r5, r6, r7, r8, r9, r10, r11, pc}" \ + : : : "memory"); \ } #else /* defined(CH_CURRP_REGISTER_CACHE) */ #define PUSH_CONTEXT() { \ - asm volatile ("push {r4, r5, r6, r8, r9, r10, r11, lr}"); \ + asm volatile ("push {r4, r5, r6, r8, r9, r10, r11, lr}" \ + : : : "memory"); \ } #define POP_CONTEXT() { \ - asm volatile ("pop {r4, r5, r6, r8, r9, r10, r11, pc}"); \ + asm volatile ("pop {r4, r5, r6, r8, r9, r10, r11, pc}" \ + : : : "memory"); \ } #endif /* defined(CH_CURRP_REGISTER_CACHE) */ #if !CH_OPTIMIZE_SPEED void _port_lock(void) { register uint32_t tmp asm ("r3") = CORTEX_BASEPRI_KERNEL; - asm volatile ("msr BASEPRI, %0" : : "r" (tmp)); + asm volatile ("msr BASEPRI, %0" : : "r" (tmp) : "memory"); } void _port_unlock(void) { register uint32_t tmp asm ("r3") = CORTEX_BASEPRI_DISABLED; - asm volatile ("msr BASEPRI, %0" : : "r" (tmp)); + asm volatile ("msr BASEPRI, %0" : : "r" (tmp) : "memory"); } #endif @@ -89,9 +93,9 @@ void SVCallVector(void) { /* Discarding the current exception context and positioning the stack to point to the real one.*/ - asm volatile ("mrs %0, PSP" : "=r" (ctxp) : ); + asm volatile ("mrs %0, PSP" : "=r" (ctxp) : : "memory"); ctxp++; - asm volatile ("msr PSP, %0" : : "r" (ctxp)); + asm volatile ("msr PSP, %0" : : "r" (ctxp) : "memory"); port_unlock_from_isr(); } @@ -106,9 +110,9 @@ void _port_irq_epilogue(void) { /* Adding an artificial exception return context, there is no need to populate it fully.*/ - asm volatile ("mrs %0, PSP" : "=r" (ctxp) : ); + asm volatile ("mrs %0, PSP" : "=r" (ctxp) : : "memory"); ctxp--; - asm volatile ("msr PSP, %0" : : "r" (ctxp)); + asm volatile ("msr PSP, %0" : : "r" (ctxp) : "memory"); ctxp->pc = _port_switch_from_isr; ctxp->xpsr = (regarm_t)0x01000000; /* Note, returning without unlocking is intentional, this is done in diff --git a/os/ports/GCC/MSP430/chcore.c b/os/ports/GCC/MSP430/chcore.c index 6740780a9..cdb98a4c8 100644 --- a/os/ports/GCC/MSP430/chcore.c +++ b/os/ports/GCC/MSP430/chcore.c @@ -52,7 +52,7 @@ void port_switch(Thread *ntp, Thread *otp) { "push r7 \n\t" \ "push r6 \n\t" \ "push r5 \n\t" \ - "push r4"); + "push r4" : : : "memory"); otp->p_ctx.sp = sp; sp = ntp->p_ctx.sp; asm volatile ("pop r4 \n\t" \ @@ -63,7 +63,7 @@ void port_switch(Thread *ntp, Thread *otp) { "pop r9 \n\t" \ "pop r10 \n\t" \ "pop r11 \n\t" \ - "ret" : : "r" (sp)); + "ret" : : "r" (sp) : "memory"); } /** diff --git a/os/ports/GCC/MSP430/chcore.h b/os/ports/GCC/MSP430/chcore.h index fcf0a7c1e..7ff87f41d 100644 --- a/os/ports/GCC/MSP430/chcore.h +++ b/os/ports/GCC/MSP430/chcore.h @@ -202,7 +202,7 @@ struct context { * actions. * @note Implemented as global interrupt disable. */ -#define port_lock() asm volatile ("dint") +#define port_lock() asm volatile ("dint" : : : "memory") /** * @brief Kernel-unlock action. @@ -210,7 +210,7 @@ struct context { * actions. * @note Implemented as global interrupt enable. */ -#define port_unlock() asm volatile ("eint") +#define port_unlock() asm volatile ("eint" : : : "memory") /** * @brief Kernel-lock action from an interrupt handler. @@ -235,7 +235,7 @@ struct context { * @note Of course non maskable interrupt sources are not included. * @note Implemented as global interrupt disable. */ -#define port_disable() asm volatile ("dint") +#define port_disable() asm volatile ("dint" : : : "memory") /** * @brief Disables the interrupt sources below kernel-level priority. @@ -243,13 +243,13 @@ struct context { * @note Same as @p port_disable() in this port, there is no difference * between the two states. */ -#define port_suspend() asm volatile ("dint") +#define port_suspend() asm volatile ("dint" : : : "memory") /** * @brief Enables all the interrupt sources. * @note Implemented as global interrupt enable. */ -#define port_enable() asm volatile ("eint") +#define port_enable() asm volatile ("eint" : : : "memory") /** * @brief Enters an architecture-dependent IRQ-waiting mode. @@ -266,7 +266,7 @@ struct context { #if ENABLE_WFI_IDLE != 0 #ifndef port_wait_for_interrupt #define port_wait_for_interrupt() { \ - asm volatile ("nop"); \ + asm volatile ("nop" : : : "memory"); \ } #endif #else -- cgit v1.2.3