From 9728e44141592787faff89d858ffba528de70f61 Mon Sep 17 00:00:00 2001
From: gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>
Date: Thu, 8 Aug 2013 12:38:43 +0000
Subject: git-svn-id:
 svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6105
 35acf78f-673a-0410-8e92-d51de3d6d3f4

---
 os/halnew/platforms/STM32/st_lld.c | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

(limited to 'os/halnew')

diff --git a/os/halnew/platforms/STM32/st_lld.c b/os/halnew/platforms/STM32/st_lld.c
index d0788bf93..debfde38f 100644
--- a/os/halnew/platforms/STM32/st_lld.c
+++ b/os/halnew/platforms/STM32/st_lld.c
@@ -104,8 +104,19 @@ void st_lld_init(void) {
 #if OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING
   /* Free running counter mode.*/
   rccEnableTIM2(FALSE);
+
+  /* Initializing the counter in free running mode.*/
+  STM32_TIM2->PSC    = STM32_TIMCLK2 / OSAL_SYSTICK_FREQUENCY - 1;
+  STM32_TIM2->ARR    = 0xFFFFFFFF;
+  STM32_TIM2->CCMR1  = 0;
+  STM32_TIM2->CCR[0] = 0;
+  STM32_TIM2->DIER   = 0;
+  STM32_TIM2->CR2    = 0;
+  STM32_TIM2->EGR    = TIM_EGR_UG;
+  STM32_TIM2->CR1    = TIM_CR1_CEN;
+
+  /* IRQ enabled.*/
   nvicEnableVector(STM32_TIM2_NUMBER, ST_TIMER_PRIORITY);
-  STM32_TIM2->PSC = STM32_TIMCLK2 / OSAL_SYSTICK_FREQUENCY - 1;
 #endif
 
 #if OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC
@@ -117,6 +128,7 @@ void st_lld_init(void) {
                   SysTick_CTRL_ENABLE_Msk |
                   SysTick_CTRL_TICKINT_Msk;
 
+  /* IRQ enabled.*/
   nvicSetSystemHandlerPriority(SysTick_IRQn, ST_TIMER_PRIORITY);
 #endif
 }
-- 
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