From f7aa043204a98f1a1248f12b870fe2ef697c2516 Mon Sep 17 00:00:00 2001
From: gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>
Date: Fri, 8 Mar 2013 14:26:44 +0000
Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5383
 35acf78f-673a-0410-8e92-d51de3d6d3f4

---
 os/hal/platforms/SPC5xx/EQADC_v1/adc_lld.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

(limited to 'os/hal')

diff --git a/os/hal/platforms/SPC5xx/EQADC_v1/adc_lld.c b/os/hal/platforms/SPC5xx/EQADC_v1/adc_lld.c
index 96a527b61..8a0c251d5 100644
--- a/os/hal/platforms/SPC5xx/EQADC_v1/adc_lld.c
+++ b/os/hal/platforms/SPC5xx/EQADC_v1/adc_lld.c
@@ -433,6 +433,12 @@ static void adc_serve_rfifo_irq(edma_channel_t channel, void *p) {
       _adc_isr_half_code(adcp);
     }
     else {
+      /* Re-starting DMA channels if in circular mode.*/
+      if (adcp->grpp->circular) {
+        edmaChannelStart(adcp->rfifo_channel);
+        edmaChannelStart(adcp->cfifo_channel);
+      }
+
       /* Transfer complete processing.*/
       _adc_isr_full_code(adcp);
     }
@@ -696,7 +702,6 @@ void adc_lld_start_conversion(ADCDriver *adcp) {
                    EDMA_TCD_MODE_DREQ | EDMA_TCD_MODE_INT_END |
                    ((adcp->depth > 1) ? EDMA_TCD_MODE_INT_HALF: 0));/* mode.*/
 
-
   /* HW triggers setup.*/
   bitoff = 20 + ((uint32_t)adcp->fifo * 2);
   SIU.ETISR.R = (SIU.ETISR.R & ~(3U << bitoff)) |
-- 
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