From f0dd706419939527c5d040fc103b9582a0b9a31f Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Fri, 1 Sep 2017 15:19:23 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10521 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/ports/STM32/STM32F0xx/hal_lld.c | 4 + os/hal/ports/STM32/STM32F0xx/platform.mk | 5 +- os/hal/ports/STM32/STM32F0xx/stm32_isr.c | 161 +++++++++++++++++++++++++++++++ os/hal/ports/STM32/STM32F0xx/stm32_isr.h | 58 ++++++++++- os/hal/ports/STM32/STM32F4xx/stm32_isr.h | 54 +++++++++++ 5 files changed, 277 insertions(+), 5 deletions(-) create mode 100644 os/hal/ports/STM32/STM32F0xx/stm32_isr.c (limited to 'os/hal') diff --git a/os/hal/ports/STM32/STM32F0xx/hal_lld.c b/os/hal/ports/STM32/STM32F0xx/hal_lld.c index 847fa8562..664bf8a2c 100644 --- a/os/hal/ports/STM32/STM32F0xx/hal_lld.c +++ b/os/hal/ports/STM32/STM32F0xx/hal_lld.c @@ -237,10 +237,14 @@ void hal_lld_init(void) { /* Initializes the backup domain.*/ hal_lld_backup_domain_init(); + /* DMA subsystems initialization.*/ #if defined(STM32_DMA_REQUIRED) dmaInit(); #endif + /* IRQ subsystem initialization.*/ + irqInit(); + /* Programmable voltage detector enable.*/ #if STM32_PVD_ENABLE PWR->CR |= PWR_CR_PVDE | (STM32_PLS & STM32_PLS_MASK); diff --git a/os/hal/ports/STM32/STM32F0xx/platform.mk b/os/hal/ports/STM32/STM32F0xx/platform.mk index 91b3e1bb7..b43b07ad7 100644 --- a/os/hal/ports/STM32/STM32F0xx/platform.mk +++ b/os/hal/ports/STM32/STM32F0xx/platform.mk @@ -1,5 +1,6 @@ # Required platform files. PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \ + $(CHIBIOS)/os/hal/ports/STM32/STM32F0xx/stm32_isr.c \ $(CHIBIOS)/os/hal/ports/STM32/STM32F0xx/hal_lld.c # Required include directories. @@ -16,11 +17,7 @@ endif HALCONF := $(strip $(shell cat $(CONFDIR)/halconf.h | egrep -e "\#define")) -ifneq ($(findstring HAL_USE_EXT TRUE,$(HALCONF)),) -PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/STM32F0xx/hal_ext_lld_isr.c -endif else -PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/STM32F0xx/hal_ext_lld_isr.c endif # Drivers compatible with the platform. diff --git a/os/hal/ports/STM32/STM32F0xx/stm32_isr.c b/os/hal/ports/STM32/STM32F0xx/stm32_isr.c new file mode 100644 index 000000000..8397b7e51 --- /dev/null +++ b/os/hal/ports/STM32/STM32F0xx/stm32_isr.c @@ -0,0 +1,161 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file STM32F0xx/stm32_isr.h + * @brief STM32F0xx ISR handler code. + * + * @addtogroup SRM32F0xx_ISR + * @{ + */ + +#include "hal.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +#define exti_serve_irq(pr, channel) { \ + \ + if ((pr) & (1U << (channel))) { \ + _pal_isr_code(channel); \ + } \ +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if HAL_USE_PAL || defined(__DOXYGEN__) +/** + * @brief EXTI[0]...EXTI[1] interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector54) { + uint32_t pr; + + OSAL_IRQ_PROLOGUE(); + + pr = EXTI->PR; + pr &= ((1U << 0) | (1U << 1)); + EXTI->PR = pr; + + exti_serve_irq(pr, 0); + exti_serve_irq(pr, 1); + + OSAL_IRQ_EPILOGUE(); +} + +/** + * @brief EXTI[2]...EXTI[3] interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector58) { + uint32_t pr; + + OSAL_IRQ_PROLOGUE(); + + pr = EXTI->PR; + pr &= ((1U << 2) | (1U << 3)); + EXTI->PR = pr; + + exti_serve_irq(pr, 2); + exti_serve_irq(pr, 3); + + OSAL_IRQ_EPILOGUE(); +} + +/** + * @brief EXTI[4]...EXTI[15] interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector5C) { + uint32_t pr; + + OSAL_IRQ_PROLOGUE(); + + pr = EXTI->PR; + pr &= ((1U << 4) | (1U << 5) | (1U << 6) | (1U << 7) | (1U << 8) | + (1U << 9) | (1U << 10) | (1U << 11) | (1U << 12) | (1U << 13) | + (1U << 14) | (1U << 15)); + EXTI->PR = pr; + + exti_serve_irq(pr, 4); + exti_serve_irq(pr, 5); + exti_serve_irq(pr, 6); + exti_serve_irq(pr, 7); + exti_serve_irq(pr, 8); + exti_serve_irq(pr, 9); + exti_serve_irq(pr, 10); + exti_serve_irq(pr, 11); + exti_serve_irq(pr, 12); + exti_serve_irq(pr, 13); + exti_serve_irq(pr, 14); + exti_serve_irq(pr, 15); + + OSAL_IRQ_EPILOGUE(); +} + +#endif /* HAL_USE_PAL */ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Enables IRQ sources. + * + * @notapi + */ +void irqInit(void) { + +#if HAL_USE_PAL + nvicEnableVector(EXTI0_1_IRQn, STM32_IRQ_EXTI0_1_PRIORITY); + nvicEnableVector(EXTI2_3_IRQn, STM32_IRQ_EXTI2_3_PRIORITY); + nvicEnableVector(EXTI4_15_IRQn, STM32_IRQ_EXTI4_15_PRIORITY); +#endif +} + +/** + * @brief Disables IRQ sources. + * + * @notapi + */ +void irqDeinit(void) { + +#if HAL_USE_PAL + nvicDisableVector(EXTI0_1_IRQn); + nvicDisableVector(EXTI2_3_IRQn); + nvicDisableVector(EXTI4_15_IRQn); +#endif +} + +/** @} */ diff --git a/os/hal/ports/STM32/STM32F0xx/stm32_isr.h b/os/hal/ports/STM32/STM32F0xx/stm32_isr.h index c7e9ee2c6..922ee3533 100644 --- a/os/hal/ports/STM32/STM32F0xx/stm32_isr.h +++ b/os/hal/ports/STM32/STM32F0xx/stm32_isr.h @@ -16,7 +16,7 @@ /** * @file STM32F0xx/stm32_isr.h - * @brief ISR remapper driver header. + * @brief STM32F0xx ISR handler header. * * @addtogroup STM32F0xx_ISR * @{ @@ -97,6 +97,53 @@ /* Driver pre-compile time settings. */ /*===========================================================================*/ +/** + * @name Configuration options + * @{ + */ +/** + * @brief EXTI0..1 interrupt priority level setting. + */ +#if !defined(STM32_IRQ_EXTI0_1_PRIORITY) || defined(__DOXYGEN__) +#define STM32_IRQ_EXTI0_1_PRIORITY 3 +#endif + +/** + * @brief EXTI2..3 interrupt priority level setting. + */ +#if !defined(STM32_IRQ_EXTI2_3_PRIORITY) || defined(__DOXYGEN__) +#define STM32_IRQ_EXTI2_3_PRIORITY 3 +#endif + +/** + * @brief EXTI4..15 interrupt priority level setting. + */ +#if !defined(STM32_IRQ_EXTI4_15_PRIORITY) || defined(__DOXYGEN__) +#define STM32_IRQ_EXTI4_15_PRIORITY 3 +#endif + +/** + * @brief EXTI16 interrupt priority level setting. + */ +#if !defined(STM32_IRQ_EXTI16_PRIORITY) || defined(__DOXYGEN__) +#define STM32_IRQ_EXTI16_PRIORITY 3 +#endif + +/** + * @brief EXTI17,19,20 interrupt priority level setting. + */ +#if !defined(STM32_IRQ_EXTI17_20_PRIORITY) || defined(__DOXYGEN__) +#define STM32_IRQ_EXTI17_20_PRIORITY 3 +#endif + +/** + * @brief EXTI21,22 interrupt priority level setting. + */ +#if !defined(STM32_IRQ_EXTI21_22_PRIORITY) || defined(__DOXYGEN__) +#define STM32_IRQ_EXTI21_22_PRIORITY 3 +#endif +/** @} */ + /*===========================================================================*/ /* Derived constants and error checks. */ /*===========================================================================*/ @@ -113,6 +160,15 @@ /* External declarations. */ /*===========================================================================*/ +#ifdef __cplusplus +extern "C" { +#endif + void irqInit(void); + void irqDeinit(void); +#ifdef __cplusplus +} +#endif + #endif /* STM32_ISR_H */ /** @} */ diff --git a/os/hal/ports/STM32/STM32F4xx/stm32_isr.h b/os/hal/ports/STM32/STM32F4xx/stm32_isr.h index db5165663..53b69bf26 100644 --- a/os/hal/ports/STM32/STM32F4xx/stm32_isr.h +++ b/os/hal/ports/STM32/STM32F4xx/stm32_isr.h @@ -184,6 +184,60 @@ /* Driver pre-compile time settings. */ /*===========================================================================*/ +/** + * @name Configuration options + * @{ + */ +/** + * @brief EXTI0 interrupt priority level setting. + */ +#if !defined(STM32_IRQ_EXTI0_PRIORITY) || defined(__DOXYGEN__) +#define STM32_IRQ_EXTI0_PRIORITY 6 +#endif + +/** + * @brief EXTI1 interrupt priority level setting. + */ +#if !defined(STM32_IRQ_EXTI1_PRIORITY) || defined(__DOXYGEN__) +#define STM32_IRQ_EXTI1_PRIORITY 6 +#endif + +/** + * @brief EXTI2 interrupt priority level setting. + */ +#if !defined(STM32_IRQ_EXTI2_PRIORITY) || defined(__DOXYGEN__) +#define STM32_IRQ_EXTI2_PRIORITY 6 +#endif + +/** + * @brief EXTI3 interrupt priority level setting. + */ +#if !defined(STM32_IRQ_EXTI3_PRIORITY) || defined(__DOXYGEN__) +#define STM32_IRQ_EXTI3_PRIORITY 6 +#endif + +/** + * @brief EXTI4 interrupt priority level setting. + */ +#if !defined(STM32_IRQ_EXTI4_PRIORITY) || defined(__DOXYGEN__) +#define STM32_IRQ_EXTI4_PRIORITY 6 +#endif + +/** + * @brief EXTI5..9 interrupt priority level setting. + */ +#if !defined(STM32_IRQ_EXTI5_9_PRIORITY) || defined(__DOXYGEN__) +#define STM32_IRQ_EXTI5_9_PRIORITY 6 +#endif + +/** + * @brief EXTI10..15 interrupt priority level setting. + */ +#if !defined(STM32_IRQ_EXTI10_15_PRIORITY) || defined(__DOXYGEN__) +#define STM32_IRQ_EXTI10_15_PRIORITY 6 +#endif +/** @} */ + /*===========================================================================*/ /* Derived constants and error checks. */ /*===========================================================================*/ -- cgit v1.2.3