From ed50615d58ad755e7288cd444d2326432ca2ab2a Mon Sep 17 00:00:00 2001 From: Theodore Ateba Date: Tue, 4 Sep 2018 12:20:14 +0000 Subject: AVR: Cleanup code source. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12237 110e8d01-0319-4d1e-a829-52ad28d1bb01 --- os/hal/ports/AVR/XMEGA/LLD/DACv1/hal_dac_lld.c | 21 ++++----- os/hal/ports/AVR/XMEGA/LLD/DMAv1/xmega_dma_lld.c | 16 +++---- os/hal/ports/AVR/XMEGA/LLD/TIMv1/hal_st_lld.c | 8 ++-- .../ports/AVR/XMEGA/LLD/USARTv1/hal_serial_lld.c | 10 ++--- os/hal/ports/AVR/XMEGA/LLD/USARTv1/hal_uart_lld.c | 14 +++--- os/hal/ports/AVR/XMEGA/LLD/WDGv1/hal_wdg_lld.c | 52 +++++++++++----------- 6 files changed, 60 insertions(+), 61 deletions(-) (limited to 'os/hal') diff --git a/os/hal/ports/AVR/XMEGA/LLD/DACv1/hal_dac_lld.c b/os/hal/ports/AVR/XMEGA/LLD/DACv1/hal_dac_lld.c index 805c9c732..bd60ecab6 100644 --- a/os/hal/ports/AVR/XMEGA/LLD/DACv1/hal_dac_lld.c +++ b/os/hal/ports/AVR/XMEGA/LLD/DACv1/hal_dac_lld.c @@ -70,8 +70,9 @@ DACDriver DACD1; */ static bool dac_is_channel_data_empty(DACDriver *dacp) { - bool dacStatus = (dacp->dacblock->STATUS & + bool dacStatus = (dacp->dacblock->STATUS & (dacp->config->ch ? DAC_CH1DRE_bm : DAC_CH0DRE_bm)); + return dacStatus; } @@ -122,7 +123,7 @@ static void dac_set_operation_mode(DACDriver *dacp) { */ static void dac_set_ajusted_mode(DACDriver *dacp) { - dacp->dacblock->CTRLC = (dacp->dacblock->CTRLC & ~(DAC_LEFTADJ_bm)) | + dacp->dacblock->CTRLC = (dacp->dacblock->CTRLC & ~(DAC_LEFTADJ_bm)) | (dacp->config->da ? DAC_LEFTADJ_bm : 0x00); } @@ -134,7 +135,7 @@ static void dac_set_ajusted_mode(DACDriver *dacp) { */ static void dac_set_voltage_ref(DACDriver *dacp) { - dacp->dacblock->CTRLC = (dacp->dacblock->CTRLC & ~(DAC_REFSEL_gm)) | + dacp->dacblock->CTRLC = (dacp->dacblock->CTRLC & ~(DAC_REFSEL_gm)) | dacp->config->vr; } @@ -205,16 +206,16 @@ void dac_lld_stop(DACDriver *dacp) { * * @api */ -void dac_lld_put_channel(DACDriver *dacp, - dacchannel_t channel, - dacsample_t sample) { +void dac_lld_put_channel(DACDriver *dacp, + dacchannel_t channel, + dacsample_t sample) { if (channel == DAC_CHANNEL0) { - dacp->dacblock->CH0DATA = sample; - } + dacp->dacblock->CH0DATA = sample; + } else { - dacp->dacblock->CH1DATA = sample; - } + dacp->dacblock->CH1DATA = sample; + } } /** diff --git a/os/hal/ports/AVR/XMEGA/LLD/DMAv1/xmega_dma_lld.c b/os/hal/ports/AVR/XMEGA/LLD/DMAv1/xmega_dma_lld.c index 4c49e92f4..0b194515f 100644 --- a/os/hal/ports/AVR/XMEGA/LLD/DMAv1/xmega_dma_lld.c +++ b/os/hal/ports/AVR/XMEGA/LLD/DMAv1/xmega_dma_lld.c @@ -139,9 +139,9 @@ void dmaControllerDisable(DMA_t *dmacp) { */ void damReset(void) { - DMA.CTRL &= ~DMA_ENABLE_bm; /* Disable the DMA before a reset. */ - DMA.CTRL |= DMA_RESET_bm; /* Perform the reset of the DMA module. */ - while(DMA.CTRL & DMA_RESET_bm); /* Wait until reset is complated. */ + DMA.CTRL &= ~DMA_ENABLE_bm; /* Disable the DMA before a reset. */ + DMA.CTRL |= DMA_RESET_bm; /* Perform the reset of the DMA module. */ + while(DMA.CTRL & DMA_RESET_bm); /* Wait until reset is complated. */ } /** @@ -176,25 +176,23 @@ void dmaChannelReset(DMA_CH_t *dmacp) { void dmaEnableSingleShot(DMA_CH_t * dmacp ) { - dmacp->CTRLA |= DMA_CH_SINGLE_bm; + dmacp->CTRLA |= DMA_CH_SINGLE_bm; } void dmaDisableSingleShot(DMA_CH_t * dmacp ) { - dmacp->CTRLA &= ~DMA_CH_SINGLE_bm; + dmacp->CTRLA &= ~DMA_CH_SINGLE_bm; } void dmaSetTriggerSource(DMA_CH_t * dmacp, uint8_t trigger) { - dmacp->TRIGSRC = trigger; + dmacp->TRIGSRC = trigger; } void dmaStartTransfer(DMA_CH_t * dmacp) { - dmacp->CTRLA |= DMA_CH_TRFREQ_bm; + dmacp->CTRLA |= DMA_CH_TRFREQ_bm; } -//#endif /* HAL_USE_DMA */ - /** @} */ diff --git a/os/hal/ports/AVR/XMEGA/LLD/TIMv1/hal_st_lld.c b/os/hal/ports/AVR/XMEGA/LLD/TIMv1/hal_st_lld.c index 05965164e..0c186f26e 100644 --- a/os/hal/ports/AVR/XMEGA/LLD/TIMv1/hal_st_lld.c +++ b/os/hal/ports/AVR/XMEGA/LLD/TIMv1/hal_st_lld.c @@ -86,10 +86,10 @@ void st_lld_init(void) { #if (OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC) || defined(__DOXYGEN__) TCC0.PER = (F_CPU/OSAL_ST_FREQUENCY) - 1; - TCC0.CTRLA = ( TCC0.CTRLA & ~TC0_CLKSEL_gm ) | TC_CLKSEL_DIV1_gc; - TCC0.INTCTRLA = ( TCC0.INTCTRLA & ~TC0_OVFINTLVL_gm ) | TC_OVFINTLVL_MED_gc; - PMIC.CTRL |= PMIC_MEDLVLEN_bm; - sei(); + TCC0.CTRLA = ( TCC0.CTRLA & ~TC0_CLKSEL_gm ) | TC_CLKSEL_DIV1_gc; + TCC0.INTCTRLA = ( TCC0.INTCTRLA & ~TC0_OVFINTLVL_gm ) | TC_OVFINTLVL_MED_gc; + PMIC.CTRL |= PMIC_MEDLVLEN_bm; + sei(); #endif /* OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC */ diff --git a/os/hal/ports/AVR/XMEGA/LLD/USARTv1/hal_serial_lld.c b/os/hal/ports/AVR/XMEGA/LLD/USARTv1/hal_serial_lld.c index 9f067f235..006399037 100644 --- a/os/hal/ports/AVR/XMEGA/LLD/USARTv1/hal_serial_lld.c +++ b/os/hal/ports/AVR/XMEGA/LLD/USARTv1/hal_serial_lld.c @@ -230,11 +230,11 @@ static void usart_cfg_chsize(SerialDriver *sdp, const SerialConfig *config) { */ static void usart_cfg_baudrate(SerialDriver *sdp, const SerialConfig *config) { - /* BSCALE = 0. */ - #define BSCALE 0 - uint16_t br = get_bsel(config->speed); - sdp->usart->BAUDCTRLA =(uint8_t)br; - sdp->usart->BAUDCTRLB =(BSCALE << USART_BSCALE0_bp) | (br >> 8); + /* BSCALE = 0. */ + #define BSCALE 0 + uint16_t br = get_bsel(config->speed); + sdp->usart->BAUDCTRLA =(uint8_t)br; + sdp->usart->BAUDCTRLB =(BSCALE << USART_BSCALE0_bp) | (br >> 8); } /** diff --git a/os/hal/ports/AVR/XMEGA/LLD/USARTv1/hal_uart_lld.c b/os/hal/ports/AVR/XMEGA/LLD/USARTv1/hal_uart_lld.c index 10726fafc..a0bba24da 100644 --- a/os/hal/ports/AVR/XMEGA/LLD/USARTv1/hal_uart_lld.c +++ b/os/hal/ports/AVR/XMEGA/LLD/USARTv1/hal_uart_lld.c @@ -216,11 +216,11 @@ static void usart_cfg_chsize(UARTDriver *uartp) { */ static void usart_cfg_baudrate(UARTDriver *uartp) { - /* BSCALE = 0. */ - #define BSCALE 0 - uint16_t br = get_bsel(uartp->config->speed); - uartp->usart->BAUDCTRLA =(uint8_t)br; - uartp->usart->BAUDCTRLB =(BSCALE << USART_BSCALE0_bp) | (br >> 8); + /* BSCALE = 0. */ + #define BSCALE 0 + uint16_t br = get_bsel(uartp->config->speed); + uartp->usart->BAUDCTRLA =(uint8_t)br; + uartp->usart->BAUDCTRLB =(BSCALE << USART_BSCALE0_bp) | (br >> 8); } /** @@ -417,10 +417,10 @@ void uart_lld_start_send(UARTDriver *uartp, size_t n, const uint8_t *txbuf) { /* TODO: Add support of DMA. */ while (n--) { - while (!((uartp->usart->STATUS & USART_DREIF_bm) != 0)); + while (!((uartp->usart->STATUS & USART_DREIF_bm) != 0)); uartp->usart->DATA = *txbuf; txbuf++; - } + } } /** diff --git a/os/hal/ports/AVR/XMEGA/LLD/WDGv1/hal_wdg_lld.c b/os/hal/ports/AVR/XMEGA/LLD/WDGv1/hal_wdg_lld.c index 505c20d72..7ea357ba0 100644 --- a/os/hal/ports/AVR/XMEGA/LLD/WDGv1/hal_wdg_lld.c +++ b/os/hal/ports/AVR/XMEGA/LLD/WDGv1/hal_wdg_lld.c @@ -69,11 +69,11 @@ static bool wdg_get_sync_busy_flag(WDGDriver *wdgp) { */ static void wdg_enable(WDGDriver *wdgp) { - uint8_t cfg = wdgp->wdg->CTRL | WDT_ENABLE_bm | WDT_CEN_bm; - CCP = CCP_IOREG_gc; - wdgp->wdg->CTRL = cfg; - - while (wdg_get_sync_busy_flag(wdgp)); + uint8_t cfg = wdgp->wdg->CTRL | WDT_ENABLE_bm | WDT_CEN_bm; + CCP = CCP_IOREG_gc; + wdgp->wdg->CTRL = cfg; + + while (wdg_get_sync_busy_flag(wdgp)); } /** @@ -83,11 +83,11 @@ static void wdg_enable(WDGDriver *wdgp) { */ static void wdg_set_period(WDGDriver *wdgp) { - uint8_t cfg = WDT_ENABLE_bm | WDT_CEN_bm | wdgp->config->ntp; - CCP = CCP_IOREG_gc; - wdgp->wdg->CTRL = cfg; + uint8_t cfg = WDT_ENABLE_bm | WDT_CEN_bm | wdgp->config->ntp; + CCP = CCP_IOREG_gc; + wdgp->wdg->CTRL = cfg; - while (wdg_get_sync_busy_flag(wdgp)); + while (wdg_get_sync_busy_flag(wdgp)); } /** @@ -97,9 +97,9 @@ static void wdg_set_period(WDGDriver *wdgp) { */ static void wdg_disable(WDGDriver *wdgp) { - uint8_t cfg = (wdgp->wdg->CTRL & ~WDT_ENABLE_bm) | WDT_CEN_bm; - CCP = CCP_IOREG_gc; - wdgp->wdg->CTRL = cfg; + uint8_t cfg = (wdgp->wdg->CTRL & ~WDT_ENABLE_bm) | WDT_CEN_bm; + CCP = CCP_IOREG_gc; + wdgp->wdg->CTRL = cfg; } /** @@ -129,15 +129,15 @@ static void wdg_disable(WDGDriver *wdgp) { */ static bool wdg_enable_window_mode(WDGDriver *wdgp) { - uint8_t wdStatus = wdgp->wdg->CTRL & WDT_ENABLE_bm; - uint8_t cfg = wdgp->wdg->WINCTRL | WDT_WEN_bm | WDT_WCEN_bm; + uint8_t wdStatus = wdgp->wdg->CTRL & WDT_ENABLE_bm; + uint8_t cfg = wdgp->wdg->WINCTRL | WDT_WEN_bm | WDT_WCEN_bm; CCP = CCP_IOREG_gc; - wdgp->wdg->WINCTRL = cfg; + wdgp->wdg->WINCTRL = cfg; - while (wdg_get_sync_busy_flag(wdgp)); + while (wdg_get_sync_busy_flag(wdgp)); - return wdStatus; + return wdStatus; } /** @@ -150,15 +150,15 @@ static bool wdg_enable_window_mode(WDGDriver *wdgp) { */ static bool wdg_set_window_period(WDGDriver *wdgp) { - uint8_t wdStatus = wdgp->wdg->CTRL & WDT_ENABLE_bm; - uint8_t cfg = WDT_WEN_bm | WDT_WCEN_bm | wdgp->config->ntp; + uint8_t wdStatus = wdgp->wdg->CTRL & WDT_ENABLE_bm; + uint8_t cfg = WDT_WEN_bm | WDT_WCEN_bm | wdgp->config->ntp; - CCP = CCP_IOREG_gc; - wdgp->wdg->WINCTRL = cfg; + CCP = CCP_IOREG_gc; + wdgp->wdg->WINCTRL = cfg; - while (wdg_get_sync_busy_flag(wdgp)); + while (wdg_get_sync_busy_flag(wdgp)); - return wdStatus; + return wdStatus; } /** @@ -168,9 +168,9 @@ static bool wdg_set_window_period(WDGDriver *wdgp) { */ static void wdg_disable_window_mode(WDGDriver *wdgp) { - uint8_t cfg = (wdgp->wdg->WINCTRL & ~WDT_WEN_bm) | WDT_WCEN_bm; + uint8_t cfg = (wdgp->wdg->WINCTRL & ~WDT_WEN_bm) | WDT_WCEN_bm; - CCP = CCP_IOREG_gc; + CCP = CCP_IOREG_gc; wdgp->wdg->WINCTRL = cfg; } @@ -231,7 +231,7 @@ void wdg_lld_start(WDGDriver *wdgp) { wdg_enable(wdgp); } - while (wdg_get_sync_busy_flag(wdgp)); + while (wdg_get_sync_busy_flag(wdgp)); } /** -- cgit v1.2.3