From ebc792e58d45d96506bdb7afe379b4ddee9bc48e Mon Sep 17 00:00:00 2001
From: gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>
Date: Sat, 18 Aug 2012 08:43:10 +0000
Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4577
 35acf78f-673a-0410-8e92-d51de3d6d3f4

---
 os/hal/platforms/STM32/OTGv1/stm32_otg.h | 17 +++++++++++++----
 os/hal/platforms/STM32/OTGv1/usb_lld.c   |  8 ++++----
 2 files changed, 17 insertions(+), 8 deletions(-)

(limited to 'os/hal')

diff --git a/os/hal/platforms/STM32/OTGv1/stm32_otg.h b/os/hal/platforms/STM32/OTGv1/stm32_otg.h
index 7e08fae7f..7313174b7 100644
--- a/os/hal/platforms/STM32/OTGv1/stm32_otg.h
+++ b/os/hal/platforms/STM32/OTGv1/stm32_otg.h
@@ -171,6 +171,7 @@ typedef struct {
   volatile uint32_t PCGCCTL;    /**< @brief Power and clock gating control
                                             register.                       */
   volatile uint32_t resvdE04[127];
+  volatile uint32_t FIFO[16][1024];
 } stm32_otg_t;
 
 /**
@@ -211,6 +212,11 @@ typedef struct {
                                                  level.                     */
 #define GAHBCFG_TXFELVL         (1U<<7)     /**< Non-periodic TxFIFO empty
                                                  level.                     */
+#define GAHBCFG_DMAEN           (1U<<5)     /**< DMA enable (HS only).      */
+#define GAHBCFG_HBSTLEN_MASK    (15U<<1)    /**< Burst length/type mask (HS
+                                                 only).                     */
+#define GAHBCFG_HBSTLEN(n)      ((n)<<1)    /**< Burst length/type (HS
+                                                 only).                     */
 #define GAHBCFG_GINTMSK         (1U<<0)     /**< Global interrupt mask.     */
 /** @} */
 
@@ -877,19 +883,22 @@ typedef struct {
 /**
  * @brief   OTG registers block memory address.
  */
-#define OTG_ADDR                    0x50000000
+#define OTG_FS_ADDR                 0x50000000
+#define OTG_HS_ADDR                 0x40040000
 
 /**
  * @brief   Accesses to the OTG registers block.
  */
-#define OTG                         ((stm32_otg_t *)OTG_ADDR)
+#define OTG_FS                      ((stm32_otg_t *)OTG_FS_ADDR)
+#define OTG                         OTG_FS
+#define OTG_HS                      ((stm32_otg_t *)OTG_HS_ADDR)
 
 /**
  * @brief   Returns a FIFO address.
  */
-#define OTG_FIFO(n)                 ((volatile uint32_t *)(OTG_ADDR +       \
+/*#define OTG1_FIFO(addr, n)          ((volatile uint32_t *)((addr) +         \
                                                            0x1000 +         \
-                                                           (0x1000 * (n))))
+                                                           (0x1000 * (n))))*/
 
 #endif /* _STM32_OTG_H_ */
 
diff --git a/os/hal/platforms/STM32/OTGv1/usb_lld.c b/os/hal/platforms/STM32/OTGv1/usb_lld.c
index e6901e8a9..cfbc25988 100644
--- a/os/hal/platforms/STM32/OTGv1/usb_lld.c
+++ b/os/hal/platforms/STM32/OTGv1/usb_lld.c
@@ -226,7 +226,7 @@ static void otg_fifo_write_from_buffer(usbep_t ep,
                                        const uint8_t *buf,
                                        size_t n) {
 
-  otg_do_push(OTG_FIFO(ep), (uint8_t *)buf, (n + 3) / 4);
+  otg_do_push(OTG->FIFO[ep], (uint8_t *)buf, (n + 3) / 4);
 }
 
 /**
@@ -244,7 +244,7 @@ static void otg_fifo_write_from_queue(usbep_t ep,
   size_t ntogo;
   volatile uint32_t *fifop;
 
-  fifop = OTG_FIFO(ep);
+  fifop = OTG->FIFO[ep];
 
   ntogo = n;
   while (ntogo > 0) {
@@ -327,7 +327,7 @@ static uint8_t *otg_do_pop(volatile uint32_t *fifop, uint8_t *buf, size_t n) {
 static void otg_fifo_read_to_buffer(uint8_t *buf, size_t n, size_t max) {
   volatile uint32_t *fifop;
 
-  fifop = OTG_FIFO(0);
+  fifop = OTG->FIFO[0];
   n = (n + 3) / 4;
   max = (max + 3) / 4;
   while (n) {
@@ -355,7 +355,7 @@ static void otg_fifo_read_to_queue(InputQueue *iqp, size_t n) {
   size_t ntogo;
   volatile uint32_t *fifop;
 
-  fifop = OTG_FIFO(0);
+  fifop = OTG->FIFO[0];
 
   ntogo = n;
   while (ntogo > 0) {
-- 
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