From 6eae3c1de5a1936247676750132758d17d9bdaf1 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 11 Nov 2011 14:40:00 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3487 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/STM32F1xx/hal_lld_f100.h | 57 ++++++++++++ os/hal/platforms/STM32F1xx/hal_lld_f103.h | 116 +++++++++++++++++++++++++ os/hal/platforms/STM32F1xx/hal_lld_f105_f107.h | 29 +++++++ os/hal/platforms/STM32F1xx/stm32_dma.h | 22 +++++ os/hal/platforms/STM32L1xx/hal_lld.h | 4 +- 5 files changed, 226 insertions(+), 2 deletions(-) (limited to 'os/hal') diff --git a/os/hal/platforms/STM32F1xx/hal_lld_f100.h b/os/hal/platforms/STM32F1xx/hal_lld_f100.h index 230b415ef..91be2eadb 100644 --- a/os/hal/platforms/STM32F1xx/hal_lld_f100.h +++ b/os/hal/platforms/STM32F1xx/hal_lld_f100.h @@ -128,22 +128,30 @@ * @name STM32F100 LD capabilities * @{ */ +/* ADC attributes.*/ #define STM32_HAS_ADC1 TRUE #define STM32_HAS_ADC2 FALSE #define STM32_HAS_ADC3 FALSE +/* CAN attributes.*/ #define STM32_HAS_CAN1 FALSE #define STM32_HAS_CAN2 FALSE +/* DAC attributes.*/ #define STM32_HAS_DAC TRUE +/* DMA attributes.*/ +#define STM32_ADVANCED_DMA FALSE #define STM32_HAS_DMA1 TRUE #define STM32_HAS_DMA2 FALSE +/* ETH attributes.*/ #define STM32_HAS_ETH FALSE +/* EXTI attributes.*/ #define STM32_EXTI_NUM_CHANNELS 19 +/* GPIO attributes.*/ #define STM32_HAS_GPIOA TRUE #define STM32_HAS_GPIOB TRUE #define STM32_HAS_GPIOC TRUE @@ -154,18 +162,36 @@ #define STM32_HAS_GPIOH FALSE #define STM32_HAS_GPIOI FALSE +/* I2C attributes.*/ #define STM32_HAS_I2C1 TRUE #define STM32_HAS_I2C2 FALSE #define STM32_HAS_I2C3 FALSE #define STM32_HAS_RTC TRUE +/* SDIO attributes.*/ #define STM32_HAS_SDIO FALSE +/* SPI attributes.*/ #define STM32_HAS_SPI1 TRUE +#define STM32_SPI1_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 2) +#define STM32_SPI1_RX_DMA_CHN 0x00000000 +#define STM32_SPI1_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 3) +#define STM32_SPI1_TX_DMA_CHN 0x00000000 + #define STM32_HAS_SPI2 FALSE +#define STM32_SPI2_RX_DMA_MSK 0 +#define STM32_SPI2_RX_DMA_CHN 0x00000000 +#define STM32_SPI2_TX_DMA_MSK 0 +#define STM32_SPI2_TX_DMA_CHN 0x00000000 + #define STM32_HAS_SPI3 FALSE +#define STM32_SPI3_RX_DMA_MSK 0 +#define STM32_SPI3_RX_DMA_CHN 0x00000000 +#define STM32_SPI3_TX_DMA_MSK 0 +#define STM32_SPI3_TX_DMA_CHN 0x00000000 +/* TIM attributes.*/ #define STM32_HAS_TIM1 TRUE #define STM32_HAS_TIM2 TRUE #define STM32_HAS_TIM3 TRUE @@ -184,6 +210,7 @@ #define STM32_HAS_TIM16 TRUE #define STM32_HAS_TIM17 TRUE +/* USART attributes.*/ #define STM32_HAS_USART1 TRUE #define STM32_HAS_USART2 TRUE #define STM32_HAS_USART3 FALSE @@ -191,6 +218,7 @@ #define STM32_HAS_UART5 FALSE #define STM32_HAS_USART6 FALSE +/* USB attributes.*/ #define STM32_HAS_USB FALSE #define STM32_HAS_OTG1 FALSE #define STM32_HAS_OTG2 FALSE @@ -202,22 +230,30 @@ * @name STM32F100 MD capabilities * @{ */ +/* ADC attributes.*/ #define STM32_HAS_ADC1 TRUE #define STM32_HAS_ADC2 FALSE #define STM32_HAS_ADC3 FALSE +/* CAN attributes.*/ #define STM32_HAS_CAN1 FALSE #define STM32_HAS_CAN2 FALSE +/* DAC attributes.*/ #define STM32_HAS_DAC TRUE +/* DMA attributes.*/ +#define STM32_ADVANCED_DMA FALSE #define STM32_HAS_DMA1 TRUE #define STM32_HAS_DMA2 FALSE +/* ETH attributes.*/ #define STM32_HAS_ETH FALSE +/* EXTI attributes.*/ #define STM32_EXTI_NUM_CHANNELS 19 +/* GPIO attributes.*/ #define STM32_HAS_GPIOA TRUE #define STM32_HAS_GPIOB TRUE #define STM32_HAS_GPIOC TRUE @@ -228,18 +264,37 @@ #define STM32_HAS_GPIOH FALSE #define STM32_HAS_GPIOI FALSE +/* I2C attributes.*/ #define STM32_HAS_I2C1 TRUE #define STM32_HAS_I2C2 TRUE #define STM32_HAS_I2C3 FALSE +/* RTC attributes.*/ #define STM32_HAS_RTC TRUE +/* SDIO attributes.*/ #define STM32_HAS_SDIO FALSE +/* SPI attributes.*/ #define STM32_HAS_SPI1 TRUE +#define STM32_SPI1_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 2) +#define STM32_SPI1_RX_DMA_CHN 0x00000000 +#define STM32_SPI1_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 3) +#define STM32_SPI1_TX_DMA_CHN 0x00000000 + #define STM32_HAS_SPI2 TRUE +#define STM32_SPI2_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 4) +#define STM32_SPI2_RX_DMA_CHN 0x00000000 +#define STM32_SPI2_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 5) +#define STM32_SPI2_TX_DMA_CHN 0x00000000 + #define STM32_HAS_SPI3 FALSE +#define STM32_SPI3_RX_DMA_MSK 0 +#define STM32_SPI3_RX_DMA_CHN 0x00000000 +#define STM32_SPI3_TX_DMA_MSK 0 +#define STM32_SPI3_TX_DMA_CHN 0x00000000 +/* TIM attributes.*/ #define STM32_HAS_TIM1 TRUE #define STM32_HAS_TIM2 TRUE #define STM32_HAS_TIM3 TRUE @@ -258,6 +313,7 @@ #define STM32_HAS_TIM16 TRUE #define STM32_HAS_TIM17 TRUE +/* USART attributes.*/ #define STM32_HAS_USART1 TRUE #define STM32_HAS_USART2 TRUE #define STM32_HAS_USART3 TRUE @@ -265,6 +321,7 @@ #define STM32_HAS_UART5 FALSE #define STM32_HAS_USART6 FALSE +/* USB attributes.*/ #define STM32_HAS_USB FALSE #define STM32_HAS_OTG1 FALSE #define STM32_HAS_OTG2 FALSE diff --git a/os/hal/platforms/STM32F1xx/hal_lld_f103.h b/os/hal/platforms/STM32F1xx/hal_lld_f103.h index ee265fe7f..1375bf7cf 100644 --- a/os/hal/platforms/STM32F1xx/hal_lld_f103.h +++ b/os/hal/platforms/STM32F1xx/hal_lld_f103.h @@ -138,22 +138,30 @@ * @name STM32F103 LD capabilities * @{ */ +/* ADC attributes.*/ #define STM32_HAS_ADC1 TRUE #define STM32_HAS_ADC2 TRUE #define STM32_HAS_ADC3 FALSE +/* CAN attributes.*/ #define STM32_HAS_CAN1 TRUE #define STM32_HAS_CAN2 FALSE +/* DAC attributes.*/ #define STM32_HAS_DAC FALSE +/* DMA attributes.*/ +#define STM32_ADVANCED_DMA FALSE #define STM32_HAS_DMA1 TRUE #define STM32_HAS_DMA2 FALSE +/* ETH attributes.*/ #define STM32_HAS_ETH FALSE +/* EXTI attributes.*/ #define STM32_EXTI_NUM_CHANNELS 19 +/* GPIO attributes.*/ #define STM32_HAS_GPIOA TRUE #define STM32_HAS_GPIOB TRUE #define STM32_HAS_GPIOC TRUE @@ -164,18 +172,37 @@ #define STM32_HAS_GPIOH FALSE #define STM32_HAS_GPIOI FALSE +/* I2C attributes.*/ #define STM32_HAS_I2C1 TRUE #define STM32_HAS_I2C2 FALSE #define STM32_HAS_I2C3 FALSE +/* RTC attributes.*/ #define STM32_HAS_RTC TRUE +/* SDIO attributes.*/ #define STM32_HAS_SDIO FALSE +/* SPI attributes.*/ #define STM32_HAS_SPI1 TRUE +#define STM32_SPI1_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 2) +#define STM32_SPI1_RX_DMA_CHN 0x00000000 +#define STM32_SPI1_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 3) +#define STM32_SPI1_TX_DMA_CHN 0x00000000 + #define STM32_HAS_SPI2 FALSE +#define STM32_SPI2_RX_DMA_MSK 0 +#define STM32_SPI2_RX_DMA_CHN 0x00000000 +#define STM32_SPI2_TX_DMA_MSK 0 +#define STM32_SPI2_TX_DMA_CHN 0x00000000 + #define STM32_HAS_SPI3 FALSE +#define STM32_SPI3_RX_DMA_MSK 0 +#define STM32_SPI3_RX_DMA_CHN 0x00000000 +#define STM32_SPI3_TX_DMA_MSK 0 +#define STM32_SPI3_TX_DMA_CHN 0x00000000 +/* TIM attributes.*/ #define STM32_HAS_TIM1 TRUE #define STM32_HAS_TIM2 TRUE #define STM32_HAS_TIM3 TRUE @@ -194,6 +221,7 @@ #define STM32_HAS_TIM16 FALSE #define STM32_HAS_TIM17 FALSE +/* USART attributes.*/ #define STM32_HAS_USART1 TRUE #define STM32_HAS_USART2 TRUE #define STM32_HAS_USART3 FALSE @@ -201,6 +229,7 @@ #define STM32_HAS_UART5 FALSE #define STM32_HAS_USART6 FALSE +/* USB attributes.*/ #define STM32_HAS_USB FALSE #define STM32_HAS_OTG1 FALSE #define STM32_HAS_OTG2 FALSE @@ -212,22 +241,30 @@ * @name STM32F103 MD capabilities * @{ */ +/* ADC attributes.*/ #define STM32_HAS_ADC1 TRUE #define STM32_HAS_ADC2 TRUE #define STM32_HAS_ADC3 FALSE +/* CAN attributes.*/ #define STM32_HAS_CAN1 TRUE #define STM32_HAS_CAN2 FALSE +/* DAC attributes.*/ #define STM32_HAS_DAC FALSE +/* DMA attributes.*/ +#define STM32_ADVANCED_DMA FALSE #define STM32_HAS_DMA1 TRUE #define STM32_HAS_DMA2 FALSE +/* ETH attributes.*/ #define STM32_HAS_ETH FALSE +/* EXTI attributes.*/ #define STM32_EXTI_NUM_CHANNELS 19 +/* GPIO attributes.*/ #define STM32_HAS_GPIOA TRUE #define STM32_HAS_GPIOB TRUE #define STM32_HAS_GPIOC TRUE @@ -238,18 +275,37 @@ #define STM32_HAS_GPIOH FALSE #define STM32_HAS_GPIOI FALSE +/* I2C attributes.*/ #define STM32_HAS_I2C1 TRUE #define STM32_HAS_I2C2 TRUE #define STM32_HAS_I2C3 FALSE +/* RTC attributes.*/ #define STM32_HAS_RTC TRUE +/* SDIO attributes.*/ #define STM32_HAS_SDIO FALSE +/* SPI attributes.*/ #define STM32_HAS_SPI1 TRUE +#define STM32_SPI1_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 2) +#define STM32_SPI1_RX_DMA_CHN 0x00000000 +#define STM32_SPI1_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 3) +#define STM32_SPI1_TX_DMA_CHN 0x00000000 + #define STM32_HAS_SPI2 TRUE +#define STM32_SPI2_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 4) +#define STM32_SPI2_RX_DMA_CHN 0x00000000 +#define STM32_SPI2_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 5) +#define STM32_SPI2_TX_DMA_CHN 0x00000000 + #define STM32_HAS_SPI3 FALSE +#define STM32_SPI3_RX_DMA_MSK 0 +#define STM32_SPI3_RX_DMA_CHN 0x00000000 +#define STM32_SPI3_TX_DMA_MSK 0 +#define STM32_SPI3_TX_DMA_CHN 0x00000000 +/* TIM attributes.*/ #define STM32_HAS_TIM1 TRUE #define STM32_HAS_TIM2 TRUE #define STM32_HAS_TIM3 TRUE @@ -268,6 +324,7 @@ #define STM32_HAS_TIM16 FALSE #define STM32_HAS_TIM17 FALSE +/* USART attributes.*/ #define STM32_HAS_USART1 TRUE #define STM32_HAS_USART2 TRUE #define STM32_HAS_USART3 TRUE @@ -275,6 +332,7 @@ #define STM32_HAS_UART5 FALSE #define STM32_HAS_USART6 FALSE +/* USB attributes.*/ #define STM32_HAS_USB TRUE #define STM32_HAS_OTG1 FALSE #define STM32_HAS_OTG2 FALSE @@ -286,22 +344,30 @@ * @name STM32F103 HD capabilities * @{ */ +/* ADC attributes.*/ #define STM32_HAS_ADC1 TRUE #define STM32_HAS_ADC2 TRUE #define STM32_HAS_ADC3 TRUE +/* CAN attributes.*/ #define STM32_HAS_CAN1 TRUE #define STM32_HAS_CAN2 FALSE +/* DAC attributes.*/ #define STM32_HAS_DAC TRUE +/* DMA attributes.*/ +#define STM32_ADVANCED_DMA FALSE #define STM32_HAS_DMA1 TRUE #define STM32_HAS_DMA2 TRUE +/* ETH attributes.*/ #define STM32_HAS_ETH FALSE +/* EXTI attributes.*/ #define STM32_EXTI_NUM_CHANNELS 19 +/* GPIO attributes.*/ #define STM32_HAS_GPIOA TRUE #define STM32_HAS_GPIOB TRUE #define STM32_HAS_GPIOC TRUE @@ -312,18 +378,37 @@ #define STM32_HAS_GPIOH FALSE #define STM32_HAS_GPIOI FALSE +/* I2C attributes.*/ #define STM32_HAS_I2C1 TRUE #define STM32_HAS_I2C2 TRUE #define STM32_HAS_I2C3 FALSE +/* RTC attributes.*/ #define STM32_HAS_RTC TRUE +/* SDIO attributes.*/ #define STM32_HAS_SDIO TRUE +/* SPI attributes.*/ #define STM32_HAS_SPI1 TRUE +#define STM32_SPI1_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 2) +#define STM32_SPI1_RX_DMA_CHN 0x00000000 +#define STM32_SPI1_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 3) +#define STM32_SPI1_TX_DMA_CHN 0x00000000 + #define STM32_HAS_SPI2 TRUE +#define STM32_SPI2_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 4) +#define STM32_SPI2_RX_DMA_CHN 0x00000000 +#define STM32_SPI2_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 5) +#define STM32_SPI2_TX_DMA_CHN 0x00000000 + #define STM32_HAS_SPI3 TRUE +#define STM32_SPI3_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(2, 5) +#define STM32_SPI3_RX_DMA_CHN 0x00000000 +#define STM32_SPI3_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(2, 6) +#define STM32_SPI3_TX_DMA_CHN 0x00000000 +/* TIM attributes.*/ #define STM32_HAS_TIM1 TRUE #define STM32_HAS_TIM2 TRUE #define STM32_HAS_TIM3 TRUE @@ -342,6 +427,7 @@ #define STM32_HAS_TIM16 FALSE #define STM32_HAS_TIM17 FALSE +/* USART attributes.*/ #define STM32_HAS_USART1 TRUE #define STM32_HAS_USART2 TRUE #define STM32_HAS_USART3 TRUE @@ -349,6 +435,7 @@ #define STM32_HAS_UART5 TRUE #define STM32_HAS_USART6 FALSE +/* USB attributes.*/ #define STM32_HAS_USB TRUE #define STM32_HAS_OTG1 FALSE #define STM32_HAS_OTG2 FALSE @@ -360,22 +447,30 @@ * @name STM32F103 XL capabilities * @{ */ +/* ADC attributes.*/ #define STM32_HAS_ADC1 TRUE #define STM32_HAS_ADC2 TRUE #define STM32_HAS_ADC3 TRUE +/* CAN attributes.*/ #define STM32_HAS_CAN1 TRUE #define STM32_HAS_CAN2 FALSE +/* DAC attributes.*/ #define STM32_HAS_DAC TRUE +/* DMA attributes.*/ +#define STM32_ADVANCED_DMA FALSE #define STM32_HAS_DMA1 TRUE #define STM32_HAS_DMA2 TRUE +/* ETH attributes.*/ #define STM32_HAS_ETH FALSE +/* EXTI attributes.*/ #define STM32_EXTI_NUM_CHANNELS 19 +/* GPIO attributes.*/ #define STM32_HAS_GPIOA TRUE #define STM32_HAS_GPIOB TRUE #define STM32_HAS_GPIOC TRUE @@ -386,18 +481,37 @@ #define STM32_HAS_GPIOH FALSE #define STM32_HAS_GPIOI FALSE +/* I2C attributes.*/ #define STM32_HAS_I2C1 TRUE #define STM32_HAS_I2C2 TRUE #define STM32_HAS_I2C3 FALSE +/* RTC attributes.*/ #define STM32_HAS_RTC TRUE +/* SDIO attributes.*/ #define STM32_HAS_SDIO TRUE +/* SPI attributes.*/ #define STM32_HAS_SPI1 TRUE +#define STM32_SPI1_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 2) +#define STM32_SPI1_RX_DMA_CHN 0x00000000 +#define STM32_SPI1_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 3) +#define STM32_SPI1_TX_DMA_CHN 0x00000000 + #define STM32_HAS_SPI2 TRUE +#define STM32_SPI2_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 4) +#define STM32_SPI2_RX_DMA_CHN 0x00000000 +#define STM32_SPI2_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 5) +#define STM32_SPI2_TX_DMA_CHN 0x00000000 + #define STM32_HAS_SPI3 TRUE +#define STM32_SPI3_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(2, 5) +#define STM32_SPI3_RX_DMA_CHN 0x00000000 +#define STM32_SPI3_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(2, 6) +#define STM32_SPI3_TX_DMA_CHN 0x00000000 +/* TIM attributes.*/ #define STM32_HAS_TIM1 TRUE #define STM32_HAS_TIM2 TRUE #define STM32_HAS_TIM3 TRUE @@ -416,6 +530,7 @@ #define STM32_HAS_TIM16 FALSE #define STM32_HAS_TIM17 FALSE +/* USART attributes.*/ #define STM32_HAS_USART1 TRUE #define STM32_HAS_USART2 TRUE #define STM32_HAS_USART3 TRUE @@ -423,6 +538,7 @@ #define STM32_HAS_UART5 TRUE #define STM32_HAS_USART6 FALSE +/* USB attributes.*/ #define STM32_HAS_USB TRUE #define STM32_HAS_OTG1 FALSE #define STM32_HAS_OTG2 FALSE diff --git a/os/hal/platforms/STM32F1xx/hal_lld_f105_f107.h b/os/hal/platforms/STM32F1xx/hal_lld_f105_f107.h index cc9b2f796..b8eb11c3b 100644 --- a/os/hal/platforms/STM32F1xx/hal_lld_f105_f107.h +++ b/os/hal/platforms/STM32F1xx/hal_lld_f105_f107.h @@ -130,22 +130,30 @@ * @name STM32F105/F107 CL capabilities * @{ */ +/* ADC attributes.*/ #define STM32_HAS_ADC1 TRUE #define STM32_HAS_ADC2 TRUE #define STM32_HAS_ADC3 FALSE +/* CAN attributes.*/ #define STM32_HAS_CAN1 TRUE #define STM32_HAS_CAN2 TRUE +/* DAC attributes.*/ #define STM32_HAS_DAC TRUE +/* DMA attributes.*/ +#define STM32_ADVANCED_DMA FALSE #define STM32_HAS_DMA1 TRUE #define STM32_HAS_DMA2 TRUE +/* ETH attributes.*/ #define STM32_HAS_ETH TRUE +/* EXTI attributes.*/ #define STM32_EXTI_NUM_CHANNELS 20 +/* GPIO attributes.*/ #define STM32_HAS_GPIOA TRUE #define STM32_HAS_GPIOB TRUE #define STM32_HAS_GPIOC TRUE @@ -156,18 +164,37 @@ #define STM32_HAS_GPIOH FALSE #define STM32_HAS_GPIOI FALSE +/* I2C attributes.*/ #define STM32_HAS_I2C1 TRUE #define STM32_HAS_I2C2 TRUE #define STM32_HAS_I2C3 FALSE +/* RTC attributes.*/ #define STM32_HAS_RTC TRUE +/* SDIO attributes.*/ #define STM32_HAS_SDIO FALSE +/* SPI attributes.*/ #define STM32_HAS_SPI1 TRUE +#define STM32_SPI1_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 2) +#define STM32_SPI1_RX_DMA_CHN 0x00000000 +#define STM32_SPI1_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 3) +#define STM32_SPI1_TX_DMA_CHN 0x00000000 + #define STM32_HAS_SPI2 TRUE +#define STM32_SPI2_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 4) +#define STM32_SPI2_RX_DMA_CHN 0x00000000 +#define STM32_SPI2_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 5) +#define STM32_SPI2_TX_DMA_CHN 0x00000000 + #define STM32_HAS_SPI3 TRUE +#define STM32_SPI3_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(2, 5) +#define STM32_SPI3_RX_DMA_CHN 0x00000000 +#define STM32_SPI3_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(2, 6) +#define STM32_SPI3_TX_DMA_CHN 0x00000000 +/* TIM attributes.*/ #define STM32_HAS_TIM1 TRUE #define STM32_HAS_TIM2 TRUE #define STM32_HAS_TIM3 TRUE @@ -186,6 +213,7 @@ #define STM32_HAS_TIM16 FALSE #define STM32_HAS_TIM17 FALSE +/* USART attributes.*/ #define STM32_HAS_USART1 TRUE #define STM32_HAS_USART2 TRUE #define STM32_HAS_USART3 TRUE @@ -193,6 +221,7 @@ #define STM32_HAS_UART5 TRUE #define STM32_HAS_USART6 FALSE +/* USB attributes.*/ #define STM32_HAS_USB FALSE #define STM32_HAS_OTG1 TRUE #define STM32_HAS_OTG2 FALSE diff --git a/os/hal/platforms/STM32F1xx/stm32_dma.h b/os/hal/platforms/STM32F1xx/stm32_dma.h index e01708d64..4469bef67 100644 --- a/os/hal/platforms/STM32F1xx/stm32_dma.h +++ b/os/hal/platforms/STM32F1xx/stm32_dma.h @@ -62,6 +62,28 @@ */ #define STM32_DMA_GETCHANNEL(n, c) 0 +/** + * @brief Returns a DMA stream identifier mask. + * + * + * @param[in] dma the DMA unit number + * @param[in] stream the stream number + * @return A DMA stream identifier mask. + */ +#define STM32_DMA_STREAM_ID_MSK(dma, stream) \ + (1 << STM32_DMA_STREAM_ID(dma, stream)) + +/** + * @brief Checks if a DMA stream unique identifier belongs to a mask. + * @param[in] id the stream numeric identifier + * @param[in] mask the stream numeric identifiers mask + * + * @retval The check result. + * @retval FALSE id does not belong to the mask. + * @retval TRUE id belongs to the mask. + */ +#define STM32_DMA_IS_VALID_ID(id, mask) (((1 << (id)) & (mask))) + /** * @name DMA streams identifiers * @{ diff --git a/os/hal/platforms/STM32L1xx/hal_lld.h b/os/hal/platforms/STM32L1xx/hal_lld.h index 08990ee13..8d8f1b23b 100644 --- a/os/hal/platforms/STM32L1xx/hal_lld.h +++ b/os/hal/platforms/STM32L1xx/hal_lld.h @@ -227,9 +227,9 @@ #define STM32_SPI2_TX_DMA_CHN 0x00000000 #define STM32_HAS_SPI3 FALSE -#define STM32_SPI3_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(2, 5) +#define STM32_SPI3_RX_DMA_MSK 0 #define STM32_SPI3_RX_DMA_CHN 0x00000000 -#define STM32_SPI3_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(2, 6) +#define STM32_SPI3_TX_DMA_MSK 0 #define STM32_SPI3_TX_DMA_CHN 0x00000000 /* TIM attributes.*/ -- cgit v1.2.3