From 59cd37eacb17e1ccb9b640fdbe172fd91a45f331 Mon Sep 17 00:00:00 2001
From: gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>
Date: Fri, 11 Dec 2009 15:55:45 +0000
Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1415
 35acf78f-673a-0410-8e92-d51de3d6d3f4

---
 os/hal/platforms/STM32/pwm_lld.c | 37 +++++++++++++++++++++++++++++++++++++
 os/hal/platforms/STM32/pwm_lld.h | 35 ++++++++++++++++++++++++++++++++---
 2 files changed, 69 insertions(+), 3 deletions(-)

(limited to 'os/hal')

diff --git a/os/hal/platforms/STM32/pwm_lld.c b/os/hal/platforms/STM32/pwm_lld.c
index 8188eefb1..2d49eb6be 100644
--- a/os/hal/platforms/STM32/pwm_lld.c
+++ b/os/hal/platforms/STM32/pwm_lld.c
@@ -29,6 +29,11 @@
 
 #if CH_HAL_USE_PWM || defined(__DOXYGEN__)
 
+/** @brief PWM1 driver identifier.*/
+#if defined(USE_STM32_PWM1) || defined(__DOXYGEN__)
+PWMDriver PWMD1;
+#endif
+
 /*===========================================================================*/
 /* Low Level Driver exported variables.                                      */
 /*===========================================================================*/
@@ -54,6 +59,15 @@
  */
 void pwm_lld_init(void) {
 
+#if USE_STM32_PWM1
+  /* TIM1 reset, ensures reset state in order to avoid trouble with JTAGs.*/
+  RCC->APB2RSTR = RCC_APB2RSTR_TIM1RST;
+  RCC->APB2RSTR = 0;
+
+  /* Driver initialization.*/
+  pwmObjectInit(&PWMD1);
+#endif
+
 }
 
 /**
@@ -65,6 +79,12 @@ void pwm_lld_start(PWMDriver *pwmp) {
 
   if (pwmp->pd_state == PWM_STOP) {
     /* Clock activation.*/
+#if USE_STM32_PWM1
+    if (&PWMD1 == pwmp) {
+      NVICEnableVector(TIM1_CC_IRQn, STM32_PWM1_IRQ_PRIORITY);
+      RCC->APB2ENR |= RCC_APB2ENR_TIM1EN;
+    }
+#endif
   }
   /* Configuration.*/
 }
@@ -76,6 +96,15 @@ void pwm_lld_start(PWMDriver *pwmp) {
  */
 void pwm_lld_stop(PWMDriver *pwmp) {
 
+  /* If in ready state then disables the PWM clock.*/
+  if (pwmp->pd_state == PWM_READY) {
+#if USE_STM32_PWM1
+    if (&PWMD1 == pwmp) {
+      NVICDisableVector(TIM1_CC_IRQn);
+      RCC->APB2ENR &= ~RCC_APB2ENR_TIM1EN;
+    }
+#endif
+  }
 }
 
 /**
@@ -105,6 +134,14 @@ bool_t pwm_lld_is_enabled(PWMDriver *pwmp, pwmchannel_t channel) {
 void pwm_lld_set_callback(PWMDriver *pwmp, pwmchannel_t channel,
                           pwmedge_t edge, pwmcallback_t callback) {
 
+  if (edge == PWM_NONE) {
+    /* Callback disable.*/
+    pwmp->pd_callbacks[channel] = NULL;
+  }
+  else {
+    /* Callback enable.*/
+    pwmp->pd_callbacks[channel] = callback;
+  }
 }
 
 /**
diff --git a/os/hal/platforms/STM32/pwm_lld.h b/os/hal/platforms/STM32/pwm_lld.h
index df332e322..92119a74c 100644
--- a/os/hal/platforms/STM32/pwm_lld.h
+++ b/os/hal/platforms/STM32/pwm_lld.h
@@ -33,15 +33,30 @@
 /* Driver constants.                                                         */
 /*===========================================================================*/
 
+/**
+ * @brief Number of PWM channels per PWM driver.
+ */
+#define PWM_CHANNELS                4
+
 /*===========================================================================*/
 /* Driver pre-compile time settings.                                         */
 /*===========================================================================*/
 
 /**
- * @brief Number of PWM channels per PWM driver.
+ * @brief PWM1 driver enable switch.
+ * @details If set to @p TRUE the support for PWM1 is included.
+ * @note The default is @p TRUE.
  */
-#if !defined(PWM_CHANNELS) || defined(__DOXYGEN__)
-#define PWM_CHANNELS        1
+#if !defined(USE_STM32_PWM1) || defined(__DOXYGEN__)
+#define USE_STM32_PWM1              TRUE
+#endif
+
+/**
+ * @brief PWM1 interrupt priority level setting.
+ * @note @p BASEPRI_KERNEL >= @p STM32_PWM1_IRQ_PRIORITY > @p PRIORITY_PENDSV.
+ */
+#if !defined(STM32_PWM1_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_PWM1_IRQ_PRIORITY     0x80
 #endif
 
 /*===========================================================================*/
@@ -79,12 +94,25 @@ typedef struct {
    */
   const PWMConfig           *pd_config;
   /* End of the mandatory fields.*/
+  /**
+   * @brief Bit mask of the enabled channels.
+   */
+  uint32_t                  pd_enabled_channels;
+  /**
+   * @brief Callback pointers.
+   */
+  pwmcallback_t             pd_callbacks[PWM_CHANNELS];
 } PWMDriver;
 
 /*===========================================================================*/
 /* External declarations.                                                    */
 /*===========================================================================*/
 
+/** @cond never*/
+#if defined(USE_STM32_PWM1)
+extern PWMDriver PWMD1;
+#endif
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -101,6 +129,7 @@ extern "C" {
 #ifdef __cplusplus
 }
 #endif
+/** @endcond*/
 
 #endif /* CH_HAL_USE_PWM */
 
-- 
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