From 53093a74b030cffbb4ebd78adaa4707ea4ecf9db Mon Sep 17 00:00:00 2001
From: Giovanni Di Sirio <gdisirio@gmail.com>
Date: Sat, 8 Dec 2018 09:17:09 +0000
Subject: Added missing macros.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12462 110e8d01-0319-4d1e-a829-52ad28d1bb01
---
 os/hal/ports/STM32/STM32L4xx+/stm32_rcc.h      | 28 ++++++++++++++++++++++++++
 os/hal/ports/STM32/STM32L4xx+/stm32_registry.h | 11 ++++++++--
 2 files changed, 37 insertions(+), 2 deletions(-)

(limited to 'os/hal')

diff --git a/os/hal/ports/STM32/STM32L4xx+/stm32_rcc.h b/os/hal/ports/STM32/STM32L4xx+/stm32_rcc.h
index b8c367768..76f842ccc 100644
--- a/os/hal/ports/STM32/STM32L4xx+/stm32_rcc.h
+++ b/os/hal/ports/STM32/STM32L4xx+/stm32_rcc.h
@@ -1263,6 +1263,34 @@
 #define rccResetFSMC() rccResetAHB3(RCC_AHB3RSTR_FMCRST)
 /** @} */
 
+/**
+ * @name    DCMI peripheral specific RCC operations
+ * @{
+ */
+/**
+ * @brief   Enables the DCMI peripheral clock.
+ *
+ * @param[in] lp        low power enable flag
+ *
+ * @api
+ */
+#define rccEnableDCMI(lp) rccEnableAHB2(RCC_AHB2ENR_DCMIEN, lp)
+
+/**
+ * @brief   Disables the DCMI peripheral clock.
++ *
++ * @api
+ */
+#define rccDisableDCMI() rccDisableAHB2(RCC_AHB2ENR_DCMIEN)
+
+/**
+ * @brief   Resets the DCMI peripheral.
+ *
+ * @api
+ */
+#define rccResetDCMI() rccResetAHB2(RCC_AHB2RSTR_DCMIRST)
+/** @} */
+
 /*===========================================================================*/
 /* External declarations.                                                    */
 /*===========================================================================*/
diff --git a/os/hal/ports/STM32/STM32L4xx+/stm32_registry.h b/os/hal/ports/STM32/STM32L4xx+/stm32_registry.h
index f6d316137..2e0b885b7 100644
--- a/os/hal/ports/STM32/STM32L4xx+/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32L4xx+/stm32_registry.h
@@ -380,10 +380,12 @@
 #define STM32_IWDG_IS_WINDOWED              TRUE
 
 /* LTDC attributes.*/
-#define STM32_HAS_LTDC                      FALSE
+#define STM32_HAS_LTDC                      TRUE
 
 /* DMA2D attributes.*/
-#define STM32_HAS_DMA2D                     FALSE
+#define STM32_HAS_DMA2D                     TRUE
+#define STM32_DMA2D_NUMBER                  90
+#define STM32_DMA2D_HANDLER                 Vector1A8
 
 /* FSMC attributes.*/
 #define STM32_HAS_FSMC                      TRUE
@@ -392,6 +394,11 @@
 #define STM32_HAS_CRC                       TRUE
 #define STM32_CRC_PROGRAMMABLE              TRUE
 
+/* DCMI attributes.*/
+#define STM32_HAS_DCMI                      TRUE
+#define STM32_DCMI_NUMBER                   85
+#define STM32_DCMI_HANDLER                  Vector14C
+
 #endif /* defined(STM32L4R5xx) || defined(STM32L4R7xx) ||
           defined(STM32L4R9xx) || defined(STM32L4S5xx) ||
           defined(STM32L4S7xx) || defined(STM32L4S9xx) */
-- 
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