From 086b5de61ef3cd9889a3d996a2f68624805cf61f Mon Sep 17 00:00:00 2001
From: gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>
Date: Sun, 17 Feb 2013 13:45:48 +0000
Subject: Updated all the STM32F4 mcuconf files because the new OTG options.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5221 35acf78f-673a-0410-8e92-d51de3d6d3f4
---
 os/hal/platforms/STM32/OTGv1/usb_lld.c | 14 ++++++--------
 os/hal/platforms/STM32/OTGv1/usb_lld.h |  9 ++++++++-
 2 files changed, 14 insertions(+), 9 deletions(-)

(limited to 'os/hal')

diff --git a/os/hal/platforms/STM32/OTGv1/usb_lld.c b/os/hal/platforms/STM32/OTGv1/usb_lld.c
index 119b5b610..0ee3a563f 100644
--- a/os/hal/platforms/STM32/OTGv1/usb_lld.c
+++ b/os/hal/platforms/STM32/OTGv1/usb_lld.c
@@ -884,8 +884,9 @@ void usb_lld_start(USBDriver *usbp) {
       /* OTG HS clock enable and reset.*/
 #if STM32_USE_USB_OTG2_ULPI
       rccEnableAHB1((RCC_AHB1ENR_GPIOAEN | RCC_AHB1ENR_GPIOBEN |
-          RCC_AHB1ENR_GPIOCEN | RCC_AHB1ENR_GPIOHEN | RCC_AHB1ENR_GPIOIEN),
-          FALSE);
+                     RCC_AHB1ENR_GPIOCEN | RCC_AHB1ENR_GPIOHEN |
+                     RCC_AHB1ENR_GPIOIEN),
+                    FALSE);
       rccEnableAHB1(RCC_AHB1ENR_OTGHSULPIEN, FALSE);
 #endif
       rccEnableOTG_HS(FALSE);
@@ -908,7 +909,7 @@ void usb_lld_start(USBDriver *usbp) {
                                                     usbp);
 
     /* - Forced device mode.
-       - USB turn-around time = TRDT_VALUE. */
+       - USB turn-around time = TRDT_VALUE.*/
 #if STM32_USE_USB_OTG2_ULPI
     /* High speed ULPI PHY */
     otgp->GUSBCFG = GUSBCFG_FDMOD |  GUSBCFG_TRDT(TRDT_VALUE) | GUSBCFG_SRPCAP | GUSBCFG_HNPCAP;
@@ -917,7 +918,6 @@ void usb_lld_start(USBDriver *usbp) {
     otgp->GUSBCFG = GUSBCFG_FDMOD | GUSBCFG_TRDT(TRDT_VALUE) | GUSBCFG_PHYSEL;
 #endif
 
-
 #if STM32_USE_USB_OTG2_HS
     /* USB 2.0 High Speed PHY.*/
     otgp->DCFG = 0x02200000 | DCFG_DSPD_HS;
@@ -931,17 +931,15 @@ void usb_lld_start(USBDriver *usbp) {
 
     if (&USBD2 == usbp) {
 #if STM32_USE_USB_OTG2_ULPI
-        otgp->GCCFG = 0;
+      otgp->GCCFG = 0;
 #else
-        otgp->GCCFG = GCCFG_VBUSASEN | GCCFG_VBUSBSEN | GCCFG_PWRDWN;
+      otgp->GCCFG = GCCFG_VBUSASEN | GCCFG_VBUSBSEN | GCCFG_PWRDWN;
 #endif
     } else {
       /* Internal FS PHY activation.*/
       otgp->GCCFG = GCCFG_VBUSASEN | GCCFG_VBUSBSEN | GCCFG_PWRDWN;
     }
 
-
-
     /* Soft core reset.*/
     otg_core_reset(usbp);
 
diff --git a/os/hal/platforms/STM32/OTGv1/usb_lld.h b/os/hal/platforms/STM32/OTGv1/usb_lld.h
index a95f45842..77b8d27aa 100644
--- a/os/hal/platforms/STM32/OTGv1/usb_lld.h
+++ b/os/hal/platforms/STM32/OTGv1/usb_lld.h
@@ -74,7 +74,14 @@
 #endif
 
 /**
- * @brief   ULPI support for OTH-HS.
+ * @brief   High Speed support for OTG-HS.
+ */
+#if !defined(STM32_USE_USB_OTG2_HS) || defined(__DOXYGEN__)
+#define STM32_USE_USB_OTG2_HS               FALSE
+#endif
+
+/**
+ * @brief   ULPI support for OTG-HS.
  */
 #if !defined(STM32_USE_USB_OTG2_ULPI) || defined(__DOXYGEN__)
 #define STM32_USE_USB_OTG2_ULPI             FALSE
-- 
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