From 783f4514f108c28f6ab954eab601a7c6b3092ec9 Mon Sep 17 00:00:00 2001
From: gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>
Date: Sat, 27 Mar 2010 12:27:25 +0000
Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1795
 35acf78f-673a-0410-8e92-d51de3d6d3f4

---
 os/hal/platforms/LPC11xx/hal_lld.h | 46 +++++++++++++++++++++++++++++++++++++-
 1 file changed, 45 insertions(+), 1 deletion(-)

(limited to 'os/hal/platforms/LPC11xx/hal_lld.h')

diff --git a/os/hal/platforms/LPC11xx/hal_lld.h b/os/hal/platforms/LPC11xx/hal_lld.h
index ab7a637e6..c1105992f 100644
--- a/os/hal/platforms/LPC11xx/hal_lld.h
+++ b/os/hal/platforms/LPC11xx/hal_lld.h
@@ -38,16 +38,60 @@
 /**
  * @brief   Platform name.
  */
-#define PLATFORM_NAME   "LPC11xx"
+#define PLATFORM_NAME           "LPC11xx"
+
+#define IRCOSCCLK               12000000    /**< High speed internal clock. */
+
+#define SYSPLLCLKSEL_IRCOCS     0           /**< Internal RC oscillator
+                                                 clock source.              */
+#define SYSPLLCLKSEL_SYSOSC     1           /**< System oscillator clock
+                                                 source.                    */
 
 /*===========================================================================*/
 /* Driver pre-compile time settings.                                         */
 /*===========================================================================*/
 
+/**
+ * @brief   System PLL clock source.
+ */
+#if !defined(LPC11xx_SYSPLL_SOURCE) || defined(__DOXYGEN__)
+#define LPC11xx_SYSPLLCLKSEL    SYSPLLCLKSEL_SYSOSC
+#endif
+
+/**
+ * @brief   System PLL multiplier.
+ * @note    The value must be in the 1..32 range and the final frequency
+ *          must not exceed the CCO ratings.
+ */
+#if !defined(LPC11xx_SYSPLL_MUL) || defined(__DOXYGEN__)
+#define LPC11xx_SYSPLL_MUL      16
+#endif
+
 /*===========================================================================*/
 /* Derived constants and error checks.                                       */
 /*===========================================================================*/
 
+#if LPC11xx_SYSPLLCLKSEL == SYSPLLCLKSEL_SYSOSC
+#define LPC11xx_SYSPLLCLKIN     SYSOSCCLK
+#elif LPC11xx_SYSPLLCLKSEL == SYSPLLCLKSEL_IRCOCS
+#define LPC11xx_SYSPLLCLKIN     IRCOSCCLK
+#else
+#error "invalid LPC11xx_SYSPLLCLKSEL clock source specified"
+#endif
+
+#if (LPC11xx_SYSPLL_MUL < 1) || (LPC11xx_SYSPLL_MUL > 32)
+#error "LPC11xx_SYSPLL_MUL out of range (1...32)"
+#endif
+
+/**
+ * @brief   PLL output clock.
+ */
+#define  LPC11xx_SYSPLLCLKOUT   (LPC11xx_SYSPLLCLKIN * LPC11xx_SYSPLL_MUL)
+
+#if (LPC11xx_SYSPLLCLKOUT < 156000000) || (LPC11xx_SYSPLLCLKOUT > 320000000)
+#error "CCO frequency out of the acceptable range (156...320)"
+#endif
+
 /*===========================================================================*/
 /* Driver data structures and types.                                         */
 /*===========================================================================*/
-- 
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