From 7fb3c807170fe737294d521ad1c8654b6e069c49 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Sat, 2 Dec 2017 14:56:34 +0000 Subject: Added command line board files generation tool. Regenerated all board files automatically. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11104 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/boards/MIKROE_CLICKER2_STM32/board.c | 145 +- os/hal/boards/MIKROE_CLICKER2_STM32/board.h | 25 +- .../boards/MIKROE_CLICKER2_STM32/cfg/board.chcfg | 2 +- os/hal/boards/MIKROE_CLICKER2_STM32/cfg/board.fmpp | 15 + os/hal/boards/OLIMEX_STM32_E407/board.c | 145 +- os/hal/boards/OLIMEX_STM32_E407/board.h | 31 +- os/hal/boards/OLIMEX_STM32_E407/board.mk | 4 - os/hal/boards/OLIMEX_STM32_E407/cfg/board.chcfg | 2 +- os/hal/boards/OLIMEX_STM32_E407/cfg/board.fmpp | 15 + os/hal/boards/OLIMEX_STM32_E407_REV_D/board.c | 145 +- os/hal/boards/OLIMEX_STM32_E407_REV_D/board.h | 31 +- os/hal/boards/OLIMEX_STM32_E407_REV_D/board.mk | 4 - .../boards/OLIMEX_STM32_E407_REV_D/cfg/board.chcfg | 2 +- .../boards/OLIMEX_STM32_E407_REV_D/cfg/board.fmpp | 15 + os/hal/boards/OLIMEX_STM32_H407/board.c | 145 +- os/hal/boards/OLIMEX_STM32_H407/board.h | 31 +- os/hal/boards/OLIMEX_STM32_H407/cfg/board.chcfg | 2 +- os/hal/boards/OLIMEX_STM32_H407/cfg/board.fmpp | 15 + os/hal/boards/SEEED_ARCH_MAX/board.c | 266 ++++ os/hal/boards/SEEED_ARCH_MAX/board.h | 1380 ++++++++++++++++++++ os/hal/boards/SEEED_ARCH_MAX/board.mk | 9 + os/hal/boards/SEEED_ARCH_MAX/cfg/board.chcfg | 342 +++++ os/hal/boards/SEEED_ARCH_MAX/cfg/board.fmpp | 15 + os/hal/boards/ST_NUCLEO144_F207ZG/board.c | 145 +- os/hal/boards/ST_NUCLEO144_F207ZG/board.h | 29 +- os/hal/boards/ST_NUCLEO144_F207ZG/cfg/board.chcfg | 2 +- os/hal/boards/ST_NUCLEO144_F207ZG/cfg/board.fmpp | 15 + os/hal/boards/ST_NUCLEO144_F303ZE/board.c | 155 ++- os/hal/boards/ST_NUCLEO144_F303ZE/board.h | 29 +- os/hal/boards/ST_NUCLEO144_F303ZE/cfg/board.chcfg | 2 +- os/hal/boards/ST_NUCLEO144_F303ZE/cfg/board.fmpp | 15 + os/hal/boards/ST_NUCLEO144_F412ZG/board.c | 145 +- os/hal/boards/ST_NUCLEO144_F412ZG/board.h | 29 +- os/hal/boards/ST_NUCLEO144_F412ZG/cfg/board.chcfg | 2 +- os/hal/boards/ST_NUCLEO144_F412ZG/cfg/board.fmpp | 15 + os/hal/boards/ST_NUCLEO144_F429ZI/board.c | 145 +- os/hal/boards/ST_NUCLEO144_F429ZI/board.h | 29 +- os/hal/boards/ST_NUCLEO144_F429ZI/cfg/board.chcfg | 2 +- os/hal/boards/ST_NUCLEO144_F429ZI/cfg/board.fmpp | 15 + os/hal/boards/ST_NUCLEO144_F446ZE/board.c | 145 +- os/hal/boards/ST_NUCLEO144_F446ZE/board.h | 29 +- os/hal/boards/ST_NUCLEO144_F446ZE/cfg/board.chcfg | 2 +- os/hal/boards/ST_NUCLEO144_F446ZE/cfg/board.fmpp | 15 + os/hal/boards/ST_NUCLEO144_F746ZG/board.c | 145 +- os/hal/boards/ST_NUCLEO144_F746ZG/board.h | 29 +- os/hal/boards/ST_NUCLEO144_F746ZG/cfg/board.chcfg | 2 +- os/hal/boards/ST_NUCLEO144_F746ZG/cfg/board.fmpp | 15 + os/hal/boards/ST_NUCLEO144_F767ZI/board.c | 145 +- os/hal/boards/ST_NUCLEO144_F767ZI/board.h | 29 +- os/hal/boards/ST_NUCLEO144_F767ZI/cfg/board.chcfg | 2 +- os/hal/boards/ST_NUCLEO144_F767ZI/cfg/board.fmpp | 15 + os/hal/boards/ST_NUCLEO32_F031K6/board.c | 177 ++- os/hal/boards/ST_NUCLEO32_F031K6/board.h | 26 +- os/hal/boards/ST_NUCLEO32_F031K6/cfg/board.chcfg | 2 +- os/hal/boards/ST_NUCLEO32_F031K6/cfg/board.fmpp | 15 + os/hal/boards/ST_NUCLEO32_F042K6/board.c | 177 ++- os/hal/boards/ST_NUCLEO32_F042K6/board.h | 26 +- os/hal/boards/ST_NUCLEO32_F042K6/cfg/board.chcfg | 2 +- os/hal/boards/ST_NUCLEO32_F042K6/cfg/board.fmpp | 15 + os/hal/boards/ST_NUCLEO32_F303K8/board.c | 155 ++- os/hal/boards/ST_NUCLEO32_F303K8/board.h | 28 +- os/hal/boards/ST_NUCLEO32_F303K8/cfg/board.chcfg | 2 +- os/hal/boards/ST_NUCLEO32_F303K8/cfg/board.fmpp | 15 + os/hal/boards/ST_NUCLEO32_L011K4/board.c | 155 ++- os/hal/boards/ST_NUCLEO32_L011K4/board.h | 26 +- os/hal/boards/ST_NUCLEO32_L011K4/cfg/board.chcfg | 2 +- os/hal/boards/ST_NUCLEO32_L011K4/cfg/board.fmpp | 15 + os/hal/boards/ST_NUCLEO32_L031K6/board.c | 155 ++- os/hal/boards/ST_NUCLEO32_L031K6/board.h | 31 +- os/hal/boards/ST_NUCLEO32_L031K6/cfg/board.chcfg | 2 +- os/hal/boards/ST_NUCLEO32_L031K6/cfg/board.fmpp | 15 + os/hal/boards/ST_NUCLEO32_L432KC/board.c | 164 ++- os/hal/boards/ST_NUCLEO32_L432KC/board.h | 25 +- os/hal/boards/ST_NUCLEO32_L432KC/cfg/board.chcfg | 2 +- os/hal/boards/ST_NUCLEO32_L432KC/cfg/board.fmpp | 15 + os/hal/boards/ST_NUCLEO64_F030R8/board.c | 177 ++- os/hal/boards/ST_NUCLEO64_F030R8/board.h | 29 +- os/hal/boards/ST_NUCLEO64_F030R8/cfg/board.chcfg | 2 +- os/hal/boards/ST_NUCLEO64_F030R8/cfg/board.fmpp | 15 + os/hal/boards/ST_NUCLEO64_F070RB/board.c | 177 ++- os/hal/boards/ST_NUCLEO64_F070RB/board.h | 28 +- os/hal/boards/ST_NUCLEO64_F070RB/cfg/board.chcfg | 2 +- os/hal/boards/ST_NUCLEO64_F070RB/cfg/board.fmpp | 15 + os/hal/boards/ST_NUCLEO64_F072RB/board.c | 177 ++- os/hal/boards/ST_NUCLEO64_F072RB/board.h | 28 +- os/hal/boards/ST_NUCLEO64_F072RB/cfg/board.chcfg | 2 +- os/hal/boards/ST_NUCLEO64_F072RB/cfg/board.fmpp | 15 + os/hal/boards/ST_NUCLEO64_F091RC/board.c | 177 ++- os/hal/boards/ST_NUCLEO64_F091RC/board.h | 28 +- os/hal/boards/ST_NUCLEO64_F091RC/cfg/board.chcfg | 2 +- os/hal/boards/ST_NUCLEO64_F091RC/cfg/board.fmpp | 15 + os/hal/boards/ST_NUCLEO64_F302R8/board.c | 155 ++- os/hal/boards/ST_NUCLEO64_F302R8/board.h | 28 +- os/hal/boards/ST_NUCLEO64_F302R8/cfg/board.chcfg | 2 +- os/hal/boards/ST_NUCLEO64_F302R8/cfg/board.fmpp | 15 + os/hal/boards/ST_NUCLEO64_F303RE/board.c | 155 ++- os/hal/boards/ST_NUCLEO64_F303RE/board.h | 28 +- os/hal/boards/ST_NUCLEO64_F303RE/cfg/board.chcfg | 2 +- os/hal/boards/ST_NUCLEO64_F303RE/cfg/board.fmpp | 15 + os/hal/boards/ST_NUCLEO64_F334R8/board.c | 155 ++- os/hal/boards/ST_NUCLEO64_F334R8/board.h | 28 +- os/hal/boards/ST_NUCLEO64_F334R8/cfg/board.chcfg | 2 +- os/hal/boards/ST_NUCLEO64_F334R8/cfg/board.fmpp | 15 + os/hal/boards/ST_NUCLEO64_F401RE/board.c | 145 +- os/hal/boards/ST_NUCLEO64_F401RE/board.h | 29 +- os/hal/boards/ST_NUCLEO64_F401RE/cfg/board.chcfg | 2 +- os/hal/boards/ST_NUCLEO64_F401RE/cfg/board.fmpp | 15 + os/hal/boards/ST_NUCLEO64_F410RB/board.c | 145 +- os/hal/boards/ST_NUCLEO64_F410RB/board.h | 29 +- os/hal/boards/ST_NUCLEO64_F410RB/cfg/board.chcfg | 2 +- os/hal/boards/ST_NUCLEO64_F410RB/cfg/board.fmpp | 15 + os/hal/boards/ST_NUCLEO64_F411RE/board.c | 145 +- os/hal/boards/ST_NUCLEO64_F411RE/board.h | 29 +- os/hal/boards/ST_NUCLEO64_F411RE/cfg/board.chcfg | 2 +- os/hal/boards/ST_NUCLEO64_F411RE/cfg/board.fmpp | 15 + os/hal/boards/ST_NUCLEO64_F446RE/board.c | 145 +- os/hal/boards/ST_NUCLEO64_F446RE/board.h | 29 +- os/hal/boards/ST_NUCLEO64_F446RE/cfg/board.chcfg | 2 +- os/hal/boards/ST_NUCLEO64_F446RE/cfg/board.fmpp | 15 + os/hal/boards/ST_NUCLEO64_L053R8/board.c | 155 ++- os/hal/boards/ST_NUCLEO64_L053R8/board.h | 29 +- os/hal/boards/ST_NUCLEO64_L053R8/cfg/board.chcfg | 2 +- os/hal/boards/ST_NUCLEO64_L053R8/cfg/board.fmpp | 15 + os/hal/boards/ST_NUCLEO64_L073RZ/board.c | 155 ++- os/hal/boards/ST_NUCLEO64_L073RZ/board.h | 28 +- os/hal/boards/ST_NUCLEO64_L073RZ/cfg/board.chcfg | 2 +- os/hal/boards/ST_NUCLEO64_L073RZ/cfg/board.fmpp | 15 + os/hal/boards/ST_NUCLEO64_L152RE/board.c | 155 ++- os/hal/boards/ST_NUCLEO64_L152RE/board.h | 30 +- os/hal/boards/ST_NUCLEO64_L152RE/cfg/board.chcfg | 2 +- os/hal/boards/ST_NUCLEO64_L152RE/cfg/board.fmpp | 15 + os/hal/boards/ST_NUCLEO64_L476RG/board.c | 164 ++- os/hal/boards/ST_NUCLEO64_L476RG/board.h | 25 +- os/hal/boards/ST_NUCLEO64_L476RG/cfg/board.chcfg | 2 +- os/hal/boards/ST_NUCLEO64_L476RG/cfg/board.fmpp | 15 + os/hal/boards/ST_STM32373C_EVAL/board.c | 2 +- os/hal/boards/ST_STM32373C_EVAL/board.h | 9 +- os/hal/boards/ST_STM32373C_EVAL/cfg/board.chcfg | 2 +- os/hal/boards/ST_STM32373C_EVAL/cfg/board.fmpp | 15 + os/hal/boards/ST_STM32F072B_DISCOVERY/board.c | 177 ++- os/hal/boards/ST_STM32F072B_DISCOVERY/board.h | 28 +- .../boards/ST_STM32F072B_DISCOVERY/cfg/board.chcfg | 2 +- .../boards/ST_STM32F072B_DISCOVERY/cfg/board.fmpp | 15 + os/hal/boards/ST_STM32F0_DISCOVERY/board.c | 2 +- os/hal/boards/ST_STM32F0_DISCOVERY/board.h | 6 +- os/hal/boards/ST_STM32F0_DISCOVERY/cfg/board.chcfg | 2 +- os/hal/boards/ST_STM32F0_DISCOVERY/cfg/board.fmpp | 15 + os/hal/boards/ST_STM32F2_DISCOVERY/board.c | 155 ++- os/hal/boards/ST_STM32F2_DISCOVERY/board.h | 29 +- os/hal/boards/ST_STM32F2_DISCOVERY/cfg/board.chcfg | 2 +- os/hal/boards/ST_STM32F2_DISCOVERY/cfg/board.fmpp | 15 + os/hal/boards/ST_STM32F334_DISCOVERY/board.c | 155 ++- os/hal/boards/ST_STM32F334_DISCOVERY/board.h | 28 +- .../boards/ST_STM32F334_DISCOVERY/cfg/board.chcfg | 2 +- .../boards/ST_STM32F334_DISCOVERY/cfg/board.fmpp | 15 + os/hal/boards/ST_STM32F3_DISCOVERY/board.c | 2 +- os/hal/boards/ST_STM32F3_DISCOVERY/board.h | 9 +- os/hal/boards/ST_STM32F3_DISCOVERY/cfg/board.chcfg | 2 +- os/hal/boards/ST_STM32F3_DISCOVERY/cfg/board.fmpp | 15 + os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.c | 155 ++- os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.h | 28 +- .../ST_STM32F3_DISCOVERY_REVC/cfg/board.chcfg | 2 +- .../ST_STM32F3_DISCOVERY_REVC/cfg/board.fmpp | 15 + os/hal/boards/ST_STM32F401C_DISCOVERY/board.c | 145 +- os/hal/boards/ST_STM32F401C_DISCOVERY/board.h | 29 +- .../boards/ST_STM32F401C_DISCOVERY/cfg/board.chcfg | 2 +- .../boards/ST_STM32F401C_DISCOVERY/cfg/board.fmpp | 15 + os/hal/boards/ST_STM32F429I_DISCOVERY/board.c | 145 +- os/hal/boards/ST_STM32F429I_DISCOVERY/board.h | 31 +- .../boards/ST_STM32F429I_DISCOVERY/cfg/board.chcfg | 2 +- .../boards/ST_STM32F429I_DISCOVERY/cfg/board.fmpp | 15 + os/hal/boards/ST_STM32F469I_DISCOVERY/board.c | 145 +- os/hal/boards/ST_STM32F469I_DISCOVERY/board.h | 35 +- .../boards/ST_STM32F469I_DISCOVERY/cfg/board.chcfg | 2 +- .../boards/ST_STM32F469I_DISCOVERY/cfg/board.fmpp | 15 + os/hal/boards/ST_STM32F4_DISCOVERY/board.c | 2 +- os/hal/boards/ST_STM32F4_DISCOVERY/board.h | 10 +- os/hal/boards/ST_STM32F4_DISCOVERY/cfg/board.chcfg | 2 +- os/hal/boards/ST_STM32F4_DISCOVERY/cfg/board.fmpp | 15 + os/hal/boards/ST_STM32F746G_DISCOVERY/board.c | 2 +- os/hal/boards/ST_STM32F746G_DISCOVERY/board.h | 12 +- .../boards/ST_STM32F746G_DISCOVERY/cfg/board.fmpp | 15 + os/hal/boards/ST_STM32F769I_DISCOVERY/board.c | 145 +- os/hal/boards/ST_STM32F769I_DISCOVERY/board.h | 33 +- .../boards/ST_STM32F769I_DISCOVERY/cfg/board.chcfg | 2 +- .../boards/ST_STM32F769I_DISCOVERY/cfg/board.fmpp | 15 + os/hal/boards/ST_STM32L053_DISCOVERY/board.c | 2 +- os/hal/boards/ST_STM32L053_DISCOVERY/board.h | 6 +- .../boards/ST_STM32L053_DISCOVERY/cfg/board.chcfg | 2 +- .../boards/ST_STM32L053_DISCOVERY/cfg/board.fmpp | 15 + os/hal/boards/ST_STM32L476_DISCOVERY/board.c | 2 +- os/hal/boards/ST_STM32L476_DISCOVERY/board.h | 9 +- .../boards/ST_STM32L476_DISCOVERY/cfg/board.chcfg | 2 +- .../boards/ST_STM32L476_DISCOVERY/cfg/board.fmpp | 15 + os/hal/boards/ST_STM32L_DISCOVERY/board.c | 2 +- os/hal/boards/ST_STM32L_DISCOVERY/board.h | 7 +- os/hal/boards/ST_STM32L_DISCOVERY/cfg/board.chcfg | 2 +- os/hal/boards/ST_STM32L_DISCOVERY/cfg/board.fmpp | 15 + os/hal/boards/genboards.sh | 18 + 199 files changed, 9559 insertions(+), 718 deletions(-) create mode 100644 os/hal/boards/MIKROE_CLICKER2_STM32/cfg/board.fmpp create mode 100644 os/hal/boards/OLIMEX_STM32_E407/cfg/board.fmpp create mode 100644 os/hal/boards/OLIMEX_STM32_E407_REV_D/cfg/board.fmpp create mode 100644 os/hal/boards/OLIMEX_STM32_H407/cfg/board.fmpp create mode 100755 os/hal/boards/SEEED_ARCH_MAX/board.c create mode 100755 os/hal/boards/SEEED_ARCH_MAX/board.h create mode 100755 os/hal/boards/SEEED_ARCH_MAX/board.mk create mode 100755 os/hal/boards/SEEED_ARCH_MAX/cfg/board.chcfg create mode 100644 os/hal/boards/SEEED_ARCH_MAX/cfg/board.fmpp create mode 100644 os/hal/boards/ST_NUCLEO144_F207ZG/cfg/board.fmpp create mode 100644 os/hal/boards/ST_NUCLEO144_F303ZE/cfg/board.fmpp create mode 100644 os/hal/boards/ST_NUCLEO144_F412ZG/cfg/board.fmpp create mode 100644 os/hal/boards/ST_NUCLEO144_F429ZI/cfg/board.fmpp create mode 100644 os/hal/boards/ST_NUCLEO144_F446ZE/cfg/board.fmpp create mode 100644 os/hal/boards/ST_NUCLEO144_F746ZG/cfg/board.fmpp create mode 100644 os/hal/boards/ST_NUCLEO144_F767ZI/cfg/board.fmpp create mode 100644 os/hal/boards/ST_NUCLEO32_F031K6/cfg/board.fmpp create mode 100644 os/hal/boards/ST_NUCLEO32_F042K6/cfg/board.fmpp create mode 100644 os/hal/boards/ST_NUCLEO32_F303K8/cfg/board.fmpp create mode 100644 os/hal/boards/ST_NUCLEO32_L011K4/cfg/board.fmpp create mode 100644 os/hal/boards/ST_NUCLEO32_L031K6/cfg/board.fmpp create mode 100644 os/hal/boards/ST_NUCLEO32_L432KC/cfg/board.fmpp create mode 100644 os/hal/boards/ST_NUCLEO64_F030R8/cfg/board.fmpp create mode 100644 os/hal/boards/ST_NUCLEO64_F070RB/cfg/board.fmpp create mode 100644 os/hal/boards/ST_NUCLEO64_F072RB/cfg/board.fmpp create mode 100644 os/hal/boards/ST_NUCLEO64_F091RC/cfg/board.fmpp create mode 100644 os/hal/boards/ST_NUCLEO64_F302R8/cfg/board.fmpp create mode 100644 os/hal/boards/ST_NUCLEO64_F303RE/cfg/board.fmpp create mode 100644 os/hal/boards/ST_NUCLEO64_F334R8/cfg/board.fmpp create mode 100644 os/hal/boards/ST_NUCLEO64_F401RE/cfg/board.fmpp create mode 100644 os/hal/boards/ST_NUCLEO64_F410RB/cfg/board.fmpp create mode 100644 os/hal/boards/ST_NUCLEO64_F411RE/cfg/board.fmpp create mode 100644 os/hal/boards/ST_NUCLEO64_F446RE/cfg/board.fmpp create mode 100644 os/hal/boards/ST_NUCLEO64_L053R8/cfg/board.fmpp create mode 100644 os/hal/boards/ST_NUCLEO64_L073RZ/cfg/board.fmpp create mode 100644 os/hal/boards/ST_NUCLEO64_L152RE/cfg/board.fmpp create mode 100644 os/hal/boards/ST_NUCLEO64_L476RG/cfg/board.fmpp create mode 100644 os/hal/boards/ST_STM32373C_EVAL/cfg/board.fmpp create mode 100644 os/hal/boards/ST_STM32F072B_DISCOVERY/cfg/board.fmpp create mode 100644 os/hal/boards/ST_STM32F0_DISCOVERY/cfg/board.fmpp create mode 100644 os/hal/boards/ST_STM32F2_DISCOVERY/cfg/board.fmpp create mode 100644 os/hal/boards/ST_STM32F334_DISCOVERY/cfg/board.fmpp create mode 100644 os/hal/boards/ST_STM32F3_DISCOVERY/cfg/board.fmpp create mode 100644 os/hal/boards/ST_STM32F3_DISCOVERY_REVC/cfg/board.fmpp create mode 100644 os/hal/boards/ST_STM32F401C_DISCOVERY/cfg/board.fmpp create mode 100644 os/hal/boards/ST_STM32F429I_DISCOVERY/cfg/board.fmpp create mode 100644 os/hal/boards/ST_STM32F469I_DISCOVERY/cfg/board.fmpp create mode 100644 os/hal/boards/ST_STM32F4_DISCOVERY/cfg/board.fmpp create mode 100644 os/hal/boards/ST_STM32F746G_DISCOVERY/cfg/board.fmpp create mode 100644 os/hal/boards/ST_STM32F769I_DISCOVERY/cfg/board.fmpp create mode 100644 os/hal/boards/ST_STM32L053_DISCOVERY/cfg/board.fmpp create mode 100644 os/hal/boards/ST_STM32L476_DISCOVERY/cfg/board.fmpp create mode 100644 os/hal/boards/ST_STM32L_DISCOVERY/cfg/board.fmpp create mode 100644 os/hal/boards/genboards.sh (limited to 'os/hal/boards') diff --git a/os/hal/boards/MIKROE_CLICKER2_STM32/board.c b/os/hal/boards/MIKROE_CLICKER2_STM32/board.c index 65b74d0c6..5ee0873d7 100644 --- a/os/hal/boards/MIKROE_CLICKER2_STM32/board.c +++ b/os/hal/boards/MIKROE_CLICKER2_STM32/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -73,15 +135,81 @@ const PALConfig pal_default_config = { VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB1(STM32_GPIO_EN_MASK); + rccEnableAHB1(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); #endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -134,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/MIKROE_CLICKER2_STM32/board.h b/os/hal/boards/MIKROE_CLICKER2_STM32/board.h index 97144c58f..a663e2c77 100644 --- a/os/hal/boards/MIKROE_CLICKER2_STM32/board.h +++ b/os/hal/boards/MIKROE_CLICKER2_STM32/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for Mikroe Clicker 2 for STM32 board. */ @@ -222,24 +226,20 @@ #define LINE_OTG_FS_DP PAL_LINE(GPIOA, 12U) #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) - #define LINE_I2C2_SCL PAL_LINE(GPIOB, 10U) #define LINE_I2C2_SDA PAL_LINE(GPIOB, 11U) #define LINE_SPI2_SCK PAL_LINE(GPIOB, 13U) #define LINE_SPI2_MISO PAL_LINE(GPIOB, 14U) #define LINE_SPI2_MOSI PAL_LINE(GPIOB, 15U) - #define LINE_I2C3_SDA PAL_LINE(GPIOC, 9U) #define LINE_SPI3_SCK PAL_LINE(GPIOC, 10U) #define LINE_SPI3_MISO PAL_LINE(GPIOC, 11U) #define LINE_SPI3_MOSI PAL_LINE(GPIOC, 12U) - #define LINE_USART2_TX PAL_LINE(GPIOD, 5U) #define LINE_USART2_RX PAL_LINE(GPIOD, 6U) #define LINE_USART3_TX PAL_LINE(GPIOD, 8U) #define LINE_USART3_RX PAL_LINE(GPIOD, 9U) #define LINE_MB2_PWM PAL_LINE(GPIOD, 12U) - #define LINE_BUTTON1 PAL_LINE(GPIOE, 0U) #define LINE_MB1_RST PAL_LINE(GPIOE, 7U) #define LINE_MB1_CS PAL_LINE(GPIOE, 8U) @@ -251,9 +251,21 @@ #define LINE_MB2_INT PAL_LINE(GPIOE, 14U) #define LINE_LED2 PAL_LINE(GPIOE, 15U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -1330,6 +1342,9 @@ PIN_AFIO_AF(GPIOI_PIN14, 0U) | \ PIN_AFIO_AF(GPIOI_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/MIKROE_CLICKER2_STM32/cfg/board.chcfg b/os/hal/boards/MIKROE_CLICKER2_STM32/cfg/board.chcfg index 1e9f7b138..c3ef3b128 100644 --- a/os/hal/boards/MIKROE_CLICKER2_STM32/cfg/board.chcfg +++ b/os/hal/boards/MIKROE_CLICKER2_STM32/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f4xx/templates .. - 3.0.x + 5.0.x Mikroe Clicker 2 for STM32 MIKROE_CLICKER_2_FOR_STM32 diff --git a/os/hal/boards/MIKROE_CLICKER2_STM32/cfg/board.fmpp b/os/hal/boards/MIKROE_CLICKER2_STM32/cfg/board.fmpp new file mode 100644 index 000000000..41754c141 --- /dev/null +++ b/os/hal/boards/MIKROE_CLICKER2_STM32/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f4xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/OLIMEX_STM32_E407/board.c b/os/hal/boards/OLIMEX_STM32_E407/board.c index ac6985656..1796841ac 100644 --- a/os/hal/boards/OLIMEX_STM32_E407/board.c +++ b/os/hal/boards/OLIMEX_STM32_E407/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -73,15 +135,81 @@ const PALConfig pal_default_config = { VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB1(STM32_GPIO_EN_MASK); + rccEnableAHB1(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); #endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -134,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/OLIMEX_STM32_E407/board.h b/os/hal/boards/OLIMEX_STM32_E407/board.h index d81410431..cce728d9c 100644 --- a/os/hal/boards/OLIMEX_STM32_E407/board.h +++ b/os/hal/boards/OLIMEX_STM32_E407/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for Olimex STM32-E407 board. */ @@ -232,7 +236,6 @@ #define LINE_JTAG_TMS PAL_LINE(GPIOA, 13U) #define LINE_JTAG_TCK PAL_LINE(GPIOA, 14U) #define LINE_JTAG_TDI PAL_LINE(GPIOA, 15U) - #define LINE_USB_FS_BUSON PAL_LINE(GPIOB, 0U) #define LINE_USB_HS_FAULT PAL_LINE(GPIOB, 1U) #define LINE_BOOT1 PAL_LINE(GPIOB, 2U) @@ -245,7 +248,6 @@ #define LINE_OTG_HS_VBUS PAL_LINE(GPIOB, 13U) #define LINE_OTG_HS_DM PAL_LINE(GPIOB, 14U) #define LINE_OTG_HS_DP PAL_LINE(GPIOB, 15U) - #define LINE_ETH_RMII_MDC PAL_LINE(GPIOC, 1U) #define LINE_SPI2_MISO PAL_LINE(GPIOC, 2U) #define LINE_SPI2_MOSI PAL_LINE(GPIOC, 3U) @@ -261,20 +263,30 @@ #define LINE_LED PAL_LINE(GPIOC, 13U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) - #define LINE_SD_CMD PAL_LINE(GPIOD, 2U) - - #define LINE_USB_FS_FAULT PAL_LINE(GPIOF, 11U) - #define LINE_SPI2_CS PAL_LINE(GPIOG, 10U) #define LINE_ETH_RMII_TXEN PAL_LINE(GPIOG, 11U) #define LINE_ETH_RMII_TXD0 PAL_LINE(GPIOG, 13U) #define LINE_ETH_RMII_TXD1 PAL_LINE(GPIOG, 14U) - #define LINE_OSC_IN PAL_LINE(GPIOH, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -1351,6 +1363,9 @@ PIN_AFIO_AF(GPIOI_PIN14, 0U) | \ PIN_AFIO_AF(GPIOI_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/OLIMEX_STM32_E407/board.mk b/os/hal/boards/OLIMEX_STM32_E407/board.mk index c6da0541c..1ad897a95 100644 --- a/os/hal/boards/OLIMEX_STM32_E407/board.mk +++ b/os/hal/boards/OLIMEX_STM32_E407/board.mk @@ -7,7 +7,3 @@ BOARDINC = $(CHIBIOS)/os/hal/boards/OLIMEX_STM32_E407 # Shared variables ALLCSRC += $(BOARDSRC) ALLINC += $(BOARDINC) - -# Shared variables -ALLCSRC += $(BOARDSRC) -ALLINC += $(BOARDINC) diff --git a/os/hal/boards/OLIMEX_STM32_E407/cfg/board.chcfg b/os/hal/boards/OLIMEX_STM32_E407/cfg/board.chcfg index 6d4e8d09b..9d5375619 100644 --- a/os/hal/boards/OLIMEX_STM32_E407/cfg/board.chcfg +++ b/os/hal/boards/OLIMEX_STM32_E407/cfg/board.chcfg @@ -5,7 +5,7 @@ resources/gencfg/processors/boards/stm32f4xx/templates .. - 3.0.x + 5.0.x Olimex STM32-E407 OLIMEX_STM32_E407 diff --git a/os/hal/boards/OLIMEX_STM32_E407/cfg/board.fmpp b/os/hal/boards/OLIMEX_STM32_E407/cfg/board.fmpp new file mode 100644 index 000000000..41754c141 --- /dev/null +++ b/os/hal/boards/OLIMEX_STM32_E407/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f4xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/OLIMEX_STM32_E407_REV_D/board.c b/os/hal/boards/OLIMEX_STM32_E407_REV_D/board.c index ac6985656..1796841ac 100644 --- a/os/hal/boards/OLIMEX_STM32_E407_REV_D/board.c +++ b/os/hal/boards/OLIMEX_STM32_E407_REV_D/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -73,15 +135,81 @@ const PALConfig pal_default_config = { VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB1(STM32_GPIO_EN_MASK); + rccEnableAHB1(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); #endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -134,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/OLIMEX_STM32_E407_REV_D/board.h b/os/hal/boards/OLIMEX_STM32_E407_REV_D/board.h index d77163e4f..c602977e1 100644 --- a/os/hal/boards/OLIMEX_STM32_E407_REV_D/board.h +++ b/os/hal/boards/OLIMEX_STM32_E407_REV_D/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for Olimex STM32-E407 (rev.D) board. */ @@ -232,7 +236,6 @@ #define LINE_JTAG_TMS PAL_LINE(GPIOA, 13U) #define LINE_JTAG_TCK PAL_LINE(GPIOA, 14U) #define LINE_JTAG_TDI PAL_LINE(GPIOA, 15U) - #define LINE_USB_FS_BUSON PAL_LINE(GPIOB, 0U) #define LINE_USB_FS_FAULT PAL_LINE(GPIOB, 1U) #define LINE_BOOT1 PAL_LINE(GPIOB, 2U) @@ -245,7 +248,6 @@ #define LINE_OTG_HS_VBUS PAL_LINE(GPIOB, 13U) #define LINE_OTG_HS_DM PAL_LINE(GPIOB, 14U) #define LINE_OTG_HS_DP PAL_LINE(GPIOB, 15U) - #define LINE_ETH_RMII_MDC PAL_LINE(GPIOC, 1U) #define LINE_SPI2_MISO PAL_LINE(GPIOC, 2U) #define LINE_SPI2_MOSI PAL_LINE(GPIOC, 3U) @@ -261,20 +263,30 @@ #define LINE_LED PAL_LINE(GPIOC, 13U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) - #define LINE_SD_CMD PAL_LINE(GPIOD, 2U) - - #define LINE_USB_HS_FAULT PAL_LINE(GPIOF, 11U) - #define LINE_SPI2_CS PAL_LINE(GPIOG, 10U) #define LINE_ETH_RMII_TXEN PAL_LINE(GPIOG, 11U) #define LINE_ETH_RMII_TXD0 PAL_LINE(GPIOG, 13U) #define LINE_ETH_RMII_TXD1 PAL_LINE(GPIOG, 14U) - #define LINE_OSC_IN PAL_LINE(GPIOH, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -1351,6 +1363,9 @@ PIN_AFIO_AF(GPIOI_PIN14, 0U) | \ PIN_AFIO_AF(GPIOI_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/OLIMEX_STM32_E407_REV_D/board.mk b/os/hal/boards/OLIMEX_STM32_E407_REV_D/board.mk index 1c5d60629..d690f41d5 100644 --- a/os/hal/boards/OLIMEX_STM32_E407_REV_D/board.mk +++ b/os/hal/boards/OLIMEX_STM32_E407_REV_D/board.mk @@ -7,7 +7,3 @@ BOARDINC = $(CHIBIOS)/os/hal/boards/OLIMEX_STM32_E407_REV_D # Shared variables ALLCSRC += $(BOARDSRC) ALLINC += $(BOARDINC) - -# Shared variables -ALLCSRC += $(BOARDSRC) -ALLINC += $(BOARDINC) diff --git a/os/hal/boards/OLIMEX_STM32_E407_REV_D/cfg/board.chcfg b/os/hal/boards/OLIMEX_STM32_E407_REV_D/cfg/board.chcfg index 998a8b417..07bdca203 100644 --- a/os/hal/boards/OLIMEX_STM32_E407_REV_D/cfg/board.chcfg +++ b/os/hal/boards/OLIMEX_STM32_E407_REV_D/cfg/board.chcfg @@ -5,7 +5,7 @@ resources/gencfg/processors/boards/stm32f4xx/templates .. - 3.0.x + 5.0.x Olimex STM32-E407 (rev.D) OLIMEX_STM32_E407_REV_D diff --git a/os/hal/boards/OLIMEX_STM32_E407_REV_D/cfg/board.fmpp b/os/hal/boards/OLIMEX_STM32_E407_REV_D/cfg/board.fmpp new file mode 100644 index 000000000..41754c141 --- /dev/null +++ b/os/hal/boards/OLIMEX_STM32_E407_REV_D/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f4xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/OLIMEX_STM32_H407/board.c b/os/hal/boards/OLIMEX_STM32_H407/board.c index ac6985656..1796841ac 100644 --- a/os/hal/boards/OLIMEX_STM32_H407/board.c +++ b/os/hal/boards/OLIMEX_STM32_H407/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -73,15 +135,81 @@ const PALConfig pal_default_config = { VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB1(STM32_GPIO_EN_MASK); + rccEnableAHB1(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); #endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -134,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/OLIMEX_STM32_H407/board.h b/os/hal/boards/OLIMEX_STM32_H407/board.h index 0d14f5815..63637149a 100644 --- a/os/hal/boards/OLIMEX_STM32_H407/board.h +++ b/os/hal/boards/OLIMEX_STM32_H407/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for Olimex STM32-H407 board. */ @@ -232,7 +236,6 @@ #define LINE_JTAG_TMS PAL_LINE(GPIOA, 13U) #define LINE_JTAG_TCK PAL_LINE(GPIOA, 14U) #define LINE_JTAG_TDI PAL_LINE(GPIOA, 15U) - #define LINE_USB_FS_BUSON PAL_LINE(GPIOB, 0U) #define LINE_USB_HS_FAULT PAL_LINE(GPIOB, 1U) #define LINE_BOOT1 PAL_LINE(GPIOB, 2U) @@ -245,7 +248,6 @@ #define LINE_OTG_HS_VBUS PAL_LINE(GPIOB, 13U) #define LINE_OTG_HS_DM PAL_LINE(GPIOB, 14U) #define LINE_OTG_HS_DP PAL_LINE(GPIOB, 15U) - #define LINE_ETH_RMII_MDC PAL_LINE(GPIOC, 1U) #define LINE_SPI2_MISO PAL_LINE(GPIOC, 2U) #define LINE_SPI2_MOSI PAL_LINE(GPIOC, 3U) @@ -261,20 +263,30 @@ #define LINE_LED PAL_LINE(GPIOC, 13U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) - #define LINE_SD_CMD PAL_LINE(GPIOD, 2U) - - #define LINE_USB_FS_FAULT PAL_LINE(GPIOF, 11U) - #define LINE_SPI2_CS PAL_LINE(GPIOG, 10U) #define LINE_ETH_RMII_TXEN PAL_LINE(GPIOG, 11U) #define LINE_ETH_RMII_TXD0 PAL_LINE(GPIOG, 13U) #define LINE_ETH_RMII_TXD1 PAL_LINE(GPIOG, 14U) - #define LINE_OSC_IN PAL_LINE(GPIOH, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -1351,6 +1363,9 @@ PIN_AFIO_AF(GPIOI_PIN14, 0U) | \ PIN_AFIO_AF(GPIOI_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/OLIMEX_STM32_H407/cfg/board.chcfg b/os/hal/boards/OLIMEX_STM32_H407/cfg/board.chcfg index dfbd0f50b..5acb4785a 100644 --- a/os/hal/boards/OLIMEX_STM32_H407/cfg/board.chcfg +++ b/os/hal/boards/OLIMEX_STM32_H407/cfg/board.chcfg @@ -5,7 +5,7 @@ resources/gencfg/processors/boards/stm32f4xx/templates .. - 3.0.x + 5.0.x Olimex STM32-H407 OLIMEX_STM32_H407 diff --git a/os/hal/boards/OLIMEX_STM32_H407/cfg/board.fmpp b/os/hal/boards/OLIMEX_STM32_H407/cfg/board.fmpp new file mode 100644 index 000000000..41754c141 --- /dev/null +++ b/os/hal/boards/OLIMEX_STM32_H407/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f4xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/SEEED_ARCH_MAX/board.c b/os/hal/boards/SEEED_ARCH_MAX/board.c new file mode 100755 index 000000000..1796841ac --- /dev/null +++ b/os/hal/boards/SEEED_ARCH_MAX/board.c @@ -0,0 +1,266 @@ +/* + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * This file has been automatically generated using ChibiStudio board + * generator plugin. Do not edit manually. + */ + +#include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; + +/** + * @brief STM32 GPIO static initialization data. + */ +static const gpio_config_t gpio_default_config = { +#if STM32_HAS_GPIOA + {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, + VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, +#endif +#if STM32_HAS_GPIOB + {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, + VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, +#endif +#if STM32_HAS_GPIOC + {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, + VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, +#endif +#if STM32_HAS_GPIOD + {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, + VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, +#endif +#if STM32_HAS_GPIOE + {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, + VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, +#endif +#if STM32_HAS_GPIOF + {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, + VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, +#endif +#if STM32_HAS_GPIOG + {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, + VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, +#endif +#if STM32_HAS_GPIOH + {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, + VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, +#endif +#if STM32_HAS_GPIOI + {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, + VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, +#endif +#if STM32_HAS_GPIOJ + {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, + VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, +#endif +#if STM32_HAS_GPIOK + {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, + VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} +#endif +}; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB1(STM32_GPIO_EN_MASK); + rccEnableAHB1(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); +#endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Early initialization code. + * @details GPIO ports and system clocks are initialized before everything + * else. + */ +void __early_init(void) { + + stm32_gpio_init(); + stm32_clock_init(); +} + +#if HAL_USE_SDC || defined(__DOXYGEN__) +/** + * @brief SDC card detection. + */ +bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { + static bool last_status = false; + + if (blkIsTransferring(sdcp)) + return last_status; + return last_status = (bool)palReadPad(GPIOC, GPIOC_SD_D3); +} + +/** + * @brief SDC card write protection detection. + */ +bool sdc_lld_is_write_protected(SDCDriver *sdcp) { + + (void)sdcp; + return false; +} +#endif /* HAL_USE_SDC */ + +#if HAL_USE_MMC_SPI || defined(__DOXYGEN__) +/** + * @brief MMC_SPI card detection. + */ +bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { + + (void)mmcp; + /* TODO: Fill the implementation.*/ + return true; +} + +/** + * @brief MMC_SPI card write protection detection. + */ +bool mmc_lld_is_write_protected(MMCDriver *mmcp) { + + (void)mmcp; + /* TODO: Fill the implementation.*/ + return false; +} +#endif + +/** + * @brief Board-specific initialization code. + * @todo Add your board-specific code, if any. + */ +void boardInit(void) { + +} diff --git a/os/hal/boards/SEEED_ARCH_MAX/board.h b/os/hal/boards/SEEED_ARCH_MAX/board.h new file mode 100755 index 000000000..9496df145 --- /dev/null +++ b/os/hal/boards/SEEED_ARCH_MAX/board.h @@ -0,0 +1,1380 @@ +/* + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * This file has been automatically generated using ChibiStudio board + * generator plugin. Do not edit manually. + */ + +#ifndef BOARD_H +#define BOARD_H + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/* + * Setup for Seeed Arch Max board. + */ + +/* + * Board identifier. + */ +#define BOARD_SEEED_ARCH_MAX +#define BOARD_NAME "Seeed Arch Max" + +/* + * Ethernet PHY type. + */ +#define BOARD_PHY_ID MII_KS8721_ID +#define BOARD_PHY_RMII + +/* + * Board oscillators-related settings. + */ +#if !defined(STM32_LSECLK) +#define STM32_LSECLK 32768U +#endif + +#if !defined(STM32_HSECLK) +#define STM32_HSECLK 8000000U +#endif + +/* + * Board voltages. + * Required for performance limits calculation. + */ +#define STM32_VDD 330U + +/* + * MCU type as defined in the ST header. + */ +#define STM32F407xx + +/* + * IO pins assignments. + */ +#define GPIOA_BUTTON_WKUP 0U +#define GPIOA_ETH_RMII_REF_CLK 1U +#define GPIOA_ETH_RMII_MDIO 2U +#define GPIOA_ETH_RMII_MDINT 3U +#define GPIOA_PIN4 4U +#define GPIOA_PIN5 5U +#define GPIOA_PIN6 6U +#define GPIOA_ETH_RMII_CRS_DV 7U +#define GPIOA_USB_HS_BUSON 8U +#define GPIOA_OTG_FS_VBUS 9U +#define GPIOA_OTG_FS_ID 10U +#define GPIOA_OTG_FS_DM 11U +#define GPIOA_OTG_FS_DP 12U +#define GPIOA_JTAG_TMS 13U +#define GPIOA_JTAG_TCK 14U +#define GPIOA_JTAG_TDI 15U + +#define GPIOB_USB_FS_BUSON 0U +#define GPIOB_USB_HS_FAULT 1U +#define GPIOB_BOOT1 2U +#define GPIOB_JTAG_TDO 3U +#define GPIOB_JTAG_TRST 4U +#define GPIOB_PIN5 5U +#define GPIOB_PIN6 6U +#define GPIOB_PIN7 7U +#define GPIOB_I2C1_SCL 8U +#define GPIOB_I2C1_SDA 9U +#define GPIOB_SPI2_SCK 10U +#define GPIOB_PIN11 11U +#define GPIOB_OTG_HS_ID 12U +#define GPIOB_OTG_HS_VBUS 13U +#define GPIOB_OTG_HS_DM 14U +#define GPIOB_OTG_HS_DP 15U + +#define GPIOC_PIN0 0U +#define GPIOC_ETH_RMII_MDC 1U +#define GPIOC_SPI2_MISO 2U +#define GPIOC_SPI2_MOSI 3U +#define GPIOC_ETH_RMII_RXD0 4U +#define GPIOC_ETH_RMII_RXD1 5U +#define GPIOC_USART6_TX 6U +#define GPIOC_USART6_RX 7U +#define GPIOC_SD_D0 8U +#define GPIOC_SD_D1 9U +#define GPIOC_SD_D2 10U +#define GPIOC_SD_D3 11U +#define GPIOC_SD_CLK 12U +#define GPIOC_LED 13U +#define GPIOC_OSC32_IN 14U +#define GPIOC_OSC32_OUT 15U + +#define GPIOD_PIN0 0U +#define GPIOD_PIN1 1U +#define GPIOD_SD_CMD 2U +#define GPIOD_PIN3 3U +#define GPIOD_PIN4 4U +#define GPIOD_PIN5 5U +#define GPIOD_PIN6 6U +#define GPIOD_PIN7 7U +#define GPIOD_PIN8 8U +#define GPIOD_PIN9 9U +#define GPIOD_PIN10 10U +#define GPIOD_PIN11 11U +#define GPIOD_PIN12 12U +#define GPIOD_PIN13 13U +#define GPIOD_PIN14 14U +#define GPIOD_PIN15 15U + +#define GPIOE_PIN0 0U +#define GPIOE_PIN1 1U +#define GPIOE_PIN2 2U +#define GPIOE_PIN3 3U +#define GPIOE_PIN4 4U +#define GPIOE_PIN5 5U +#define GPIOE_PIN6 6U +#define GPIOE_PIN7 7U +#define GPIOE_PIN8 8U +#define GPIOE_PIN9 9U +#define GPIOE_PIN10 10U +#define GPIOE_PIN11 11U +#define GPIOE_PIN12 12U +#define GPIOE_PIN13 13U +#define GPIOE_PIN14 14U +#define GPIOE_PIN15 15U + +#define GPIOF_PIN0 0U +#define GPIOF_PIN1 1U +#define GPIOF_PIN2 2U +#define GPIOF_PIN3 3U +#define GPIOF_PIN4 4U +#define GPIOF_PIN5 5U +#define GPIOF_PIN6 6U +#define GPIOF_PIN7 7U +#define GPIOF_PIN8 8U +#define GPIOF_PIN9 9U +#define GPIOF_PIN10 10U +#define GPIOF_USB_FS_FAULT 11U +#define GPIOF_PIN12 12U +#define GPIOF_PIN13 13U +#define GPIOF_PIN14 14U +#define GPIOF_PIN15 15U + +#define GPIOG_PIN0 0U +#define GPIOG_PIN1 1U +#define GPIOG_PIN2 2U +#define GPIOG_PIN3 3U +#define GPIOG_PIN4 4U +#define GPIOG_PIN5 5U +#define GPIOG_PIN6 6U +#define GPIOG_PIN7 7U +#define GPIOG_PIN8 8U +#define GPIOG_PIN9 9U +#define GPIOG_SPI2_CS 10U +#define GPIOG_ETH_RMII_TXEN 11U +#define GPIOG_PIN12 12U +#define GPIOG_ETH_RMII_TXD0 13U +#define GPIOG_ETH_RMII_TXD1 14U +#define GPIOG_PIN15 15U + +#define GPIOH_OSC_IN 0U +#define GPIOH_OSC_OUT 1U +#define GPIOH_PIN2 2U +#define GPIOH_PIN3 3U +#define GPIOH_PIN4 4U +#define GPIOH_PIN5 5U +#define GPIOH_PIN6 6U +#define GPIOH_PIN7 7U +#define GPIOH_PIN8 8U +#define GPIOH_PIN9 9U +#define GPIOH_PIN10 10U +#define GPIOH_PIN11 11U +#define GPIOH_PIN12 12U +#define GPIOH_PIN13 13U +#define GPIOH_PIN14 14U +#define GPIOH_PIN15 15U + +#define GPIOI_PIN0 0U +#define GPIOI_PIN1 1U +#define GPIOI_PIN2 2U +#define GPIOI_PIN3 3U +#define GPIOI_PIN4 4U +#define GPIOI_PIN5 5U +#define GPIOI_PIN6 6U +#define GPIOI_PIN7 7U +#define GPIOI_PIN8 8U +#define GPIOI_PIN9 9U +#define GPIOI_PIN10 10U +#define GPIOI_PIN11 11U +#define GPIOI_PIN12 12U +#define GPIOI_PIN13 13U +#define GPIOI_PIN14 14U +#define GPIOI_PIN15 15U + +/* + * IO lines assignments. + */ +#define LINE_BUTTON_WKUP PAL_LINE(GPIOA, 0U) +#define LINE_ETH_RMII_REF_CLK PAL_LINE(GPIOA, 1U) +#define LINE_ETH_RMII_MDIO PAL_LINE(GPIOA, 2U) +#define LINE_ETH_RMII_MDINT PAL_LINE(GPIOA, 3U) +#define LINE_ETH_RMII_CRS_DV PAL_LINE(GPIOA, 7U) +#define LINE_USB_HS_BUSON PAL_LINE(GPIOA, 8U) +#define LINE_OTG_FS_VBUS PAL_LINE(GPIOA, 9U) +#define LINE_OTG_FS_ID PAL_LINE(GPIOA, 10U) +#define LINE_OTG_FS_DM PAL_LINE(GPIOA, 11U) +#define LINE_OTG_FS_DP PAL_LINE(GPIOA, 12U) +#define LINE_JTAG_TMS PAL_LINE(GPIOA, 13U) +#define LINE_JTAG_TCK PAL_LINE(GPIOA, 14U) +#define LINE_JTAG_TDI PAL_LINE(GPIOA, 15U) +#define LINE_USB_FS_BUSON PAL_LINE(GPIOB, 0U) +#define LINE_USB_HS_FAULT PAL_LINE(GPIOB, 1U) +#define LINE_BOOT1 PAL_LINE(GPIOB, 2U) +#define LINE_JTAG_TDO PAL_LINE(GPIOB, 3U) +#define LINE_JTAG_TRST PAL_LINE(GPIOB, 4U) +#define LINE_I2C1_SCL PAL_LINE(GPIOB, 8U) +#define LINE_I2C1_SDA PAL_LINE(GPIOB, 9U) +#define LINE_SPI2_SCK PAL_LINE(GPIOB, 10U) +#define LINE_OTG_HS_ID PAL_LINE(GPIOB, 12U) +#define LINE_OTG_HS_VBUS PAL_LINE(GPIOB, 13U) +#define LINE_OTG_HS_DM PAL_LINE(GPIOB, 14U) +#define LINE_OTG_HS_DP PAL_LINE(GPIOB, 15U) +#define LINE_ETH_RMII_MDC PAL_LINE(GPIOC, 1U) +#define LINE_SPI2_MISO PAL_LINE(GPIOC, 2U) +#define LINE_SPI2_MOSI PAL_LINE(GPIOC, 3U) +#define LINE_ETH_RMII_RXD0 PAL_LINE(GPIOC, 4U) +#define LINE_ETH_RMII_RXD1 PAL_LINE(GPIOC, 5U) +#define LINE_USART6_TX PAL_LINE(GPIOC, 6U) +#define LINE_USART6_RX PAL_LINE(GPIOC, 7U) +#define LINE_SD_D0 PAL_LINE(GPIOC, 8U) +#define LINE_SD_D1 PAL_LINE(GPIOC, 9U) +#define LINE_SD_D2 PAL_LINE(GPIOC, 10U) +#define LINE_SD_D3 PAL_LINE(GPIOC, 11U) +#define LINE_SD_CLK PAL_LINE(GPIOC, 12U) +#define LINE_LED PAL_LINE(GPIOC, 13U) +#define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) +#define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) +#define LINE_SD_CMD PAL_LINE(GPIOD, 2U) +#define LINE_USB_FS_FAULT PAL_LINE(GPIOF, 11U) +#define LINE_SPI2_CS PAL_LINE(GPIOG, 10U) +#define LINE_ETH_RMII_TXEN PAL_LINE(GPIOG, 11U) +#define LINE_ETH_RMII_TXD0 PAL_LINE(GPIOG, 13U) +#define LINE_ETH_RMII_TXD1 PAL_LINE(GPIOG, 14U) +#define LINE_OSC_IN PAL_LINE(GPIOH, 0U) +#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/* + * I/O ports initial setup, this configuration is established soon after reset + * in the initialization code. + * Please refer to the STM32 Reference Manual for details. + */ +#define PIN_MODE_INPUT(n) (0U << ((n) * 2U)) +#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U)) +#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U)) +#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U)) +#define PIN_ODR_LOW(n) (0U << (n)) +#define PIN_ODR_HIGH(n) (1U << (n)) +#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) +#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) +#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U)) +#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U)) +#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U)) +#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U)) +#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U)) +#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U)) +#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U)) +#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) + +/* + * GPIOA setup: + * + * PA0 - BUTTON_WKUP (input floating). + * PA1 - ETH_RMII_REF_CLK (alternate 11). + * PA2 - ETH_RMII_MDIO (alternate 11). + * PA3 - ETH_RMII_MDINT (input floating). + * PA4 - PIN4 (input pullup). + * PA5 - PIN5 (input pullup). + * PA6 - PIN6 (input pullup). + * PA7 - ETH_RMII_CRS_DV (alternate 11). + * PA8 - USB_HS_BUSON (output pushpull maximum). + * PA9 - OTG_FS_VBUS (input pulldown). + * PA10 - OTG_FS_ID (alternate 10). + * PA11 - OTG_FS_DM (alternate 10). + * PA12 - OTG_FS_DP (alternate 10). + * PA13 - JTAG_TMS (alternate 0). + * PA14 - JTAG_TCK (alternate 0). + * PA15 - JTAG_TDI (alternate 0). + */ +#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_BUTTON_WKUP) | \ + PIN_MODE_ALTERNATE(GPIOA_ETH_RMII_REF_CLK) |\ + PIN_MODE_ALTERNATE(GPIOA_ETH_RMII_MDIO) |\ + PIN_MODE_INPUT(GPIOA_ETH_RMII_MDINT) | \ + PIN_MODE_INPUT(GPIOA_PIN4) | \ + PIN_MODE_INPUT(GPIOA_PIN5) | \ + PIN_MODE_INPUT(GPIOA_PIN6) | \ + PIN_MODE_ALTERNATE(GPIOA_ETH_RMII_CRS_DV) |\ + PIN_MODE_OUTPUT(GPIOA_USB_HS_BUSON) | \ + PIN_MODE_INPUT(GPIOA_OTG_FS_VBUS) | \ + PIN_MODE_ALTERNATE(GPIOA_OTG_FS_ID) | \ + PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | \ + PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | \ + PIN_MODE_ALTERNATE(GPIOA_JTAG_TMS) | \ + PIN_MODE_ALTERNATE(GPIOA_JTAG_TCK) | \ + PIN_MODE_ALTERNATE(GPIOA_JTAG_TDI)) +#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_BUTTON_WKUP) |\ + PIN_OTYPE_PUSHPULL(GPIOA_ETH_RMII_REF_CLK) |\ + PIN_OTYPE_PUSHPULL(GPIOA_ETH_RMII_MDIO) |\ + PIN_OTYPE_PUSHPULL(GPIOA_ETH_RMII_MDINT) |\ + PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOA_ETH_RMII_CRS_DV) |\ + PIN_OTYPE_PUSHPULL(GPIOA_USB_HS_BUSON) |\ + PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_VBUS) |\ + PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_ID) | \ + PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DM) | \ + PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DP) | \ + PIN_OTYPE_PUSHPULL(GPIOA_JTAG_TMS) | \ + PIN_OTYPE_PUSHPULL(GPIOA_JTAG_TCK) | \ + PIN_OTYPE_PUSHPULL(GPIOA_JTAG_TDI)) +#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_HIGH(GPIOA_BUTTON_WKUP) | \ + PIN_OSPEED_HIGH(GPIOA_ETH_RMII_REF_CLK) |\ + PIN_OSPEED_HIGH(GPIOA_ETH_RMII_MDIO) | \ + PIN_OSPEED_HIGH(GPIOA_ETH_RMII_MDINT) |\ + PIN_OSPEED_HIGH(GPIOA_PIN4) | \ + PIN_OSPEED_HIGH(GPIOA_PIN5) | \ + PIN_OSPEED_HIGH(GPIOA_PIN6) | \ + PIN_OSPEED_HIGH(GPIOA_ETH_RMII_CRS_DV) |\ + PIN_OSPEED_HIGH(GPIOA_USB_HS_BUSON) | \ + PIN_OSPEED_HIGH(GPIOA_OTG_FS_VBUS) | \ + PIN_OSPEED_HIGH(GPIOA_OTG_FS_ID) | \ + PIN_OSPEED_HIGH(GPIOA_OTG_FS_DM) | \ + PIN_OSPEED_HIGH(GPIOA_OTG_FS_DP) | \ + PIN_OSPEED_HIGH(GPIOA_JTAG_TMS) | \ + PIN_OSPEED_HIGH(GPIOA_JTAG_TCK) | \ + PIN_OSPEED_HIGH(GPIOA_JTAG_TDI)) +#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_BUTTON_WKUP) |\ + PIN_PUPDR_FLOATING(GPIOA_ETH_RMII_REF_CLK) |\ + PIN_PUPDR_FLOATING(GPIOA_ETH_RMII_MDIO) |\ + PIN_PUPDR_FLOATING(GPIOA_ETH_RMII_MDINT) |\ + PIN_PUPDR_PULLUP(GPIOA_PIN4) | \ + PIN_PUPDR_PULLUP(GPIOA_PIN5) | \ + PIN_PUPDR_PULLUP(GPIOA_PIN6) | \ + PIN_PUPDR_FLOATING(GPIOA_ETH_RMII_CRS_DV) |\ + PIN_PUPDR_FLOATING(GPIOA_USB_HS_BUSON) |\ + PIN_PUPDR_PULLDOWN(GPIOA_OTG_FS_VBUS) |\ + PIN_PUPDR_FLOATING(GPIOA_OTG_FS_ID) | \ + PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) | \ + PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DP) | \ + PIN_PUPDR_FLOATING(GPIOA_JTAG_TMS) | \ + PIN_PUPDR_PULLDOWN(GPIOA_JTAG_TCK) | \ + PIN_PUPDR_FLOATING(GPIOA_JTAG_TDI)) +#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_BUTTON_WKUP) | \ + PIN_ODR_HIGH(GPIOA_ETH_RMII_REF_CLK) | \ + PIN_ODR_HIGH(GPIOA_ETH_RMII_MDIO) | \ + PIN_ODR_HIGH(GPIOA_ETH_RMII_MDINT) | \ + PIN_ODR_HIGH(GPIOA_PIN4) | \ + PIN_ODR_HIGH(GPIOA_PIN5) | \ + PIN_ODR_HIGH(GPIOA_PIN6) | \ + PIN_ODR_HIGH(GPIOA_ETH_RMII_CRS_DV) | \ + PIN_ODR_LOW(GPIOA_USB_HS_BUSON) | \ + PIN_ODR_HIGH(GPIOA_OTG_FS_VBUS) | \ + PIN_ODR_HIGH(GPIOA_OTG_FS_ID) | \ + PIN_ODR_HIGH(GPIOA_OTG_FS_DM) | \ + PIN_ODR_HIGH(GPIOA_OTG_FS_DP) | \ + PIN_ODR_HIGH(GPIOA_JTAG_TMS) | \ + PIN_ODR_HIGH(GPIOA_JTAG_TCK) | \ + PIN_ODR_HIGH(GPIOA_JTAG_TDI)) +#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_BUTTON_WKUP, 0U) | \ + PIN_AFIO_AF(GPIOA_ETH_RMII_REF_CLK, 11U) |\ + PIN_AFIO_AF(GPIOA_ETH_RMII_MDIO, 11U) |\ + PIN_AFIO_AF(GPIOA_ETH_RMII_MDINT, 0U) |\ + PIN_AFIO_AF(GPIOA_PIN4, 0U) | \ + PIN_AFIO_AF(GPIOA_PIN5, 0U) | \ + PIN_AFIO_AF(GPIOA_PIN6, 0U) | \ + PIN_AFIO_AF(GPIOA_ETH_RMII_CRS_DV, 11U)) +#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_USB_HS_BUSON, 0U) | \ + PIN_AFIO_AF(GPIOA_OTG_FS_VBUS, 0U) | \ + PIN_AFIO_AF(GPIOA_OTG_FS_ID, 10U) | \ + PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10U) | \ + PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10U) | \ + PIN_AFIO_AF(GPIOA_JTAG_TMS, 0U) | \ + PIN_AFIO_AF(GPIOA_JTAG_TCK, 0U) | \ + PIN_AFIO_AF(GPIOA_JTAG_TDI, 0U)) + +/* + * GPIOB setup: + * + * PB0 - USB_FS_BUSON (output pushpull maximum). + * PB1 - USB_HS_FAULT (input floating). + * PB2 - BOOT1 (input floating). + * PB3 - JTAG_TDO (alternate 0). + * PB4 - JTAG_TRST (alternate 0). + * PB5 - PIN5 (input pullup). + * PB6 - PIN6 (input pullup). + * PB7 - PIN7 (input pullup). + * PB8 - I2C1_SCL (alternate 4). + * PB9 - I2C1_SDA (alternate 4). + * PB10 - SPI2_SCK (alternate 5). + * PB11 - PIN11 (input pullup). + * PB12 - OTG_HS_ID (alternate 12). + * PB13 - OTG_HS_VBUS (input pulldown). + * PB14 - OTG_HS_DM (alternate 12). + * PB15 - OTG_HS_DP (alternate 12). + */ +#define VAL_GPIOB_MODER (PIN_MODE_OUTPUT(GPIOB_USB_FS_BUSON) | \ + PIN_MODE_INPUT(GPIOB_USB_HS_FAULT) | \ + PIN_MODE_INPUT(GPIOB_BOOT1) | \ + PIN_MODE_ALTERNATE(GPIOB_JTAG_TDO) | \ + PIN_MODE_ALTERNATE(GPIOB_JTAG_TRST) | \ + PIN_MODE_INPUT(GPIOB_PIN5) | \ + PIN_MODE_INPUT(GPIOB_PIN6) | \ + PIN_MODE_INPUT(GPIOB_PIN7) | \ + PIN_MODE_ALTERNATE(GPIOB_I2C1_SCL) | \ + PIN_MODE_ALTERNATE(GPIOB_I2C1_SDA) | \ + PIN_MODE_ALTERNATE(GPIOB_SPI2_SCK) | \ + PIN_MODE_INPUT(GPIOB_PIN11) | \ + PIN_MODE_ALTERNATE(GPIOB_OTG_HS_ID) | \ + PIN_MODE_INPUT(GPIOB_OTG_HS_VBUS) | \ + PIN_MODE_ALTERNATE(GPIOB_OTG_HS_DM) | \ + PIN_MODE_ALTERNATE(GPIOB_OTG_HS_DP)) +#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_USB_FS_BUSON) |\ + PIN_OTYPE_PUSHPULL(GPIOB_USB_HS_FAULT) |\ + PIN_OTYPE_PUSHPULL(GPIOB_BOOT1) | \ + PIN_OTYPE_PUSHPULL(GPIOB_JTAG_TDO) | \ + PIN_OTYPE_PUSHPULL(GPIOB_JTAG_TRST) | \ + PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOB_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \ + PIN_OTYPE_OPENDRAIN(GPIOB_I2C1_SCL) | \ + PIN_OTYPE_OPENDRAIN(GPIOB_I2C1_SDA) | \ + PIN_OTYPE_PUSHPULL(GPIOB_SPI2_SCK) | \ + PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \ + PIN_OTYPE_PUSHPULL(GPIOB_OTG_HS_ID) | \ + PIN_OTYPE_PUSHPULL(GPIOB_OTG_HS_VBUS) |\ + PIN_OTYPE_PUSHPULL(GPIOB_OTG_HS_DM) | \ + PIN_OTYPE_PUSHPULL(GPIOB_OTG_HS_DP)) +#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_HIGH(GPIOB_USB_FS_BUSON) | \ + PIN_OSPEED_HIGH(GPIOB_USB_HS_FAULT) | \ + PIN_OSPEED_HIGH(GPIOB_BOOT1) | \ + PIN_OSPEED_HIGH(GPIOB_JTAG_TDO) | \ + PIN_OSPEED_HIGH(GPIOB_JTAG_TRST) | \ + PIN_OSPEED_HIGH(GPIOB_PIN5) | \ + PIN_OSPEED_HIGH(GPIOB_PIN6) | \ + PIN_OSPEED_HIGH(GPIOB_PIN7) | \ + PIN_OSPEED_HIGH(GPIOB_I2C1_SCL) | \ + PIN_OSPEED_HIGH(GPIOB_I2C1_SDA) | \ + PIN_OSPEED_HIGH(GPIOB_SPI2_SCK) | \ + PIN_OSPEED_HIGH(GPIOB_PIN11) | \ + PIN_OSPEED_HIGH(GPIOB_OTG_HS_ID) | \ + PIN_OSPEED_HIGH(GPIOB_OTG_HS_VBUS) | \ + PIN_OSPEED_HIGH(GPIOB_OTG_HS_DM) | \ + PIN_OSPEED_HIGH(GPIOB_OTG_HS_DP)) +#define VAL_GPIOB_PUPDR (PIN_PUPDR_FLOATING(GPIOB_USB_FS_BUSON) |\ + PIN_PUPDR_FLOATING(GPIOB_USB_HS_FAULT) |\ + PIN_PUPDR_FLOATING(GPIOB_BOOT1) | \ + PIN_PUPDR_FLOATING(GPIOB_JTAG_TDO) | \ + PIN_PUPDR_FLOATING(GPIOB_JTAG_TRST) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN5) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN6) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN7) | \ + PIN_PUPDR_FLOATING(GPIOB_I2C1_SCL) | \ + PIN_PUPDR_FLOATING(GPIOB_I2C1_SDA) | \ + PIN_PUPDR_FLOATING(GPIOB_SPI2_SCK) | \ + PIN_PUPDR_PULLUP(GPIOB_PIN11) | \ + PIN_PUPDR_FLOATING(GPIOB_OTG_HS_ID) | \ + PIN_PUPDR_PULLDOWN(GPIOB_OTG_HS_VBUS) |\ + PIN_PUPDR_FLOATING(GPIOB_OTG_HS_DM) | \ + PIN_PUPDR_FLOATING(GPIOB_OTG_HS_DP)) +#define VAL_GPIOB_ODR (PIN_ODR_LOW(GPIOB_USB_FS_BUSON) | \ + PIN_ODR_HIGH(GPIOB_USB_HS_FAULT) | \ + PIN_ODR_HIGH(GPIOB_BOOT1) | \ + PIN_ODR_HIGH(GPIOB_JTAG_TDO) | \ + PIN_ODR_HIGH(GPIOB_JTAG_TRST) | \ + PIN_ODR_HIGH(GPIOB_PIN5) | \ + PIN_ODR_HIGH(GPIOB_PIN6) | \ + PIN_ODR_HIGH(GPIOB_PIN7) | \ + PIN_ODR_HIGH(GPIOB_I2C1_SCL) | \ + PIN_ODR_HIGH(GPIOB_I2C1_SDA) | \ + PIN_ODR_HIGH(GPIOB_SPI2_SCK) | \ + PIN_ODR_HIGH(GPIOB_PIN11) | \ + PIN_ODR_HIGH(GPIOB_OTG_HS_ID) | \ + PIN_ODR_HIGH(GPIOB_OTG_HS_VBUS) | \ + PIN_ODR_HIGH(GPIOB_OTG_HS_DM) | \ + PIN_ODR_HIGH(GPIOB_OTG_HS_DP)) +#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_USB_FS_BUSON, 0U) | \ + PIN_AFIO_AF(GPIOB_USB_HS_FAULT, 0U) | \ + PIN_AFIO_AF(GPIOB_BOOT1, 0U) | \ + PIN_AFIO_AF(GPIOB_JTAG_TDO, 0U) | \ + PIN_AFIO_AF(GPIOB_JTAG_TRST, 0U) | \ + PIN_AFIO_AF(GPIOB_PIN5, 0U) | \ + PIN_AFIO_AF(GPIOB_PIN6, 0U) | \ + PIN_AFIO_AF(GPIOB_PIN7, 0U)) +#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_I2C1_SCL, 4U) | \ + PIN_AFIO_AF(GPIOB_I2C1_SDA, 4U) | \ + PIN_AFIO_AF(GPIOB_SPI2_SCK, 5U) | \ + PIN_AFIO_AF(GPIOB_PIN11, 0U) | \ + PIN_AFIO_AF(GPIOB_OTG_HS_ID, 12U) | \ + PIN_AFIO_AF(GPIOB_OTG_HS_VBUS, 0U) | \ + PIN_AFIO_AF(GPIOB_OTG_HS_DM, 12U) | \ + PIN_AFIO_AF(GPIOB_OTG_HS_DP, 12U)) + +/* + * GPIOC setup: + * + * PC0 - PIN0 (input pullup). + * PC1 - ETH_RMII_MDC (alternate 11). + * PC2 - SPI2_MISO (alternate 5). + * PC3 - SPI2_MOSI (alternate 5). + * PC4 - ETH_RMII_RXD0 (alternate 11). + * PC5 - ETH_RMII_RXD1 (alternate 11). + * PC6 - USART6_TX (alternate 8). + * PC7 - USART6_RX (alternate 8). + * PC8 - SD_D0 (alternate 12). + * PC9 - SD_D1 (alternate 12). + * PC10 - SD_D2 (alternate 12). + * PC11 - SD_D3 (alternate 12). + * PC12 - SD_CLK (alternate 12). + * PC13 - LED (output pushpull maximum). + * PC14 - OSC32_IN (input floating). + * PC15 - OSC32_OUT (input floating). + */ +#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | \ + PIN_MODE_ALTERNATE(GPIOC_ETH_RMII_MDC) |\ + PIN_MODE_ALTERNATE(GPIOC_SPI2_MISO) | \ + PIN_MODE_ALTERNATE(GPIOC_SPI2_MOSI) | \ + PIN_MODE_ALTERNATE(GPIOC_ETH_RMII_RXD0) |\ + PIN_MODE_ALTERNATE(GPIOC_ETH_RMII_RXD1) |\ + PIN_MODE_ALTERNATE(GPIOC_USART6_TX) | \ + PIN_MODE_ALTERNATE(GPIOC_USART6_RX) | \ + PIN_MODE_ALTERNATE(GPIOC_SD_D0) | \ + PIN_MODE_ALTERNATE(GPIOC_SD_D1) | \ + PIN_MODE_ALTERNATE(GPIOC_SD_D2) | \ + PIN_MODE_ALTERNATE(GPIOC_SD_D3) | \ + PIN_MODE_ALTERNATE(GPIOC_SD_CLK) | \ + PIN_MODE_OUTPUT(GPIOC_LED) | \ + PIN_MODE_INPUT(GPIOC_OSC32_IN) | \ + PIN_MODE_INPUT(GPIOC_OSC32_OUT)) +#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \ + PIN_OTYPE_PUSHPULL(GPIOC_ETH_RMII_MDC) |\ + PIN_OTYPE_PUSHPULL(GPIOC_SPI2_MISO) | \ + PIN_OTYPE_PUSHPULL(GPIOC_SPI2_MOSI) | \ + PIN_OTYPE_PUSHPULL(GPIOC_ETH_RMII_RXD0) |\ + PIN_OTYPE_PUSHPULL(GPIOC_ETH_RMII_RXD1) |\ + PIN_OTYPE_PUSHPULL(GPIOC_USART6_TX) | \ + PIN_OTYPE_PUSHPULL(GPIOC_USART6_RX) | \ + PIN_OTYPE_PUSHPULL(GPIOC_SD_D0) | \ + PIN_OTYPE_PUSHPULL(GPIOC_SD_D1) | \ + PIN_OTYPE_PUSHPULL(GPIOC_SD_D2) | \ + PIN_OTYPE_PUSHPULL(GPIOC_SD_D3) | \ + PIN_OTYPE_PUSHPULL(GPIOC_SD_CLK) | \ + PIN_OTYPE_PUSHPULL(GPIOC_LED) | \ + PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) | \ + PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT)) +#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_PIN0) | \ + PIN_OSPEED_HIGH(GPIOC_ETH_RMII_MDC) | \ + PIN_OSPEED_HIGH(GPIOC_SPI2_MISO) | \ + PIN_OSPEED_HIGH(GPIOC_SPI2_MOSI) | \ + PIN_OSPEED_HIGH(GPIOC_ETH_RMII_RXD0) | \ + PIN_OSPEED_HIGH(GPIOC_ETH_RMII_RXD1) | \ + PIN_OSPEED_HIGH(GPIOC_USART6_TX) | \ + PIN_OSPEED_HIGH(GPIOC_USART6_RX) | \ + PIN_OSPEED_HIGH(GPIOC_SD_D0) | \ + PIN_OSPEED_HIGH(GPIOC_SD_D1) | \ + PIN_OSPEED_HIGH(GPIOC_SD_D2) | \ + PIN_OSPEED_HIGH(GPIOC_SD_D3) | \ + PIN_OSPEED_HIGH(GPIOC_SD_CLK) | \ + PIN_OSPEED_HIGH(GPIOC_LED) | \ + PIN_OSPEED_HIGH(GPIOC_OSC32_IN) | \ + PIN_OSPEED_HIGH(GPIOC_OSC32_OUT)) +#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) | \ + PIN_PUPDR_FLOATING(GPIOC_ETH_RMII_MDC) |\ + PIN_PUPDR_FLOATING(GPIOC_SPI2_MISO) | \ + PIN_PUPDR_FLOATING(GPIOC_SPI2_MOSI) | \ + PIN_PUPDR_FLOATING(GPIOC_ETH_RMII_RXD0) |\ + PIN_PUPDR_FLOATING(GPIOC_ETH_RMII_RXD1) |\ + PIN_PUPDR_FLOATING(GPIOC_USART6_TX) | \ + PIN_PUPDR_FLOATING(GPIOC_USART6_RX) | \ + PIN_PUPDR_FLOATING(GPIOC_SD_D0) | \ + PIN_PUPDR_FLOATING(GPIOC_SD_D1) | \ + PIN_PUPDR_FLOATING(GPIOC_SD_D2) | \ + PIN_PUPDR_FLOATING(GPIOC_SD_D3) | \ + PIN_PUPDR_FLOATING(GPIOC_SD_CLK) | \ + PIN_PUPDR_FLOATING(GPIOC_LED) | \ + PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) | \ + PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT)) +#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \ + PIN_ODR_HIGH(GPIOC_ETH_RMII_MDC) | \ + PIN_ODR_HIGH(GPIOC_SPI2_MISO) | \ + PIN_ODR_HIGH(GPIOC_SPI2_MOSI) | \ + PIN_ODR_HIGH(GPIOC_ETH_RMII_RXD0) | \ + PIN_ODR_HIGH(GPIOC_ETH_RMII_RXD1) | \ + PIN_ODR_HIGH(GPIOC_USART6_TX) | \ + PIN_ODR_HIGH(GPIOC_USART6_RX) | \ + PIN_ODR_HIGH(GPIOC_SD_D0) | \ + PIN_ODR_HIGH(GPIOC_SD_D1) | \ + PIN_ODR_HIGH(GPIOC_SD_D2) | \ + PIN_ODR_HIGH(GPIOC_SD_D3) | \ + PIN_ODR_HIGH(GPIOC_SD_CLK) | \ + PIN_ODR_HIGH(GPIOC_LED) | \ + PIN_ODR_HIGH(GPIOC_OSC32_IN) | \ + PIN_ODR_HIGH(GPIOC_OSC32_OUT)) +#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0U) | \ + PIN_AFIO_AF(GPIOC_ETH_RMII_MDC, 11U) | \ + PIN_AFIO_AF(GPIOC_SPI2_MISO, 5U) | \ + PIN_AFIO_AF(GPIOC_SPI2_MOSI, 5U) | \ + PIN_AFIO_AF(GPIOC_ETH_RMII_RXD0, 11U) |\ + PIN_AFIO_AF(GPIOC_ETH_RMII_RXD1, 11U) |\ + PIN_AFIO_AF(GPIOC_USART6_TX, 8U) | \ + PIN_AFIO_AF(GPIOC_USART6_RX, 8U)) +#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_SD_D0, 12U) | \ + PIN_AFIO_AF(GPIOC_SD_D1, 12U) | \ + PIN_AFIO_AF(GPIOC_SD_D2, 12U) | \ + PIN_AFIO_AF(GPIOC_SD_D3, 12U) | \ + PIN_AFIO_AF(GPIOC_SD_CLK, 12U) | \ + PIN_AFIO_AF(GPIOC_LED, 0U) | \ + PIN_AFIO_AF(GPIOC_OSC32_IN, 0U) | \ + PIN_AFIO_AF(GPIOC_OSC32_OUT, 0U)) + +/* + * GPIOD setup: + * + * PD0 - PIN0 (input pullup). + * PD1 - PIN1 (input pullup). + * PD2 - SD_CMD (alternate 12). + * PD3 - PIN3 (input pullup). + * PD4 - PIN4 (input pullup). + * PD5 - PIN5 (input pullup). + * PD6 - PIN6 (input pullup). + * PD7 - PIN7 (input pullup). + * PD8 - PIN8 (input pullup). + * PD9 - PIN9 (input pullup). + * PD10 - PIN10 (input pullup). + * PD11 - PIN11 (input pullup). + * PD12 - PIN12 (input pullup). + * PD13 - PIN13 (input pullup). + * PD14 - PIN14 (input pullup). + * PD15 - PIN15 (input pullup). + */ +#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \ + PIN_MODE_INPUT(GPIOD_PIN1) | \ + PIN_MODE_ALTERNATE(GPIOD_SD_CMD) | \ + PIN_MODE_INPUT(GPIOD_PIN3) | \ + PIN_MODE_INPUT(GPIOD_PIN4) | \ + PIN_MODE_INPUT(GPIOD_PIN5) | \ + PIN_MODE_INPUT(GPIOD_PIN6) | \ + PIN_MODE_INPUT(GPIOD_PIN7) | \ + PIN_MODE_INPUT(GPIOD_PIN8) | \ + PIN_MODE_INPUT(GPIOD_PIN9) | \ + PIN_MODE_INPUT(GPIOD_PIN10) | \ + PIN_MODE_INPUT(GPIOD_PIN11) | \ + PIN_MODE_INPUT(GPIOD_PIN12) | \ + PIN_MODE_INPUT(GPIOD_PIN13) | \ + PIN_MODE_INPUT(GPIOD_PIN14) | \ + PIN_MODE_INPUT(GPIOD_PIN15)) +#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \ + PIN_OTYPE_PUSHPULL(GPIOD_SD_CMD) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \ + PIN_OTYPE_PUSHPULL(GPIOD_PIN15)) +#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_HIGH(GPIOD_PIN0) | \ + PIN_OSPEED_HIGH(GPIOD_PIN1) | \ + PIN_OSPEED_HIGH(GPIOD_SD_CMD) | \ + PIN_OSPEED_HIGH(GPIOD_PIN3) | \ + PIN_OSPEED_HIGH(GPIOD_PIN4) | \ + PIN_OSPEED_HIGH(GPIOD_PIN5) | \ + PIN_OSPEED_HIGH(GPIOD_PIN6) | \ + PIN_OSPEED_HIGH(GPIOD_PIN7) | \ + PIN_OSPEED_HIGH(GPIOD_PIN8) | \ + PIN_OSPEED_HIGH(GPIOD_PIN9) | \ + PIN_OSPEED_HIGH(GPIOD_PIN10) | \ + PIN_OSPEED_HIGH(GPIOD_PIN11) | \ + PIN_OSPEED_HIGH(GPIOD_PIN12) | \ + PIN_OSPEED_HIGH(GPIOD_PIN13) | \ + PIN_OSPEED_HIGH(GPIOD_PIN14) | \ + PIN_OSPEED_HIGH(GPIOD_PIN15)) +#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN1) | \ + PIN_PUPDR_FLOATING(GPIOD_SD_CMD) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN3) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN4) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN5) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN6) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN7) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN8) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN9) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN10) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN11) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN12) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN13) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN14) | \ + PIN_PUPDR_PULLUP(GPIOD_PIN15)) +#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \ + PIN_ODR_HIGH(GPIOD_PIN1) | \ + PIN_ODR_HIGH(GPIOD_SD_CMD) | \ + PIN_ODR_HIGH(GPIOD_PIN3) | \ + PIN_ODR_HIGH(GPIOD_PIN4) | \ + PIN_ODR_HIGH(GPIOD_PIN5) | \ + PIN_ODR_HIGH(GPIOD_PIN6) | \ + PIN_ODR_HIGH(GPIOD_PIN7) | \ + PIN_ODR_HIGH(GPIOD_PIN8) | \ + PIN_ODR_HIGH(GPIOD_PIN9) | \ + PIN_ODR_HIGH(GPIOD_PIN10) | \ + PIN_ODR_HIGH(GPIOD_PIN11) | \ + PIN_ODR_HIGH(GPIOD_PIN12) | \ + PIN_ODR_HIGH(GPIOD_PIN13) | \ + PIN_ODR_HIGH(GPIOD_PIN14) | \ + PIN_ODR_HIGH(GPIOD_PIN15)) +#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN1, 0U) | \ + PIN_AFIO_AF(GPIOD_SD_CMD, 12U) | \ + PIN_AFIO_AF(GPIOD_PIN3, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN4, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN5, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN6, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN7, 0U)) +#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN9, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN10, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN11, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN12, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN13, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN14, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN15, 0U)) + +/* + * GPIOE setup: + * + * PE0 - PIN0 (input pullup). + * PE1 - PIN1 (input pullup). + * PE2 - PIN2 (input pullup). + * PE3 - PIN3 (input pullup). + * PE4 - PIN4 (input pullup). + * PE5 - PIN5 (input pullup). + * PE6 - PIN6 (input pullup). + * PE7 - PIN7 (input pullup). + * PE8 - PIN8 (input pullup). + * PE9 - PIN9 (input pullup). + * PE10 - PIN10 (input pullup). + * PE11 - PIN11 (input pullup). + * PE12 - PIN12 (input pullup). + * PE13 - PIN13 (input pullup). + * PE14 - PIN14 (input pullup). + * PE15 - PIN15 (input pullup). + */ +#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \ + PIN_MODE_INPUT(GPIOE_PIN1) | \ + PIN_MODE_INPUT(GPIOE_PIN2) | \ + PIN_MODE_INPUT(GPIOE_PIN3) | \ + PIN_MODE_INPUT(GPIOE_PIN4) | \ + PIN_MODE_INPUT(GPIOE_PIN5) | \ + PIN_MODE_INPUT(GPIOE_PIN6) | \ + PIN_MODE_INPUT(GPIOE_PIN7) | \ + PIN_MODE_INPUT(GPIOE_PIN8) | \ + PIN_MODE_INPUT(GPIOE_PIN9) | \ + PIN_MODE_INPUT(GPIOE_PIN10) | \ + PIN_MODE_INPUT(GPIOE_PIN11) | \ + PIN_MODE_INPUT(GPIOE_PIN12) | \ + PIN_MODE_INPUT(GPIOE_PIN13) | \ + PIN_MODE_INPUT(GPIOE_PIN14) | \ + PIN_MODE_INPUT(GPIOE_PIN15)) +#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \ + PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) +#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_HIGH(GPIOE_PIN0) | \ + PIN_OSPEED_HIGH(GPIOE_PIN1) | \ + PIN_OSPEED_HIGH(GPIOE_PIN2) | \ + PIN_OSPEED_HIGH(GPIOE_PIN3) | \ + PIN_OSPEED_HIGH(GPIOE_PIN4) | \ + PIN_OSPEED_HIGH(GPIOE_PIN5) | \ + PIN_OSPEED_HIGH(GPIOE_PIN6) | \ + PIN_OSPEED_HIGH(GPIOE_PIN7) | \ + PIN_OSPEED_HIGH(GPIOE_PIN8) | \ + PIN_OSPEED_HIGH(GPIOE_PIN9) | \ + PIN_OSPEED_HIGH(GPIOE_PIN10) | \ + PIN_OSPEED_HIGH(GPIOE_PIN11) | \ + PIN_OSPEED_HIGH(GPIOE_PIN12) | \ + PIN_OSPEED_HIGH(GPIOE_PIN13) | \ + PIN_OSPEED_HIGH(GPIOE_PIN14) | \ + PIN_OSPEED_HIGH(GPIOE_PIN15)) +#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN1) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN2) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN3) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN4) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN5) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN6) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN7) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN8) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN9) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN10) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN11) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN12) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN13) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN14) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN15)) +#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \ + PIN_ODR_HIGH(GPIOE_PIN1) | \ + PIN_ODR_HIGH(GPIOE_PIN2) | \ + PIN_ODR_HIGH(GPIOE_PIN3) | \ + PIN_ODR_HIGH(GPIOE_PIN4) | \ + PIN_ODR_HIGH(GPIOE_PIN5) | \ + PIN_ODR_HIGH(GPIOE_PIN6) | \ + PIN_ODR_HIGH(GPIOE_PIN7) | \ + PIN_ODR_HIGH(GPIOE_PIN8) | \ + PIN_ODR_HIGH(GPIOE_PIN9) | \ + PIN_ODR_HIGH(GPIOE_PIN10) | \ + PIN_ODR_HIGH(GPIOE_PIN11) | \ + PIN_ODR_HIGH(GPIOE_PIN12) | \ + PIN_ODR_HIGH(GPIOE_PIN13) | \ + PIN_ODR_HIGH(GPIOE_PIN14) | \ + PIN_ODR_HIGH(GPIOE_PIN15)) +#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0U) | \ + PIN_AFIO_AF(GPIOE_PIN1, 0U) | \ + PIN_AFIO_AF(GPIOE_PIN2, 0U) | \ + PIN_AFIO_AF(GPIOE_PIN3, 0U) | \ + PIN_AFIO_AF(GPIOE_PIN4, 0U) | \ + PIN_AFIO_AF(GPIOE_PIN5, 0U) | \ + PIN_AFIO_AF(GPIOE_PIN6, 0U) | \ + PIN_AFIO_AF(GPIOE_PIN7, 0U)) +#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0U) | \ + PIN_AFIO_AF(GPIOE_PIN9, 0U) | \ + PIN_AFIO_AF(GPIOE_PIN10, 0U) | \ + PIN_AFIO_AF(GPIOE_PIN11, 0U) | \ + PIN_AFIO_AF(GPIOE_PIN12, 0U) | \ + PIN_AFIO_AF(GPIOE_PIN13, 0U) | \ + PIN_AFIO_AF(GPIOE_PIN14, 0U) | \ + PIN_AFIO_AF(GPIOE_PIN15, 0U)) + +/* + * GPIOF setup: + * + * PF0 - PIN0 (input pullup). + * PF1 - PIN1 (input pullup). + * PF2 - PIN2 (input pullup). + * PF3 - PIN3 (input pullup). + * PF4 - PIN4 (input pullup). + * PF5 - PIN5 (input pullup). + * PF6 - PIN6 (input pullup). + * PF7 - PIN7 (input pullup). + * PF8 - PIN8 (input pullup). + * PF9 - PIN9 (input pullup). + * PF10 - PIN10 (input pullup). + * PF11 - USB_FS_FAULT (input floating). + * PF12 - PIN12 (input pullup). + * PF13 - PIN13 (input pullup). + * PF14 - PIN14 (input pullup). + * PF15 - PIN15 (input pullup). + */ +#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_PIN0) | \ + PIN_MODE_INPUT(GPIOF_PIN1) | \ + PIN_MODE_INPUT(GPIOF_PIN2) | \ + PIN_MODE_INPUT(GPIOF_PIN3) | \ + PIN_MODE_INPUT(GPIOF_PIN4) | \ + PIN_MODE_INPUT(GPIOF_PIN5) | \ + PIN_MODE_INPUT(GPIOF_PIN6) | \ + PIN_MODE_INPUT(GPIOF_PIN7) | \ + PIN_MODE_INPUT(GPIOF_PIN8) | \ + PIN_MODE_INPUT(GPIOF_PIN9) | \ + PIN_MODE_INPUT(GPIOF_PIN10) | \ + PIN_MODE_INPUT(GPIOF_USB_FS_FAULT) | \ + PIN_MODE_INPUT(GPIOF_PIN12) | \ + PIN_MODE_INPUT(GPIOF_PIN13) | \ + PIN_MODE_INPUT(GPIOF_PIN14) | \ + PIN_MODE_INPUT(GPIOF_PIN15)) +#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN1) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \ + PIN_OTYPE_PUSHPULL(GPIOF_USB_FS_FAULT) |\ + PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) +#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_PIN0) | \ + PIN_OSPEED_HIGH(GPIOF_PIN1) | \ + PIN_OSPEED_HIGH(GPIOF_PIN2) | \ + PIN_OSPEED_HIGH(GPIOF_PIN3) | \ + PIN_OSPEED_HIGH(GPIOF_PIN4) | \ + PIN_OSPEED_HIGH(GPIOF_PIN5) | \ + PIN_OSPEED_HIGH(GPIOF_PIN6) | \ + PIN_OSPEED_HIGH(GPIOF_PIN7) | \ + PIN_OSPEED_HIGH(GPIOF_PIN8) | \ + PIN_OSPEED_HIGH(GPIOF_PIN9) | \ + PIN_OSPEED_HIGH(GPIOF_PIN10) | \ + PIN_OSPEED_HIGH(GPIOF_USB_FS_FAULT) | \ + PIN_OSPEED_HIGH(GPIOF_PIN12) | \ + PIN_OSPEED_HIGH(GPIOF_PIN13) | \ + PIN_OSPEED_HIGH(GPIOF_PIN14) | \ + PIN_OSPEED_HIGH(GPIOF_PIN15)) +#define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLUP(GPIOF_PIN0) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN1) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN2) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN3) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN4) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN5) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN6) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN7) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN8) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN9) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN10) | \ + PIN_PUPDR_FLOATING(GPIOF_USB_FS_FAULT) |\ + PIN_PUPDR_PULLUP(GPIOF_PIN12) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN13) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN14) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN15)) +#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_PIN0) | \ + PIN_ODR_HIGH(GPIOF_PIN1) | \ + PIN_ODR_HIGH(GPIOF_PIN2) | \ + PIN_ODR_HIGH(GPIOF_PIN3) | \ + PIN_ODR_HIGH(GPIOF_PIN4) | \ + PIN_ODR_HIGH(GPIOF_PIN5) | \ + PIN_ODR_HIGH(GPIOF_PIN6) | \ + PIN_ODR_HIGH(GPIOF_PIN7) | \ + PIN_ODR_HIGH(GPIOF_PIN8) | \ + PIN_ODR_HIGH(GPIOF_PIN9) | \ + PIN_ODR_HIGH(GPIOF_PIN10) | \ + PIN_ODR_HIGH(GPIOF_USB_FS_FAULT) | \ + PIN_ODR_HIGH(GPIOF_PIN12) | \ + PIN_ODR_HIGH(GPIOF_PIN13) | \ + PIN_ODR_HIGH(GPIOF_PIN14) | \ + PIN_ODR_HIGH(GPIOF_PIN15)) +#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_PIN0, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN1, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN2, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN3, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN4, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN5, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN6, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN7, 0U)) +#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN9, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN10, 0U) | \ + PIN_AFIO_AF(GPIOF_USB_FS_FAULT, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN12, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN13, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN14, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN15, 0U)) + +/* + * GPIOG setup: + * + * PG0 - PIN0 (input pullup). + * PG1 - PIN1 (input pullup). + * PG2 - PIN2 (input pullup). + * PG3 - PIN3 (input pullup). + * PG4 - PIN4 (input pullup). + * PG5 - PIN5 (input pullup). + * PG6 - PIN6 (input pullup). + * PG7 - PIN7 (input pullup). + * PG8 - PIN8 (input pullup). + * PG9 - PIN9 (input pullup). + * PG10 - SPI2_CS (output pushpull maximum). + * PG11 - ETH_RMII_TXEN (alternate 11). + * PG12 - PIN12 (input pullup). + * PG13 - ETH_RMII_TXD0 (alternate 11). + * PG14 - ETH_RMII_TXD1 (alternate 11). + * PG15 - PIN15 (input pullup). + */ +#define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | \ + PIN_MODE_INPUT(GPIOG_PIN1) | \ + PIN_MODE_INPUT(GPIOG_PIN2) | \ + PIN_MODE_INPUT(GPIOG_PIN3) | \ + PIN_MODE_INPUT(GPIOG_PIN4) | \ + PIN_MODE_INPUT(GPIOG_PIN5) | \ + PIN_MODE_INPUT(GPIOG_PIN6) | \ + PIN_MODE_INPUT(GPIOG_PIN7) | \ + PIN_MODE_INPUT(GPIOG_PIN8) | \ + PIN_MODE_INPUT(GPIOG_PIN9) | \ + PIN_MODE_OUTPUT(GPIOG_SPI2_CS) | \ + PIN_MODE_ALTERNATE(GPIOG_ETH_RMII_TXEN) |\ + PIN_MODE_INPUT(GPIOG_PIN12) | \ + PIN_MODE_ALTERNATE(GPIOG_ETH_RMII_TXD0) |\ + PIN_MODE_ALTERNATE(GPIOG_ETH_RMII_TXD1) |\ + PIN_MODE_INPUT(GPIOG_PIN15)) +#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | \ + PIN_OTYPE_PUSHPULL(GPIOG_SPI2_CS) | \ + PIN_OTYPE_PUSHPULL(GPIOG_ETH_RMII_TXEN) |\ + PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | \ + PIN_OTYPE_PUSHPULL(GPIOG_ETH_RMII_TXD0) |\ + PIN_OTYPE_PUSHPULL(GPIOG_ETH_RMII_TXD1) |\ + PIN_OTYPE_PUSHPULL(GPIOG_PIN15)) +#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_HIGH(GPIOG_PIN0) | \ + PIN_OSPEED_HIGH(GPIOG_PIN1) | \ + PIN_OSPEED_HIGH(GPIOG_PIN2) | \ + PIN_OSPEED_HIGH(GPIOG_PIN3) | \ + PIN_OSPEED_HIGH(GPIOG_PIN4) | \ + PIN_OSPEED_HIGH(GPIOG_PIN5) | \ + PIN_OSPEED_HIGH(GPIOG_PIN6) | \ + PIN_OSPEED_HIGH(GPIOG_PIN7) | \ + PIN_OSPEED_HIGH(GPIOG_PIN8) | \ + PIN_OSPEED_HIGH(GPIOG_PIN9) | \ + PIN_OSPEED_HIGH(GPIOG_SPI2_CS) | \ + PIN_OSPEED_HIGH(GPIOG_ETH_RMII_TXEN) | \ + PIN_OSPEED_HIGH(GPIOG_PIN12) | \ + PIN_OSPEED_HIGH(GPIOG_ETH_RMII_TXD0) | \ + PIN_OSPEED_HIGH(GPIOG_ETH_RMII_TXD1) | \ + PIN_OSPEED_HIGH(GPIOG_PIN15)) +#define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLUP(GPIOG_PIN0) | \ + PIN_PUPDR_PULLUP(GPIOG_PIN1) | \ + PIN_PUPDR_PULLUP(GPIOG_PIN2) | \ + PIN_PUPDR_PULLUP(GPIOG_PIN3) | \ + PIN_PUPDR_PULLUP(GPIOG_PIN4) | \ + PIN_PUPDR_PULLUP(GPIOG_PIN5) | \ + PIN_PUPDR_PULLUP(GPIOG_PIN6) | \ + PIN_PUPDR_PULLUP(GPIOG_PIN7) | \ + PIN_PUPDR_PULLUP(GPIOG_PIN8) | \ + PIN_PUPDR_PULLUP(GPIOG_PIN9) | \ + PIN_PUPDR_FLOATING(GPIOG_SPI2_CS) | \ + PIN_PUPDR_FLOATING(GPIOG_ETH_RMII_TXEN) |\ + PIN_PUPDR_PULLUP(GPIOG_PIN12) | \ + PIN_PUPDR_FLOATING(GPIOG_ETH_RMII_TXD0) |\ + PIN_PUPDR_FLOATING(GPIOG_ETH_RMII_TXD1) |\ + PIN_PUPDR_PULLUP(GPIOG_PIN15)) +#define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_PIN0) | \ + PIN_ODR_HIGH(GPIOG_PIN1) | \ + PIN_ODR_HIGH(GPIOG_PIN2) | \ + PIN_ODR_HIGH(GPIOG_PIN3) | \ + PIN_ODR_HIGH(GPIOG_PIN4) | \ + PIN_ODR_HIGH(GPIOG_PIN5) | \ + PIN_ODR_HIGH(GPIOG_PIN6) | \ + PIN_ODR_HIGH(GPIOG_PIN7) | \ + PIN_ODR_HIGH(GPIOG_PIN8) | \ + PIN_ODR_HIGH(GPIOG_PIN9) | \ + PIN_ODR_HIGH(GPIOG_SPI2_CS) | \ + PIN_ODR_HIGH(GPIOG_ETH_RMII_TXEN) | \ + PIN_ODR_HIGH(GPIOG_PIN12) | \ + PIN_ODR_HIGH(GPIOG_ETH_RMII_TXD0) | \ + PIN_ODR_HIGH(GPIOG_ETH_RMII_TXD1) | \ + PIN_ODR_HIGH(GPIOG_PIN15)) +#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0U) | \ + PIN_AFIO_AF(GPIOG_PIN1, 0U) | \ + PIN_AFIO_AF(GPIOG_PIN2, 0U) | \ + PIN_AFIO_AF(GPIOG_PIN3, 0U) | \ + PIN_AFIO_AF(GPIOG_PIN4, 0U) | \ + PIN_AFIO_AF(GPIOG_PIN5, 0U) | \ + PIN_AFIO_AF(GPIOG_PIN6, 0U) | \ + PIN_AFIO_AF(GPIOG_PIN7, 0U)) +#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0U) | \ + PIN_AFIO_AF(GPIOG_PIN9, 0U) | \ + PIN_AFIO_AF(GPIOG_SPI2_CS, 0U) | \ + PIN_AFIO_AF(GPIOG_ETH_RMII_TXEN, 11U) |\ + PIN_AFIO_AF(GPIOG_PIN12, 0U) | \ + PIN_AFIO_AF(GPIOG_ETH_RMII_TXD0, 11U) |\ + PIN_AFIO_AF(GPIOG_ETH_RMII_TXD1, 11U) |\ + PIN_AFIO_AF(GPIOG_PIN15, 0U)) + +/* + * GPIOH setup: + * + * PH0 - OSC_IN (input floating). + * PH1 - OSC_OUT (input floating). + * PH2 - PIN2 (input pullup). + * PH3 - PIN3 (input pullup). + * PH4 - PIN4 (input pullup). + * PH5 - PIN5 (input pullup). + * PH6 - PIN6 (input pullup). + * PH7 - PIN7 (input pullup). + * PH8 - PIN8 (input pullup). + * PH9 - PIN9 (input pullup). + * PH10 - PIN10 (input pullup). + * PH11 - PIN11 (input pullup). + * PH12 - PIN12 (input pullup). + * PH13 - PIN13 (input pullup). + * PH14 - PIN14 (input pullup). + * PH15 - PIN15 (input pullup). + */ +#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | \ + PIN_MODE_INPUT(GPIOH_OSC_OUT) | \ + PIN_MODE_INPUT(GPIOH_PIN2) | \ + PIN_MODE_INPUT(GPIOH_PIN3) | \ + PIN_MODE_INPUT(GPIOH_PIN4) | \ + PIN_MODE_INPUT(GPIOH_PIN5) | \ + PIN_MODE_INPUT(GPIOH_PIN6) | \ + PIN_MODE_INPUT(GPIOH_PIN7) | \ + PIN_MODE_INPUT(GPIOH_PIN8) | \ + PIN_MODE_INPUT(GPIOH_PIN9) | \ + PIN_MODE_INPUT(GPIOH_PIN10) | \ + PIN_MODE_INPUT(GPIOH_PIN11) | \ + PIN_MODE_INPUT(GPIOH_PIN12) | \ + PIN_MODE_INPUT(GPIOH_PIN13) | \ + PIN_MODE_INPUT(GPIOH_PIN14) | \ + PIN_MODE_INPUT(GPIOH_PIN15)) +#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) | \ + PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN15)) +#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_HIGH(GPIOH_OSC_IN) | \ + PIN_OSPEED_HIGH(GPIOH_OSC_OUT) | \ + PIN_OSPEED_HIGH(GPIOH_PIN2) | \ + PIN_OSPEED_HIGH(GPIOH_PIN3) | \ + PIN_OSPEED_HIGH(GPIOH_PIN4) | \ + PIN_OSPEED_HIGH(GPIOH_PIN5) | \ + PIN_OSPEED_HIGH(GPIOH_PIN6) | \ + PIN_OSPEED_HIGH(GPIOH_PIN7) | \ + PIN_OSPEED_HIGH(GPIOH_PIN8) | \ + PIN_OSPEED_HIGH(GPIOH_PIN9) | \ + PIN_OSPEED_HIGH(GPIOH_PIN10) | \ + PIN_OSPEED_HIGH(GPIOH_PIN11) | \ + PIN_OSPEED_HIGH(GPIOH_PIN12) | \ + PIN_OSPEED_HIGH(GPIOH_PIN13) | \ + PIN_OSPEED_HIGH(GPIOH_PIN14) | \ + PIN_OSPEED_HIGH(GPIOH_PIN15)) +#define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) | \ + PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) | \ + PIN_PUPDR_PULLUP(GPIOH_PIN2) | \ + PIN_PUPDR_PULLUP(GPIOH_PIN3) | \ + PIN_PUPDR_PULLUP(GPIOH_PIN4) | \ + PIN_PUPDR_PULLUP(GPIOH_PIN5) | \ + PIN_PUPDR_PULLUP(GPIOH_PIN6) | \ + PIN_PUPDR_PULLUP(GPIOH_PIN7) | \ + PIN_PUPDR_PULLUP(GPIOH_PIN8) | \ + PIN_PUPDR_PULLUP(GPIOH_PIN9) | \ + PIN_PUPDR_PULLUP(GPIOH_PIN10) | \ + PIN_PUPDR_PULLUP(GPIOH_PIN11) | \ + PIN_PUPDR_PULLUP(GPIOH_PIN12) | \ + PIN_PUPDR_PULLUP(GPIOH_PIN13) | \ + PIN_PUPDR_PULLUP(GPIOH_PIN14) | \ + PIN_PUPDR_PULLUP(GPIOH_PIN15)) +#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_OSC_IN) | \ + PIN_ODR_HIGH(GPIOH_OSC_OUT) | \ + PIN_ODR_HIGH(GPIOH_PIN2) | \ + PIN_ODR_HIGH(GPIOH_PIN3) | \ + PIN_ODR_HIGH(GPIOH_PIN4) | \ + PIN_ODR_HIGH(GPIOH_PIN5) | \ + PIN_ODR_HIGH(GPIOH_PIN6) | \ + PIN_ODR_HIGH(GPIOH_PIN7) | \ + PIN_ODR_HIGH(GPIOH_PIN8) | \ + PIN_ODR_HIGH(GPIOH_PIN9) | \ + PIN_ODR_HIGH(GPIOH_PIN10) | \ + PIN_ODR_HIGH(GPIOH_PIN11) | \ + PIN_ODR_HIGH(GPIOH_PIN12) | \ + PIN_ODR_HIGH(GPIOH_PIN13) | \ + PIN_ODR_HIGH(GPIOH_PIN14) | \ + PIN_ODR_HIGH(GPIOH_PIN15)) +#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_OSC_IN, 0U) | \ + PIN_AFIO_AF(GPIOH_OSC_OUT, 0U) | \ + PIN_AFIO_AF(GPIOH_PIN2, 0U) | \ + PIN_AFIO_AF(GPIOH_PIN3, 0U) | \ + PIN_AFIO_AF(GPIOH_PIN4, 0U) | \ + PIN_AFIO_AF(GPIOH_PIN5, 0U) | \ + PIN_AFIO_AF(GPIOH_PIN6, 0U) | \ + PIN_AFIO_AF(GPIOH_PIN7, 0U)) +#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0U) | \ + PIN_AFIO_AF(GPIOH_PIN9, 0U) | \ + PIN_AFIO_AF(GPIOH_PIN10, 0U) | \ + PIN_AFIO_AF(GPIOH_PIN11, 0U) | \ + PIN_AFIO_AF(GPIOH_PIN12, 0U) | \ + PIN_AFIO_AF(GPIOH_PIN13, 0U) | \ + PIN_AFIO_AF(GPIOH_PIN14, 0U) | \ + PIN_AFIO_AF(GPIOH_PIN15, 0U)) + +/* + * GPIOI setup: + * + * PI0 - PIN0 (input pullup). + * PI1 - PIN1 (input pullup). + * PI2 - PIN2 (input pullup). + * PI3 - PIN3 (input pullup). + * PI4 - PIN4 (input pullup). + * PI5 - PIN5 (input pullup). + * PI6 - PIN6 (input pullup). + * PI7 - PIN7 (input pullup). + * PI8 - PIN8 (input pullup). + * PI9 - PIN9 (input pullup). + * PI10 - PIN10 (input pullup). + * PI11 - PIN11 (input pullup). + * PI12 - PIN12 (input pullup). + * PI13 - PIN13 (input pullup). + * PI14 - PIN14 (input pullup). + * PI15 - PIN15 (input pullup). + */ +#define VAL_GPIOI_MODER (PIN_MODE_INPUT(GPIOI_PIN0) | \ + PIN_MODE_INPUT(GPIOI_PIN1) | \ + PIN_MODE_INPUT(GPIOI_PIN2) | \ + PIN_MODE_INPUT(GPIOI_PIN3) | \ + PIN_MODE_INPUT(GPIOI_PIN4) | \ + PIN_MODE_INPUT(GPIOI_PIN5) | \ + PIN_MODE_INPUT(GPIOI_PIN6) | \ + PIN_MODE_INPUT(GPIOI_PIN7) | \ + PIN_MODE_INPUT(GPIOI_PIN8) | \ + PIN_MODE_INPUT(GPIOI_PIN9) | \ + PIN_MODE_INPUT(GPIOI_PIN10) | \ + PIN_MODE_INPUT(GPIOI_PIN11) | \ + PIN_MODE_INPUT(GPIOI_PIN12) | \ + PIN_MODE_INPUT(GPIOI_PIN13) | \ + PIN_MODE_INPUT(GPIOI_PIN14) | \ + PIN_MODE_INPUT(GPIOI_PIN15)) +#define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(GPIOI_PIN0) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN1) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN3) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN7) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN8) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN9) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN10) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN11) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN12) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN13) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN14) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN15)) +#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_HIGH(GPIOI_PIN0) | \ + PIN_OSPEED_HIGH(GPIOI_PIN1) | \ + PIN_OSPEED_HIGH(GPIOI_PIN2) | \ + PIN_OSPEED_HIGH(GPIOI_PIN3) | \ + PIN_OSPEED_HIGH(GPIOI_PIN4) | \ + PIN_OSPEED_HIGH(GPIOI_PIN5) | \ + PIN_OSPEED_HIGH(GPIOI_PIN6) | \ + PIN_OSPEED_HIGH(GPIOI_PIN7) | \ + PIN_OSPEED_HIGH(GPIOI_PIN8) | \ + PIN_OSPEED_HIGH(GPIOI_PIN9) | \ + PIN_OSPEED_HIGH(GPIOI_PIN10) | \ + PIN_OSPEED_HIGH(GPIOI_PIN11) | \ + PIN_OSPEED_HIGH(GPIOI_PIN12) | \ + PIN_OSPEED_HIGH(GPIOI_PIN13) | \ + PIN_OSPEED_HIGH(GPIOI_PIN14) | \ + PIN_OSPEED_HIGH(GPIOI_PIN15)) +#define VAL_GPIOI_PUPDR (PIN_PUPDR_PULLUP(GPIOI_PIN0) | \ + PIN_PUPDR_PULLUP(GPIOI_PIN1) | \ + PIN_PUPDR_PULLUP(GPIOI_PIN2) | \ + PIN_PUPDR_PULLUP(GPIOI_PIN3) | \ + PIN_PUPDR_PULLUP(GPIOI_PIN4) | \ + PIN_PUPDR_PULLUP(GPIOI_PIN5) | \ + PIN_PUPDR_PULLUP(GPIOI_PIN6) | \ + PIN_PUPDR_PULLUP(GPIOI_PIN7) | \ + PIN_PUPDR_PULLUP(GPIOI_PIN8) | \ + PIN_PUPDR_PULLUP(GPIOI_PIN9) | \ + PIN_PUPDR_PULLUP(GPIOI_PIN10) | \ + PIN_PUPDR_PULLUP(GPIOI_PIN11) | \ + PIN_PUPDR_PULLUP(GPIOI_PIN12) | \ + PIN_PUPDR_PULLUP(GPIOI_PIN13) | \ + PIN_PUPDR_PULLUP(GPIOI_PIN14) | \ + PIN_PUPDR_PULLUP(GPIOI_PIN15)) +#define VAL_GPIOI_ODR (PIN_ODR_HIGH(GPIOI_PIN0) | \ + PIN_ODR_HIGH(GPIOI_PIN1) | \ + PIN_ODR_HIGH(GPIOI_PIN2) | \ + PIN_ODR_HIGH(GPIOI_PIN3) | \ + PIN_ODR_HIGH(GPIOI_PIN4) | \ + PIN_ODR_HIGH(GPIOI_PIN5) | \ + PIN_ODR_HIGH(GPIOI_PIN6) | \ + PIN_ODR_HIGH(GPIOI_PIN7) | \ + PIN_ODR_HIGH(GPIOI_PIN8) | \ + PIN_ODR_HIGH(GPIOI_PIN9) | \ + PIN_ODR_HIGH(GPIOI_PIN10) | \ + PIN_ODR_HIGH(GPIOI_PIN11) | \ + PIN_ODR_HIGH(GPIOI_PIN12) | \ + PIN_ODR_HIGH(GPIOI_PIN13) | \ + PIN_ODR_HIGH(GPIOI_PIN14) | \ + PIN_ODR_HIGH(GPIOI_PIN15)) +#define VAL_GPIOI_AFRL (PIN_AFIO_AF(GPIOI_PIN0, 0U) | \ + PIN_AFIO_AF(GPIOI_PIN1, 0U) | \ + PIN_AFIO_AF(GPIOI_PIN2, 0U) | \ + PIN_AFIO_AF(GPIOI_PIN3, 0U) | \ + PIN_AFIO_AF(GPIOI_PIN4, 0U) | \ + PIN_AFIO_AF(GPIOI_PIN5, 0U) | \ + PIN_AFIO_AF(GPIOI_PIN6, 0U) | \ + PIN_AFIO_AF(GPIOI_PIN7, 0U)) +#define VAL_GPIOI_AFRH (PIN_AFIO_AF(GPIOI_PIN8, 0U) | \ + PIN_AFIO_AF(GPIOI_PIN9, 0U) | \ + PIN_AFIO_AF(GPIOI_PIN10, 0U) | \ + PIN_AFIO_AF(GPIOI_PIN11, 0U) | \ + PIN_AFIO_AF(GPIOI_PIN12, 0U) | \ + PIN_AFIO_AF(GPIOI_PIN13, 0U) | \ + PIN_AFIO_AF(GPIOI_PIN14, 0U) | \ + PIN_AFIO_AF(GPIOI_PIN15, 0U)) + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if !defined(_FROM_ASM_) +#ifdef __cplusplus +extern "C" { +#endif + void boardInit(void); +#ifdef __cplusplus +} +#endif +#endif /* _FROM_ASM_ */ + +#endif /* BOARD_H */ diff --git a/os/hal/boards/SEEED_ARCH_MAX/board.mk b/os/hal/boards/SEEED_ARCH_MAX/board.mk new file mode 100755 index 000000000..4f0ee6156 --- /dev/null +++ b/os/hal/boards/SEEED_ARCH_MAX/board.mk @@ -0,0 +1,9 @@ +# List of all the board related files. +BOARDSRC = $(CHIBIOS)/os/hal/boards/SEEED_ARCH_MAX/board.c + +# Required include directories +BOARDINC = $(CHIBIOS)/os/hal/boards/SEEED_ARCH_MAX + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) diff --git a/os/hal/boards/SEEED_ARCH_MAX/cfg/board.chcfg b/os/hal/boards/SEEED_ARCH_MAX/cfg/board.chcfg new file mode 100755 index 000000000..22f24665a --- /dev/null +++ b/os/hal/boards/SEEED_ARCH_MAX/cfg/board.chcfg @@ -0,0 +1,342 @@ + + + + + resources/gencfg/processors/boards/stm32f4xx/templates + .. + 5.0.x + + Seeed Arch Max + SEEED_ARCH_MAX + + + + + + + MII_KS8721_ID + RMII + + STM32F407xx + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/os/hal/boards/SEEED_ARCH_MAX/cfg/board.fmpp b/os/hal/boards/SEEED_ARCH_MAX/cfg/board.fmpp new file mode 100644 index 000000000..41754c141 --- /dev/null +++ b/os/hal/boards/SEEED_ARCH_MAX/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f4xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_NUCLEO144_F207ZG/board.c b/os/hal/boards/ST_NUCLEO144_F207ZG/board.c index 65b74d0c6..5ee0873d7 100644 --- a/os/hal/boards/ST_NUCLEO144_F207ZG/board.c +++ b/os/hal/boards/ST_NUCLEO144_F207ZG/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -73,15 +135,81 @@ const PALConfig pal_default_config = { VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB1(STM32_GPIO_EN_MASK); + rccEnableAHB1(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); #endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -134,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_NUCLEO144_F207ZG/board.h b/os/hal/boards/ST_NUCLEO144_F207ZG/board.h index 247427a6b..f072ce77d 100644 --- a/os/hal/boards/ST_NUCLEO144_F207ZG/board.h +++ b/os/hal/boards/ST_NUCLEO144_F207ZG/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32 Nucleo144-F207ZG board. */ @@ -345,7 +349,6 @@ #define LINE_SWCLK PAL_LINE(GPIOA, 14U) #define LINE_ZIO_D20 PAL_LINE(GPIOA, 15U) #define LINE_I2S3_WS PAL_LINE(GPIOA, 15U) - #define LINE_ZIO_D33 PAL_LINE(GPIOB, 0U) #define LINE_TIM3_CH3 PAL_LINE(GPIOB, 0U) #define LINE_LED1 PAL_LINE(GPIOB, 0U) @@ -376,7 +379,6 @@ #define LINE_LED3 PAL_LINE(GPIOB, 14U) #define LINE_ZIO_D17 PAL_LINE(GPIOB, 15U) #define LINE_I2S2_SD PAL_LINE(GPIOB, 15U) - #define LINE_ARD_A1 PAL_LINE(GPIOC, 0U) #define LINE_ADC123_IN10 PAL_LINE(GPIOC, 0U) #define LINE_RMII_MDC PAL_LINE(GPIOC, 1U) @@ -403,7 +405,6 @@ #define LINE_BUTTON PAL_LINE(GPIOC, 13U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) - #define LINE_ZIO_D67 PAL_LINE(GPIOD, 0U) #define LINE_CAN1_RX PAL_LINE(GPIOD, 0U) #define LINE_ZIO_D66 PAL_LINE(GPIOD, 1U) @@ -431,7 +432,6 @@ #define LINE_SPI1_NSS PAL_LINE(GPIOD, 14U) #define LINE_ARD_D9 PAL_LINE(GPIOD, 15U) #define LINE_TIM4_CH4 PAL_LINE(GPIOD, 15U) - #define LINE_ZIO_D34 PAL_LINE(GPIOE, 0U) #define LINE_TIM4_ETR PAL_LINE(GPIOE, 0U) #define LINE_ZIO_D31 PAL_LINE(GPIOE, 2U) @@ -457,7 +457,6 @@ #define LINE_ZIO_D38 PAL_LINE(GPIOE, 14U) #define LINE_ZIO_D37 PAL_LINE(GPIOE, 15U) #define LINE_TIM1_BKIN1 PAL_LINE(GPIOE, 15U) - #define LINE_ZIO_D68 PAL_LINE(GPIOF, 0U) #define LINE_I2C2_SDA PAL_LINE(GPIOF, 0U) #define LINE_ZIO_D69 PAL_LINE(GPIOF, 1U) @@ -479,7 +478,6 @@ #define LINE_ARD_D7 PAL_LINE(GPIOF, 13U) #define LINE_ARD_D4 PAL_LINE(GPIOF, 14U) #define LINE_ARD_D2 PAL_LINE(GPIOF, 15U) - #define LINE_ZIO_D65 PAL_LINE(GPIOG, 0U) #define LINE_ZIO_D64 PAL_LINE(GPIOG, 1U) #define LINE_ZIO_D49 PAL_LINE(GPIOG, 2U) @@ -492,12 +490,24 @@ #define LINE_RMII_TXD0 PAL_LINE(GPIOG, 13U) #define LINE_ARD_D1 PAL_LINE(GPIOG, 14U) #define LINE_USART6_TX PAL_LINE(GPIOG, 14U) - #define LINE_OSC_IN PAL_LINE(GPIOH, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -1808,6 +1818,9 @@ PIN_AFIO_AF(GPIOK_PIN14, 0U) | \ PIN_AFIO_AF(GPIOK_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_NUCLEO144_F207ZG/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO144_F207ZG/cfg/board.chcfg index 697f012df..2148698a8 100644 --- a/os/hal/boards/ST_NUCLEO144_F207ZG/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO144_F207ZG/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f4xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32 Nucleo144-F207ZG ST_NUCLEO144_F207ZG diff --git a/os/hal/boards/ST_NUCLEO144_F207ZG/cfg/board.fmpp b/os/hal/boards/ST_NUCLEO144_F207ZG/cfg/board.fmpp new file mode 100644 index 000000000..41754c141 --- /dev/null +++ b/os/hal/boards/ST_NUCLEO144_F207ZG/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f4xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_NUCLEO144_F303ZE/board.c b/os/hal/boards/ST_NUCLEO144_F303ZE/board.c index 52b14f7e2..3c291169d 100644 --- a/os/hal/boards/ST_NUCLEO144_F303ZE/board.c +++ b/os/hal/boards/ST_NUCLEO144_F303ZE/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -62,18 +124,92 @@ const PALConfig pal_default_config = { #endif #if STM32_HAS_GPIOI {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, - VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} + VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, +#endif +#if STM32_HAS_GPIOJ + {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, + VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, +#endif +#if STM32_HAS_GPIOK + {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, + VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB(STM32_GPIO_EN_MASK); + rccEnableAHB(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); #endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); +#endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -126,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_NUCLEO144_F303ZE/board.h b/os/hal/boards/ST_NUCLEO144_F303ZE/board.h index 8311c702d..5db87e95d 100644 --- a/os/hal/boards/ST_NUCLEO144_F303ZE/board.h +++ b/os/hal/boards/ST_NUCLEO144_F303ZE/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32 Nucleo144-F303ZE board. */ @@ -331,7 +335,6 @@ #define LINE_SWCLK PAL_LINE(GPIOA, 14U) #define LINE_ZIO_D20 PAL_LINE(GPIOA, 15U) #define LINE_I2S3_WS PAL_LINE(GPIOA, 15U) - #define LINE_ZIO_D33 PAL_LINE(GPIOB, 0U) #define LINE_TIM3_CH3 PAL_LINE(GPIOB, 0U) #define LINE_LED1 PAL_LINE(GPIOB, 0U) @@ -361,7 +364,6 @@ #define LINE_LED3 PAL_LINE(GPIOB, 14U) #define LINE_ZIO_D17 PAL_LINE(GPIOB, 15U) #define LINE_I2S2_SD PAL_LINE(GPIOB, 15U) - #define LINE_ARD_A1 PAL_LINE(GPIOC, 0U) #define LINE_ADC12_IN6 PAL_LINE(GPIOC, 0U) #define LINE_ZIO_A7 PAL_LINE(GPIOC, 2U) @@ -385,7 +387,6 @@ #define LINE_BUTTON PAL_LINE(GPIOC, 13U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) - #define LINE_ZIO_D67 PAL_LINE(GPIOD, 0U) #define LINE_CAN1_RX PAL_LINE(GPIOD, 0U) #define LINE_ZIO_D66 PAL_LINE(GPIOD, 1U) @@ -415,7 +416,6 @@ #define LINE_SPI1_NSS PAL_LINE(GPIOD, 14U) #define LINE_ARD_D9 PAL_LINE(GPIOD, 15U) #define LINE_TIM4_CH4 PAL_LINE(GPIOD, 15U) - #define LINE_ZIO_D34 PAL_LINE(GPIOE, 0U) #define LINE_TIM4_ETR PAL_LINE(GPIOE, 0U) #define LINE_ZIO_D31 PAL_LINE(GPIOE, 2U) @@ -441,7 +441,6 @@ #define LINE_ZIO_D38 PAL_LINE(GPIOE, 14U) #define LINE_ZIO_D37 PAL_LINE(GPIOE, 15U) #define LINE_TIM1_BKIN1 PAL_LINE(GPIOE, 15U) - #define LINE_ZIO_D30 PAL_LINE(GPIOF, 3U) #define LINE_ZIO_A8 PAL_LINE(GPIOF, 4U) #define LINE_ADC3_IN14 PAL_LINE(GPIOF, 4U) @@ -454,19 +453,30 @@ #define LINE_ARD_D7 PAL_LINE(GPIOF, 13U) #define LINE_ARD_D4 PAL_LINE(GPIOF, 14U) #define LINE_ARD_D2 PAL_LINE(GPIOF, 15U) - #define LINE_ZIO_D65 PAL_LINE(GPIOG, 0U) #define LINE_ZIO_D64 PAL_LINE(GPIOG, 1U) #define LINE_ZIO_D49 PAL_LINE(GPIOG, 2U) #define LINE_ZIO_D50 PAL_LINE(GPIOG, 3U) #define LINE_USB_GPIO_OUT PAL_LINE(GPIOG, 6U) #define LINE_USB_GPIO_IN PAL_LINE(GPIOG, 7U) - #define LINE_OSC_IN PAL_LINE(GPIOH, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -1777,6 +1787,9 @@ PIN_AFIO_AF(GPIOK_PIN14, 0U) | \ PIN_AFIO_AF(GPIOK_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_NUCLEO144_F303ZE/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO144_F303ZE/cfg/board.chcfg index b7d15a23a..289559c5f 100644 --- a/os/hal/boards/ST_NUCLEO144_F303ZE/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO144_F303ZE/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f3xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32 Nucleo144-F303ZE ST_NUCLEO144_F303ZE diff --git a/os/hal/boards/ST_NUCLEO144_F303ZE/cfg/board.fmpp b/os/hal/boards/ST_NUCLEO144_F303ZE/cfg/board.fmpp new file mode 100644 index 000000000..6967f302d --- /dev/null +++ b/os/hal/boards/ST_NUCLEO144_F303ZE/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f3xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_NUCLEO144_F412ZG/board.c b/os/hal/boards/ST_NUCLEO144_F412ZG/board.c index 65b74d0c6..5ee0873d7 100644 --- a/os/hal/boards/ST_NUCLEO144_F412ZG/board.c +++ b/os/hal/boards/ST_NUCLEO144_F412ZG/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -73,15 +135,81 @@ const PALConfig pal_default_config = { VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB1(STM32_GPIO_EN_MASK); + rccEnableAHB1(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); #endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -134,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_NUCLEO144_F412ZG/board.h b/os/hal/boards/ST_NUCLEO144_F412ZG/board.h index aac7287d6..0ab2d8fcf 100644 --- a/os/hal/boards/ST_NUCLEO144_F412ZG/board.h +++ b/os/hal/boards/ST_NUCLEO144_F412ZG/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32 Nucleo144-F412ZG board. */ @@ -349,7 +353,6 @@ #define LINE_SWCLK PAL_LINE(GPIOA, 14U) #define LINE_ZIO_D20 PAL_LINE(GPIOA, 15U) #define LINE_I2S3_WS PAL_LINE(GPIOA, 15U) - #define LINE_ZIO_D33 PAL_LINE(GPIOB, 0U) #define LINE_TIM3_CH3 PAL_LINE(GPIOB, 0U) #define LINE_LED1 PAL_LINE(GPIOB, 0U) @@ -381,7 +384,6 @@ #define LINE_LED3 PAL_LINE(GPIOB, 14U) #define LINE_ZIO_D17 PAL_LINE(GPIOB, 15U) #define LINE_I2S2_SD PAL_LINE(GPIOB, 15U) - #define LINE_ARD_A1 PAL_LINE(GPIOC, 0U) #define LINE_ADC1_IN10 PAL_LINE(GPIOC, 0U) #define LINE_ARD_A3 PAL_LINE(GPIOC, 1U) @@ -411,7 +413,6 @@ #define LINE_BUTTON PAL_LINE(GPIOC, 13U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) - #define LINE_ZIO_D67 PAL_LINE(GPIOD, 0U) #define LINE_CAN1_RX PAL_LINE(GPIOD, 0U) #define LINE_ZIO_D66 PAL_LINE(GPIOD, 1U) @@ -442,7 +443,6 @@ #define LINE_SPI1_NSS PAL_LINE(GPIOD, 14U) #define LINE_ARD_D9 PAL_LINE(GPIOD, 15U) #define LINE_TIM4_CH4 PAL_LINE(GPIOD, 15U) - #define LINE_ZIO_D34 PAL_LINE(GPIOE, 0U) #define LINE_TIM4_ETR PAL_LINE(GPIOE, 0U) #define LINE_ZIO_D31 PAL_LINE(GPIOE, 2U) @@ -473,7 +473,6 @@ #define LINE_ZIO_D38 PAL_LINE(GPIOE, 14U) #define LINE_ZIO_D37 PAL_LINE(GPIOE, 15U) #define LINE_TIM1_BKIN1 PAL_LINE(GPIOE, 15U) - #define LINE_ZIO_D68 PAL_LINE(GPIOF, 0U) #define LINE_I2C2_SDA PAL_LINE(GPIOF, 0U) #define LINE_ZIO_D69 PAL_LINE(GPIOF, 1U) @@ -490,7 +489,6 @@ #define LINE_ARD_D7 PAL_LINE(GPIOF, 13U) #define LINE_ARD_D4 PAL_LINE(GPIOF, 14U) #define LINE_ARD_D2 PAL_LINE(GPIOF, 15U) - #define LINE_ZIO_D65 PAL_LINE(GPIOG, 0U) #define LINE_ZIO_D64 PAL_LINE(GPIOG, 1U) #define LINE_ZIO_D49 PAL_LINE(GPIOG, 2U) @@ -501,12 +499,24 @@ #define LINE_USART6_RX PAL_LINE(GPIOG, 9U) #define LINE_ARD_D1 PAL_LINE(GPIOG, 14U) #define LINE_USART6_TX PAL_LINE(GPIOG, 14U) - #define LINE_OSC_IN PAL_LINE(GPIOH, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -1817,6 +1827,9 @@ PIN_AFIO_AF(GPIOK_PIN14, 0U) | \ PIN_AFIO_AF(GPIOK_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_NUCLEO144_F412ZG/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO144_F412ZG/cfg/board.chcfg index 181486f8a..3736200ea 100644 --- a/os/hal/boards/ST_NUCLEO144_F412ZG/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO144_F412ZG/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f4xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32 Nucleo144-F412ZG ST_NUCLEO144_F412ZG diff --git a/os/hal/boards/ST_NUCLEO144_F412ZG/cfg/board.fmpp b/os/hal/boards/ST_NUCLEO144_F412ZG/cfg/board.fmpp new file mode 100644 index 000000000..41754c141 --- /dev/null +++ b/os/hal/boards/ST_NUCLEO144_F412ZG/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f4xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_NUCLEO144_F429ZI/board.c b/os/hal/boards/ST_NUCLEO144_F429ZI/board.c index 65b74d0c6..5ee0873d7 100644 --- a/os/hal/boards/ST_NUCLEO144_F429ZI/board.c +++ b/os/hal/boards/ST_NUCLEO144_F429ZI/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -73,15 +135,81 @@ const PALConfig pal_default_config = { VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB1(STM32_GPIO_EN_MASK); + rccEnableAHB1(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); #endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -134,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_NUCLEO144_F429ZI/board.h b/os/hal/boards/ST_NUCLEO144_F429ZI/board.h index 0262cd4a6..7916c754f 100644 --- a/os/hal/boards/ST_NUCLEO144_F429ZI/board.h +++ b/os/hal/boards/ST_NUCLEO144_F429ZI/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32 Nucleo144-F429ZI board. */ @@ -353,7 +357,6 @@ #define LINE_SWCLK PAL_LINE(GPIOA, 14U) #define LINE_ZIO_D20 PAL_LINE(GPIOA, 15U) #define LINE_I2S3_WS PAL_LINE(GPIOA, 15U) - #define LINE_ZIO_D33 PAL_LINE(GPIOB, 0U) #define LINE_TIM3_CH3 PAL_LINE(GPIOB, 0U) #define LINE_LED1 PAL_LINE(GPIOB, 0U) @@ -384,7 +387,6 @@ #define LINE_LED3 PAL_LINE(GPIOB, 14U) #define LINE_ZIO_D17 PAL_LINE(GPIOB, 15U) #define LINE_I2S2_SD PAL_LINE(GPIOB, 15U) - #define LINE_ARD_A1 PAL_LINE(GPIOC, 0U) #define LINE_ADC123_IN10 PAL_LINE(GPIOC, 0U) #define LINE_RMII_MDC PAL_LINE(GPIOC, 1U) @@ -411,7 +413,6 @@ #define LINE_BUTTON PAL_LINE(GPIOC, 13U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) - #define LINE_ZIO_D67 PAL_LINE(GPIOD, 0U) #define LINE_CAN1_RX PAL_LINE(GPIOD, 0U) #define LINE_ZIO_D66 PAL_LINE(GPIOD, 1U) @@ -439,7 +440,6 @@ #define LINE_SPI1_NSS PAL_LINE(GPIOD, 14U) #define LINE_ARD_D9 PAL_LINE(GPIOD, 15U) #define LINE_TIM4_CH4 PAL_LINE(GPIOD, 15U) - #define LINE_ZIO_D34 PAL_LINE(GPIOE, 0U) #define LINE_TIM4_ETR PAL_LINE(GPIOE, 0U) #define LINE_ZIO_D31 PAL_LINE(GPIOE, 2U) @@ -470,7 +470,6 @@ #define LINE_ZIO_D38 PAL_LINE(GPIOE, 14U) #define LINE_ZIO_D37 PAL_LINE(GPIOE, 15U) #define LINE_TIM1_BKIN1 PAL_LINE(GPIOE, 15U) - #define LINE_ZIO_D68 PAL_LINE(GPIOF, 0U) #define LINE_I2C2_SDA PAL_LINE(GPIOF, 0U) #define LINE_ZIO_D69 PAL_LINE(GPIOF, 1U) @@ -495,7 +494,6 @@ #define LINE_ARD_D7 PAL_LINE(GPIOF, 13U) #define LINE_ARD_D4 PAL_LINE(GPIOF, 14U) #define LINE_ARD_D2 PAL_LINE(GPIOF, 15U) - #define LINE_ZIO_D65 PAL_LINE(GPIOG, 0U) #define LINE_ZIO_D64 PAL_LINE(GPIOG, 1U) #define LINE_ZIO_D49 PAL_LINE(GPIOG, 2U) @@ -508,12 +506,24 @@ #define LINE_RMII_TXD0 PAL_LINE(GPIOG, 13U) #define LINE_ARD_D1 PAL_LINE(GPIOG, 14U) #define LINE_USART6_TX PAL_LINE(GPIOG, 14U) - #define LINE_OSC_IN PAL_LINE(GPIOH, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -1824,6 +1834,9 @@ PIN_AFIO_AF(GPIOK_PIN14, 0U) | \ PIN_AFIO_AF(GPIOK_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_NUCLEO144_F429ZI/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO144_F429ZI/cfg/board.chcfg index 24b859d00..074a65790 100644 --- a/os/hal/boards/ST_NUCLEO144_F429ZI/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO144_F429ZI/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f4xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32 Nucleo144-F429ZI ST_NUCLEO144_F429ZI diff --git a/os/hal/boards/ST_NUCLEO144_F429ZI/cfg/board.fmpp b/os/hal/boards/ST_NUCLEO144_F429ZI/cfg/board.fmpp new file mode 100644 index 000000000..41754c141 --- /dev/null +++ b/os/hal/boards/ST_NUCLEO144_F429ZI/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f4xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_NUCLEO144_F446ZE/board.c b/os/hal/boards/ST_NUCLEO144_F446ZE/board.c index 65b74d0c6..5ee0873d7 100644 --- a/os/hal/boards/ST_NUCLEO144_F446ZE/board.c +++ b/os/hal/boards/ST_NUCLEO144_F446ZE/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -73,15 +135,81 @@ const PALConfig pal_default_config = { VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB1(STM32_GPIO_EN_MASK); + rccEnableAHB1(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); #endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -134,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_NUCLEO144_F446ZE/board.h b/os/hal/boards/ST_NUCLEO144_F446ZE/board.h index 9d453c12e..9cbff7303 100644 --- a/os/hal/boards/ST_NUCLEO144_F446ZE/board.h +++ b/os/hal/boards/ST_NUCLEO144_F446ZE/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32 Nucleo144-F446ZE board. */ @@ -353,7 +357,6 @@ #define LINE_SWCLK PAL_LINE(GPIOA, 14U) #define LINE_ZIO_D20 PAL_LINE(GPIOA, 15U) #define LINE_I2S3_WS PAL_LINE(GPIOA, 15U) - #define LINE_ZIO_D33 PAL_LINE(GPIOB, 0U) #define LINE_TIM3_CH3 PAL_LINE(GPIOB, 0U) #define LINE_LED1 PAL_LINE(GPIOB, 0U) @@ -385,7 +388,6 @@ #define LINE_LED3 PAL_LINE(GPIOB, 14U) #define LINE_ZIO_D17 PAL_LINE(GPIOB, 15U) #define LINE_I2S2_SD PAL_LINE(GPIOB, 15U) - #define LINE_ARD_A1 PAL_LINE(GPIOC, 0U) #define LINE_ADC123_IN10 PAL_LINE(GPIOC, 0U) #define LINE_ZIO_A7 PAL_LINE(GPIOC, 2U) @@ -409,7 +411,6 @@ #define LINE_BUTTON PAL_LINE(GPIOC, 13U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) - #define LINE_ZIO_D67 PAL_LINE(GPIOD, 0U) #define LINE_CAN1_RX PAL_LINE(GPIOD, 0U) #define LINE_ZIO_D66 PAL_LINE(GPIOD, 1U) @@ -440,7 +441,6 @@ #define LINE_SPI1_NSS PAL_LINE(GPIOD, 14U) #define LINE_ARD_D9 PAL_LINE(GPIOD, 15U) #define LINE_TIM4_CH4 PAL_LINE(GPIOD, 15U) - #define LINE_ZIO_D34 PAL_LINE(GPIOE, 0U) #define LINE_TIM4_ETR PAL_LINE(GPIOE, 0U) #define LINE_ZIO_D31 PAL_LINE(GPIOE, 2U) @@ -471,7 +471,6 @@ #define LINE_ZIO_D38 PAL_LINE(GPIOE, 14U) #define LINE_ZIO_D37 PAL_LINE(GPIOE, 15U) #define LINE_TIM1_BKIN1 PAL_LINE(GPIOE, 15U) - #define LINE_ZIO_D68 PAL_LINE(GPIOF, 0U) #define LINE_I2C2_SDA PAL_LINE(GPIOF, 0U) #define LINE_ZIO_D69 PAL_LINE(GPIOF, 1U) @@ -496,7 +495,6 @@ #define LINE_ARD_D7 PAL_LINE(GPIOF, 13U) #define LINE_ARD_D4 PAL_LINE(GPIOF, 14U) #define LINE_ARD_D2 PAL_LINE(GPIOF, 15U) - #define LINE_ZIO_D65 PAL_LINE(GPIOG, 0U) #define LINE_ZIO_D64 PAL_LINE(GPIOG, 1U) #define LINE_ZIO_D49 PAL_LINE(GPIOG, 2U) @@ -507,12 +505,24 @@ #define LINE_USART6_RX PAL_LINE(GPIOG, 9U) #define LINE_ARD_D1 PAL_LINE(GPIOG, 14U) #define LINE_USART6_TX PAL_LINE(GPIOG, 14U) - #define LINE_OSC_IN PAL_LINE(GPIOH, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -1823,6 +1833,9 @@ PIN_AFIO_AF(GPIOK_PIN14, 0U) | \ PIN_AFIO_AF(GPIOK_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_NUCLEO144_F446ZE/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO144_F446ZE/cfg/board.chcfg index d980b31f5..2131dbbdc 100644 --- a/os/hal/boards/ST_NUCLEO144_F446ZE/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO144_F446ZE/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f4xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32 Nucleo144-F446ZE ST_NUCLEO144_F446ZE diff --git a/os/hal/boards/ST_NUCLEO144_F446ZE/cfg/board.fmpp b/os/hal/boards/ST_NUCLEO144_F446ZE/cfg/board.fmpp new file mode 100644 index 000000000..41754c141 --- /dev/null +++ b/os/hal/boards/ST_NUCLEO144_F446ZE/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f4xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_NUCLEO144_F746ZG/board.c b/os/hal/boards/ST_NUCLEO144_F746ZG/board.c index 65b74d0c6..5ee0873d7 100644 --- a/os/hal/boards/ST_NUCLEO144_F746ZG/board.c +++ b/os/hal/boards/ST_NUCLEO144_F746ZG/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -73,15 +135,81 @@ const PALConfig pal_default_config = { VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB1(STM32_GPIO_EN_MASK); + rccEnableAHB1(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); #endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -134,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_NUCLEO144_F746ZG/board.h b/os/hal/boards/ST_NUCLEO144_F746ZG/board.h index 388c98986..4e2c08b1a 100644 --- a/os/hal/boards/ST_NUCLEO144_F746ZG/board.h +++ b/os/hal/boards/ST_NUCLEO144_F746ZG/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32 Nucleo144-F746ZG board. */ @@ -359,7 +363,6 @@ #define LINE_SWCLK PAL_LINE(GPIOA, 14U) #define LINE_ZIO_D20 PAL_LINE(GPIOA, 15U) #define LINE_I2S3_WS PAL_LINE(GPIOA, 15U) - #define LINE_ZIO_D33 PAL_LINE(GPIOB, 0U) #define LINE_TIM3_CH3 PAL_LINE(GPIOB, 0U) #define LINE_LED1 PAL_LINE(GPIOB, 0U) @@ -392,7 +395,6 @@ #define LINE_LED3 PAL_LINE(GPIOB, 14U) #define LINE_ZIO_D17 PAL_LINE(GPIOB, 15U) #define LINE_I2S2_SD PAL_LINE(GPIOB, 15U) - #define LINE_ARD_A1 PAL_LINE(GPIOC, 0U) #define LINE_ADC123_IN10 PAL_LINE(GPIOC, 0U) #define LINE_RMII_MDC PAL_LINE(GPIOC, 1U) @@ -419,7 +421,6 @@ #define LINE_BUTTON PAL_LINE(GPIOC, 13U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) - #define LINE_ZIO_D67 PAL_LINE(GPIOD, 0U) #define LINE_CAN1_RX PAL_LINE(GPIOD, 0U) #define LINE_ZIO_D66 PAL_LINE(GPIOD, 1U) @@ -450,7 +451,6 @@ #define LINE_SPI1_NSS PAL_LINE(GPIOD, 14U) #define LINE_ARD_D9 PAL_LINE(GPIOD, 15U) #define LINE_TIM4_CH4 PAL_LINE(GPIOD, 15U) - #define LINE_ZIO_D34 PAL_LINE(GPIOE, 0U) #define LINE_TIM4_ETR PAL_LINE(GPIOE, 0U) #define LINE_ZIO_D31 PAL_LINE(GPIOE, 2U) @@ -481,7 +481,6 @@ #define LINE_ZIO_D38 PAL_LINE(GPIOE, 14U) #define LINE_ZIO_D37 PAL_LINE(GPIOE, 15U) #define LINE_TIM1_BKIN1 PAL_LINE(GPIOE, 15U) - #define LINE_ZIO_D68 PAL_LINE(GPIOF, 0U) #define LINE_I2C2_SDA PAL_LINE(GPIOF, 0U) #define LINE_ZIO_D69 PAL_LINE(GPIOF, 1U) @@ -506,7 +505,6 @@ #define LINE_ARD_D7 PAL_LINE(GPIOF, 13U) #define LINE_ARD_D4 PAL_LINE(GPIOF, 14U) #define LINE_ARD_D2 PAL_LINE(GPIOF, 15U) - #define LINE_ZIO_D65 PAL_LINE(GPIOG, 0U) #define LINE_ZIO_D64 PAL_LINE(GPIOG, 1U) #define LINE_ZIO_D49 PAL_LINE(GPIOG, 2U) @@ -519,12 +517,24 @@ #define LINE_RMII_TXD0 PAL_LINE(GPIOG, 13U) #define LINE_ARD_D1 PAL_LINE(GPIOG, 14U) #define LINE_USART6_TX PAL_LINE(GPIOG, 14U) - #define LINE_OSC_IN PAL_LINE(GPIOH, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -1835,6 +1845,9 @@ PIN_AFIO_AF(GPIOK_PIN14, 0U) | \ PIN_AFIO_AF(GPIOK_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_NUCLEO144_F746ZG/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO144_F746ZG/cfg/board.chcfg index 906be3df2..8472fb089 100644 --- a/os/hal/boards/ST_NUCLEO144_F746ZG/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO144_F746ZG/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f7xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32 Nucleo144-F746ZG ST_NUCLEO144_F746ZG diff --git a/os/hal/boards/ST_NUCLEO144_F746ZG/cfg/board.fmpp b/os/hal/boards/ST_NUCLEO144_F746ZG/cfg/board.fmpp new file mode 100644 index 000000000..ded6d509f --- /dev/null +++ b/os/hal/boards/ST_NUCLEO144_F746ZG/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f7xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_NUCLEO144_F767ZI/board.c b/os/hal/boards/ST_NUCLEO144_F767ZI/board.c index 65b74d0c6..5ee0873d7 100644 --- a/os/hal/boards/ST_NUCLEO144_F767ZI/board.c +++ b/os/hal/boards/ST_NUCLEO144_F767ZI/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -73,15 +135,81 @@ const PALConfig pal_default_config = { VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB1(STM32_GPIO_EN_MASK); + rccEnableAHB1(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); #endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -134,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_NUCLEO144_F767ZI/board.h b/os/hal/boards/ST_NUCLEO144_F767ZI/board.h index deeff5e3b..4b8477b25 100644 --- a/os/hal/boards/ST_NUCLEO144_F767ZI/board.h +++ b/os/hal/boards/ST_NUCLEO144_F767ZI/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32 Nucleo144-F767ZI board. */ @@ -359,7 +363,6 @@ #define LINE_SWCLK PAL_LINE(GPIOA, 14U) #define LINE_ZIO_D20 PAL_LINE(GPIOA, 15U) #define LINE_I2S3_WS PAL_LINE(GPIOA, 15U) - #define LINE_ZIO_D33 PAL_LINE(GPIOB, 0U) #define LINE_TIM3_CH3 PAL_LINE(GPIOB, 0U) #define LINE_LED1 PAL_LINE(GPIOB, 0U) @@ -392,7 +395,6 @@ #define LINE_LED3 PAL_LINE(GPIOB, 14U) #define LINE_ZIO_D17 PAL_LINE(GPIOB, 15U) #define LINE_I2S2_SD PAL_LINE(GPIOB, 15U) - #define LINE_ARD_A1 PAL_LINE(GPIOC, 0U) #define LINE_ADC123_IN10 PAL_LINE(GPIOC, 0U) #define LINE_RMII_MDC PAL_LINE(GPIOC, 1U) @@ -419,7 +421,6 @@ #define LINE_BUTTON PAL_LINE(GPIOC, 13U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) - #define LINE_ZIO_D67 PAL_LINE(GPIOD, 0U) #define LINE_CAN1_RX PAL_LINE(GPIOD, 0U) #define LINE_ZIO_D66 PAL_LINE(GPIOD, 1U) @@ -450,7 +451,6 @@ #define LINE_SPI1_NSS PAL_LINE(GPIOD, 14U) #define LINE_ARD_D9 PAL_LINE(GPIOD, 15U) #define LINE_TIM4_CH4 PAL_LINE(GPIOD, 15U) - #define LINE_ZIO_D34 PAL_LINE(GPIOE, 0U) #define LINE_TIM4_ETR PAL_LINE(GPIOE, 0U) #define LINE_ZIO_D31 PAL_LINE(GPIOE, 2U) @@ -481,7 +481,6 @@ #define LINE_ZIO_D38 PAL_LINE(GPIOE, 14U) #define LINE_ZIO_D37 PAL_LINE(GPIOE, 15U) #define LINE_TIM1_BKIN1 PAL_LINE(GPIOE, 15U) - #define LINE_ZIO_D68 PAL_LINE(GPIOF, 0U) #define LINE_I2C2_SDA PAL_LINE(GPIOF, 0U) #define LINE_ZIO_D69 PAL_LINE(GPIOF, 1U) @@ -506,7 +505,6 @@ #define LINE_ARD_D7 PAL_LINE(GPIOF, 13U) #define LINE_ARD_D4 PAL_LINE(GPIOF, 14U) #define LINE_ARD_D2 PAL_LINE(GPIOF, 15U) - #define LINE_ZIO_D65 PAL_LINE(GPIOG, 0U) #define LINE_ZIO_D64 PAL_LINE(GPIOG, 1U) #define LINE_ZIO_D49 PAL_LINE(GPIOG, 2U) @@ -519,12 +517,24 @@ #define LINE_RMII_TXD0 PAL_LINE(GPIOG, 13U) #define LINE_ARD_D1 PAL_LINE(GPIOG, 14U) #define LINE_USART6_TX PAL_LINE(GPIOG, 14U) - #define LINE_OSC_IN PAL_LINE(GPIOH, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -1835,6 +1845,9 @@ PIN_AFIO_AF(GPIOK_PIN14, 0U) | \ PIN_AFIO_AF(GPIOK_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_NUCLEO144_F767ZI/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO144_F767ZI/cfg/board.chcfg index 9587d60fc..336757ec1 100644 --- a/os/hal/boards/ST_NUCLEO144_F767ZI/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO144_F767ZI/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f7xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32 Nucleo144-F767ZI ST_NUCLEO144_F767ZI diff --git a/os/hal/boards/ST_NUCLEO144_F767ZI/cfg/board.fmpp b/os/hal/boards/ST_NUCLEO144_F767ZI/cfg/board.fmpp new file mode 100644 index 000000000..ded6d509f --- /dev/null +++ b/os/hal/boards/ST_NUCLEO144_F767ZI/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f7xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_NUCLEO32_F031K6/board.c b/os/hal/boards/ST_NUCLEO32_F031K6/board.c index 92f2d10ef..3c291169d 100644 --- a/os/hal/boards/ST_NUCLEO32_F031K6/board.c +++ b/os/hal/boards/ST_NUCLEO32_F031K6/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief Type of STM32 GPIO port setup. */ -const PALConfig pal_default_config = { +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; + +/** + * @brief STM32 GPIO static initialization data. + */ +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -62,21 +124,117 @@ const PALConfig pal_default_config = { #endif #if STM32_HAS_GPIOI {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, - VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} + VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, +#endif +#if STM32_HAS_GPIOJ + {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, + VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, +#endif +#if STM32_HAS_GPIOK + {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, + VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB(STM32_GPIO_EN_MASK); + rccEnableAHB(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); #endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); +#endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } +#if HAL_USE_SDC || defined(__DOXYGEN__) +/** + * @brief SDC card detection. + */ +bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { + + (void)sdcp; + /* TODO: Fill the implementation.*/ + return true; +} + +/** + * @brief SDC card write protection detection. + */ +bool sdc_lld_is_write_protected(SDCDriver *sdcp) { + + (void)sdcp; + /* TODO: Fill the implementation.*/ + return false; +} +#endif /* HAL_USE_SDC */ + #if HAL_USE_MMC_SPI || defined(__DOXYGEN__) /** * @brief MMC_SPI card detection. @@ -104,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_NUCLEO32_F031K6/board.h b/os/hal/boards/ST_NUCLEO32_F031K6/board.h index c3cd3a49d..8ed19eb76 100644 --- a/os/hal/boards/ST_NUCLEO32_F031K6/board.h +++ b/os/hal/boards/ST_NUCLEO32_F031K6/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32 Nucleo32-F031K6 board. */ @@ -179,7 +183,6 @@ #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) #define LINE_VCP_RX PAL_LINE(GPIOA, 15U) - #define LINE_ARD_D3 PAL_LINE(GPIOB, 0U) #define LINE_ARD_D6 PAL_LINE(GPIOB, 1U) #define LINE_ARD_D13 PAL_LINE(GPIOB, 3U) @@ -190,12 +193,24 @@ #define LINE_ARD_A5_ALT PAL_LINE(GPIOB, 6U) #define LINE_ARD_D4 PAL_LINE(GPIOB, 7U) #define LINE_ARD_A4_ALT PAL_LINE(GPIOB, 7U) +#define LINE_ARD_D7 PAL_LINE(GPIOF, 0U) +#define LINE_ARD_D8 PAL_LINE(GPIOF, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ -#define LINE_ARD_D7 PAL_LINE(GPIOF, 0U) -#define LINE_ARD_D8 PAL_LINE(GPIOF, 1U) +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -921,6 +936,9 @@ PIN_AFIO_AF(GPIOF_PIN14, 0U) | \ PIN_AFIO_AF(GPIOF_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_NUCLEO32_F031K6/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO32_F031K6/cfg/board.chcfg index a31562edb..937718bda 100644 --- a/os/hal/boards/ST_NUCLEO32_F031K6/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO32_F031K6/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f0xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32 Nucleo32-F031K6 ST_NUCLEO32_F031K6 diff --git a/os/hal/boards/ST_NUCLEO32_F031K6/cfg/board.fmpp b/os/hal/boards/ST_NUCLEO32_F031K6/cfg/board.fmpp new file mode 100644 index 000000000..55cd396e4 --- /dev/null +++ b/os/hal/boards/ST_NUCLEO32_F031K6/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f0xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_NUCLEO32_F042K6/board.c b/os/hal/boards/ST_NUCLEO32_F042K6/board.c index 92f2d10ef..3c291169d 100644 --- a/os/hal/boards/ST_NUCLEO32_F042K6/board.c +++ b/os/hal/boards/ST_NUCLEO32_F042K6/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief Type of STM32 GPIO port setup. */ -const PALConfig pal_default_config = { +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; + +/** + * @brief STM32 GPIO static initialization data. + */ +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -62,21 +124,117 @@ const PALConfig pal_default_config = { #endif #if STM32_HAS_GPIOI {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, - VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} + VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, +#endif +#if STM32_HAS_GPIOJ + {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, + VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, +#endif +#if STM32_HAS_GPIOK + {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, + VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB(STM32_GPIO_EN_MASK); + rccEnableAHB(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); #endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); +#endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } +#if HAL_USE_SDC || defined(__DOXYGEN__) +/** + * @brief SDC card detection. + */ +bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { + + (void)sdcp; + /* TODO: Fill the implementation.*/ + return true; +} + +/** + * @brief SDC card write protection detection. + */ +bool sdc_lld_is_write_protected(SDCDriver *sdcp) { + + (void)sdcp; + /* TODO: Fill the implementation.*/ + return false; +} +#endif /* HAL_USE_SDC */ + #if HAL_USE_MMC_SPI || defined(__DOXYGEN__) /** * @brief MMC_SPI card detection. @@ -104,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_NUCLEO32_F042K6/board.h b/os/hal/boards/ST_NUCLEO32_F042K6/board.h index 967c0f727..1a618f736 100644 --- a/os/hal/boards/ST_NUCLEO32_F042K6/board.h +++ b/os/hal/boards/ST_NUCLEO32_F042K6/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32 Nucleo32-F042K6 board. */ @@ -179,7 +183,6 @@ #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) #define LINE_VCP_RX PAL_LINE(GPIOA, 15U) - #define LINE_ARD_D3 PAL_LINE(GPIOB, 0U) #define LINE_ARD_D6 PAL_LINE(GPIOB, 1U) #define LINE_ARD_D13 PAL_LINE(GPIOB, 3U) @@ -190,12 +193,24 @@ #define LINE_ARD_A5_ALT PAL_LINE(GPIOB, 6U) #define LINE_ARD_D4 PAL_LINE(GPIOB, 7U) #define LINE_ARD_A4_ALT PAL_LINE(GPIOB, 7U) +#define LINE_ARD_D7 PAL_LINE(GPIOF, 0U) +#define LINE_ARD_D8 PAL_LINE(GPIOF, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ -#define LINE_ARD_D7 PAL_LINE(GPIOF, 0U) -#define LINE_ARD_D8 PAL_LINE(GPIOF, 1U) +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -921,6 +936,9 @@ PIN_AFIO_AF(GPIOF_PIN14, 0U) | \ PIN_AFIO_AF(GPIOF_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_NUCLEO32_F042K6/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO32_F042K6/cfg/board.chcfg index b5e2e230b..ecf8e2ecb 100644 --- a/os/hal/boards/ST_NUCLEO32_F042K6/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO32_F042K6/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f0xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32 Nucleo32-F042K6 ST_NUCLEO32_F042K6 diff --git a/os/hal/boards/ST_NUCLEO32_F042K6/cfg/board.fmpp b/os/hal/boards/ST_NUCLEO32_F042K6/cfg/board.fmpp new file mode 100644 index 000000000..55cd396e4 --- /dev/null +++ b/os/hal/boards/ST_NUCLEO32_F042K6/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f0xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_NUCLEO32_F303K8/board.c b/os/hal/boards/ST_NUCLEO32_F303K8/board.c index 52b14f7e2..3c291169d 100644 --- a/os/hal/boards/ST_NUCLEO32_F303K8/board.c +++ b/os/hal/boards/ST_NUCLEO32_F303K8/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -62,18 +124,92 @@ const PALConfig pal_default_config = { #endif #if STM32_HAS_GPIOI {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, - VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} + VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, +#endif +#if STM32_HAS_GPIOJ + {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, + VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, +#endif +#if STM32_HAS_GPIOK + {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, + VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB(STM32_GPIO_EN_MASK); + rccEnableAHB(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); #endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); +#endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -126,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_NUCLEO32_F303K8/board.h b/os/hal/boards/ST_NUCLEO32_F303K8/board.h index d27bff78d..89e5aa100 100644 --- a/os/hal/boards/ST_NUCLEO32_F303K8/board.h +++ b/os/hal/boards/ST_NUCLEO32_F303K8/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32 Nucleo32-F303K8 board. */ @@ -213,7 +217,6 @@ #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) #define LINE_VCP_RX PAL_LINE(GPIOA, 15U) - #define LINE_ARD_D3 PAL_LINE(GPIOB, 0U) #define LINE_ARD_D6 PAL_LINE(GPIOB, 1U) #define LINE_ARD_D13 PAL_LINE(GPIOB, 3U) @@ -224,14 +227,24 @@ #define LINE_ARD_A5_ALT PAL_LINE(GPIOB, 6U) #define LINE_ARD_D4 PAL_LINE(GPIOB, 7U) #define LINE_ARD_A4_ALT PAL_LINE(GPIOB, 7U) - - - - #define LINE_ARD_D7 PAL_LINE(GPIOF, 0U) #define LINE_ARD_D8 PAL_LINE(GPIOF, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -1191,6 +1204,9 @@ PIN_AFIO_AF(GPIOH_PIN14, 0U) | \ PIN_AFIO_AF(GPIOH_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_NUCLEO32_F303K8/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO32_F303K8/cfg/board.chcfg index c32060192..7aeed6d81 100644 --- a/os/hal/boards/ST_NUCLEO32_F303K8/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO32_F303K8/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f3xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32 Nucleo32-F303K8 ST_NUCLEO32_F303K8 diff --git a/os/hal/boards/ST_NUCLEO32_F303K8/cfg/board.fmpp b/os/hal/boards/ST_NUCLEO32_F303K8/cfg/board.fmpp new file mode 100644 index 000000000..6967f302d --- /dev/null +++ b/os/hal/boards/ST_NUCLEO32_F303K8/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f3xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_NUCLEO32_L011K4/board.c b/os/hal/boards/ST_NUCLEO32_L011K4/board.c index 52b14f7e2..15c4d29a8 100644 --- a/os/hal/boards/ST_NUCLEO32_L011K4/board.c +++ b/os/hal/boards/ST_NUCLEO32_L011K4/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -62,18 +124,92 @@ const PALConfig pal_default_config = { #endif #if STM32_HAS_GPIOI {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, - VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} + VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, +#endif +#if STM32_HAS_GPIOJ + {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, + VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, +#endif +#if STM32_HAS_GPIOK + {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, + VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetIOP(STM32_GPIO_EN_MASK); + rccEnableIOP(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); #endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); +#endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -126,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_NUCLEO32_L011K4/board.h b/os/hal/boards/ST_NUCLEO32_L011K4/board.h index e4283dbd6..661bc51f8 100644 --- a/os/hal/boards/ST_NUCLEO32_L011K4/board.h +++ b/os/hal/boards/ST_NUCLEO32_L011K4/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32 Nucleo32-L011K4 board. */ @@ -179,7 +183,6 @@ #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) #define LINE_VCP_RX PAL_LINE(GPIOA, 15U) - #define LINE_ARD_D3 PAL_LINE(GPIOB, 0U) #define LINE_ARD_D6 PAL_LINE(GPIOB, 1U) #define LINE_ARD_D13 PAL_LINE(GPIOB, 3U) @@ -190,12 +193,24 @@ #define LINE_ARD_A5_ALT PAL_LINE(GPIOB, 6U) #define LINE_ARD_D4 PAL_LINE(GPIOB, 7U) #define LINE_ARD_A4_ALT PAL_LINE(GPIOB, 7U) +#define LINE_ARD_D7 PAL_LINE(GPIOF, 0U) +#define LINE_ARD_D8 PAL_LINE(GPIOF, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ -#define LINE_ARD_D7 PAL_LINE(GPIOF, 0U) -#define LINE_ARD_D8 PAL_LINE(GPIOF, 1U) +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -921,6 +936,9 @@ PIN_AFIO_AF(GPIOF_PIN14, 0U) | \ PIN_AFIO_AF(GPIOF_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_NUCLEO32_L011K4/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO32_L011K4/cfg/board.chcfg index 6dc5d2e2b..332aae967 100644 --- a/os/hal/boards/ST_NUCLEO32_L011K4/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO32_L011K4/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32l0xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32 Nucleo32-L011K4 ST_NUCLEO32_L011K4 diff --git a/os/hal/boards/ST_NUCLEO32_L011K4/cfg/board.fmpp b/os/hal/boards/ST_NUCLEO32_L011K4/cfg/board.fmpp new file mode 100644 index 000000000..b3ba947fb --- /dev/null +++ b/os/hal/boards/ST_NUCLEO32_L011K4/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32l0xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_NUCLEO32_L031K6/board.c b/os/hal/boards/ST_NUCLEO32_L031K6/board.c index 52b14f7e2..15c4d29a8 100644 --- a/os/hal/boards/ST_NUCLEO32_L031K6/board.c +++ b/os/hal/boards/ST_NUCLEO32_L031K6/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -62,18 +124,92 @@ const PALConfig pal_default_config = { #endif #if STM32_HAS_GPIOI {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, - VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} + VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, +#endif +#if STM32_HAS_GPIOJ + {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, + VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, +#endif +#if STM32_HAS_GPIOK + {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, + VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetIOP(STM32_GPIO_EN_MASK); + rccEnableIOP(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); #endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); +#endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -126,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_NUCLEO32_L031K6/board.h b/os/hal/boards/ST_NUCLEO32_L031K6/board.h index fd3c2bfa7..e334266ba 100644 --- a/os/hal/boards/ST_NUCLEO32_L031K6/board.h +++ b/os/hal/boards/ST_NUCLEO32_L031K6/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32 Nucleo32-L031K6 board. */ @@ -196,7 +200,6 @@ #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) #define LINE_VCP_RX PAL_LINE(GPIOA, 15U) - #define LINE_ARD_D3 PAL_LINE(GPIOB, 0U) #define LINE_ARD_D6 PAL_LINE(GPIOB, 1U) #define LINE_ARD_D13 PAL_LINE(GPIOB, 3U) @@ -207,16 +210,27 @@ #define LINE_ARD_A5_ALT PAL_LINE(GPIOB, 6U) #define LINE_ARD_D4 PAL_LINE(GPIOB, 7U) #define LINE_ARD_A4_ALT PAL_LINE(GPIOB, 7U) - - - - #define LINE_ARD_D7 PAL_LINE(GPIOF, 0U) #define LINE_ARD_D8 PAL_LINE(GPIOF, 1U) - #define LINE_OSC_IN PAL_LINE(GPIOH, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + /* * I/O ports initial setup, this configuration is established soon after reset * in the initialization code. @@ -1058,6 +1072,9 @@ PIN_AFIO_AF(GPIOH_PIN14, 0U) | \ PIN_AFIO_AF(GPIOH_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_NUCLEO32_L031K6/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO32_L031K6/cfg/board.chcfg index 0a0e4ab89..3b77b2cd9 100644 --- a/os/hal/boards/ST_NUCLEO32_L031K6/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO32_L031K6/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32l0xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32 Nucleo32-L031K6 ST_NUCLEO32_L031K6 diff --git a/os/hal/boards/ST_NUCLEO32_L031K6/cfg/board.fmpp b/os/hal/boards/ST_NUCLEO32_L031K6/cfg/board.fmpp new file mode 100644 index 000000000..b3ba947fb --- /dev/null +++ b/os/hal/boards/ST_NUCLEO32_L031K6/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32l0xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_NUCLEO32_L432KC/board.c b/os/hal/boards/ST_NUCLEO32_L432KC/board.c index f0ccf6c22..177ec13c8 100644 --- a/os/hal/boards/ST_NUCLEO32_L432KC/board.c +++ b/os/hal/boards/ST_NUCLEO32_L432KC/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,78 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; + uint32_t ascr; + uint32_t lockr; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH, VAL_GPIOA_ASCR, @@ -68,16 +132,99 @@ const PALConfig pal_default_config = { VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH, VAL_GPIOH_ASCR, VAL_GPIOH_LOCKR}, #endif +#if STM32_HAS_GPIOI + {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, + VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH, VAL_GPIOI_ASCR, + VAL_GPIOI_LOCKR}, +#endif +#if STM32_HAS_GPIOJ + {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, + VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH, VAL_GPIOJ_ASCR, + VAL_GPIOJ_LOCKR}, +#endif +#if STM32_HAS_GPIOK + {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, + VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH, VAL_GPIOK_ASCR, + VAL_GPIOK_LOCKR} +#endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->ASCR = config->ascr; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; + gpiop->LOCKR = config->lockr; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB2(STM32_GPIO_EN_MASK); + rccEnableAHB2(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); #endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); +#endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -130,4 +277,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_NUCLEO32_L432KC/board.h b/os/hal/boards/ST_NUCLEO32_L432KC/board.h index 6af9c09a3..aee482f3a 100644 --- a/os/hal/boards/ST_NUCLEO32_L432KC/board.h +++ b/os/hal/boards/ST_NUCLEO32_L432KC/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32 Nucleo32-L432KC board. */ @@ -231,6 +235,22 @@ #define LINE_ARD_D7 PAL_LINE(GPIOC, 14U) #define LINE_ARD_D8 PAL_LINE(GPIOC, 15U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + /* * I/O ports initial setup, this configuration is established soon after reset * in the initialization code. @@ -1449,6 +1469,9 @@ PIN_LOCKR_DISABLED(GPIOH_PIN14) | \ PIN_LOCKR_DISABLED(GPIOH_PIN15)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_NUCLEO32_L432KC/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO32_L432KC/cfg/board.chcfg index e74a4f84a..f30dfa2d0 100644 --- a/os/hal/boards/ST_NUCLEO32_L432KC/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO32_L432KC/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32l4xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32 Nucleo32-L432KC ST_NUCLEO32_L432KC diff --git a/os/hal/boards/ST_NUCLEO32_L432KC/cfg/board.fmpp b/os/hal/boards/ST_NUCLEO32_L432KC/cfg/board.fmpp new file mode 100644 index 000000000..3c311d3e9 --- /dev/null +++ b/os/hal/boards/ST_NUCLEO32_L432KC/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32l4xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_NUCLEO64_F030R8/board.c b/os/hal/boards/ST_NUCLEO64_F030R8/board.c index 92f2d10ef..3c291169d 100644 --- a/os/hal/boards/ST_NUCLEO64_F030R8/board.c +++ b/os/hal/boards/ST_NUCLEO64_F030R8/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief Type of STM32 GPIO port setup. */ -const PALConfig pal_default_config = { +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; + +/** + * @brief STM32 GPIO static initialization data. + */ +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -62,21 +124,117 @@ const PALConfig pal_default_config = { #endif #if STM32_HAS_GPIOI {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, - VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} + VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, +#endif +#if STM32_HAS_GPIOJ + {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, + VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, +#endif +#if STM32_HAS_GPIOK + {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, + VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB(STM32_GPIO_EN_MASK); + rccEnableAHB(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); #endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); +#endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } +#if HAL_USE_SDC || defined(__DOXYGEN__) +/** + * @brief SDC card detection. + */ +bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { + + (void)sdcp; + /* TODO: Fill the implementation.*/ + return true; +} + +/** + * @brief SDC card write protection detection. + */ +bool sdc_lld_is_write_protected(SDCDriver *sdcp) { + + (void)sdcp; + /* TODO: Fill the implementation.*/ + return false; +} +#endif /* HAL_USE_SDC */ + #if HAL_USE_MMC_SPI || defined(__DOXYGEN__) /** * @brief MMC_SPI card detection. @@ -104,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_NUCLEO64_F030R8/board.h b/os/hal/boards/ST_NUCLEO64_F030R8/board.h index 55f72171f..b9c72f19a 100644 --- a/os/hal/boards/ST_NUCLEO64_F030R8/board.h +++ b/os/hal/boards/ST_NUCLEO64_F030R8/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32 Nucleo64-F030R8 board. */ @@ -173,7 +177,6 @@ #define LINE_ARD_D2 PAL_LINE(GPIOA, 10U) #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) - #define LINE_ARD_A3 PAL_LINE(GPIOB, 0U) #define LINE_ADC1_IN8 PAL_LINE(GPIOB, 0U) #define LINE_SWO PAL_LINE(GPIOB, 3U) @@ -184,7 +187,6 @@ #define LINE_ARD_D15 PAL_LINE(GPIOB, 8U) #define LINE_ARD_D14 PAL_LINE(GPIOB, 9U) #define LINE_ARD_D6 PAL_LINE(GPIOB, 10U) - #define LINE_ARD_A5 PAL_LINE(GPIOC, 0U) #define LINE_ADC1_IN11 PAL_LINE(GPIOC, 0U) #define LINE_ARD_A4 PAL_LINE(GPIOC, 1U) @@ -193,11 +195,25 @@ #define LINE_BUTTON PAL_LINE(GPIOC, 13U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) - - #define LINE_OSC_IN PAL_LINE(GPIOF, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOF, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + /* * I/O ports initial setup, this configuration is established soon after reset * in the initialization code. @@ -805,6 +821,9 @@ PIN_AFIO_AF(GPIOF_PIN14, 0U) | \ PIN_AFIO_AF(GPIOF_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_NUCLEO64_F030R8/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO64_F030R8/cfg/board.chcfg index a058ffc3e..e6f0d6ab9 100644 --- a/os/hal/boards/ST_NUCLEO64_F030R8/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO64_F030R8/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f0xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32 Nucleo64-F030R8 ST_NUCLEO64_F030R8 diff --git a/os/hal/boards/ST_NUCLEO64_F030R8/cfg/board.fmpp b/os/hal/boards/ST_NUCLEO64_F030R8/cfg/board.fmpp new file mode 100644 index 000000000..55cd396e4 --- /dev/null +++ b/os/hal/boards/ST_NUCLEO64_F030R8/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f0xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_NUCLEO64_F070RB/board.c b/os/hal/boards/ST_NUCLEO64_F070RB/board.c index 92f2d10ef..3c291169d 100644 --- a/os/hal/boards/ST_NUCLEO64_F070RB/board.c +++ b/os/hal/boards/ST_NUCLEO64_F070RB/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief Type of STM32 GPIO port setup. */ -const PALConfig pal_default_config = { +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; + +/** + * @brief STM32 GPIO static initialization data. + */ +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -62,21 +124,117 @@ const PALConfig pal_default_config = { #endif #if STM32_HAS_GPIOI {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, - VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} + VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, +#endif +#if STM32_HAS_GPIOJ + {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, + VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, +#endif +#if STM32_HAS_GPIOK + {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, + VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB(STM32_GPIO_EN_MASK); + rccEnableAHB(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); #endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); +#endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } +#if HAL_USE_SDC || defined(__DOXYGEN__) +/** + * @brief SDC card detection. + */ +bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { + + (void)sdcp; + /* TODO: Fill the implementation.*/ + return true; +} + +/** + * @brief SDC card write protection detection. + */ +bool sdc_lld_is_write_protected(SDCDriver *sdcp) { + + (void)sdcp; + /* TODO: Fill the implementation.*/ + return false; +} +#endif /* HAL_USE_SDC */ + #if HAL_USE_MMC_SPI || defined(__DOXYGEN__) /** * @brief MMC_SPI card detection. @@ -104,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_NUCLEO64_F070RB/board.h b/os/hal/boards/ST_NUCLEO64_F070RB/board.h index 84ba993f1..5bf868f4e 100644 --- a/os/hal/boards/ST_NUCLEO64_F070RB/board.h +++ b/os/hal/boards/ST_NUCLEO64_F070RB/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32 Nucleo64-F070RB board. */ @@ -188,7 +192,6 @@ #define LINE_ARD_D2 PAL_LINE(GPIOA, 10U) #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) - #define LINE_ARD_A3 PAL_LINE(GPIOB, 0U) #define LINE_ADC1_IN8 PAL_LINE(GPIOB, 0U) #define LINE_SWO PAL_LINE(GPIOB, 3U) @@ -199,7 +202,6 @@ #define LINE_ARD_D15 PAL_LINE(GPIOB, 8U) #define LINE_ARD_D14 PAL_LINE(GPIOB, 9U) #define LINE_ARD_D6 PAL_LINE(GPIOB, 10U) - #define LINE_ARD_A5 PAL_LINE(GPIOC, 0U) #define LINE_ADC1_IN11 PAL_LINE(GPIOC, 0U) #define LINE_ARD_A4 PAL_LINE(GPIOC, 1U) @@ -208,11 +210,24 @@ #define LINE_BUTTON PAL_LINE(GPIOC, 13U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) +#define LINE_OSC_IN PAL_LINE(GPIOF, 0U) +#define LINE_OSC_OUT PAL_LINE(GPIOF, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ -#define LINE_OSC_IN PAL_LINE(GPIOF, 0U) -#define LINE_OSC_OUT PAL_LINE(GPIOF, 1U) +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -938,6 +953,9 @@ PIN_AFIO_AF(GPIOF_PIN14, 0U) | \ PIN_AFIO_AF(GPIOF_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_NUCLEO64_F070RB/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO64_F070RB/cfg/board.chcfg index 2ec985930..c1ccf0323 100644 --- a/os/hal/boards/ST_NUCLEO64_F070RB/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO64_F070RB/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f0xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32 Nucleo64-F070RB ST_NUCLEO64_F070RB diff --git a/os/hal/boards/ST_NUCLEO64_F070RB/cfg/board.fmpp b/os/hal/boards/ST_NUCLEO64_F070RB/cfg/board.fmpp new file mode 100644 index 000000000..55cd396e4 --- /dev/null +++ b/os/hal/boards/ST_NUCLEO64_F070RB/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f0xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_NUCLEO64_F072RB/board.c b/os/hal/boards/ST_NUCLEO64_F072RB/board.c index 92f2d10ef..3c291169d 100644 --- a/os/hal/boards/ST_NUCLEO64_F072RB/board.c +++ b/os/hal/boards/ST_NUCLEO64_F072RB/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief Type of STM32 GPIO port setup. */ -const PALConfig pal_default_config = { +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; + +/** + * @brief STM32 GPIO static initialization data. + */ +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -62,21 +124,117 @@ const PALConfig pal_default_config = { #endif #if STM32_HAS_GPIOI {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, - VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} + VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, +#endif +#if STM32_HAS_GPIOJ + {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, + VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, +#endif +#if STM32_HAS_GPIOK + {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, + VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB(STM32_GPIO_EN_MASK); + rccEnableAHB(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); #endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); +#endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } +#if HAL_USE_SDC || defined(__DOXYGEN__) +/** + * @brief SDC card detection. + */ +bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { + + (void)sdcp; + /* TODO: Fill the implementation.*/ + return true; +} + +/** + * @brief SDC card write protection detection. + */ +bool sdc_lld_is_write_protected(SDCDriver *sdcp) { + + (void)sdcp; + /* TODO: Fill the implementation.*/ + return false; +} +#endif /* HAL_USE_SDC */ + #if HAL_USE_MMC_SPI || defined(__DOXYGEN__) /** * @brief MMC_SPI card detection. @@ -104,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_NUCLEO64_F072RB/board.h b/os/hal/boards/ST_NUCLEO64_F072RB/board.h index ff470932e..9e54cca2f 100644 --- a/os/hal/boards/ST_NUCLEO64_F072RB/board.h +++ b/os/hal/boards/ST_NUCLEO64_F072RB/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32 Nucleo64-F072RB board. */ @@ -188,7 +192,6 @@ #define LINE_ARD_D2 PAL_LINE(GPIOA, 10U) #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) - #define LINE_ARD_A3 PAL_LINE(GPIOB, 0U) #define LINE_ADC1_IN8 PAL_LINE(GPIOB, 0U) #define LINE_SWO PAL_LINE(GPIOB, 3U) @@ -199,7 +202,6 @@ #define LINE_ARD_D15 PAL_LINE(GPIOB, 8U) #define LINE_ARD_D14 PAL_LINE(GPIOB, 9U) #define LINE_ARD_D6 PAL_LINE(GPIOB, 10U) - #define LINE_ARD_A5 PAL_LINE(GPIOC, 0U) #define LINE_ADC1_IN11 PAL_LINE(GPIOC, 0U) #define LINE_ARD_A4 PAL_LINE(GPIOC, 1U) @@ -208,11 +210,24 @@ #define LINE_BUTTON PAL_LINE(GPIOC, 13U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) +#define LINE_OSC_IN PAL_LINE(GPIOF, 0U) +#define LINE_OSC_OUT PAL_LINE(GPIOF, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ -#define LINE_OSC_IN PAL_LINE(GPIOF, 0U) -#define LINE_OSC_OUT PAL_LINE(GPIOF, 1U) +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -938,6 +953,9 @@ PIN_AFIO_AF(GPIOF_PIN14, 0U) | \ PIN_AFIO_AF(GPIOF_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_NUCLEO64_F072RB/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO64_F072RB/cfg/board.chcfg index 4bd4a0d31..49fb1282d 100644 --- a/os/hal/boards/ST_NUCLEO64_F072RB/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO64_F072RB/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f0xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32 Nucleo64-F072RB ST_NUCLEO64_F072RB diff --git a/os/hal/boards/ST_NUCLEO64_F072RB/cfg/board.fmpp b/os/hal/boards/ST_NUCLEO64_F072RB/cfg/board.fmpp new file mode 100644 index 000000000..55cd396e4 --- /dev/null +++ b/os/hal/boards/ST_NUCLEO64_F072RB/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f0xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_NUCLEO64_F091RC/board.c b/os/hal/boards/ST_NUCLEO64_F091RC/board.c index 92f2d10ef..3c291169d 100644 --- a/os/hal/boards/ST_NUCLEO64_F091RC/board.c +++ b/os/hal/boards/ST_NUCLEO64_F091RC/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief Type of STM32 GPIO port setup. */ -const PALConfig pal_default_config = { +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; + +/** + * @brief STM32 GPIO static initialization data. + */ +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -62,21 +124,117 @@ const PALConfig pal_default_config = { #endif #if STM32_HAS_GPIOI {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, - VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} + VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, +#endif +#if STM32_HAS_GPIOJ + {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, + VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, +#endif +#if STM32_HAS_GPIOK + {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, + VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB(STM32_GPIO_EN_MASK); + rccEnableAHB(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); #endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); +#endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } +#if HAL_USE_SDC || defined(__DOXYGEN__) +/** + * @brief SDC card detection. + */ +bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { + + (void)sdcp; + /* TODO: Fill the implementation.*/ + return true; +} + +/** + * @brief SDC card write protection detection. + */ +bool sdc_lld_is_write_protected(SDCDriver *sdcp) { + + (void)sdcp; + /* TODO: Fill the implementation.*/ + return false; +} +#endif /* HAL_USE_SDC */ + #if HAL_USE_MMC_SPI || defined(__DOXYGEN__) /** * @brief MMC_SPI card detection. @@ -104,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_NUCLEO64_F091RC/board.h b/os/hal/boards/ST_NUCLEO64_F091RC/board.h index ddc1b8f98..3f13fa955 100644 --- a/os/hal/boards/ST_NUCLEO64_F091RC/board.h +++ b/os/hal/boards/ST_NUCLEO64_F091RC/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32 Nucleo64-F091RC board. */ @@ -190,7 +194,6 @@ #define LINE_ARD_D2 PAL_LINE(GPIOA, 10U) #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) - #define LINE_ARD_A3 PAL_LINE(GPIOB, 0U) #define LINE_ADC1_IN8 PAL_LINE(GPIOB, 0U) #define LINE_SWO PAL_LINE(GPIOB, 3U) @@ -201,7 +204,6 @@ #define LINE_ARD_D15 PAL_LINE(GPIOB, 8U) #define LINE_ARD_D14 PAL_LINE(GPIOB, 9U) #define LINE_ARD_D6 PAL_LINE(GPIOB, 10U) - #define LINE_ARD_A5 PAL_LINE(GPIOC, 0U) #define LINE_ADC1_IN11 PAL_LINE(GPIOC, 0U) #define LINE_ARD_A4 PAL_LINE(GPIOC, 1U) @@ -210,11 +212,24 @@ #define LINE_BUTTON PAL_LINE(GPIOC, 13U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) +#define LINE_OSC_IN PAL_LINE(GPIOF, 0U) +#define LINE_OSC_OUT PAL_LINE(GPIOF, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ -#define LINE_OSC_IN PAL_LINE(GPIOF, 0U) -#define LINE_OSC_OUT PAL_LINE(GPIOF, 1U) +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -940,6 +955,9 @@ PIN_AFIO_AF(GPIOF_PIN14, 0U) | \ PIN_AFIO_AF(GPIOF_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_NUCLEO64_F091RC/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO64_F091RC/cfg/board.chcfg index 57fc41927..8a1531ee6 100644 --- a/os/hal/boards/ST_NUCLEO64_F091RC/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO64_F091RC/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f0xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32 Nucleo64-F091RC ST_NUCLEO64_F091RC diff --git a/os/hal/boards/ST_NUCLEO64_F091RC/cfg/board.fmpp b/os/hal/boards/ST_NUCLEO64_F091RC/cfg/board.fmpp new file mode 100644 index 000000000..55cd396e4 --- /dev/null +++ b/os/hal/boards/ST_NUCLEO64_F091RC/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f0xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_NUCLEO64_F302R8/board.c b/os/hal/boards/ST_NUCLEO64_F302R8/board.c index 52b14f7e2..3c291169d 100644 --- a/os/hal/boards/ST_NUCLEO64_F302R8/board.c +++ b/os/hal/boards/ST_NUCLEO64_F302R8/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -62,18 +124,92 @@ const PALConfig pal_default_config = { #endif #if STM32_HAS_GPIOI {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, - VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} + VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, +#endif +#if STM32_HAS_GPIOJ + {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, + VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, +#endif +#if STM32_HAS_GPIOK + {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, + VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB(STM32_GPIO_EN_MASK); + rccEnableAHB(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); #endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); +#endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -126,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_NUCLEO64_F302R8/board.h b/os/hal/boards/ST_NUCLEO64_F302R8/board.h index 9358c71f4..ceab90a72 100644 --- a/os/hal/boards/ST_NUCLEO64_F302R8/board.h +++ b/os/hal/boards/ST_NUCLEO64_F302R8/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32 Nucleo64-F302R8 board. */ @@ -222,7 +226,6 @@ #define LINE_ARD_D2 PAL_LINE(GPIOA, 10U) #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) - #define LINE_ARD_A3 PAL_LINE(GPIOB, 0U) #define LINE_ADC1_IN11 PAL_LINE(GPIOB, 0U) #define LINE_SWO PAL_LINE(GPIOB, 3U) @@ -234,7 +237,6 @@ #define LINE_ARD_D14 PAL_LINE(GPIOB, 9U) #define LINE_ARD_D6 PAL_LINE(GPIOB, 10U) #define LINE_LED_GREEN PAL_LINE(GPIOB, 13U) - #define LINE_ARD_A5 PAL_LINE(GPIOC, 0U) #define LINE_ADC1_IN6 PAL_LINE(GPIOC, 0U) #define LINE_ARD_A4 PAL_LINE(GPIOC, 1U) @@ -243,13 +245,24 @@ #define LINE_BUTTON PAL_LINE(GPIOC, 13U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) - - - #define LINE_OSC_IN PAL_LINE(GPIOF, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOF, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -1209,6 +1222,9 @@ PIN_AFIO_AF(GPIOH_PIN14, 0U) | \ PIN_AFIO_AF(GPIOH_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_NUCLEO64_F302R8/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO64_F302R8/cfg/board.chcfg index 17f7b10fb..17772d4d2 100644 --- a/os/hal/boards/ST_NUCLEO64_F302R8/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO64_F302R8/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f3xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32 Nucleo64-F302R8 ST_NUCLEO64_F302R8 diff --git a/os/hal/boards/ST_NUCLEO64_F302R8/cfg/board.fmpp b/os/hal/boards/ST_NUCLEO64_F302R8/cfg/board.fmpp new file mode 100644 index 000000000..6967f302d --- /dev/null +++ b/os/hal/boards/ST_NUCLEO64_F302R8/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f3xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_NUCLEO64_F303RE/board.c b/os/hal/boards/ST_NUCLEO64_F303RE/board.c index 52b14f7e2..3c291169d 100644 --- a/os/hal/boards/ST_NUCLEO64_F303RE/board.c +++ b/os/hal/boards/ST_NUCLEO64_F303RE/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -62,18 +124,92 @@ const PALConfig pal_default_config = { #endif #if STM32_HAS_GPIOI {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, - VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} + VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, +#endif +#if STM32_HAS_GPIOJ + {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, + VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, +#endif +#if STM32_HAS_GPIOK + {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, + VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB(STM32_GPIO_EN_MASK); + rccEnableAHB(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); #endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); +#endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -126,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_NUCLEO64_F303RE/board.h b/os/hal/boards/ST_NUCLEO64_F303RE/board.h index 9bb61d5a4..41c37bbbf 100644 --- a/os/hal/boards/ST_NUCLEO64_F303RE/board.h +++ b/os/hal/boards/ST_NUCLEO64_F303RE/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32 Nucleo64-F303RE board. */ @@ -224,7 +228,6 @@ #define LINE_ARD_D2 PAL_LINE(GPIOA, 10U) #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) - #define LINE_ARD_A3 PAL_LINE(GPIOB, 0U) #define LINE_ADC3_IN12 PAL_LINE(GPIOB, 0U) #define LINE_SWO PAL_LINE(GPIOB, 3U) @@ -235,7 +238,6 @@ #define LINE_ARD_D15 PAL_LINE(GPIOB, 8U) #define LINE_ARD_D14 PAL_LINE(GPIOB, 9U) #define LINE_ARD_D6 PAL_LINE(GPIOB, 10U) - #define LINE_ARD_A5 PAL_LINE(GPIOC, 0U) #define LINE_ADC12_IN6 PAL_LINE(GPIOC, 0U) #define LINE_ARD_A4 PAL_LINE(GPIOC, 1U) @@ -244,13 +246,24 @@ #define LINE_BUTTON PAL_LINE(GPIOC, 13U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) - - - #define LINE_OSC_IN PAL_LINE(GPIOF, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOF, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -1210,6 +1223,9 @@ PIN_AFIO_AF(GPIOH_PIN14, 0U) | \ PIN_AFIO_AF(GPIOH_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_NUCLEO64_F303RE/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO64_F303RE/cfg/board.chcfg index 6e56616bb..498d027cb 100644 --- a/os/hal/boards/ST_NUCLEO64_F303RE/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO64_F303RE/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f3xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32 Nucleo64-F303RE ST_NUCLEO64_F303RE diff --git a/os/hal/boards/ST_NUCLEO64_F303RE/cfg/board.fmpp b/os/hal/boards/ST_NUCLEO64_F303RE/cfg/board.fmpp new file mode 100644 index 000000000..6967f302d --- /dev/null +++ b/os/hal/boards/ST_NUCLEO64_F303RE/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f3xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_NUCLEO64_F334R8/board.c b/os/hal/boards/ST_NUCLEO64_F334R8/board.c index 52b14f7e2..3c291169d 100644 --- a/os/hal/boards/ST_NUCLEO64_F334R8/board.c +++ b/os/hal/boards/ST_NUCLEO64_F334R8/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -62,18 +124,92 @@ const PALConfig pal_default_config = { #endif #if STM32_HAS_GPIOI {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, - VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} + VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, +#endif +#if STM32_HAS_GPIOJ + {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, + VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, +#endif +#if STM32_HAS_GPIOK + {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, + VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB(STM32_GPIO_EN_MASK); + rccEnableAHB(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); #endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); +#endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -126,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_NUCLEO64_F334R8/board.h b/os/hal/boards/ST_NUCLEO64_F334R8/board.h index 504ae6234..1cb072663 100644 --- a/os/hal/boards/ST_NUCLEO64_F334R8/board.h +++ b/os/hal/boards/ST_NUCLEO64_F334R8/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32 Nucleo64-F334R8 board. */ @@ -224,7 +228,6 @@ #define LINE_ARD_D2 PAL_LINE(GPIOA, 10U) #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) - #define LINE_ARD_A3 PAL_LINE(GPIOB, 0U) #define LINE_ADC1_IN11 PAL_LINE(GPIOB, 0U) #define LINE_SWO PAL_LINE(GPIOB, 3U) @@ -235,7 +238,6 @@ #define LINE_ARD_D15 PAL_LINE(GPIOB, 8U) #define LINE_ARD_D14 PAL_LINE(GPIOB, 9U) #define LINE_ARD_D6 PAL_LINE(GPIOB, 10U) - #define LINE_ARD_A5 PAL_LINE(GPIOC, 0U) #define LINE_ADC12_IN6 PAL_LINE(GPIOC, 0U) #define LINE_ARD_A4 PAL_LINE(GPIOC, 1U) @@ -244,13 +246,24 @@ #define LINE_BUTTON PAL_LINE(GPIOC, 13U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) - - - #define LINE_OSC_IN PAL_LINE(GPIOF, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOF, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -1210,6 +1223,9 @@ PIN_AFIO_AF(GPIOH_PIN14, 0U) | \ PIN_AFIO_AF(GPIOH_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_NUCLEO64_F334R8/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO64_F334R8/cfg/board.chcfg index 917d1df48..915e46a4c 100644 --- a/os/hal/boards/ST_NUCLEO64_F334R8/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO64_F334R8/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f3xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32 Nucleo64-F334R8 ST_NUCLEO64_F334R8 diff --git a/os/hal/boards/ST_NUCLEO64_F334R8/cfg/board.fmpp b/os/hal/boards/ST_NUCLEO64_F334R8/cfg/board.fmpp new file mode 100644 index 000000000..6967f302d --- /dev/null +++ b/os/hal/boards/ST_NUCLEO64_F334R8/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f3xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_NUCLEO64_F401RE/board.c b/os/hal/boards/ST_NUCLEO64_F401RE/board.c index 65b74d0c6..5ee0873d7 100644 --- a/os/hal/boards/ST_NUCLEO64_F401RE/board.c +++ b/os/hal/boards/ST_NUCLEO64_F401RE/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -73,15 +135,81 @@ const PALConfig pal_default_config = { VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB1(STM32_GPIO_EN_MASK); + rccEnableAHB1(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); #endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -134,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_NUCLEO64_F401RE/board.h b/os/hal/boards/ST_NUCLEO64_F401RE/board.h index 609161da1..b82bc5ad6 100644 --- a/os/hal/boards/ST_NUCLEO64_F401RE/board.h +++ b/os/hal/boards/ST_NUCLEO64_F401RE/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32 Nucleo64-F401RE board. */ @@ -247,7 +251,6 @@ #define LINE_OTG_FS_DP PAL_LINE(GPIOA, 12U) #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) - #define LINE_ARD_A3 PAL_LINE(GPIOB, 0U) #define LINE_ADC1_IN8 PAL_LINE(GPIOB, 0U) #define LINE_SWO PAL_LINE(GPIOB, 3U) @@ -258,7 +261,6 @@ #define LINE_ARD_D15 PAL_LINE(GPIOB, 8U) #define LINE_ARD_D14 PAL_LINE(GPIOB, 9U) #define LINE_ARD_D6 PAL_LINE(GPIOB, 10U) - #define LINE_ARD_A5 PAL_LINE(GPIOC, 0U) #define LINE_ADC1_IN10 PAL_LINE(GPIOC, 0U) #define LINE_ARD_A4 PAL_LINE(GPIOC, 1U) @@ -267,14 +269,24 @@ #define LINE_BUTTON PAL_LINE(GPIOC, 13U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) +#define LINE_OSC_IN PAL_LINE(GPIOH, 0U) +#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ - -#define LINE_OSC_IN PAL_LINE(GPIOH, 0U) -#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) - +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -1351,6 +1363,9 @@ PIN_AFIO_AF(GPIOI_PIN14, 0U) | \ PIN_AFIO_AF(GPIOI_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_NUCLEO64_F401RE/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO64_F401RE/cfg/board.chcfg index 033ed8b07..3ee7519af 100644 --- a/os/hal/boards/ST_NUCLEO64_F401RE/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO64_F401RE/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f4xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32 Nucleo64-F401RE ST_NUCLEO64_F401RE diff --git a/os/hal/boards/ST_NUCLEO64_F401RE/cfg/board.fmpp b/os/hal/boards/ST_NUCLEO64_F401RE/cfg/board.fmpp new file mode 100644 index 000000000..41754c141 --- /dev/null +++ b/os/hal/boards/ST_NUCLEO64_F401RE/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f4xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_NUCLEO64_F410RB/board.c b/os/hal/boards/ST_NUCLEO64_F410RB/board.c index 65b74d0c6..5ee0873d7 100644 --- a/os/hal/boards/ST_NUCLEO64_F410RB/board.c +++ b/os/hal/boards/ST_NUCLEO64_F410RB/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -73,15 +135,81 @@ const PALConfig pal_default_config = { VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB1(STM32_GPIO_EN_MASK); + rccEnableAHB1(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); #endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -134,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_NUCLEO64_F410RB/board.h b/os/hal/boards/ST_NUCLEO64_F410RB/board.h index 5b7c29d73..22ad88b01 100644 --- a/os/hal/boards/ST_NUCLEO64_F410RB/board.h +++ b/os/hal/boards/ST_NUCLEO64_F410RB/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32 Nucleo64-F410RB board. */ @@ -247,7 +251,6 @@ #define LINE_OTG_FS_DP PAL_LINE(GPIOA, 12U) #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) - #define LINE_ARD_A3 PAL_LINE(GPIOB, 0U) #define LINE_ADC1_IN8 PAL_LINE(GPIOB, 0U) #define LINE_SWO PAL_LINE(GPIOB, 3U) @@ -258,7 +261,6 @@ #define LINE_ARD_D15 PAL_LINE(GPIOB, 8U) #define LINE_ARD_D14 PAL_LINE(GPIOB, 9U) #define LINE_ARD_D6 PAL_LINE(GPIOB, 10U) - #define LINE_ARD_A5 PAL_LINE(GPIOC, 0U) #define LINE_ADC1_IN10 PAL_LINE(GPIOC, 0U) #define LINE_ARD_A4 PAL_LINE(GPIOC, 1U) @@ -267,14 +269,24 @@ #define LINE_BUTTON PAL_LINE(GPIOC, 13U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) +#define LINE_OSC_IN PAL_LINE(GPIOH, 0U) +#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ - -#define LINE_OSC_IN PAL_LINE(GPIOH, 0U) -#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) - +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -1351,6 +1363,9 @@ PIN_AFIO_AF(GPIOI_PIN14, 0U) | \ PIN_AFIO_AF(GPIOI_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_NUCLEO64_F410RB/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO64_F410RB/cfg/board.chcfg index b03a7f774..7ae8394e2 100644 --- a/os/hal/boards/ST_NUCLEO64_F410RB/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO64_F410RB/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f4xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32 Nucleo64-F410RB ST_NUCLEO64_F410RB diff --git a/os/hal/boards/ST_NUCLEO64_F410RB/cfg/board.fmpp b/os/hal/boards/ST_NUCLEO64_F410RB/cfg/board.fmpp new file mode 100644 index 000000000..41754c141 --- /dev/null +++ b/os/hal/boards/ST_NUCLEO64_F410RB/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f4xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_NUCLEO64_F411RE/board.c b/os/hal/boards/ST_NUCLEO64_F411RE/board.c index 65b74d0c6..5ee0873d7 100644 --- a/os/hal/boards/ST_NUCLEO64_F411RE/board.c +++ b/os/hal/boards/ST_NUCLEO64_F411RE/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -73,15 +135,81 @@ const PALConfig pal_default_config = { VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB1(STM32_GPIO_EN_MASK); + rccEnableAHB1(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); #endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -134,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_NUCLEO64_F411RE/board.h b/os/hal/boards/ST_NUCLEO64_F411RE/board.h index bdbf69f20..efe1718a1 100644 --- a/os/hal/boards/ST_NUCLEO64_F411RE/board.h +++ b/os/hal/boards/ST_NUCLEO64_F411RE/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32 Nucleo64-F411RE board. */ @@ -247,7 +251,6 @@ #define LINE_OTG_FS_DP PAL_LINE(GPIOA, 12U) #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) - #define LINE_ARD_A3 PAL_LINE(GPIOB, 0U) #define LINE_ADC1_IN8 PAL_LINE(GPIOB, 0U) #define LINE_SWO PAL_LINE(GPIOB, 3U) @@ -258,7 +261,6 @@ #define LINE_ARD_D15 PAL_LINE(GPIOB, 8U) #define LINE_ARD_D14 PAL_LINE(GPIOB, 9U) #define LINE_ARD_D6 PAL_LINE(GPIOB, 10U) - #define LINE_ARD_A5 PAL_LINE(GPIOC, 0U) #define LINE_ADC1_IN10 PAL_LINE(GPIOC, 0U) #define LINE_ARD_A4 PAL_LINE(GPIOC, 1U) @@ -267,14 +269,24 @@ #define LINE_BUTTON PAL_LINE(GPIOC, 13U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) +#define LINE_OSC_IN PAL_LINE(GPIOH, 0U) +#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ - -#define LINE_OSC_IN PAL_LINE(GPIOH, 0U) -#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) - +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -1351,6 +1363,9 @@ PIN_AFIO_AF(GPIOI_PIN14, 0U) | \ PIN_AFIO_AF(GPIOI_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_NUCLEO64_F411RE/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO64_F411RE/cfg/board.chcfg index 96acefc03..3095409cc 100644 --- a/os/hal/boards/ST_NUCLEO64_F411RE/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO64_F411RE/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f4xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32 Nucleo64-F411RE ST_NUCLEO64_F411RE diff --git a/os/hal/boards/ST_NUCLEO64_F411RE/cfg/board.fmpp b/os/hal/boards/ST_NUCLEO64_F411RE/cfg/board.fmpp new file mode 100644 index 000000000..41754c141 --- /dev/null +++ b/os/hal/boards/ST_NUCLEO64_F411RE/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f4xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_NUCLEO64_F446RE/board.c b/os/hal/boards/ST_NUCLEO64_F446RE/board.c index 65b74d0c6..5ee0873d7 100644 --- a/os/hal/boards/ST_NUCLEO64_F446RE/board.c +++ b/os/hal/boards/ST_NUCLEO64_F446RE/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -73,15 +135,81 @@ const PALConfig pal_default_config = { VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB1(STM32_GPIO_EN_MASK); + rccEnableAHB1(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); #endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -134,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_NUCLEO64_F446RE/board.h b/os/hal/boards/ST_NUCLEO64_F446RE/board.h index 6851a72cd..c4fab47f7 100644 --- a/os/hal/boards/ST_NUCLEO64_F446RE/board.h +++ b/os/hal/boards/ST_NUCLEO64_F446RE/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32 Nucleo64-F446RE board. */ @@ -247,7 +251,6 @@ #define LINE_OTG_FS_DP PAL_LINE(GPIOA, 12U) #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) - #define LINE_ARD_A3 PAL_LINE(GPIOB, 0U) #define LINE_ADC12_IN8 PAL_LINE(GPIOB, 0U) #define LINE_SWO PAL_LINE(GPIOB, 3U) @@ -258,7 +261,6 @@ #define LINE_ARD_D15 PAL_LINE(GPIOB, 8U) #define LINE_ARD_D14 PAL_LINE(GPIOB, 9U) #define LINE_ARD_D6 PAL_LINE(GPIOB, 10U) - #define LINE_ARD_A5 PAL_LINE(GPIOC, 0U) #define LINE_ADC123_IN10 PAL_LINE(GPIOC, 0U) #define LINE_ARD_A4 PAL_LINE(GPIOC, 1U) @@ -267,14 +269,24 @@ #define LINE_BUTTON PAL_LINE(GPIOC, 13U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) +#define LINE_OSC_IN PAL_LINE(GPIOH, 0U) +#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ - -#define LINE_OSC_IN PAL_LINE(GPIOH, 0U) -#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) - +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -1351,6 +1363,9 @@ PIN_AFIO_AF(GPIOI_PIN14, 0U) | \ PIN_AFIO_AF(GPIOI_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_NUCLEO64_F446RE/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO64_F446RE/cfg/board.chcfg index f3a1012b4..c0ef72b33 100644 --- a/os/hal/boards/ST_NUCLEO64_F446RE/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO64_F446RE/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f4xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32 Nucleo64-F446RE ST_NUCLEO64_F446RE diff --git a/os/hal/boards/ST_NUCLEO64_F446RE/cfg/board.fmpp b/os/hal/boards/ST_NUCLEO64_F446RE/cfg/board.fmpp new file mode 100644 index 000000000..41754c141 --- /dev/null +++ b/os/hal/boards/ST_NUCLEO64_F446RE/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f4xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_NUCLEO64_L053R8/board.c b/os/hal/boards/ST_NUCLEO64_L053R8/board.c index 52b14f7e2..15c4d29a8 100644 --- a/os/hal/boards/ST_NUCLEO64_L053R8/board.c +++ b/os/hal/boards/ST_NUCLEO64_L053R8/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -62,18 +124,92 @@ const PALConfig pal_default_config = { #endif #if STM32_HAS_GPIOI {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, - VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} + VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, +#endif +#if STM32_HAS_GPIOJ + {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, + VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, +#endif +#if STM32_HAS_GPIOK + {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, + VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetIOP(STM32_GPIO_EN_MASK); + rccEnableIOP(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); #endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); +#endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -126,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_NUCLEO64_L053R8/board.h b/os/hal/boards/ST_NUCLEO64_L053R8/board.h index 7a940fdc6..cd7b46eb0 100644 --- a/os/hal/boards/ST_NUCLEO64_L053R8/board.h +++ b/os/hal/boards/ST_NUCLEO64_L053R8/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32 Nucleo64-L053R8 board. */ @@ -172,7 +176,6 @@ #define LINE_ARD_D2 PAL_LINE(GPIOA, 10U) #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) - #define LINE_ARD_A3 PAL_LINE(GPIOB, 0U) #define LINE_ACD1_IN8 PAL_LINE(GPIOB, 0U) #define LINE_SWO PAL_LINE(GPIOB, 3U) @@ -183,7 +186,6 @@ #define LINE_ARD_D15 PAL_LINE(GPIOB, 8U) #define LINE_ARD_D14 PAL_LINE(GPIOB, 9U) #define LINE_ARD_D6 PAL_LINE(GPIOB, 10U) - #define LINE_ARD_A5 PAL_LINE(GPIOC, 0U) #define LINE_ACD1_IN10 PAL_LINE(GPIOC, 0U) #define LINE_ARD_A4 PAL_LINE(GPIOC, 1U) @@ -192,11 +194,25 @@ #define LINE_BUTTON PAL_LINE(GPIOC, 13U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) - - #define LINE_OSC_IN PAL_LINE(GPIOH, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + /* * I/O ports initial setup, this configuration is established soon after reset * in the initialization code. @@ -804,6 +820,9 @@ PIN_AFIO_AF(GPIOH_PIN14, 0U) | \ PIN_AFIO_AF(GPIOH_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_NUCLEO64_L053R8/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO64_L053R8/cfg/board.chcfg index bc8cba31a..4a3bfc49c 100644 --- a/os/hal/boards/ST_NUCLEO64_L053R8/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO64_L053R8/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32l0xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32 Nucleo64-L053R8 ST_NUCLEO64_L053R8 diff --git a/os/hal/boards/ST_NUCLEO64_L053R8/cfg/board.fmpp b/os/hal/boards/ST_NUCLEO64_L053R8/cfg/board.fmpp new file mode 100644 index 000000000..b3ba947fb --- /dev/null +++ b/os/hal/boards/ST_NUCLEO64_L053R8/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32l0xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_NUCLEO64_L073RZ/board.c b/os/hal/boards/ST_NUCLEO64_L073RZ/board.c index 52b14f7e2..15c4d29a8 100644 --- a/os/hal/boards/ST_NUCLEO64_L073RZ/board.c +++ b/os/hal/boards/ST_NUCLEO64_L073RZ/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -62,18 +124,92 @@ const PALConfig pal_default_config = { #endif #if STM32_HAS_GPIOI {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, - VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} + VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, +#endif +#if STM32_HAS_GPIOJ + {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, + VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, +#endif +#if STM32_HAS_GPIOK + {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, + VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetIOP(STM32_GPIO_EN_MASK); + rccEnableIOP(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); #endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); +#endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -126,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_NUCLEO64_L073RZ/board.h b/os/hal/boards/ST_NUCLEO64_L073RZ/board.h index 2794e022d..4f16130f3 100644 --- a/os/hal/boards/ST_NUCLEO64_L073RZ/board.h +++ b/os/hal/boards/ST_NUCLEO64_L073RZ/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32 Nucleo64-L073RZ board. */ @@ -189,7 +193,6 @@ #define LINE_ARD_D2 PAL_LINE(GPIOA, 10U) #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) - #define LINE_ARD_A3 PAL_LINE(GPIOB, 0U) #define LINE_ACD1_IN8 PAL_LINE(GPIOB, 0U) #define LINE_SWO PAL_LINE(GPIOB, 3U) @@ -200,7 +203,6 @@ #define LINE_ARD_D15 PAL_LINE(GPIOB, 8U) #define LINE_ARD_D14 PAL_LINE(GPIOB, 9U) #define LINE_ARD_D6 PAL_LINE(GPIOB, 10U) - #define LINE_ARD_A5 PAL_LINE(GPIOC, 0U) #define LINE_ACD1_IN10 PAL_LINE(GPIOC, 0U) #define LINE_ARD_A4 PAL_LINE(GPIOC, 1U) @@ -209,11 +211,24 @@ #define LINE_BUTTON PAL_LINE(GPIOC, 13U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) +#define LINE_OSC_IN PAL_LINE(GPIOH, 0U) +#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ -#define LINE_OSC_IN PAL_LINE(GPIOH, 0U) -#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -939,6 +954,9 @@ PIN_AFIO_AF(GPIOH_PIN14, 0U) | \ PIN_AFIO_AF(GPIOH_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_NUCLEO64_L073RZ/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO64_L073RZ/cfg/board.chcfg index 4803c1c12..6e8dfc62c 100644 --- a/os/hal/boards/ST_NUCLEO64_L073RZ/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO64_L073RZ/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32l0xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32 Nucleo64-L073RZ ST_NUCLEO64_L073RZ diff --git a/os/hal/boards/ST_NUCLEO64_L073RZ/cfg/board.fmpp b/os/hal/boards/ST_NUCLEO64_L073RZ/cfg/board.fmpp new file mode 100644 index 000000000..b3ba947fb --- /dev/null +++ b/os/hal/boards/ST_NUCLEO64_L073RZ/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32l0xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_NUCLEO64_L152RE/board.c b/os/hal/boards/ST_NUCLEO64_L152RE/board.c index 52b14f7e2..3c291169d 100644 --- a/os/hal/boards/ST_NUCLEO64_L152RE/board.c +++ b/os/hal/boards/ST_NUCLEO64_L152RE/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -62,18 +124,92 @@ const PALConfig pal_default_config = { #endif #if STM32_HAS_GPIOI {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, - VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} + VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, +#endif +#if STM32_HAS_GPIOJ + {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, + VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, +#endif +#if STM32_HAS_GPIOK + {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, + VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB(STM32_GPIO_EN_MASK); + rccEnableAHB(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); #endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); +#endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -126,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_NUCLEO64_L152RE/board.h b/os/hal/boards/ST_NUCLEO64_L152RE/board.h index e0eac3e66..4cee77340 100644 --- a/os/hal/boards/ST_NUCLEO64_L152RE/board.h +++ b/os/hal/boards/ST_NUCLEO64_L152RE/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32 Nucleo64-L152RE board. */ @@ -46,7 +50,7 @@ #define STM32_HSE_BYPASS /* - * MCU type as defined in the ST header file stm32l1xx.h. + * MCU type as defined in the ST header. */ #define STM32L152xE @@ -221,7 +225,6 @@ #define LINE_ARD_D2 PAL_LINE(GPIOA, 10U) #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) - #define LINE_ARD_A3 PAL_LINE(GPIOB, 0U) #define LINE_ACD1_IN8 PAL_LINE(GPIOB, 0U) #define LINE_SWO PAL_LINE(GPIOB, 3U) @@ -232,7 +235,6 @@ #define LINE_ARD_D15 PAL_LINE(GPIOB, 8U) #define LINE_ARD_D14 PAL_LINE(GPIOB, 9U) #define LINE_ARD_D6 PAL_LINE(GPIOB, 10U) - #define LINE_ARD_A5 PAL_LINE(GPIOC, 0U) #define LINE_ACD1_IN10 PAL_LINE(GPIOC, 0U) #define LINE_ARD_A4 PAL_LINE(GPIOC, 1U) @@ -241,13 +243,24 @@ #define LINE_BUTTON PAL_LINE(GPIOC, 13U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) +#define LINE_OSC_IN PAL_LINE(GPIOH, 0U) +#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ - -#define LINE_OSC_IN PAL_LINE(GPIOH, 0U) -#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -1207,6 +1220,9 @@ PIN_AFIO_AF(GPIOH_PIN14, 0U) | \ PIN_AFIO_AF(GPIOH_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_NUCLEO64_L152RE/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO64_L152RE/cfg/board.chcfg index 6bd168366..fd034a6a9 100644 --- a/os/hal/boards/ST_NUCLEO64_L152RE/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO64_L152RE/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32l1xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32 Nucleo64-L152RE ST_NUCLEO64_L152RE diff --git a/os/hal/boards/ST_NUCLEO64_L152RE/cfg/board.fmpp b/os/hal/boards/ST_NUCLEO64_L152RE/cfg/board.fmpp new file mode 100644 index 000000000..029da4fdd --- /dev/null +++ b/os/hal/boards/ST_NUCLEO64_L152RE/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32l1xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_NUCLEO64_L476RG/board.c b/os/hal/boards/ST_NUCLEO64_L476RG/board.c index f0ccf6c22..177ec13c8 100644 --- a/os/hal/boards/ST_NUCLEO64_L476RG/board.c +++ b/os/hal/boards/ST_NUCLEO64_L476RG/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,78 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; + uint32_t ascr; + uint32_t lockr; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH, VAL_GPIOA_ASCR, @@ -68,16 +132,99 @@ const PALConfig pal_default_config = { VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH, VAL_GPIOH_ASCR, VAL_GPIOH_LOCKR}, #endif +#if STM32_HAS_GPIOI + {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, + VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH, VAL_GPIOI_ASCR, + VAL_GPIOI_LOCKR}, +#endif +#if STM32_HAS_GPIOJ + {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, + VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH, VAL_GPIOJ_ASCR, + VAL_GPIOJ_LOCKR}, +#endif +#if STM32_HAS_GPIOK + {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, + VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH, VAL_GPIOK_ASCR, + VAL_GPIOK_LOCKR} +#endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->ASCR = config->ascr; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; + gpiop->LOCKR = config->lockr; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB2(STM32_GPIO_EN_MASK); + rccEnableAHB2(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); #endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); +#endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -130,4 +277,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_NUCLEO64_L476RG/board.h b/os/hal/boards/ST_NUCLEO64_L476RG/board.h index a37dbc8ab..632e3bff4 100644 --- a/os/hal/boards/ST_NUCLEO64_L476RG/board.h +++ b/os/hal/boards/ST_NUCLEO64_L476RG/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32 Nucleo64-L476RG board. */ @@ -250,6 +254,22 @@ #define LINE_OSC_IN PAL_LINE(GPIOH, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + /* * I/O ports initial setup, this configuration is established soon after reset * in the initialization code. @@ -1468,6 +1488,9 @@ PIN_LOCKR_DISABLED(GPIOH_PIN14) | \ PIN_LOCKR_DISABLED(GPIOH_PIN15)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_NUCLEO64_L476RG/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO64_L476RG/cfg/board.chcfg index 012744102..5cdbd962d 100644 --- a/os/hal/boards/ST_NUCLEO64_L476RG/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO64_L476RG/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32l4xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32 Nucleo64-L476RG ST_NUCLEO64_L476RG diff --git a/os/hal/boards/ST_NUCLEO64_L476RG/cfg/board.fmpp b/os/hal/boards/ST_NUCLEO64_L476RG/cfg/board.fmpp new file mode 100644 index 000000000..3c311d3e9 --- /dev/null +++ b/os/hal/boards/ST_NUCLEO64_L476RG/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32l4xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_STM32373C_EVAL/board.c b/os/hal/boards/ST_STM32373C_EVAL/board.c index 753ef0076..3c291169d 100644 --- a/os/hal/boards/ST_STM32373C_EVAL/board.c +++ b/os/hal/boards/ST_STM32373C_EVAL/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. diff --git a/os/hal/boards/ST_STM32373C_EVAL/board.h b/os/hal/boards/ST_STM32373C_EVAL/board.h index aaa8acbc0..036e2ad9b 100644 --- a/os/hal/boards/ST_STM32373C_EVAL/board.h +++ b/os/hal/boards/ST_STM32373C_EVAL/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -208,14 +208,12 @@ #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) #define LINE_JTDI PAL_LINE(GPIOA, 15U) - #define LINE_MIC_IN PAL_LINE(GPIOB, 0U) #define LINE_ADC_POT_IN PAL_LINE(GPIOB, 1U) #define LINE_SWO PAL_LINE(GPIOB, 3U) #define LINE_JTRST PAL_LINE(GPIOB, 4U) #define LINE_I2C1_SCL PAL_LINE(GPIOB, 6U) #define LINE_I2C1_SDA PAL_LINE(GPIOB, 7U) - #define LINE_LED1 PAL_LINE(GPIOC, 0U) #define LINE_LED2 PAL_LINE(GPIOC, 1U) #define LINE_LED3 PAL_LINE(GPIOC, 2U) @@ -226,7 +224,6 @@ #define LINE_SPI3_MOSI PAL_LINE(GPIOC, 12U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) - #define LINE_CAN_RX PAL_LINE(GPIOD, 0U) #define LINE_CAN_TX PAL_LINE(GPIOD, 1U) #define LINE_LCD_CS PAL_LINE(GPIOD, 2U) @@ -235,7 +232,6 @@ #define LINE_USART2_TX PAL_LINE(GPIOD, 5U) #define LINE_USART2_RX PAL_LINE(GPIOD, 6U) #define LINE_AUDIO_RST PAL_LINE(GPIOD, 11U) - #define LINE_SD_CS PAL_LINE(GPIOE, 2U) #define LINE_SD_DETECT PAL_LINE(GPIOE, 3U) #define LINE_JOY_SEL PAL_LINE(GPIOE, 6U) @@ -243,7 +239,6 @@ #define LINE_PRESSUREP PAL_LINE(GPIOE, 8U) #define LINE_PRESSUREN PAL_LINE(GPIOE, 9U) #define LINE_PRESSURE_TEPM PAL_LINE(GPIOE, 14U) - #define LINE_OSC_IN PAL_LINE(GPIOF, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOF, 1U) #define LINE_JOY_DOWN PAL_LINE(GPIOF, 2U) @@ -251,8 +246,6 @@ #define LINE_JOY_RIGHT PAL_LINE(GPIOF, 9U) #define LINE_JOY_UP PAL_LINE(GPIOF, 10U) - - /*===========================================================================*/ /* Driver pre-compile time settings. */ /*===========================================================================*/ diff --git a/os/hal/boards/ST_STM32373C_EVAL/cfg/board.chcfg b/os/hal/boards/ST_STM32373C_EVAL/cfg/board.chcfg index 4ef8f7464..75a8f9378 100644 --- a/os/hal/boards/ST_STM32373C_EVAL/cfg/board.chcfg +++ b/os/hal/boards/ST_STM32373C_EVAL/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f3xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32373C-EVAL ST_STM32373C_EVAL diff --git a/os/hal/boards/ST_STM32373C_EVAL/cfg/board.fmpp b/os/hal/boards/ST_STM32373C_EVAL/cfg/board.fmpp new file mode 100644 index 000000000..6967f302d --- /dev/null +++ b/os/hal/boards/ST_STM32373C_EVAL/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f3xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_STM32F072B_DISCOVERY/board.c b/os/hal/boards/ST_STM32F072B_DISCOVERY/board.c index 92f2d10ef..3c291169d 100644 --- a/os/hal/boards/ST_STM32F072B_DISCOVERY/board.c +++ b/os/hal/boards/ST_STM32F072B_DISCOVERY/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief Type of STM32 GPIO port setup. */ -const PALConfig pal_default_config = { +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; + +/** + * @brief STM32 GPIO static initialization data. + */ +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -62,21 +124,117 @@ const PALConfig pal_default_config = { #endif #if STM32_HAS_GPIOI {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, - VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} + VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, +#endif +#if STM32_HAS_GPIOJ + {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, + VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, +#endif +#if STM32_HAS_GPIOK + {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, + VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB(STM32_GPIO_EN_MASK); + rccEnableAHB(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); #endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); +#endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } +#if HAL_USE_SDC || defined(__DOXYGEN__) +/** + * @brief SDC card detection. + */ +bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { + + (void)sdcp; + /* TODO: Fill the implementation.*/ + return true; +} + +/** + * @brief SDC card write protection detection. + */ +bool sdc_lld_is_write_protected(SDCDriver *sdcp) { + + (void)sdcp; + /* TODO: Fill the implementation.*/ + return false; +} +#endif /* HAL_USE_SDC */ + #if HAL_USE_MMC_SPI || defined(__DOXYGEN__) /** * @brief MMC_SPI card detection. @@ -104,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_STM32F072B_DISCOVERY/board.h b/os/hal/boards/ST_STM32F072B_DISCOVERY/board.h index d71741d8a..96df81c25 100644 --- a/os/hal/boards/ST_STM32F072B_DISCOVERY/board.h +++ b/os/hal/boards/ST_STM32F072B_DISCOVERY/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for ST STM32F072B-Discovery board. */ @@ -167,11 +171,9 @@ #define LINE_USB_DP PAL_LINE(GPIOA, 12U) #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) - #define LINE_SPI2_SCK PAL_LINE(GPIOB, 13U) #define LINE_SPI2_MISO PAL_LINE(GPIOB, 14U) #define LINE_SPI2_MOSI PAL_LINE(GPIOB, 15U) - #define LINE_MEMS_CS PAL_LINE(GPIOC, 0U) #define LINE_LED_RED PAL_LINE(GPIOC, 6U) #define LINE_LED_BLUE PAL_LINE(GPIOC, 7U) @@ -179,11 +181,24 @@ #define LINE_LED_GREEN PAL_LINE(GPIOC, 9U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) +#define LINE_OSC_IN PAL_LINE(GPIOF, 0U) +#define LINE_OSC_OUT PAL_LINE(GPIOF, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ -#define LINE_OSC_IN PAL_LINE(GPIOF, 0U) -#define LINE_OSC_OUT PAL_LINE(GPIOF, 1U) +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -909,6 +924,9 @@ PIN_AFIO_AF(GPIOF_PIN14, 0U) | \ PIN_AFIO_AF(GPIOF_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_STM32F072B_DISCOVERY/cfg/board.chcfg b/os/hal/boards/ST_STM32F072B_DISCOVERY/cfg/board.chcfg index 9c7cf4fd7..e6ceecb62 100644 --- a/os/hal/boards/ST_STM32F072B_DISCOVERY/cfg/board.chcfg +++ b/os/hal/boards/ST_STM32F072B_DISCOVERY/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f0xx/templates .. - 3.0.x + 5.0.x ST STM32F072B-Discovery ST_STM32F072B_DISCOVERY diff --git a/os/hal/boards/ST_STM32F072B_DISCOVERY/cfg/board.fmpp b/os/hal/boards/ST_STM32F072B_DISCOVERY/cfg/board.fmpp new file mode 100644 index 000000000..55cd396e4 --- /dev/null +++ b/os/hal/boards/ST_STM32F072B_DISCOVERY/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f0xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_STM32F0_DISCOVERY/board.c b/os/hal/boards/ST_STM32F0_DISCOVERY/board.c index 753ef0076..3c291169d 100644 --- a/os/hal/boards/ST_STM32F0_DISCOVERY/board.c +++ b/os/hal/boards/ST_STM32F0_DISCOVERY/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. diff --git a/os/hal/boards/ST_STM32F0_DISCOVERY/board.h b/os/hal/boards/ST_STM32F0_DISCOVERY/board.h index fbb5b839c..50168f09d 100644 --- a/os/hal/boards/ST_STM32F0_DISCOVERY/board.h +++ b/os/hal/boards/ST_STM32F0_DISCOVERY/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -152,14 +152,10 @@ #define LINE_BUTTON PAL_LINE(GPIOA, 0U) #define LINE_SWDAT PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) - - #define LINE_LED4 PAL_LINE(GPIOC, 8U) #define LINE_LED3 PAL_LINE(GPIOC, 9U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) - - #define LINE_OSC_IN PAL_LINE(GPIOF, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOF, 1U) diff --git a/os/hal/boards/ST_STM32F0_DISCOVERY/cfg/board.chcfg b/os/hal/boards/ST_STM32F0_DISCOVERY/cfg/board.chcfg index c01fcc480..ff4db203f 100644 --- a/os/hal/boards/ST_STM32F0_DISCOVERY/cfg/board.chcfg +++ b/os/hal/boards/ST_STM32F0_DISCOVERY/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f0xx/templates .. - 3.0.x + 5.0.x ST STM32F0-Discovery ST_STM32F0_DISCOVERY diff --git a/os/hal/boards/ST_STM32F0_DISCOVERY/cfg/board.fmpp b/os/hal/boards/ST_STM32F0_DISCOVERY/cfg/board.fmpp new file mode 100644 index 000000000..55cd396e4 --- /dev/null +++ b/os/hal/boards/ST_STM32F0_DISCOVERY/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f0xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_STM32F2_DISCOVERY/board.c b/os/hal/boards/ST_STM32F2_DISCOVERY/board.c index 52b14f7e2..5ee0873d7 100644 --- a/os/hal/boards/ST_STM32F2_DISCOVERY/board.c +++ b/os/hal/boards/ST_STM32F2_DISCOVERY/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -62,18 +124,92 @@ const PALConfig pal_default_config = { #endif #if STM32_HAS_GPIOI {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, - VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} + VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, +#endif +#if STM32_HAS_GPIOJ + {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, + VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, +#endif +#if STM32_HAS_GPIOK + {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, + VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB1(STM32_GPIO_EN_MASK); + rccEnableAHB1(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); #endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); +#endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -126,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_STM32F2_DISCOVERY/board.h b/os/hal/boards/ST_STM32F2_DISCOVERY/board.h index 388b532f7..07077f1f1 100644 --- a/os/hal/boards/ST_STM32F2_DISCOVERY/board.h +++ b/os/hal/boards/ST_STM32F2_DISCOVERY/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32F2-Discovery (custom) board. */ @@ -225,34 +229,42 @@ #define LINE_OTG_FS_DP PAL_LINE(GPIOA, 12U) #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) - #define LINE_SWO PAL_LINE(GPIOB, 3U) #define LINE_SCL PAL_LINE(GPIOB, 6U) #define LINE_SDA PAL_LINE(GPIOB, 9U) #define LINE_CLK_IN PAL_LINE(GPIOB, 10U) - #define LINE_OTG_FS_POWER_ON PAL_LINE(GPIOC, 0U) #define LINE_PDM_OUT PAL_LINE(GPIOC, 3U) #define LINE_MCLK PAL_LINE(GPIOC, 7U) #define LINE_SCLK PAL_LINE(GPIOC, 10U) #define LINE_SDIN PAL_LINE(GPIOC, 12U) - #define LINE_RESET PAL_LINE(GPIOD, 4U) #define LINE_OVER_CURRENT PAL_LINE(GPIOD, 5U) #define LINE_LED4 PAL_LINE(GPIOD, 12U) #define LINE_LED3 PAL_LINE(GPIOD, 13U) #define LINE_LED5 PAL_LINE(GPIOD, 14U) #define LINE_LED6 PAL_LINE(GPIOD, 15U) - #define LINE_INT1 PAL_LINE(GPIOE, 0U) #define LINE_INT2 PAL_LINE(GPIOE, 1U) #define LINE_CS_SPI PAL_LINE(GPIOE, 3U) +#define LINE_OSC_IN PAL_LINE(GPIOH, 0U) +#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ -#define LINE_OSC_IN PAL_LINE(GPIOH, 0U) -#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -1329,6 +1341,9 @@ PIN_AFIO_AF(GPIOI_PIN14, 0U) | \ PIN_AFIO_AF(GPIOI_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_STM32F2_DISCOVERY/cfg/board.chcfg b/os/hal/boards/ST_STM32F2_DISCOVERY/cfg/board.chcfg index 093cc4d96..102c120d3 100644 --- a/os/hal/boards/ST_STM32F2_DISCOVERY/cfg/board.chcfg +++ b/os/hal/boards/ST_STM32F2_DISCOVERY/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f4xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32F2-Discovery (custom) ST_STM32F2_DISCOVERY diff --git a/os/hal/boards/ST_STM32F2_DISCOVERY/cfg/board.fmpp b/os/hal/boards/ST_STM32F2_DISCOVERY/cfg/board.fmpp new file mode 100644 index 000000000..41754c141 --- /dev/null +++ b/os/hal/boards/ST_STM32F2_DISCOVERY/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f4xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_STM32F334_DISCOVERY/board.c b/os/hal/boards/ST_STM32F334_DISCOVERY/board.c index 52b14f7e2..3c291169d 100644 --- a/os/hal/boards/ST_STM32F334_DISCOVERY/board.c +++ b/os/hal/boards/ST_STM32F334_DISCOVERY/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -62,18 +124,92 @@ const PALConfig pal_default_config = { #endif #if STM32_HAS_GPIOI {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, - VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} + VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, +#endif +#if STM32_HAS_GPIOJ + {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, + VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, +#endif +#if STM32_HAS_GPIOK + {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, + VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB(STM32_GPIO_EN_MASK); + rccEnableAHB(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); #endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); +#endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -126,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_STM32F334_DISCOVERY/board.h b/os/hal/boards/ST_STM32F334_DISCOVERY/board.h index 7c2f59a1b..99eb86a27 100644 --- a/os/hal/boards/ST_STM32F334_DISCOVERY/board.h +++ b/os/hal/boards/ST_STM32F334_DISCOVERY/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32F334-Discovery board. */ @@ -205,7 +209,6 @@ #define LINE_P2_DRIVE PAL_LINE(GPIOA, 11U) #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) - #define LINE_BK_SENSE PAL_LINE(GPIOB, 0U) #define LINE_USART_TX PAL_LINE(GPIOB, 3U) #define LINE_USART_RX PAL_LINE(GPIOB, 4U) @@ -215,14 +218,24 @@ #define LINE_LED_GREEN PAL_LINE(GPIOB, 9U) #define LINE_BK_DRIVE PAL_LINE(GPIOB, 12U) #define LINE_RC PAL_LINE(GPIOB, 14U) - - - - #define LINE_OSC_IN PAL_LINE(GPIOF, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOF, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -1182,6 +1195,9 @@ PIN_AFIO_AF(GPIOH_PIN14, 0U) | \ PIN_AFIO_AF(GPIOH_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_STM32F334_DISCOVERY/cfg/board.chcfg b/os/hal/boards/ST_STM32F334_DISCOVERY/cfg/board.chcfg index cd27b17ef..0ddf9e0b4 100644 --- a/os/hal/boards/ST_STM32F334_DISCOVERY/cfg/board.chcfg +++ b/os/hal/boards/ST_STM32F334_DISCOVERY/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f3xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32F334-Discovery ST_STM32F334_DISCOVERY diff --git a/os/hal/boards/ST_STM32F334_DISCOVERY/cfg/board.fmpp b/os/hal/boards/ST_STM32F334_DISCOVERY/cfg/board.fmpp new file mode 100644 index 000000000..6967f302d --- /dev/null +++ b/os/hal/boards/ST_STM32F334_DISCOVERY/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f3xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_STM32F3_DISCOVERY/board.c b/os/hal/boards/ST_STM32F3_DISCOVERY/board.c index 753ef0076..3c291169d 100644 --- a/os/hal/boards/ST_STM32F3_DISCOVERY/board.c +++ b/os/hal/boards/ST_STM32F3_DISCOVERY/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. diff --git a/os/hal/boards/ST_STM32F3_DISCOVERY/board.h b/os/hal/boards/ST_STM32F3_DISCOVERY/board.h index df7629a60..9c21c295d 100644 --- a/os/hal/boards/ST_STM32F3_DISCOVERY/board.h +++ b/os/hal/boards/ST_STM32F3_DISCOVERY/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -216,17 +216,13 @@ #define LINE_USB_DP PAL_LINE(GPIOA, 12U) #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) - #define LINE_SWO PAL_LINE(GPIOB, 3U) #define LINE_I2C1_SCL PAL_LINE(GPIOB, 6U) #define LINE_LSM303DLHC_SCL PAL_LINE(GPIOB, 6U) #define LINE_I2C1_SDA PAL_LINE(GPIOB, 7U) #define LINE_LSM303DLHC_SDA PAL_LINE(GPIOB, 7U) - #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) - - #define LINE_L3GD20_INT1 PAL_LINE(GPIOE, 0U) #define LINE_L3GD20_INT2 PAL_LINE(GPIOE, 1U) #define LINE_LSM303DLHC_DRDY PAL_LINE(GPIOE, 2U) @@ -242,12 +238,9 @@ #define LINE_LED10_RED PAL_LINE(GPIOE, 13U) #define LINE_LED8_ORANGE PAL_LINE(GPIOE, 14U) #define LINE_LED6_GREEN PAL_LINE(GPIOE, 15U) - #define LINE_OSC_IN PAL_LINE(GPIOF, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOF, 1U) - - /*===========================================================================*/ /* Driver pre-compile time settings. */ /*===========================================================================*/ diff --git a/os/hal/boards/ST_STM32F3_DISCOVERY/cfg/board.chcfg b/os/hal/boards/ST_STM32F3_DISCOVERY/cfg/board.chcfg index af20c8f15..f0a94d7f6 100644 --- a/os/hal/boards/ST_STM32F3_DISCOVERY/cfg/board.chcfg +++ b/os/hal/boards/ST_STM32F3_DISCOVERY/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f3xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32F3-Discovery ST_STM32F3_DISCOVERY diff --git a/os/hal/boards/ST_STM32F3_DISCOVERY/cfg/board.fmpp b/os/hal/boards/ST_STM32F3_DISCOVERY/cfg/board.fmpp new file mode 100644 index 000000000..6967f302d --- /dev/null +++ b/os/hal/boards/ST_STM32F3_DISCOVERY/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f3xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.c b/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.c index 52b14f7e2..3c291169d 100644 --- a/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.c +++ b/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -62,18 +124,92 @@ const PALConfig pal_default_config = { #endif #if STM32_HAS_GPIOI {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, - VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} + VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, +#endif +#if STM32_HAS_GPIOJ + {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, + VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, +#endif +#if STM32_HAS_GPIOK + {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, + VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB(STM32_GPIO_EN_MASK); + rccEnableAHB(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); #endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); +#endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -126,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.h b/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.h index 840cb354c..cdf190113 100644 --- a/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.h +++ b/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32F3-Discovery board. */ @@ -212,19 +216,15 @@ #define LINE_USB_DP PAL_LINE(GPIOA, 12U) #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) - #define LINE_SWO PAL_LINE(GPIOB, 3U) #define LINE_I2C1_SCL PAL_LINE(GPIOB, 6U) #define LINE_LSM303DLHC_SCL PAL_LINE(GPIOB, 6U) #define LINE_I2C1_SDA PAL_LINE(GPIOB, 7U) #define LINE_LSM303DLHC_SDA PAL_LINE(GPIOB, 7U) - #define LINE_VCP_RX PAL_LINE(GPIOC, 4U) #define LINE_VCP_TX PAL_LINE(GPIOC, 5U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) - - #define LINE_L3GD20_INT1 PAL_LINE(GPIOE, 0U) #define LINE_L3GD20_INT2 PAL_LINE(GPIOE, 1U) #define LINE_LSM303DLHC_DRDY PAL_LINE(GPIOE, 2U) @@ -240,11 +240,24 @@ #define LINE_LED10_RED PAL_LINE(GPIOE, 13U) #define LINE_LED8_ORANGE PAL_LINE(GPIOE, 14U) #define LINE_LED6_GREEN PAL_LINE(GPIOE, 15U) - #define LINE_OSC_IN PAL_LINE(GPIOF, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOF, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -1204,6 +1217,9 @@ PIN_AFIO_AF(GPIOH_PIN14, 0U) | \ PIN_AFIO_AF(GPIOH_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/cfg/board.chcfg b/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/cfg/board.chcfg index 37b1242ae..e54402fc6 100644 --- a/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/cfg/board.chcfg +++ b/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/cfg/board.chcfg @@ -7,7 +7,7 @@ resources/gencfg/processors/boards/stm32f3xx/templates $(CHIBIOS)/os/hal/boards/ .. - 3.0.x + 5.0.x STMicroelectronics STM32F3-Discovery ST_STM32F3_DISCOVERY_REVC diff --git a/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/cfg/board.fmpp b/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/cfg/board.fmpp new file mode 100644 index 000000000..6967f302d --- /dev/null +++ b/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f3xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_STM32F401C_DISCOVERY/board.c b/os/hal/boards/ST_STM32F401C_DISCOVERY/board.c index 65b74d0c6..5ee0873d7 100644 --- a/os/hal/boards/ST_STM32F401C_DISCOVERY/board.c +++ b/os/hal/boards/ST_STM32F401C_DISCOVERY/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -73,15 +135,81 @@ const PALConfig pal_default_config = { VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB1(STM32_GPIO_EN_MASK); + rccEnableAHB1(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); #endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -134,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_STM32F401C_DISCOVERY/board.h b/os/hal/boards/ST_STM32F401C_DISCOVERY/board.h index 74cb5c8d0..90d6e9565 100644 --- a/os/hal/boards/ST_STM32F401C_DISCOVERY/board.h +++ b/os/hal/boards/ST_STM32F401C_DISCOVERY/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32F401C-Discovery board. */ @@ -226,12 +230,10 @@ #define LINE_OTG_FS_DP PAL_LINE(GPIOA, 12U) #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) - #define LINE_SWO PAL_LINE(GPIOB, 3U) #define LINE_LSM303DLHC_SCL PAL_LINE(GPIOB, 6U) #define LINE_LSM303DLHC_SDA PAL_LINE(GPIOB, 9U) #define LINE_MP45DT02_CLK_IN PAL_LINE(GPIOB, 10U) - #define LINE_OTG_FS_POWER_ON PAL_LINE(GPIOC, 0U) #define LINE_CS43L22_AIN4x PAL_LINE(GPIOC, 3U) #define LINE_MP45DT02_PDM_OUT PAL_LINE(GPIOC, 3U) @@ -240,26 +242,36 @@ #define LINE_CS43L22_SDIN PAL_LINE(GPIOC, 12U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) - #define LINE_CS43L22_RESET PAL_LINE(GPIOD, 4U) #define LINE_OverCurrent PAL_LINE(GPIOD, 5U) #define LINE_LED4 PAL_LINE(GPIOD, 12U) #define LINE_LED3 PAL_LINE(GPIOD, 13U) #define LINE_LED5 PAL_LINE(GPIOD, 14U) #define LINE_LED6 PAL_LINE(GPIOD, 15U) - #define LINE_L3GD20_INT1 PAL_LINE(GPIOE, 0U) #define LINE_L3GD20_INT2 PAL_LINE(GPIOE, 1U) #define LINE_LSM303DLHC_DRDY PAL_LINE(GPIOE, 2U) #define LINE_L3GD20_CS PAL_LINE(GPIOE, 3U) #define LINE_LSM303DLHC_INT1 PAL_LINE(GPIOE, 4U) #define LINE_LSM303DLHC_INT2 PAL_LINE(GPIOE, 5U) +#define LINE_OSC_IN PAL_LINE(GPIOH, 0U) +#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ -#define LINE_OSC_IN PAL_LINE(GPIOH, 0U) -#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -1336,6 +1348,9 @@ PIN_AFIO_AF(GPIOI_PIN14, 0U) | \ PIN_AFIO_AF(GPIOI_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_STM32F401C_DISCOVERY/cfg/board.chcfg b/os/hal/boards/ST_STM32F401C_DISCOVERY/cfg/board.chcfg index ae64e0e91..ee8ff704d 100644 --- a/os/hal/boards/ST_STM32F401C_DISCOVERY/cfg/board.chcfg +++ b/os/hal/boards/ST_STM32F401C_DISCOVERY/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f4xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32F401C-Discovery ST_STM32F401C_DISCOVERY diff --git a/os/hal/boards/ST_STM32F401C_DISCOVERY/cfg/board.fmpp b/os/hal/boards/ST_STM32F401C_DISCOVERY/cfg/board.fmpp new file mode 100644 index 000000000..41754c141 --- /dev/null +++ b/os/hal/boards/ST_STM32F401C_DISCOVERY/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f4xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_STM32F429I_DISCOVERY/board.c b/os/hal/boards/ST_STM32F429I_DISCOVERY/board.c index 65b74d0c6..5ee0873d7 100644 --- a/os/hal/boards/ST_STM32F429I_DISCOVERY/board.c +++ b/os/hal/boards/ST_STM32F429I_DISCOVERY/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -73,15 +135,81 @@ const PALConfig pal_default_config = { VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB1(STM32_GPIO_EN_MASK); + rccEnableAHB1(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); #endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -134,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_STM32F429I_DISCOVERY/board.h b/os/hal/boards/ST_STM32F429I_DISCOVERY/board.h index 4a02a87dd..80e245386 100644 --- a/os/hal/boards/ST_STM32F429I_DISCOVERY/board.h +++ b/os/hal/boards/ST_STM32F429I_DISCOVERY/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32F429I-Discovery board. */ @@ -229,7 +233,6 @@ #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) #define LINE_TP_INT PAL_LINE(GPIOA, 15U) - #define LINE_LCD_R3 PAL_LINE(GPIOB, 0U) #define LINE_LCD_R6 PAL_LINE(GPIOB, 1U) #define LINE_BOOT1 PAL_LINE(GPIOB, 2U) @@ -244,7 +247,6 @@ #define LINE_OTG_HS_VBUS PAL_LINE(GPIOB, 13U) #define LINE_OTG_HS_DM PAL_LINE(GPIOB, 14U) #define LINE_OTG_HS_DP PAL_LINE(GPIOB, 15U) - #define LINE_FMC_SDNWE PAL_LINE(GPIOC, 0U) #define LINE_SPI5_MEMS_CS PAL_LINE(GPIOC, 1U) #define LINE_SPI5_LCD_CS PAL_LINE(GPIOC, 2U) @@ -256,7 +258,6 @@ #define LINE_LCD_R2 PAL_LINE(GPIOC, 10U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) - #define LINE_FMC_D2 PAL_LINE(GPIOD, 0U) #define LINE_FMC_D3 PAL_LINE(GPIOD, 1U) #define LINE_LCD_G7 PAL_LINE(GPIOD, 3U) @@ -269,7 +270,6 @@ #define LINE_LCD_WRX PAL_LINE(GPIOD, 13U) #define LINE_FMC_D0 PAL_LINE(GPIOD, 14U) #define LINE_FMC_D1 PAL_LINE(GPIOD, 15U) - #define LINE_FMC_NBL0 PAL_LINE(GPIOE, 0U) #define LINE_FMC_NBL1 PAL_LINE(GPIOE, 1U) #define LINE_FMC_D4 PAL_LINE(GPIOE, 7U) @@ -281,7 +281,6 @@ #define LINE_FMC_D10 PAL_LINE(GPIOE, 13U) #define LINE_FMC_D11 PAL_LINE(GPIOE, 14U) #define LINE_FMC_D12 PAL_LINE(GPIOE, 15U) - #define LINE_FMC_A0 PAL_LINE(GPIOF, 0U) #define LINE_FMC_A1 PAL_LINE(GPIOF, 1U) #define LINE_FMC_A2 PAL_LINE(GPIOF, 2U) @@ -297,7 +296,6 @@ #define LINE_FMC_A7 PAL_LINE(GPIOF, 13U) #define LINE_FMC_A8 PAL_LINE(GPIOF, 14U) #define LINE_FMC_A9 PAL_LINE(GPIOF, 15U) - #define LINE_FMC_A10 PAL_LINE(GPIOG, 0U) #define LINE_FMC_A11 PAL_LINE(GPIOG, 1U) #define LINE_FMC_BA0 PAL_LINE(GPIOG, 4U) @@ -311,10 +309,24 @@ #define LINE_LED3_GREEN PAL_LINE(GPIOG, 13U) #define LINE_LED4_RED PAL_LINE(GPIOG, 14U) #define LINE_FMC_SDNCAS PAL_LINE(GPIOG, 15U) - #define LINE_OSC_IN PAL_LINE(GPIOH, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -1391,6 +1403,9 @@ PIN_AFIO_AF(GPIOI_PIN14, 0U) | \ PIN_AFIO_AF(GPIOI_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_STM32F429I_DISCOVERY/cfg/board.chcfg b/os/hal/boards/ST_STM32F429I_DISCOVERY/cfg/board.chcfg index d4357d3e3..afb6ad752 100644 --- a/os/hal/boards/ST_STM32F429I_DISCOVERY/cfg/board.chcfg +++ b/os/hal/boards/ST_STM32F429I_DISCOVERY/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f4xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32F429I-Discovery ST_STM32F429I_DISCOVERY diff --git a/os/hal/boards/ST_STM32F429I_DISCOVERY/cfg/board.fmpp b/os/hal/boards/ST_STM32F429I_DISCOVERY/cfg/board.fmpp new file mode 100644 index 000000000..41754c141 --- /dev/null +++ b/os/hal/boards/ST_STM32F429I_DISCOVERY/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f4xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_STM32F469I_DISCOVERY/board.c b/os/hal/boards/ST_STM32F469I_DISCOVERY/board.c index 65b74d0c6..5ee0873d7 100644 --- a/os/hal/boards/ST_STM32F469I_DISCOVERY/board.c +++ b/os/hal/boards/ST_STM32F469I_DISCOVERY/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -73,15 +135,81 @@ const PALConfig pal_default_config = { VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB1(STM32_GPIO_EN_MASK); + rccEnableAHB1(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); #endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -134,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_STM32F469I_DISCOVERY/board.h b/os/hal/boards/ST_STM32F469I_DISCOVERY/board.h index 961529017..d115bea98 100644 --- a/os/hal/boards/ST_STM32F469I_DISCOVERY/board.h +++ b/os/hal/boards/ST_STM32F469I_DISCOVERY/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32F469I-Discovery board. */ @@ -300,7 +304,6 @@ #define LINE_SWCLK PAL_LINE(GPIOA, 14U) #define LINE_EXT_11 PAL_LINE(GPIOA, 15U) #define LINE_SPI1_NSS PAL_LINE(GPIOA, 15U) - #define LINE_EXT_RESET PAL_LINE(GPIOB, 0U) #define LINE_ARD_A0 PAL_LINE(GPIOB, 1U) #define LINE_OTG_FS1_POWERSWITCHON PAL_LINE(GPIOB, 2U) @@ -324,7 +327,6 @@ #define LINE_SPI2_MISO PAL_LINE(GPIOB, 14U) #define LINE_ARD_D11 PAL_LINE(GPIOB, 15U) #define LINE_SPI2_MOSI PAL_LINE(GPIOB, 15U) - #define LINE_SDNWE PAL_LINE(GPIOC, 0U) #define LINE_EXT_14 PAL_LINE(GPIOC, 1U) #define LINE_ADC123_IN11 PAL_LINE(GPIOC, 1U) @@ -350,7 +352,6 @@ #define LINE_ANTI_TAMP1 PAL_LINE(GPIOC, 13U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) - #define LINE_USD_CMD PAL_LINE(GPIOD, 2U) #define LINE_SDIO_CMD PAL_LINE(GPIOD, 2U) #define LINE_ARD_D13 PAL_LINE(GPIOD, 3U) @@ -361,7 +362,6 @@ #define LINE_SAI1_SD_A PAL_LINE(GPIOD, 6U) #define LINE_MIC_CK PAL_LINE(GPIOD, 13U) #define LINE_TIM4_CH2 PAL_LINE(GPIOD, 13U) - #define LINE_FMC_NBL0 PAL_LINE(GPIOE, 0U) #define LINE_FMC_NBL1 PAL_LINE(GPIOE, 1U) #define LINE_AUDIO_RST PAL_LINE(GPIOE, 2U) @@ -369,14 +369,12 @@ #define LINE_SAI1_FSA PAL_LINE(GPIOE, 4U) #define LINE_SAI1_SCKA PAL_LINE(GPIOE, 5U) #define LINE_SAI1_SDA PAL_LINE(GPIOE, 6U) - #define LINE_QSPI_BK1_IO3 PAL_LINE(GPIOF, 6U) #define LINE_QSPI_BK1_IO2 PAL_LINE(GPIOF, 7U) #define LINE_QSPI_BK1_IO0 PAL_LINE(GPIOF, 8U) #define LINE_QSPI_BK1_IO1 PAL_LINE(GPIOF, 9U) #define LINE_QSPI_CLK PAL_LINE(GPIOF, 10U) #define LINE_SDNRAS PAL_LINE(GPIOF, 11U) - #define LINE_USD_DETECT PAL_LINE(GPIOG, 2U) #define LINE_LED1 PAL_LINE(GPIOG, 6U) #define LINE_SAI1_MCLKA PAL_LINE(GPIOG, 7U) @@ -388,7 +386,6 @@ #define LINE_ARD_D2 PAL_LINE(GPIOG, 13U) #define LINE_ARD_D1 PAL_LINE(GPIOG, 14U) #define LINE_SDNCAS PAL_LINE(GPIOG, 15U) - #define LINE_OSC_IN PAL_LINE(GPIOH, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) #define LINE_SDCKE0 PAL_LINE(GPIOH, 2U) @@ -398,15 +395,28 @@ #define LINE_ARD_D10 PAL_LINE(GPIOH, 6U) #define LINE_SPI2_NSS PAL_LINE(GPIOH, 6U) #define LINE_LCD_RESET PAL_LINE(GPIOH, 7U) - #define LINE_FMC_NBL2 PAL_LINE(GPIOI, 4U) #define LINE_FMC_NBL3 PAL_LINE(GPIOI, 5U) - #define LINE_DSI_TE PAL_LINE(GPIOJ, 2U) #define LINE_LCD_INT PAL_LINE(GPIOJ, 5U) - #define LINE_LED4 PAL_LINE(GPIOK, 3U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + /* * I/O ports initial setup, this configuration is established soon after reset * in the initialization code. @@ -1716,6 +1726,9 @@ PIN_AFIO_AF(GPIOK_PIN14, 0U) | \ PIN_AFIO_AF(GPIOK_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_STM32F469I_DISCOVERY/cfg/board.chcfg b/os/hal/boards/ST_STM32F469I_DISCOVERY/cfg/board.chcfg index da6b66773..a00548ea1 100644 --- a/os/hal/boards/ST_STM32F469I_DISCOVERY/cfg/board.chcfg +++ b/os/hal/boards/ST_STM32F469I_DISCOVERY/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f4xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32F469I-Discovery ST_STM32F469I_DISCOVERY diff --git a/os/hal/boards/ST_STM32F469I_DISCOVERY/cfg/board.fmpp b/os/hal/boards/ST_STM32F469I_DISCOVERY/cfg/board.fmpp new file mode 100644 index 000000000..41754c141 --- /dev/null +++ b/os/hal/boards/ST_STM32F469I_DISCOVERY/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f4xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_STM32F4_DISCOVERY/board.c b/os/hal/boards/ST_STM32F4_DISCOVERY/board.c index 8544deb1b..5ee0873d7 100644 --- a/os/hal/boards/ST_STM32F4_DISCOVERY/board.c +++ b/os/hal/boards/ST_STM32F4_DISCOVERY/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. diff --git a/os/hal/boards/ST_STM32F4_DISCOVERY/board.h b/os/hal/boards/ST_STM32F4_DISCOVERY/board.h index 9ccc2cf24..f0373cc12 100644 --- a/os/hal/boards/ST_STM32F4_DISCOVERY/board.h +++ b/os/hal/boards/ST_STM32F4_DISCOVERY/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -229,35 +229,27 @@ #define LINE_OTG_FS_DP PAL_LINE(GPIOA, 12U) #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) - #define LINE_SWO PAL_LINE(GPIOB, 3U) #define LINE_SCL PAL_LINE(GPIOB, 6U) #define LINE_SDA PAL_LINE(GPIOB, 9U) #define LINE_CLK_IN PAL_LINE(GPIOB, 10U) - #define LINE_OTG_FS_POWER_ON PAL_LINE(GPIOC, 0U) #define LINE_PDM_OUT PAL_LINE(GPIOC, 3U) #define LINE_MCLK PAL_LINE(GPIOC, 7U) #define LINE_SCLK PAL_LINE(GPIOC, 10U) #define LINE_SDIN PAL_LINE(GPIOC, 12U) - #define LINE_RESET PAL_LINE(GPIOD, 4U) #define LINE_OVER_CURRENT PAL_LINE(GPIOD, 5U) #define LINE_LED4 PAL_LINE(GPIOD, 12U) #define LINE_LED3 PAL_LINE(GPIOD, 13U) #define LINE_LED5 PAL_LINE(GPIOD, 14U) #define LINE_LED6 PAL_LINE(GPIOD, 15U) - #define LINE_INT1 PAL_LINE(GPIOE, 0U) #define LINE_INT2 PAL_LINE(GPIOE, 1U) #define LINE_CS_SPI PAL_LINE(GPIOE, 3U) - - - #define LINE_OSC_IN PAL_LINE(GPIOH, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) - /*===========================================================================*/ /* Driver pre-compile time settings. */ /*===========================================================================*/ diff --git a/os/hal/boards/ST_STM32F4_DISCOVERY/cfg/board.chcfg b/os/hal/boards/ST_STM32F4_DISCOVERY/cfg/board.chcfg index 4fadd11c2..3852564a8 100644 --- a/os/hal/boards/ST_STM32F4_DISCOVERY/cfg/board.chcfg +++ b/os/hal/boards/ST_STM32F4_DISCOVERY/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f4xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32F4-Discovery ST_STM32F4_DISCOVERY diff --git a/os/hal/boards/ST_STM32F4_DISCOVERY/cfg/board.fmpp b/os/hal/boards/ST_STM32F4_DISCOVERY/cfg/board.fmpp new file mode 100644 index 000000000..41754c141 --- /dev/null +++ b/os/hal/boards/ST_STM32F4_DISCOVERY/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f4xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_STM32F746G_DISCOVERY/board.c b/os/hal/boards/ST_STM32F746G_DISCOVERY/board.c index f9de5a817..0fa02614d 100644 --- a/os/hal/boards/ST_STM32F746G_DISCOVERY/board.c +++ b/os/hal/boards/ST_STM32F746G_DISCOVERY/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. diff --git a/os/hal/boards/ST_STM32F746G_DISCOVERY/board.h b/os/hal/boards/ST_STM32F746G_DISCOVERY/board.h index 1d82a2199..b9c9388b8 100644 --- a/os/hal/boards/ST_STM32F746G_DISCOVERY/board.h +++ b/os/hal/boards/ST_STM32F746G_DISCOVERY/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -282,7 +282,6 @@ #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) #define LINE_ARD_D9 PAL_LINE(GPIOA, 15U) - #define LINE_ULPI_D1 PAL_LINE(GPIOB, 0U) #define LINE_ULPI_D2 PAL_LINE(GPIOB, 1U) #define LINE_QSPI_CLK PAL_LINE(GPIOB, 2U) @@ -299,7 +298,6 @@ #define LINE_ULPI_D6 PAL_LINE(GPIOB, 13U) #define LINE_ARD_D12 PAL_LINE(GPIOB, 14U) #define LINE_ARD_D11 PAL_LINE(GPIOB, 15U) - #define LINE_ULPI_STP PAL_LINE(GPIOC, 0U) #define LINE_RMII_MDC PAL_LINE(GPIOC, 1U) #define LINE_ULPI_DIR PAL_LINE(GPIOC, 2U) @@ -316,7 +314,6 @@ #define LINE_SD_DETECT PAL_LINE(GPIOC, 13U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) - #define LINE_FMC_D2 PAL_LINE(GPIOD, 0U) #define LINE_FMC_D3 PAL_LINE(GPIOD, 1U) #define LINE_SD_CMD PAL_LINE(GPIOD, 2U) @@ -333,7 +330,6 @@ #define LINE_QSPI_D3 PAL_LINE(GPIOD, 13U) #define LINE_FMC_D0 PAL_LINE(GPIOD, 14U) #define LINE_FMC_D1 PAL_LINE(GPIOD, 15U) - #define LINE_FMC_NBL0 PAL_LINE(GPIOE, 0U) #define LINE_FMC_NBL1 PAL_LINE(GPIOE, 1U) #define LINE_QSPI_D2 PAL_LINE(GPIOE, 2U) @@ -350,7 +346,6 @@ #define LINE_FMC_D10 PAL_LINE(GPIOE, 13U) #define LINE_FMC_11 PAL_LINE(GPIOE, 14U) #define LINE_FMC_D12 PAL_LINE(GPIOE, 15U) - #define LINE_FMC_A0 PAL_LINE(GPIOF, 0U) #define LINE_FMC_A1 PAL_LINE(GPIOF, 1U) #define LINE_FMC_A2 PAL_LINE(GPIOF, 2U) @@ -367,7 +362,6 @@ #define LINE_FMC_A7 PAL_LINE(GPIOF, 13U) #define LINE_FMC_A8 PAL_LINE(GPIOF, 14U) #define LINE_FMC_A9 PAL_LINE(GPIOF, 15U) - #define LINE_FMC_A10 PAL_LINE(GPIOG, 0U) #define LINE_FMC_A11 PAL_LINE(GPIOG, 1U) #define LINE_RMII_RXER PAL_LINE(GPIOG, 2U) @@ -384,7 +378,6 @@ #define LINE_RMII_TXD0 PAL_LINE(GPIOG, 13U) #define LINE_RMII_TXD1 PAL_LINE(GPIOG, 14U) #define LINE_FMC_SDNCAS PAL_LINE(GPIOG, 15U) - #define LINE_OSC_IN PAL_LINE(GPIOH, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) #define LINE_TP1 PAL_LINE(GPIOH, 2U) @@ -401,7 +394,6 @@ #define LINE_DCMI_PWR_EN PAL_LINE(GPIOH, 13U) #define LINE_DCMI_D4 PAL_LINE(GPIOH, 14U) #define LINE_TP_PH15 PAL_LINE(GPIOH, 15U) - #define LINE_ARD_D10 PAL_LINE(GPIOI, 0U) #define LINE_ARD_D13 PAL_LINE(GPIOI, 1U) #define LINE_ARD_D8 PAL_LINE(GPIOI, 2U) @@ -418,7 +410,6 @@ #define LINE_LCD_INT PAL_LINE(GPIOI, 13U) #define LINE_LCD_CLK PAL_LINE(GPIOI, 14U) #define LINE_LCD_R0 PAL_LINE(GPIOI, 15U) - #define LINE_LCD_R1 PAL_LINE(GPIOJ, 0U) #define LINE_LCD_R2 PAL_LINE(GPIOJ, 1U) #define LINE_LCD_R3 PAL_LINE(GPIOJ, 2U) @@ -435,7 +426,6 @@ #define LINE_LCD_B1 PAL_LINE(GPIOJ, 13U) #define LINE_LCD_B2 PAL_LINE(GPIOJ, 14U) #define LINE_LCD_B3 PAL_LINE(GPIOJ, 15U) - #define LINE_LCD_G5 PAL_LINE(GPIOK, 0U) #define LINE_LCD_G6 PAL_LINE(GPIOK, 1U) #define LINE_LCD_G7 PAL_LINE(GPIOK, 2U) diff --git a/os/hal/boards/ST_STM32F746G_DISCOVERY/cfg/board.fmpp b/os/hal/boards/ST_STM32F746G_DISCOVERY/cfg/board.fmpp new file mode 100644 index 000000000..ded6d509f --- /dev/null +++ b/os/hal/boards/ST_STM32F746G_DISCOVERY/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f7xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_STM32F769I_DISCOVERY/board.c b/os/hal/boards/ST_STM32F769I_DISCOVERY/board.c index d59126244..b3924f0c0 100644 --- a/os/hal/boards/ST_STM32F769I_DISCOVERY/board.c +++ b/os/hal/boards/ST_STM32F769I_DISCOVERY/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,14 +20,76 @@ */ #include "hal.h" +#include "stm32_gpio.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Type of STM32 GPIO port setup. + */ +typedef struct { + uint32_t moder; + uint32_t otyper; + uint32_t ospeedr; + uint32_t pupdr; + uint32_t odr; + uint32_t afrl; + uint32_t afrh; +} gpio_setup_t; + +/** + * @brief Type of STM32 GPIO initialization data. + */ +typedef struct { +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) + gpio_setup_t PAData; +#endif +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) + gpio_setup_t PBData; +#endif +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) + gpio_setup_t PCData; +#endif +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) + gpio_setup_t PDData; +#endif +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) + gpio_setup_t PEData; +#endif +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) + gpio_setup_t PFData; +#endif +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) + gpio_setup_t PGData; +#endif +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) + gpio_setup_t PHData; +#endif +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) + gpio_setup_t PIData; +#endif +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) + gpio_setup_t PJData; +#endif +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) + gpio_setup_t PKData; +#endif +} gpio_config_t; -#if HAL_USE_PAL || defined(__DOXYGEN__) /** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. + * @brief STM32 GPIO static initialization data. */ -const PALConfig pal_default_config = { +static const gpio_config_t gpio_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -73,15 +135,81 @@ const PALConfig pal_default_config = { VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} #endif }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { + + gpiop->OTYPER = config->otyper; + gpiop->OSPEEDR = config->ospeedr; + gpiop->PUPDR = config->pupdr; + gpiop->ODR = config->odr; + gpiop->AFRL = config->afrl; + gpiop->AFRH = config->afrh; + gpiop->MODER = config->moder; +} + +static void stm32_gpio_init(void) { + + /* Enabling GPIO-related clocks, the mask comes from the + registry header file.*/ + rccResetAHB1(STM32_GPIO_EN_MASK); + rccEnableAHB1(STM32_GPIO_EN_MASK, true); + + /* Initializing all the defined GPIO ports.*/ +#if STM32_HAS_GPIOA + gpio_init(GPIOA, &gpio_default_config.PAData); +#endif +#if STM32_HAS_GPIOB + gpio_init(GPIOB, &gpio_default_config.PBData); +#endif +#if STM32_HAS_GPIOC + gpio_init(GPIOC, &gpio_default_config.PCData); +#endif +#if STM32_HAS_GPIOD + gpio_init(GPIOD, &gpio_default_config.PDData); +#endif +#if STM32_HAS_GPIOE + gpio_init(GPIOE, &gpio_default_config.PEData); +#endif +#if STM32_HAS_GPIOF + gpio_init(GPIOF, &gpio_default_config.PFData); +#endif +#if STM32_HAS_GPIOG + gpio_init(GPIOG, &gpio_default_config.PGData); +#endif +#if STM32_HAS_GPIOH + gpio_init(GPIOH, &gpio_default_config.PHData); +#endif +#if STM32_HAS_GPIOI + gpio_init(GPIOI, &gpio_default_config.PIData); +#endif +#if STM32_HAS_GPIOJ + gpio_init(GPIOJ, &gpio_default_config.PJData); #endif +#if STM32_HAS_GPIOK + gpio_init(GPIOK, &gpio_default_config.PKData); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ /** * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. + * @details GPIO ports and system clocks are initialized before everything + * else. */ void __early_init(void) { + stm32_gpio_init(); stm32_clock_init(); } @@ -134,4 +262,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @todo Add your board-specific code, if any. */ void boardInit(void) { + } diff --git a/os/hal/boards/ST_STM32F769I_DISCOVERY/board.h b/os/hal/boards/ST_STM32F769I_DISCOVERY/board.h index 0653fa583..26cfa2ae7 100644 --- a/os/hal/boards/ST_STM32F769I_DISCOVERY/board.h +++ b/os/hal/boards/ST_STM32F769I_DISCOVERY/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,6 +22,10 @@ #ifndef BOARD_H #define BOARD_H +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + /* * Setup for STMicroelectronics STM32F769I-Discovery board. */ @@ -280,7 +284,6 @@ #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) #define LINE_CEC PAL_LINE(GPIOA, 15U) - #define LINE_ULPI_D1 PAL_LINE(GPIOB, 0U) #define LINE_ULPI_D2 PAL_LINE(GPIOB, 1U) #define LINE_QSPI_CLK PAL_LINE(GPIOB, 2U) @@ -298,7 +301,6 @@ #define LINE_ULPI_D6 PAL_LINE(GPIOB, 13U) #define LINE_ARD_D12 PAL_LINE(GPIOB, 14U) #define LINE_ARD_D11 PAL_LINE(GPIOB, 15U) - #define LINE_ULPI_STP PAL_LINE(GPIOC, 0U) #define LINE_RMII_MDC PAL_LINE(GPIOC, 1U) #define LINE_ARD_A2 PAL_LINE(GPIOC, 2U) @@ -314,7 +316,6 @@ #define LINE_WIFI_RX PAL_LINE(GPIOC, 12U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) - #define LINE_FMC_D2 PAL_LINE(GPIOD, 0U) #define LINE_FMC_D3 PAL_LINE(GPIOD, 1U) #define LINE_WIFI_TX PAL_LINE(GPIOD, 2U) @@ -332,7 +333,6 @@ #define LINE_QSPI_D3 PAL_LINE(GPIOD, 13U) #define LINE_FMC_D0 PAL_LINE(GPIOD, 14U) #define LINE_FMC_D1 PAL_LINE(GPIOD, 15U) - #define LINE_FMC_NBL0 PAL_LINE(GPIOE, 0U) #define LINE_FMC_NBL1 PAL_LINE(GPIOE, 1U) #define LINE_QSPI_D2 PAL_LINE(GPIOE, 2U) @@ -349,7 +349,6 @@ #define LINE_FMC_D10 PAL_LINE(GPIOE, 13U) #define LINE_FMC_11 PAL_LINE(GPIOE, 14U) #define LINE_FMC_D12 PAL_LINE(GPIOE, 15U) - #define LINE_FMC_A0 PAL_LINE(GPIOF, 0U) #define LINE_FMC_A1 PAL_LINE(GPIOF, 1U) #define LINE_FMC_A2 PAL_LINE(GPIOF, 2U) @@ -366,7 +365,6 @@ #define LINE_FMC_A7 PAL_LINE(GPIOF, 13U) #define LINE_FMC_A8 PAL_LINE(GPIOF, 14U) #define LINE_FMC_A9 PAL_LINE(GPIOF, 15U) - #define LINE_FMC_A10 PAL_LINE(GPIOG, 0U) #define LINE_FMC_A11 PAL_LINE(GPIOG, 1U) #define LINE_FMC_A12 PAL_LINE(GPIOG, 2U) @@ -383,7 +381,6 @@ #define LINE_RMII_TXD0 PAL_LINE(GPIOG, 13U) #define LINE_RMII_TXD1 PAL_LINE(GPIOG, 14U) #define LINE_FMC_SDNCAS PAL_LINE(GPIOG, 15U) - #define LINE_OSC_IN PAL_LINE(GPIOH, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) #define LINE_FMC_SDCKE0 PAL_LINE(GPIOH, 2U) @@ -400,7 +397,6 @@ #define LINE_FMC_D21 PAL_LINE(GPIOH, 13U) #define LINE_FMC_D22 PAL_LINE(GPIOH, 14U) #define LINE_FMC_D23 PAL_LINE(GPIOH, 15U) - #define LINE_FMC_D24 PAL_LINE(GPIOI, 0U) #define LINE_FMC_D25 PAL_LINE(GPIOI, 1U) #define LINE_FMC_D26 PAL_LINE(GPIOI, 2U) @@ -415,7 +411,6 @@ #define LINE_LCD_INT PAL_LINE(GPIOI, 13U) #define LINE_LCD_BL_CTRL PAL_LINE(GPIOI, 14U) #define LINE_SD_DETECT PAL_LINE(GPIOI, 15U) - #define LINE_ARD_D4 PAL_LINE(GPIOJ, 0U) #define LINE_ARD_D2 PAL_LINE(GPIOJ, 1U) #define LINE_DSI_TE PAL_LINE(GPIOJ, 2U) @@ -427,6 +422,21 @@ #define LINE_WIFI_RST PAL_LINE(GPIOJ, 14U) #define LINE_DSI_RESET PAL_LINE(GPIOJ, 15U) +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset @@ -1737,6 +1747,9 @@ PIN_AFIO_AF(GPIOK_PIN14, 0U) | \ PIN_AFIO_AF(GPIOK_PIN15, 0U)) +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus diff --git a/os/hal/boards/ST_STM32F769I_DISCOVERY/cfg/board.chcfg b/os/hal/boards/ST_STM32F769I_DISCOVERY/cfg/board.chcfg index d7dcc9f31..9605e58d7 100644 --- a/os/hal/boards/ST_STM32F769I_DISCOVERY/cfg/board.chcfg +++ b/os/hal/boards/ST_STM32F769I_DISCOVERY/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32f7xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32F769I-Discovery ST_STM32F769I_DISCOVERY diff --git a/os/hal/boards/ST_STM32F769I_DISCOVERY/cfg/board.fmpp b/os/hal/boards/ST_STM32F769I_DISCOVERY/cfg/board.fmpp new file mode 100644 index 000000000..ded6d509f --- /dev/null +++ b/os/hal/boards/ST_STM32F769I_DISCOVERY/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f7xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_STM32L053_DISCOVERY/board.c b/os/hal/boards/ST_STM32L053_DISCOVERY/board.c index 22908902f..15c4d29a8 100644 --- a/os/hal/boards/ST_STM32L053_DISCOVERY/board.c +++ b/os/hal/boards/ST_STM32L053_DISCOVERY/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. diff --git a/os/hal/boards/ST_STM32L053_DISCOVERY/board.h b/os/hal/boards/ST_STM32L053_DISCOVERY/board.h index c3bf67534..afee11a0e 100644 --- a/os/hal/boards/ST_STM32L053_DISCOVERY/board.h +++ b/os/hal/boards/ST_STM32L053_DISCOVERY/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -163,7 +163,6 @@ #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) #define LINE_EPD1_CS PAL_LINE(GPIOA, 15U) - #define LINE_TS_G3_IO2 PAL_LINE(GPIOB, 0U) #define LINE_TS_G3_IO3 PAL_LINE(GPIOB, 1U) #define LINE_EPD1_RESET PAL_LINE(GPIOB, 2U) @@ -180,13 +179,10 @@ #define LINE_NFC_SCK PAL_LINE(GPIOB, 13U) #define LINE_NFC_MISO PAL_LINE(GPIOB, 14U) #define LINE_NFC_MOSI PAL_LINE(GPIOB, 15U) - #define LINE_MFX_IRQ_OUT PAL_LINE(GPIOC, 13U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) - - /*===========================================================================*/ /* Driver pre-compile time settings. */ /*===========================================================================*/ diff --git a/os/hal/boards/ST_STM32L053_DISCOVERY/cfg/board.chcfg b/os/hal/boards/ST_STM32L053_DISCOVERY/cfg/board.chcfg index d99a0cb28..3d4c13333 100644 --- a/os/hal/boards/ST_STM32L053_DISCOVERY/cfg/board.chcfg +++ b/os/hal/boards/ST_STM32L053_DISCOVERY/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32l0xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32L053-Discovery ST_STM32L053_DISCOVERY diff --git a/os/hal/boards/ST_STM32L053_DISCOVERY/cfg/board.fmpp b/os/hal/boards/ST_STM32L053_DISCOVERY/cfg/board.fmpp new file mode 100644 index 000000000..b3ba947fb --- /dev/null +++ b/os/hal/boards/ST_STM32L053_DISCOVERY/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32l0xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_STM32L476_DISCOVERY/board.c b/os/hal/boards/ST_STM32L476_DISCOVERY/board.c index 425f8b03a..177ec13c8 100644 --- a/os/hal/boards/ST_STM32L476_DISCOVERY/board.c +++ b/os/hal/boards/ST_STM32L476_DISCOVERY/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. diff --git a/os/hal/boards/ST_STM32L476_DISCOVERY/board.h b/os/hal/boards/ST_STM32L476_DISCOVERY/board.h index 33d1e0b8a..677d84d53 100644 --- a/os/hal/boards/ST_STM32L476_DISCOVERY/board.h +++ b/os/hal/boards/ST_STM32L476_DISCOVERY/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -221,7 +221,6 @@ #define LINE_OTG_FS_DP PAL_LINE(GPIOA, 12U) #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) - #define LINE_LCD_SEG21 PAL_LINE(GPIOB, 0U) #define LINE_LCD_SEG2 PAL_LINE(GPIOB, 1U) #define LINE_LED_RED PAL_LINE(GPIOB, 2U) @@ -241,7 +240,6 @@ #define LINE_LCD_SEG3 PAL_LINE(GPIOB, 13U) #define LINE_LCD_SEG19 PAL_LINE(GPIOB, 14U) #define LINE_LCD_SEG4 PAL_LINE(GPIOB, 15U) - #define LINE_MAG_CS PAL_LINE(GPIOC, 0U) #define LINE_MAG_INT PAL_LINE(GPIOC, 1U) #define LINE_MAG_DRDY PAL_LINE(GPIOC, 2U) @@ -258,7 +256,6 @@ #define LINE_MFX_IRQ_OUT PAL_LINE(GPIOC, 13U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) - #define LINE_EXT_RST PAL_LINE(GPIOD, 0U) #define LINE_MEMS_SCK PAL_LINE(GPIOD, 1U) #define LINE_GYRO_INT1 PAL_LINE(GPIOD, 2U) @@ -275,7 +272,6 @@ #define LINE_LCD_SEG7 PAL_LINE(GPIOD, 13U) #define LINE_LCD_SEG15 PAL_LINE(GPIOD, 14U) #define LINE_LCD_SEG8 PAL_LINE(GPIOD, 15U) - #define LINE_XL_CS PAL_LINE(GPIOE, 0U) #define LINE_XL_INT PAL_LINE(GPIOE, 1U) #define LINE_SAI1_MCK PAL_LINE(GPIOE, 2U) @@ -292,9 +288,6 @@ #define LINE_QSPI_D1 PAL_LINE(GPIOE, 13U) #define LINE_QSPI_D2 PAL_LINE(GPIOE, 14U) #define LINE_QSPI_D3 PAL_LINE(GPIOE, 15U) - - - #define LINE_OSC_IN PAL_LINE(GPIOH, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) diff --git a/os/hal/boards/ST_STM32L476_DISCOVERY/cfg/board.chcfg b/os/hal/boards/ST_STM32L476_DISCOVERY/cfg/board.chcfg index fe7dd57e6..880c420eb 100644 --- a/os/hal/boards/ST_STM32L476_DISCOVERY/cfg/board.chcfg +++ b/os/hal/boards/ST_STM32L476_DISCOVERY/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32l4xx/templates .. - 3.0.x + 5.0.x STMicroelectronics STM32L476-Discovery ST_STM32L476_DISCOVERY diff --git a/os/hal/boards/ST_STM32L476_DISCOVERY/cfg/board.fmpp b/os/hal/boards/ST_STM32L476_DISCOVERY/cfg/board.fmpp new file mode 100644 index 000000000..3c311d3e9 --- /dev/null +++ b/os/hal/boards/ST_STM32L476_DISCOVERY/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32l4xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/ST_STM32L_DISCOVERY/board.c b/os/hal/boards/ST_STM32L_DISCOVERY/board.c index 753ef0076..3c291169d 100644 --- a/os/hal/boards/ST_STM32L_DISCOVERY/board.c +++ b/os/hal/boards/ST_STM32L_DISCOVERY/board.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. diff --git a/os/hal/boards/ST_STM32L_DISCOVERY/board.h b/os/hal/boards/ST_STM32L_DISCOVERY/board.h index de7a8b749..648f593d3 100644 --- a/os/hal/boards/ST_STM32L_DISCOVERY/board.h +++ b/os/hal/boards/ST_STM32L_DISCOVERY/board.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -167,18 +167,13 @@ #define LINE_JTAG_TMS PAL_LINE(GPIOA, 13U) #define LINE_JTAG_TCK PAL_LINE(GPIOA, 14U) #define LINE_JTAG_TDI PAL_LINE(GPIOA, 15U) - #define LINE_BOOT1 PAL_LINE(GPIOB, 2U) #define LINE_JTAG_TDO PAL_LINE(GPIOB, 3U) #define LINE_JTAG_TRST PAL_LINE(GPIOB, 4U) #define LINE_LED4 PAL_LINE(GPIOB, 6U) #define LINE_LED3 PAL_LINE(GPIOB, 7U) - #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) - - - #define LINE_OSC_IN PAL_LINE(GPIOH, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) diff --git a/os/hal/boards/ST_STM32L_DISCOVERY/cfg/board.chcfg b/os/hal/boards/ST_STM32L_DISCOVERY/cfg/board.chcfg index 1e6440077..712d7e92d 100644 --- a/os/hal/boards/ST_STM32L_DISCOVERY/cfg/board.chcfg +++ b/os/hal/boards/ST_STM32L_DISCOVERY/cfg/board.chcfg @@ -6,7 +6,7 @@ resources/gencfg/processors/boards/stm32l1xx/templates .. - 3.0.x + 5.0.x ST STM32L-Discovery ST_STM32L_DISCOVERY diff --git a/os/hal/boards/ST_STM32L_DISCOVERY/cfg/board.fmpp b/os/hal/boards/ST_STM32L_DISCOVERY/cfg/board.fmpp new file mode 100644 index 000000000..029da4fdd --- /dev/null +++ b/os/hal/boards/ST_STM32L_DISCOVERY/cfg/board.fmpp @@ -0,0 +1,15 @@ +sourceRoot: ../../../../../tools/ftl/processors/boards/stm32l1xx/templates +outputRoot: .. +dataRoot: . + +freemarkerLinks: { + lib: ../../../../../tools/ftl/libs +} + +data : { + doc1:xml ( + board.chcfg + { + } + ) +} diff --git a/os/hal/boards/genboards.sh b/os/hal/boards/genboards.sh new file mode 100644 index 000000000..91b6cc6ad --- /dev/null +++ b/os/hal/boards/genboards.sh @@ -0,0 +1,18 @@ +#!/bin/bash +if [ $# -eq 0 ] +then + find . -name board.fmpp -exec bash genboards.sh '{}' \; +elif [ $# -eq 1 ] +then + path=$(readlink -f $(dirname $1)) + echo "Processing: $1" + cd $path + if ! fmpp -q -C board.fmpp + then + echo + echo "aborted" + exit 1 + fi +else + echo "illegal number of arguments" +fi -- cgit v1.2.3