From 603e117103e1404fff9799d52bb3dcd469b9044a Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Sun, 16 Aug 2015 18:44:15 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8224 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/boards/ST_STM32F746G_DISCOVERY/board.h | 32 +++++++++++----------- .../boards/ST_STM32F746G_DISCOVERY/cfg/board.chcfg | 4 +-- 2 files changed, 18 insertions(+), 18 deletions(-) (limited to 'os/hal/boards/ST_STM32F746G_DISCOVERY') diff --git a/os/hal/boards/ST_STM32F746G_DISCOVERY/board.h b/os/hal/boards/ST_STM32F746G_DISCOVERY/board.h index 367ea9ee7..fc65ae07a 100644 --- a/os/hal/boards/ST_STM32F746G_DISCOVERY/board.h +++ b/os/hal/boards/ST_STM32F746G_DISCOVERY/board.h @@ -68,7 +68,7 @@ #define GPIOA_ULPI_CK 5U #define GPIOA_DCMI_PIXCK 6U #define GPIOA_RMII_CRS_DV 7U -#define GPIOA_ARD_D10 8U +#define GPIOA_ARD_D5 8U #define GPIOA_VCP_TX 9U #define GPIOA_OTG_FS_ID 10U #define GPIOA_OTG_FS_DM 11U @@ -196,7 +196,7 @@ #define GPIOH_DCMI_D4 14U #define GPIOH_TP_PH15 15U -#define GPIOI_ARD_D5 0U +#define GPIOI_ARD_D10 0U #define GPIOI_ARD_D13 1U #define GPIOI_ARD_D8 2U #define GPIOI_ARD_D7 3U @@ -280,7 +280,7 @@ * PA5 - ULPI_CK (alternate 10). * PA6 - DCMI_PIXCK (input pullup). * PA7 - RMII_CRS_DV (alternate 11). - * PA8 - ARD_D10 (input pullup). + * PA8 - ARD_D5 (input pullup). * PA9 - VCP_TX (alternate 7). * PA10 - OTG_FS_ID (alternate 10). * PA11 - OTG_FS_DM (alternate 10). @@ -297,7 +297,7 @@ PIN_MODE_ALTERNATE(GPIOA_ULPI_CK) | \ PIN_MODE_INPUT(GPIOA_DCMI_PIXCK) | \ PIN_MODE_ALTERNATE(GPIOA_RMII_CRS_DV) |\ - PIN_MODE_INPUT(GPIOA_ARD_D10) | \ + PIN_MODE_INPUT(GPIOA_ARD_D5) | \ PIN_MODE_ALTERNATE(GPIOA_VCP_TX) | \ PIN_MODE_ALTERNATE(GPIOA_OTG_FS_ID) | \ PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | \ @@ -313,7 +313,7 @@ PIN_OTYPE_PUSHPULL(GPIOA_ULPI_CK) | \ PIN_OTYPE_PUSHPULL(GPIOA_DCMI_PIXCK) | \ PIN_OTYPE_PUSHPULL(GPIOA_RMII_CRS_DV) |\ - PIN_OTYPE_PUSHPULL(GPIOA_ARD_D10) | \ + PIN_OTYPE_PUSHPULL(GPIOA_ARD_D5) | \ PIN_OTYPE_PUSHPULL(GPIOA_VCP_TX) | \ PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_ID) | \ PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DM) | \ @@ -329,7 +329,7 @@ PIN_OSPEED_HIGH(GPIOA_ULPI_CK) | \ PIN_OSPEED_HIGH(GPIOA_DCMI_PIXCK) | \ PIN_OSPEED_VERYLOW(GPIOA_RMII_CRS_DV) |\ - PIN_OSPEED_HIGH(GPIOA_ARD_D10) | \ + PIN_OSPEED_HIGH(GPIOA_ARD_D5) | \ PIN_OSPEED_HIGH(GPIOA_VCP_TX) | \ PIN_OSPEED_HIGH(GPIOA_OTG_FS_ID) | \ PIN_OSPEED_HIGH(GPIOA_OTG_FS_DM) | \ @@ -345,7 +345,7 @@ PIN_PUPDR_FLOATING(GPIOA_ULPI_CK) | \ PIN_PUPDR_PULLUP(GPIOA_DCMI_PIXCK) | \ PIN_PUPDR_FLOATING(GPIOA_RMII_CRS_DV) |\ - PIN_PUPDR_PULLUP(GPIOA_ARD_D10) | \ + PIN_PUPDR_PULLUP(GPIOA_ARD_D5) | \ PIN_PUPDR_FLOATING(GPIOA_VCP_TX) | \ PIN_PUPDR_FLOATING(GPIOA_OTG_FS_ID) | \ PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) | \ @@ -361,7 +361,7 @@ PIN_ODR_HIGH(GPIOA_ULPI_CK) | \ PIN_ODR_HIGH(GPIOA_DCMI_PIXCK) | \ PIN_ODR_HIGH(GPIOA_RMII_CRS_DV) | \ - PIN_ODR_HIGH(GPIOA_ARD_D10) | \ + PIN_ODR_HIGH(GPIOA_ARD_D5) | \ PIN_ODR_HIGH(GPIOA_VCP_TX) | \ PIN_ODR_HIGH(GPIOA_OTG_FS_ID) | \ PIN_ODR_HIGH(GPIOA_OTG_FS_DM) | \ @@ -377,7 +377,7 @@ PIN_AFIO_AF(GPIOA_ULPI_CK, 10) | \ PIN_AFIO_AF(GPIOA_DCMI_PIXCK, 0) | \ PIN_AFIO_AF(GPIOA_RMII_CRS_DV, 11)) -#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_ARD_D10, 0) | \ +#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_ARD_D5, 0) | \ PIN_AFIO_AF(GPIOA_VCP_TX, 7) | \ PIN_AFIO_AF(GPIOA_OTG_FS_ID, 10) | \ PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10) | \ @@ -1208,7 +1208,7 @@ /* * GPIOI setup: * - * PI0 - ARD_D5 (input pullup). + * PI0 - ARD_D10 (input pullup). * PI1 - ARD_D13 (input pullup). * PI2 - ARD_D8 (input pullup). * PI3 - ARD_D7 (input pullup). @@ -1225,7 +1225,7 @@ * PI14 - LCD_CLK (alternate 14). * PI15 - LCD_R0 (alternate 14). */ -#define VAL_GPIOI_MODER (PIN_MODE_INPUT(GPIOI_ARD_D5) | \ +#define VAL_GPIOI_MODER (PIN_MODE_INPUT(GPIOI_ARD_D10) | \ PIN_MODE_INPUT(GPIOI_ARD_D13) | \ PIN_MODE_INPUT(GPIOI_ARD_D8) | \ PIN_MODE_INPUT(GPIOI_ARD_D7) | \ @@ -1241,7 +1241,7 @@ PIN_MODE_ALTERNATE(GPIOI_LCD_INT) | \ PIN_MODE_ALTERNATE(GPIOI_LCD_CLK) | \ PIN_MODE_ALTERNATE(GPIOI_LCD_R0)) -#define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(GPIOI_ARD_D5) | \ +#define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(GPIOI_ARD_D10) | \ PIN_OTYPE_PUSHPULL(GPIOI_ARD_D13) | \ PIN_OTYPE_PUSHPULL(GPIOI_ARD_D8) | \ PIN_OTYPE_PUSHPULL(GPIOI_ARD_D7) | \ @@ -1257,7 +1257,7 @@ PIN_OTYPE_PUSHPULL(GPIOI_LCD_INT) | \ PIN_OTYPE_PUSHPULL(GPIOI_LCD_CLK) | \ PIN_OTYPE_PUSHPULL(GPIOI_LCD_R0)) -#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_HIGH(GPIOI_ARD_D5) | \ +#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_HIGH(GPIOI_ARD_D10) | \ PIN_OSPEED_HIGH(GPIOI_ARD_D13) | \ PIN_OSPEED_HIGH(GPIOI_ARD_D8) | \ PIN_OSPEED_HIGH(GPIOI_ARD_D7) | \ @@ -1273,7 +1273,7 @@ PIN_OSPEED_HIGH(GPIOI_LCD_INT) | \ PIN_OSPEED_HIGH(GPIOI_LCD_CLK) | \ PIN_OSPEED_HIGH(GPIOI_LCD_R0)) -#define VAL_GPIOI_PUPDR (PIN_PUPDR_PULLUP(GPIOI_ARD_D5) | \ +#define VAL_GPIOI_PUPDR (PIN_PUPDR_PULLUP(GPIOI_ARD_D10) | \ PIN_PUPDR_PULLUP(GPIOI_ARD_D13) | \ PIN_PUPDR_PULLUP(GPIOI_ARD_D8) | \ PIN_PUPDR_PULLUP(GPIOI_ARD_D7) | \ @@ -1289,7 +1289,7 @@ PIN_PUPDR_FLOATING(GPIOI_LCD_INT) | \ PIN_PUPDR_FLOATING(GPIOI_LCD_CLK) | \ PIN_PUPDR_FLOATING(GPIOI_LCD_R0)) -#define VAL_GPIOI_ODR (PIN_ODR_HIGH(GPIOI_ARD_D5) | \ +#define VAL_GPIOI_ODR (PIN_ODR_HIGH(GPIOI_ARD_D10) | \ PIN_ODR_HIGH(GPIOI_ARD_D13) | \ PIN_ODR_HIGH(GPIOI_ARD_D8) | \ PIN_ODR_HIGH(GPIOI_ARD_D7) | \ @@ -1305,7 +1305,7 @@ PIN_ODR_HIGH(GPIOI_LCD_INT) | \ PIN_ODR_HIGH(GPIOI_LCD_CLK) | \ PIN_ODR_HIGH(GPIOI_LCD_R0)) -#define VAL_GPIOI_AFRL (PIN_AFIO_AF(GPIOI_ARD_D5, 0) | \ +#define VAL_GPIOI_AFRL (PIN_AFIO_AF(GPIOI_ARD_D10, 0) | \ PIN_AFIO_AF(GPIOI_ARD_D13, 0) | \ PIN_AFIO_AF(GPIOI_ARD_D8, 0) | \ PIN_AFIO_AF(GPIOI_ARD_D7, 0) | \ diff --git a/os/hal/boards/ST_STM32F746G_DISCOVERY/cfg/board.chcfg b/os/hal/boards/ST_STM32F746G_DISCOVERY/cfg/board.chcfg index bd6bce2cd..b786f53dc 100644 --- a/os/hal/boards/ST_STM32F746G_DISCOVERY/cfg/board.chcfg +++ b/os/hal/boards/ST_STM32F746G_DISCOVERY/cfg/board.chcfg @@ -90,7 +90,7 @@ Mode="Alternate" Alternate="11" />