From faf584ff60ea5241873e676bcf119f3bd2278a6d Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Sat, 23 Apr 2016 06:47:26 +0000 Subject: GCC asm files extension changed from .s to .S. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9345 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/common/ports/ARM/compilers/GCC/chcoreasm.S | 304 +++ os/common/ports/ARM/compilers/GCC/chcoreasm.s | 304 --- .../ports/ARM/compilers/GCC/mk/port_generic.mk | 2 +- .../ports/ARMCMx/compilers/GCC/chcoreasm_v6m.S | 159 ++ .../ports/ARMCMx/compilers/GCC/chcoreasm_v6m.s | 159 -- .../ports/ARMCMx/compilers/GCC/chcoreasm_v7m.S | 165 ++ .../ports/ARMCMx/compilers/GCC/chcoreasm_v7m.s | 165 -- .../ports/ARMCMx/compilers/GCC/mk/port_v6m.mk | 2 +- .../ports/ARMCMx/compilers/GCC/mk/port_v7m.mk | 2 +- os/common/ports/e200/compilers/GCC/chcoreasm.S | 115 + os/common/ports/e200/compilers/GCC/chcoreasm.s | 115 - os/common/ports/e200/compilers/GCC/ivor.S | 259 ++ os/common/ports/e200/compilers/GCC/ivor.s | 259 -- os/common/ports/e200/compilers/GCC/mk/port.mk | 4 +- os/common/startup/ARM/compilers/GCC/crt0.S | 152 ++ os/common/startup/ARM/compilers/GCC/crt0.s | 152 -- os/common/startup/ARM/compilers/GCC/ld/rules.ld | 222 ++ .../ARM/compilers/GCC/mk/startup_lpc214x.mk | 4 +- os/common/startup/ARM/compilers/GCC/rules.ld | 222 -- os/common/startup/ARM/compilers/GCC/vectors.S | 98 + os/common/startup/ARM/compilers/GCC/vectors.s | 98 - os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.S | 256 ++ os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.s | 256 -- os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S | 319 +++ os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.s | 319 --- .../ARMCMx/compilers/GCC/mk/startup_stm32f0xx.mk | 2 +- .../ARMCMx/compilers/GCC/mk/startup_stm32f1xx.mk | 2 +- .../ARMCMx/compilers/GCC/mk/startup_stm32f2xx.mk | 2 +- .../ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk | 2 +- .../ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk | 2 +- .../ARMCMx/compilers/GCC/mk/startup_stm32f7xx.mk | 2 +- .../ARMCMx/compilers/GCC/mk/startup_stm32l0xx.mk | 2 +- .../ARMCMx/compilers/GCC/mk/startup_stm32l1xx.mk | 2 +- .../ARMCMx/compilers/GCC/mk/startup_stm32l4xx.mk | 2 +- os/common/startup/e200/compilers/GCC/crt0.S | 242 ++ os/common/startup/e200/compilers/GCC/crt0.s | 242 -- .../e200/compilers/GCC/mk/startup_spc560bcxx.mk | 6 +- .../e200/compilers/GCC/mk/startup_spc560bxx.mk | 6 +- .../e200/compilers/GCC/mk/startup_spc560dxx.mk | 6 +- .../e200/compilers/GCC/mk/startup_spc560pxx.mk | 6 +- .../e200/compilers/GCC/mk/startup_spc563mxx.mk | 6 +- .../e200/compilers/GCC/mk/startup_spc564axx.mk | 6 +- .../e200/compilers/GCC/mk/startup_spc56ecxx.mk | 6 +- .../e200/compilers/GCC/mk/startup_spc56elxx.mk | 6 +- os/common/startup/e200/compilers/GCC/vectors.S | 2612 ++++++++++++++++++++ os/common/startup/e200/compilers/GCC/vectors.s | 2612 -------------------- 46 files changed, 4943 insertions(+), 4943 deletions(-) create mode 100644 os/common/ports/ARM/compilers/GCC/chcoreasm.S delete mode 100644 os/common/ports/ARM/compilers/GCC/chcoreasm.s create mode 100644 os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v6m.S delete mode 100644 os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v6m.s create mode 100644 os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.S delete mode 100644 os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.s create mode 100644 os/common/ports/e200/compilers/GCC/chcoreasm.S delete mode 100644 os/common/ports/e200/compilers/GCC/chcoreasm.s create mode 100644 os/common/ports/e200/compilers/GCC/ivor.S delete mode 100644 os/common/ports/e200/compilers/GCC/ivor.s create mode 100644 os/common/startup/ARM/compilers/GCC/crt0.S delete mode 100644 os/common/startup/ARM/compilers/GCC/crt0.s create mode 100644 os/common/startup/ARM/compilers/GCC/ld/rules.ld delete mode 100644 os/common/startup/ARM/compilers/GCC/rules.ld create mode 100644 os/common/startup/ARM/compilers/GCC/vectors.S delete mode 100644 os/common/startup/ARM/compilers/GCC/vectors.s create mode 100644 os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.S delete mode 100644 os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.s create mode 100644 os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S delete mode 100644 os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.s create mode 100644 os/common/startup/e200/compilers/GCC/crt0.S delete mode 100644 os/common/startup/e200/compilers/GCC/crt0.s create mode 100644 os/common/startup/e200/compilers/GCC/vectors.S delete mode 100644 os/common/startup/e200/compilers/GCC/vectors.s (limited to 'os/common') diff --git a/os/common/ports/ARM/compilers/GCC/chcoreasm.S b/os/common/ports/ARM/compilers/GCC/chcoreasm.S new file mode 100644 index 000000000..0409310e8 --- /dev/null +++ b/os/common/ports/ARM/compilers/GCC/chcoreasm.S @@ -0,0 +1,304 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file ARM/compilers/GCC/chcoreasm.s + * @brief ARM architecture port low level code. + * + * @addtogroup ARM_CORE + * @{ + */ + +#define _FROM_ASM_ +#include "chlicense.h" +#include "chconf.h" +#include "armparams.h" + +#define FALSE 0 +#define TRUE 1 + +#if !defined(__DOXYGEN__) + +/* + * RTOS-specific context offset. + */ +#if defined(_CHIBIOS_RT_CONF_) +#define CONTEXT_OFFSET 12 +#elif defined(_CHIBIOS_NIL_CONF_) +#define CONTEXT_OFFSET 0 +#else +#error "invalid chconf.h" +#endif + + .set MODE_USR, 0x10 + .set MODE_FIQ, 0x11 + .set MODE_IRQ, 0x12 + .set MODE_SVC, 0x13 + .set MODE_ABT, 0x17 + .set MODE_UND, 0x1B + .set MODE_SYS, 0x1F + + .equ I_BIT, 0x80 + .equ F_BIT, 0x40 + + .text + +/* + * The following functions are only present if there is THUMB code in + * the system. + */ +#if defined(THUMB_PRESENT) + .balign 16 + .code 16 + .thumb_func + .global _port_get_cpsr +_port_get_cpsr: + mov r0, pc + bx r0 +.code 32 + mrs r0, CPSR + bx lr + + .balign 16 + .code 16 + .thumb_func + .global _port_disable_thumb +_port_disable_thumb: + mov r3, pc + bx r3 +.code 32 + mrs r3, CPSR + orr r3, #I_BIT + msr CPSR_c, r3 + orr r3, #F_BIT + msr CPSR_c, r3 + bx lr + + .balign 16 + .code 16 + .thumb_func + .global _port_suspend_thumb +_port_suspend_thumb: + // Goes into _port_unlock_thumb + + .code 16 + .global _port_lock_thumb +_port_lock_thumb: + mov r3, pc + bx r3 + .code 32 + msr CPSR_c, #MODE_SYS | I_BIT + bx lr + + .balign 16 + .code 16 + .thumb_func + .global _port_enable_thumb +_port_enable_thumb: + // Goes into _port_unlock_thumb + + .code 16 + .global _port_unlock_thumb +_port_unlock_thumb: + mov r3, pc + bx r3 + .code 32 + msr CPSR_c, #MODE_SYS + bx lr +#endif /* defined(THUMB_PRESENT) */ + + .balign 16 +#if defined(THUMB_PRESENT) + .code 16 + .thumb_func + .global _port_switch_thumb +_port_switch_thumb: + mov r2, pc + bx r2 + // Goes into _port_switch_arm in ARM mode +#endif /* defined(THUMB_PRESENT) */ + + .code 32 + .global _port_switch_arm +_port_switch_arm: + stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr} + str sp, [r1, #12] + ldr sp, [r0, #12] +#if defined(THUMB_PRESENT) + ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr} + bx lr +#else /* !defined(THUMB_PRESENT)T */ + ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, pc} +#endif /* !defined(THUMB_PRESENT) */ + +/* + * Common IRQ code. It expects a macro ARM_IRQ_VECTOR_REG with the address + * of a register holding the address of the ISR to be invoked, the ISR + * then returns in the common epilogue code where the context switch will + * be performed, if required. + * System stack frame structure after a context switch in the + * interrupt handler: + * + * High +------------+ + * | LR_USR | -+ + * | r12 | | + * | r3 | | + * | r2 | | External context: IRQ handler frame + * | r1 | | + * | r0 | | + * | LR_IRQ | | (user code return address) + * | PSR_USR | -+ (user code status) + * | .... | <- chSchDoReschedule() stack frame, optimize it for space + * | LR | -+ (system code return address) + * | r11 | | + * | r10 | | + * | r9 | | + * | r8 | | Internal context: chSysSwitch() frame + * | r7 | | + * | r6 | | + * | r5 | | + * SP-> | r4 | -+ + * Low +------------+ + */ + .balign 16 + .code 32 + .global Irq_Handler +Irq_Handler: + stmfd sp!, {r0-r3, r12, lr} + ldr r0, =ARM_IRQ_VECTOR_REG + ldr r0, [r0] +#if !defined(THUMB_NO_INTERWORKING) + ldr lr, =_irq_ret_arm // ISR return point. + bx r0 // Calling the ISR. +_irq_ret_arm: +#else /* defined(THUMB_NO_INTERWORKING) */ + add r1, pc, #1 + bx r1 + .code 16 + bl _bxr0 // Calling the ISR. + mov lr, pc + bx lr + .code 32 +#endif /* defined(THUMB_NO_INTERWORKING) */ + cmp r0, #0 + ldmfd sp!, {r0-r3, r12, lr} + subeqs pc, lr, #4 // No reschedule, returns. + + // Now the frame is created in the system stack, the IRQ + // stack is empty. + msr CPSR_c, #MODE_SYS | I_BIT + stmfd sp!, {r0-r3, r12, lr} + msr CPSR_c, #MODE_IRQ | I_BIT + mrs r0, SPSR + mov r1, lr + msr CPSR_c, #MODE_SYS | I_BIT + stmfd sp!, {r0, r1} // Push R0=SPSR, R1=LR_IRQ. + + // Context switch. +#if defined(THUMB_NO_INTERWORKING) + add r0, pc, #1 + bx r0 + .code 16 +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_lock +#endif + bl chSchDoReschedule +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_unlock +#endif + mov lr, pc + bx lr + .code 32 +#else /* !defined(THUMB_NO_INTERWORKING) */ +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_lock +#endif + bl chSchDoReschedule +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_unlock +#endif +#endif /* !defined(THUMB_NO_INTERWORKING) */ + + // Re-establish the IRQ conditions again. + ldmfd sp!, {r0, r1} // Pop R0=SPSR, R1=LR_IRQ. + msr CPSR_c, #MODE_IRQ | I_BIT + msr SPSR_fsxc, r0 + mov lr, r1 + msr CPSR_c, #MODE_SYS | I_BIT + ldmfd sp!, {r0-r3, r12, lr} + msr CPSR_c, #MODE_IRQ | I_BIT + subs pc, lr, #4 +#if defined(THUMB_NO_INTERWORKING) + .code 16 +_bxr0: bx r0 +#endif + +/* + * Threads trampoline code. + * NOTE: The threads always start in ARM mode and then switches to the + * thread-function mode. + */ + .balign 16 + .code 32 + .globl _port_thread_start +_port_thread_start: +#if defined(THUMB_NO_INTERWORKING) + add r0, pc, #1 + bx r0 + .code 16 +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_unlock +#endif + bl _port_unlock_thumb + mov r0, r5 + bl _bxr4 +#if defined(_CHIBIOS_RT_CONF_) + mov r0, #0 /* MSG_OK */ + bl chThdExit +_zombies: b _zombies +#endif +#if defined(_CHIBIOS_NIL_CONF_) + mov r0, #0 + bl chSysHalt +#endif +_bxr4: bx r4 + +#else /* !defined(THUMB_NO_INTERWORKING) */ +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_unlock +#endif + msr CPSR_c, #MODE_SYS + mov r0, r5 + mov lr, pc + bx r4 +#if defined(_CHIBIOS_RT_CONF_) + mov r0, #0 /* MSG_OK */ + bl chThdExit +_zombies: b _zombies +#endif +#if defined(_CHIBIOS_NIL_CONF_) + mov r0, #0 + bl chSysHalt +#endif + +#endif /* !defined(THUMB_NO_INTERWORKING) */ + +#endif /* !defined(__DOXYGEN__) */ + +/** @} */ diff --git a/os/common/ports/ARM/compilers/GCC/chcoreasm.s b/os/common/ports/ARM/compilers/GCC/chcoreasm.s deleted file mode 100644 index 0409310e8..000000000 --- a/os/common/ports/ARM/compilers/GCC/chcoreasm.s +++ /dev/null @@ -1,304 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio. - - This file is part of ChibiOS. - - ChibiOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file ARM/compilers/GCC/chcoreasm.s - * @brief ARM architecture port low level code. - * - * @addtogroup ARM_CORE - * @{ - */ - -#define _FROM_ASM_ -#include "chlicense.h" -#include "chconf.h" -#include "armparams.h" - -#define FALSE 0 -#define TRUE 1 - -#if !defined(__DOXYGEN__) - -/* - * RTOS-specific context offset. - */ -#if defined(_CHIBIOS_RT_CONF_) -#define CONTEXT_OFFSET 12 -#elif defined(_CHIBIOS_NIL_CONF_) -#define CONTEXT_OFFSET 0 -#else -#error "invalid chconf.h" -#endif - - .set MODE_USR, 0x10 - .set MODE_FIQ, 0x11 - .set MODE_IRQ, 0x12 - .set MODE_SVC, 0x13 - .set MODE_ABT, 0x17 - .set MODE_UND, 0x1B - .set MODE_SYS, 0x1F - - .equ I_BIT, 0x80 - .equ F_BIT, 0x40 - - .text - -/* - * The following functions are only present if there is THUMB code in - * the system. - */ -#if defined(THUMB_PRESENT) - .balign 16 - .code 16 - .thumb_func - .global _port_get_cpsr -_port_get_cpsr: - mov r0, pc - bx r0 -.code 32 - mrs r0, CPSR - bx lr - - .balign 16 - .code 16 - .thumb_func - .global _port_disable_thumb -_port_disable_thumb: - mov r3, pc - bx r3 -.code 32 - mrs r3, CPSR - orr r3, #I_BIT - msr CPSR_c, r3 - orr r3, #F_BIT - msr CPSR_c, r3 - bx lr - - .balign 16 - .code 16 - .thumb_func - .global _port_suspend_thumb -_port_suspend_thumb: - // Goes into _port_unlock_thumb - - .code 16 - .global _port_lock_thumb -_port_lock_thumb: - mov r3, pc - bx r3 - .code 32 - msr CPSR_c, #MODE_SYS | I_BIT - bx lr - - .balign 16 - .code 16 - .thumb_func - .global _port_enable_thumb -_port_enable_thumb: - // Goes into _port_unlock_thumb - - .code 16 - .global _port_unlock_thumb -_port_unlock_thumb: - mov r3, pc - bx r3 - .code 32 - msr CPSR_c, #MODE_SYS - bx lr -#endif /* defined(THUMB_PRESENT) */ - - .balign 16 -#if defined(THUMB_PRESENT) - .code 16 - .thumb_func - .global _port_switch_thumb -_port_switch_thumb: - mov r2, pc - bx r2 - // Goes into _port_switch_arm in ARM mode -#endif /* defined(THUMB_PRESENT) */ - - .code 32 - .global _port_switch_arm -_port_switch_arm: - stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr} - str sp, [r1, #12] - ldr sp, [r0, #12] -#if defined(THUMB_PRESENT) - ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr} - bx lr -#else /* !defined(THUMB_PRESENT)T */ - ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, pc} -#endif /* !defined(THUMB_PRESENT) */ - -/* - * Common IRQ code. It expects a macro ARM_IRQ_VECTOR_REG with the address - * of a register holding the address of the ISR to be invoked, the ISR - * then returns in the common epilogue code where the context switch will - * be performed, if required. - * System stack frame structure after a context switch in the - * interrupt handler: - * - * High +------------+ - * | LR_USR | -+ - * | r12 | | - * | r3 | | - * | r2 | | External context: IRQ handler frame - * | r1 | | - * | r0 | | - * | LR_IRQ | | (user code return address) - * | PSR_USR | -+ (user code status) - * | .... | <- chSchDoReschedule() stack frame, optimize it for space - * | LR | -+ (system code return address) - * | r11 | | - * | r10 | | - * | r9 | | - * | r8 | | Internal context: chSysSwitch() frame - * | r7 | | - * | r6 | | - * | r5 | | - * SP-> | r4 | -+ - * Low +------------+ - */ - .balign 16 - .code 32 - .global Irq_Handler -Irq_Handler: - stmfd sp!, {r0-r3, r12, lr} - ldr r0, =ARM_IRQ_VECTOR_REG - ldr r0, [r0] -#if !defined(THUMB_NO_INTERWORKING) - ldr lr, =_irq_ret_arm // ISR return point. - bx r0 // Calling the ISR. -_irq_ret_arm: -#else /* defined(THUMB_NO_INTERWORKING) */ - add r1, pc, #1 - bx r1 - .code 16 - bl _bxr0 // Calling the ISR. - mov lr, pc - bx lr - .code 32 -#endif /* defined(THUMB_NO_INTERWORKING) */ - cmp r0, #0 - ldmfd sp!, {r0-r3, r12, lr} - subeqs pc, lr, #4 // No reschedule, returns. - - // Now the frame is created in the system stack, the IRQ - // stack is empty. - msr CPSR_c, #MODE_SYS | I_BIT - stmfd sp!, {r0-r3, r12, lr} - msr CPSR_c, #MODE_IRQ | I_BIT - mrs r0, SPSR - mov r1, lr - msr CPSR_c, #MODE_SYS | I_BIT - stmfd sp!, {r0, r1} // Push R0=SPSR, R1=LR_IRQ. - - // Context switch. -#if defined(THUMB_NO_INTERWORKING) - add r0, pc, #1 - bx r0 - .code 16 -#if CH_DBG_SYSTEM_STATE_CHECK - bl _dbg_check_lock -#endif - bl chSchDoReschedule -#if CH_DBG_SYSTEM_STATE_CHECK - bl _dbg_check_unlock -#endif - mov lr, pc - bx lr - .code 32 -#else /* !defined(THUMB_NO_INTERWORKING) */ -#if CH_DBG_SYSTEM_STATE_CHECK - bl _dbg_check_lock -#endif - bl chSchDoReschedule -#if CH_DBG_SYSTEM_STATE_CHECK - bl _dbg_check_unlock -#endif -#endif /* !defined(THUMB_NO_INTERWORKING) */ - - // Re-establish the IRQ conditions again. - ldmfd sp!, {r0, r1} // Pop R0=SPSR, R1=LR_IRQ. - msr CPSR_c, #MODE_IRQ | I_BIT - msr SPSR_fsxc, r0 - mov lr, r1 - msr CPSR_c, #MODE_SYS | I_BIT - ldmfd sp!, {r0-r3, r12, lr} - msr CPSR_c, #MODE_IRQ | I_BIT - subs pc, lr, #4 -#if defined(THUMB_NO_INTERWORKING) - .code 16 -_bxr0: bx r0 -#endif - -/* - * Threads trampoline code. - * NOTE: The threads always start in ARM mode and then switches to the - * thread-function mode. - */ - .balign 16 - .code 32 - .globl _port_thread_start -_port_thread_start: -#if defined(THUMB_NO_INTERWORKING) - add r0, pc, #1 - bx r0 - .code 16 -#if CH_DBG_SYSTEM_STATE_CHECK - bl _dbg_check_unlock -#endif - bl _port_unlock_thumb - mov r0, r5 - bl _bxr4 -#if defined(_CHIBIOS_RT_CONF_) - mov r0, #0 /* MSG_OK */ - bl chThdExit -_zombies: b _zombies -#endif -#if defined(_CHIBIOS_NIL_CONF_) - mov r0, #0 - bl chSysHalt -#endif -_bxr4: bx r4 - -#else /* !defined(THUMB_NO_INTERWORKING) */ -#if CH_DBG_SYSTEM_STATE_CHECK - bl _dbg_check_unlock -#endif - msr CPSR_c, #MODE_SYS - mov r0, r5 - mov lr, pc - bx r4 -#if defined(_CHIBIOS_RT_CONF_) - mov r0, #0 /* MSG_OK */ - bl chThdExit -_zombies: b _zombies -#endif -#if defined(_CHIBIOS_NIL_CONF_) - mov r0, #0 - bl chSysHalt -#endif - -#endif /* !defined(THUMB_NO_INTERWORKING) */ - -#endif /* !defined(__DOXYGEN__) */ - -/** @} */ diff --git a/os/common/ports/ARM/compilers/GCC/mk/port_generic.mk b/os/common/ports/ARM/compilers/GCC/mk/port_generic.mk index 5762f96a0..ca63285fc 100644 --- a/os/common/ports/ARM/compilers/GCC/mk/port_generic.mk +++ b/os/common/ports/ARM/compilers/GCC/mk/port_generic.mk @@ -1,7 +1,7 @@ # List of the ChibiOS/RT ARM generic port files. PORTSRC = ${CHIBIOS}/os/common/ports/ARM/chcore.c -PORTASM = $(CHIBIOS)/os/common/ports/ARM/compilers/GCC/chcoreasm.s +PORTASM = $(CHIBIOS)/os/common/ports/ARM/compilers/GCC/chcoreasm.S PORTINC = ${CHIBIOS}/os/common/ports/ARM \ ${CHIBIOS}/os/common/ports/ARM/compilers/GCC diff --git a/os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v6m.S b/os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v6m.S new file mode 100644 index 000000000..15cb8bdac --- /dev/null +++ b/os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v6m.S @@ -0,0 +1,159 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file compilers/GCC/chcoreasm_v6m.s + * @brief ARMv6-M architecture port low level code. + * + * @addtogroup ARMCMx_GCC_CORE + * @{ + */ + +#if !defined(FALSE) || defined(__DOXYGEN__) +#define FALSE 0 +#endif + +#if !defined(TRUE) || defined(__DOXYGEN__) +#define TRUE 1 +#endif + +#define _FROM_ASM_ +#include "chlicense.h" +#include "chconf.h" +#include "chcore.h" + +#if !defined(__DOXYGEN__) + +/* + * RTOS-specific context offset. + */ +#if defined(_CHIBIOS_RT_CONF_) +#define CONTEXT_OFFSET 12 +#elif defined(_CHIBIOS_NIL_CONF_) +#define CONTEXT_OFFSET 0 +#else +#error "invalid chconf.h" +#endif + + .set SCB_ICSR, 0xE000ED04 + .set ICSR_PENDSVSET, 0x10000000 + .set ICSR_NMIPENDSET, 0x80000000 + + .cpu cortex-m0 + .fpu softvfp + + .thumb + .text + +/*--------------------------------------------------------------------------* + * Performs a context switch between two threads. + *--------------------------------------------------------------------------*/ + .thumb_func + .globl _port_switch +_port_switch: + push {r4, r5, r6, r7, lr} + mov r4, r8 + mov r5, r9 + mov r6, r10 + mov r7, r11 + push {r4, r5, r6, r7} + + mov r3, sp + str r3, [r1, #CONTEXT_OFFSET] + ldr r3, [r0, #CONTEXT_OFFSET] + mov sp, r3 + + pop {r4, r5, r6, r7} + mov r8, r4 + mov r9, r5 + mov r10, r6 + mov r11, r7 + pop {r4, r5, r6, r7, pc} + +/*--------------------------------------------------------------------------* + * Start a thread by invoking its work function. + * + * Threads execution starts here, the code leaves the system critical zone + * and then jumps into the thread function passed in register R4. The + * register R5 contains the thread parameter. The function chThdExit() is + * called on thread function return. + *--------------------------------------------------------------------------*/ + .thumb_func + .globl _port_thread_start +_port_thread_start: +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_unlock +#endif +#if CH_DBG_STATISTICS + bl _stats_stop_measure_crit_thd +#endif + cpsie i + mov r0, r5 + blx r4 +#if defined(_CHIBIOS_RT_CONF_) + movs r0, #0 /* MSG_OK */ + bl chThdExit +#endif +#if defined(_CHIBIOS_NIL_CONF_) + mov r3, #0 + bl chSysHalt +#endif + +/*--------------------------------------------------------------------------* + * Post-IRQ switch code. + * + * Exception handlers return here for context switching. + *--------------------------------------------------------------------------*/ + .thumb_func + .globl _port_switch_from_isr +_port_switch_from_isr: +#if CH_DBG_STATISTICS + bl _stats_start_measure_crit_thd +#endif +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_lock +#endif + bl chSchDoReschedule +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_unlock +#endif +#if CH_DBG_STATISTICS + bl _stats_stop_measure_crit_thd +#endif + .globl _port_exit_from_isr +_port_exit_from_isr: + ldr r2, .L2 + ldr r3, .L3 + str r3, [r2, #0] +#if CORTEX_ALTERNATE_SWITCH + cpsie i +#endif +.L1: b .L1 + + .align 2 +.L2: .word SCB_ICSR +#if CORTEX_ALTERNATE_SWITCH +.L3: .word ICSR_PENDSVSET +#else +.L3: .word ICSR_NMIPENDSET +#endif + +#endif /* !defined(__DOXYGEN__) */ + +/** @} */ diff --git a/os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v6m.s b/os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v6m.s deleted file mode 100644 index 15cb8bdac..000000000 --- a/os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v6m.s +++ /dev/null @@ -1,159 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio. - - This file is part of ChibiOS. - - ChibiOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file compilers/GCC/chcoreasm_v6m.s - * @brief ARMv6-M architecture port low level code. - * - * @addtogroup ARMCMx_GCC_CORE - * @{ - */ - -#if !defined(FALSE) || defined(__DOXYGEN__) -#define FALSE 0 -#endif - -#if !defined(TRUE) || defined(__DOXYGEN__) -#define TRUE 1 -#endif - -#define _FROM_ASM_ -#include "chlicense.h" -#include "chconf.h" -#include "chcore.h" - -#if !defined(__DOXYGEN__) - -/* - * RTOS-specific context offset. - */ -#if defined(_CHIBIOS_RT_CONF_) -#define CONTEXT_OFFSET 12 -#elif defined(_CHIBIOS_NIL_CONF_) -#define CONTEXT_OFFSET 0 -#else -#error "invalid chconf.h" -#endif - - .set SCB_ICSR, 0xE000ED04 - .set ICSR_PENDSVSET, 0x10000000 - .set ICSR_NMIPENDSET, 0x80000000 - - .cpu cortex-m0 - .fpu softvfp - - .thumb - .text - -/*--------------------------------------------------------------------------* - * Performs a context switch between two threads. - *--------------------------------------------------------------------------*/ - .thumb_func - .globl _port_switch -_port_switch: - push {r4, r5, r6, r7, lr} - mov r4, r8 - mov r5, r9 - mov r6, r10 - mov r7, r11 - push {r4, r5, r6, r7} - - mov r3, sp - str r3, [r1, #CONTEXT_OFFSET] - ldr r3, [r0, #CONTEXT_OFFSET] - mov sp, r3 - - pop {r4, r5, r6, r7} - mov r8, r4 - mov r9, r5 - mov r10, r6 - mov r11, r7 - pop {r4, r5, r6, r7, pc} - -/*--------------------------------------------------------------------------* - * Start a thread by invoking its work function. - * - * Threads execution starts here, the code leaves the system critical zone - * and then jumps into the thread function passed in register R4. The - * register R5 contains the thread parameter. The function chThdExit() is - * called on thread function return. - *--------------------------------------------------------------------------*/ - .thumb_func - .globl _port_thread_start -_port_thread_start: -#if CH_DBG_SYSTEM_STATE_CHECK - bl _dbg_check_unlock -#endif -#if CH_DBG_STATISTICS - bl _stats_stop_measure_crit_thd -#endif - cpsie i - mov r0, r5 - blx r4 -#if defined(_CHIBIOS_RT_CONF_) - movs r0, #0 /* MSG_OK */ - bl chThdExit -#endif -#if defined(_CHIBIOS_NIL_CONF_) - mov r3, #0 - bl chSysHalt -#endif - -/*--------------------------------------------------------------------------* - * Post-IRQ switch code. - * - * Exception handlers return here for context switching. - *--------------------------------------------------------------------------*/ - .thumb_func - .globl _port_switch_from_isr -_port_switch_from_isr: -#if CH_DBG_STATISTICS - bl _stats_start_measure_crit_thd -#endif -#if CH_DBG_SYSTEM_STATE_CHECK - bl _dbg_check_lock -#endif - bl chSchDoReschedule -#if CH_DBG_SYSTEM_STATE_CHECK - bl _dbg_check_unlock -#endif -#if CH_DBG_STATISTICS - bl _stats_stop_measure_crit_thd -#endif - .globl _port_exit_from_isr -_port_exit_from_isr: - ldr r2, .L2 - ldr r3, .L3 - str r3, [r2, #0] -#if CORTEX_ALTERNATE_SWITCH - cpsie i -#endif -.L1: b .L1 - - .align 2 -.L2: .word SCB_ICSR -#if CORTEX_ALTERNATE_SWITCH -.L3: .word ICSR_PENDSVSET -#else -.L3: .word ICSR_NMIPENDSET -#endif - -#endif /* !defined(__DOXYGEN__) */ - -/** @} */ diff --git a/os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.S b/os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.S new file mode 100644 index 000000000..943892d24 --- /dev/null +++ b/os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.S @@ -0,0 +1,165 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file compilers/GCC/chcoreasm_v7m.s + * @brief ARMv7-M architecture port low level code. + * + * @addtogroup ARMCMx_GCC_CORE + * @{ + */ + +#if !defined(FALSE) || defined(__DOXYGEN__) +#define FALSE 0 +#endif + +#if !defined(TRUE) || defined(__DOXYGEN__) +#define TRUE 1 +#endif + +#define _FROM_ASM_ +#include "chlicense.h" +#include "chconf.h" +#include "chcore.h" + +#if !defined(__DOXYGEN__) + +/* + * RTOS-specific context offset. + */ +#if defined(_CHIBIOS_RT_CONF_) +#define CONTEXT_OFFSET 12 +#elif defined(_CHIBIOS_NIL_CONF_) +#define CONTEXT_OFFSET 0 +#else +#error "invalid chconf.h" +#endif + + .set SCB_ICSR, 0xE000ED04 + .set ICSR_PENDSVSET, 0x10000000 + + .syntax unified + .cpu cortex-m4 +#if CORTEX_USE_FPU + .fpu fpv4-sp-d16 +#else + .fpu softvfp +#endif + + .thumb + .text + +/*--------------------------------------------------------------------------* + * Performs a context switch between two threads. + *--------------------------------------------------------------------------*/ + .thumb_func + .globl _port_switch +_port_switch: + push {r4, r5, r6, r7, r8, r9, r10, r11, lr} +#if CORTEX_USE_FPU + vpush {s16-s31} +#endif + + str sp, [r1, #CONTEXT_OFFSET] +#if (CORTEX_SIMPLIFIED_PRIORITY == FALSE) && \ + ((CORTEX_MODEL == 3) || (CORTEX_MODEL == 4)) + /* Workaround for ARM errata 752419, only applied if + condition exists for it to be triggered.*/ + ldr r3, [r0, #CONTEXT_OFFSET] + mov sp, r3 +#else + ldr sp, [r0, #CONTEXT_OFFSET] +#endif + +#if CORTEX_USE_FPU + vpop {s16-s31} +#endif + pop {r4, r5, r6, r7, r8, r9, r10, r11, pc} + +/*--------------------------------------------------------------------------* + * Start a thread by invoking its work function. + * + * Threads execution starts here, the code leaves the system critical zone + * and then jumps into the thread function passed in register R4. The + * register R5 contains the thread parameter. The function chThdExit() is + * called on thread function return. + *--------------------------------------------------------------------------*/ + .thumb_func + .globl _port_thread_start +_port_thread_start: +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_unlock +#endif +#if CH_DBG_STATISTICS + bl _stats_stop_measure_crit_thd +#endif +#if CORTEX_SIMPLIFIED_PRIORITY + cpsie i +#else + movs r3, #0 /* CORTEX_BASEPRI_DISABLED */ + msr BASEPRI, r3 +#endif + mov r0, r5 + blx r4 +#if defined(_CHIBIOS_RT_CONF_) + movs r0, #0 /* MSG_OK */ + bl chThdExit +#endif +#if defined(_CHIBIOS_NIL_CONF_) + mov r3, #0 + bl chSysHalt +#endif + +/*--------------------------------------------------------------------------* + * Post-IRQ switch code. + * + * Exception handlers return here for context switching. + *--------------------------------------------------------------------------*/ + .thumb_func + .globl _port_switch_from_isr +_port_switch_from_isr: +#if CH_DBG_STATISTICS + bl _stats_start_measure_crit_thd +#endif +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_lock +#endif + bl chSchDoReschedule +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_unlock +#endif +#if CH_DBG_STATISTICS + bl _stats_stop_measure_crit_thd +#endif + .globl _port_exit_from_isr +_port_exit_from_isr: +#if CORTEX_SIMPLIFIED_PRIORITY + movw r3, #:lower16:SCB_ICSR + movt r3, #:upper16:SCB_ICSR + mov r2, ICSR_PENDSVSET + str r2, [r3, #0] + cpsie i +#else /* !CORTEX_SIMPLIFIED_PRIORITY */ + svc #0 +#endif /* !CORTEX_SIMPLIFIED_PRIORITY */ +.L1: b .L1 + +#endif /* !defined(__DOXYGEN__) */ + +/** @} */ diff --git a/os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.s b/os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.s deleted file mode 100644 index 943892d24..000000000 --- a/os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.s +++ /dev/null @@ -1,165 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio. - - This file is part of ChibiOS. - - ChibiOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file compilers/GCC/chcoreasm_v7m.s - * @brief ARMv7-M architecture port low level code. - * - * @addtogroup ARMCMx_GCC_CORE - * @{ - */ - -#if !defined(FALSE) || defined(__DOXYGEN__) -#define FALSE 0 -#endif - -#if !defined(TRUE) || defined(__DOXYGEN__) -#define TRUE 1 -#endif - -#define _FROM_ASM_ -#include "chlicense.h" -#include "chconf.h" -#include "chcore.h" - -#if !defined(__DOXYGEN__) - -/* - * RTOS-specific context offset. - */ -#if defined(_CHIBIOS_RT_CONF_) -#define CONTEXT_OFFSET 12 -#elif defined(_CHIBIOS_NIL_CONF_) -#define CONTEXT_OFFSET 0 -#else -#error "invalid chconf.h" -#endif - - .set SCB_ICSR, 0xE000ED04 - .set ICSR_PENDSVSET, 0x10000000 - - .syntax unified - .cpu cortex-m4 -#if CORTEX_USE_FPU - .fpu fpv4-sp-d16 -#else - .fpu softvfp -#endif - - .thumb - .text - -/*--------------------------------------------------------------------------* - * Performs a context switch between two threads. - *--------------------------------------------------------------------------*/ - .thumb_func - .globl _port_switch -_port_switch: - push {r4, r5, r6, r7, r8, r9, r10, r11, lr} -#if CORTEX_USE_FPU - vpush {s16-s31} -#endif - - str sp, [r1, #CONTEXT_OFFSET] -#if (CORTEX_SIMPLIFIED_PRIORITY == FALSE) && \ - ((CORTEX_MODEL == 3) || (CORTEX_MODEL == 4)) - /* Workaround for ARM errata 752419, only applied if - condition exists for it to be triggered.*/ - ldr r3, [r0, #CONTEXT_OFFSET] - mov sp, r3 -#else - ldr sp, [r0, #CONTEXT_OFFSET] -#endif - -#if CORTEX_USE_FPU - vpop {s16-s31} -#endif - pop {r4, r5, r6, r7, r8, r9, r10, r11, pc} - -/*--------------------------------------------------------------------------* - * Start a thread by invoking its work function. - * - * Threads execution starts here, the code leaves the system critical zone - * and then jumps into the thread function passed in register R4. The - * register R5 contains the thread parameter. The function chThdExit() is - * called on thread function return. - *--------------------------------------------------------------------------*/ - .thumb_func - .globl _port_thread_start -_port_thread_start: -#if CH_DBG_SYSTEM_STATE_CHECK - bl _dbg_check_unlock -#endif -#if CH_DBG_STATISTICS - bl _stats_stop_measure_crit_thd -#endif -#if CORTEX_SIMPLIFIED_PRIORITY - cpsie i -#else - movs r3, #0 /* CORTEX_BASEPRI_DISABLED */ - msr BASEPRI, r3 -#endif - mov r0, r5 - blx r4 -#if defined(_CHIBIOS_RT_CONF_) - movs r0, #0 /* MSG_OK */ - bl chThdExit -#endif -#if defined(_CHIBIOS_NIL_CONF_) - mov r3, #0 - bl chSysHalt -#endif - -/*--------------------------------------------------------------------------* - * Post-IRQ switch code. - * - * Exception handlers return here for context switching. - *--------------------------------------------------------------------------*/ - .thumb_func - .globl _port_switch_from_isr -_port_switch_from_isr: -#if CH_DBG_STATISTICS - bl _stats_start_measure_crit_thd -#endif -#if CH_DBG_SYSTEM_STATE_CHECK - bl _dbg_check_lock -#endif - bl chSchDoReschedule -#if CH_DBG_SYSTEM_STATE_CHECK - bl _dbg_check_unlock -#endif -#if CH_DBG_STATISTICS - bl _stats_stop_measure_crit_thd -#endif - .globl _port_exit_from_isr -_port_exit_from_isr: -#if CORTEX_SIMPLIFIED_PRIORITY - movw r3, #:lower16:SCB_ICSR - movt r3, #:upper16:SCB_ICSR - mov r2, ICSR_PENDSVSET - str r2, [r3, #0] - cpsie i -#else /* !CORTEX_SIMPLIFIED_PRIORITY */ - svc #0 -#endif /* !CORTEX_SIMPLIFIED_PRIORITY */ -.L1: b .L1 - -#endif /* !defined(__DOXYGEN__) */ - -/** @} */ diff --git a/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk b/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk index 383457de6..f87345319 100644 --- a/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk +++ b/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk @@ -2,7 +2,7 @@ PORTSRC = $(CHIBIOS)/os/common/ports/ARMCMx/chcore.c \ $(CHIBIOS)/os/common/ports/ARMCMx/chcore_v6m.c -PORTASM = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v6m.s +PORTASM = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v6m.S PORTINC = $(CHIBIOS)/os/common/ports/ARMCMx \ $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC diff --git a/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk b/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk index 86bf45e7b..9fbbae539 100644 --- a/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk +++ b/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk @@ -2,7 +2,7 @@ PORTSRC = $(CHIBIOS)/os/common/ports/ARMCMx/chcore.c \ $(CHIBIOS)/os/common/ports/ARMCMx/chcore_v7m.c -PORTASM = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.s +PORTASM = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.S PORTINC = $(CHIBIOS)/os/common/ports/ARMCMx \ $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC diff --git a/os/common/ports/e200/compilers/GCC/chcoreasm.S b/os/common/ports/e200/compilers/GCC/chcoreasm.S new file mode 100644 index 000000000..a4016f1ea --- /dev/null +++ b/os/common/ports/e200/compilers/GCC/chcoreasm.S @@ -0,0 +1,115 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file e200/compilers/GCC/chcoreasm.s + * @brief Power Architecture port low level code. + * + * @addtogroup PPC_GCC_CORE + * @{ + */ + +/*===========================================================================*/ +/* Module constants. */ +/*===========================================================================*/ + +#if !defined(FALSE) || defined(__DOXYGEN__) +#define FALSE 0 +#endif + +#if !defined(TRUE) || defined(__DOXYGEN__) +#define TRUE 1 +#endif + +/*===========================================================================*/ +/* Code section. */ +/*===========================================================================*/ + +#define _FROM_ASM_ +#include "chlicense.h" +#include "chconf.h" +#include "chcore.h" + +#if !defined(__DOXYGEN__) + +/* + * RTOS-specific context offset. + */ +#if defined(_CHIBIOS_RT_CONF_) +#define CONTEXT_OFFSET 12 +#elif defined(_CHIBIOS_NIL_CONF_) +#define CONTEXT_OFFSET 0 +#else +#error "invalid chconf.h" +#endif + +#if PPC_USE_VLE == TRUE + .section .text_vle, "ax" +#else + .section .text, "ax" +#endif + + .align 2 + .globl _port_switch + .type _port_switch, @function +_port_switch: + subi %sp, %sp, 80 + mflr %r0 + stw %r0, 84(%sp) + mfcr %r0 + stw %r0, 0(%sp) + stmw %r14, 4(%sp) + + stw %sp, 12(%r4) + lwz %sp, 12(%r3) + + lmw %r14, 4(%sp) + lwz %r0, 0(%sp) + mtcr %r0 + lwz %r0, 84(%sp) + mtlr %r0 + addi %sp, %sp, 80 + blr + + .align 2 + .globl _port_thread_start + .type _port_thread_start, @function +_port_thread_start: +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_unlock +#endif +#if CH_DBG_STATISTICS + bl _stats_stop_measure_crit_thd +#endif + wrteei 1 + mr %r3, %r31 + mtctr %r30 + bctrl +#if defined(_CHIBIOS_RT_CONF_) + li %r0, 0 + bl chThdExit +#endif +#if defined(_CHIBIOS_NIL_CONF_) + se_li %r0, 0 + e_bl chSysHalt +#endif + +#endif /* !defined(__DOXYGEN__) */ + +/** @} */ diff --git a/os/common/ports/e200/compilers/GCC/chcoreasm.s b/os/common/ports/e200/compilers/GCC/chcoreasm.s deleted file mode 100644 index a4016f1ea..000000000 --- a/os/common/ports/e200/compilers/GCC/chcoreasm.s +++ /dev/null @@ -1,115 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio. - - This file is part of ChibiOS. - - ChibiOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file e200/compilers/GCC/chcoreasm.s - * @brief Power Architecture port low level code. - * - * @addtogroup PPC_GCC_CORE - * @{ - */ - -/*===========================================================================*/ -/* Module constants. */ -/*===========================================================================*/ - -#if !defined(FALSE) || defined(__DOXYGEN__) -#define FALSE 0 -#endif - -#if !defined(TRUE) || defined(__DOXYGEN__) -#define TRUE 1 -#endif - -/*===========================================================================*/ -/* Code section. */ -/*===========================================================================*/ - -#define _FROM_ASM_ -#include "chlicense.h" -#include "chconf.h" -#include "chcore.h" - -#if !defined(__DOXYGEN__) - -/* - * RTOS-specific context offset. - */ -#if defined(_CHIBIOS_RT_CONF_) -#define CONTEXT_OFFSET 12 -#elif defined(_CHIBIOS_NIL_CONF_) -#define CONTEXT_OFFSET 0 -#else -#error "invalid chconf.h" -#endif - -#if PPC_USE_VLE == TRUE - .section .text_vle, "ax" -#else - .section .text, "ax" -#endif - - .align 2 - .globl _port_switch - .type _port_switch, @function -_port_switch: - subi %sp, %sp, 80 - mflr %r0 - stw %r0, 84(%sp) - mfcr %r0 - stw %r0, 0(%sp) - stmw %r14, 4(%sp) - - stw %sp, 12(%r4) - lwz %sp, 12(%r3) - - lmw %r14, 4(%sp) - lwz %r0, 0(%sp) - mtcr %r0 - lwz %r0, 84(%sp) - mtlr %r0 - addi %sp, %sp, 80 - blr - - .align 2 - .globl _port_thread_start - .type _port_thread_start, @function -_port_thread_start: -#if CH_DBG_SYSTEM_STATE_CHECK - bl _dbg_check_unlock -#endif -#if CH_DBG_STATISTICS - bl _stats_stop_measure_crit_thd -#endif - wrteei 1 - mr %r3, %r31 - mtctr %r30 - bctrl -#if defined(_CHIBIOS_RT_CONF_) - li %r0, 0 - bl chThdExit -#endif -#if defined(_CHIBIOS_NIL_CONF_) - se_li %r0, 0 - e_bl chSysHalt -#endif - -#endif /* !defined(__DOXYGEN__) */ - -/** @} */ diff --git a/os/common/ports/e200/compilers/GCC/ivor.S b/os/common/ports/e200/compilers/GCC/ivor.S new file mode 100644 index 000000000..53f84f96c --- /dev/null +++ b/os/common/ports/e200/compilers/GCC/ivor.S @@ -0,0 +1,259 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file ivor.s + * @brief Kernel ISRs. + * + * @addtogroup PPC_CORE + * @{ + */ + +#if !defined(FALSE) || defined(__DOXYGEN__) +#define FALSE 0 +#endif + +#if !defined(TRUE) || defined(__DOXYGEN__) +#define TRUE 1 +#endif + +/* + * Imports the PPC configuration headers. + */ +#define _FROM_ASM_ +#include "chlicense.h" +#include "chconf.h" +#include "chcore.h" + +#if !defined(__DOXYGEN__) + + .section .handlers, "ax" + +#if PPC_SUPPORTS_DECREMENTER + /* + * _IVOR10 handler (Book-E decrementer). + */ + .align 4 + .globl _IVOR10 + .type _IVOR10, @function +_IVOR10: + /* Saving the external context (port_extctx structure).*/ + stwu %sp, -80(%sp) +#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI + e_stmvsrrw 8(%sp) /* Saves PC, MSR. */ + e_stmvsprw 16(%sp) /* Saves CR, LR, CTR, XER. */ + e_stmvgprw 32(%sp) /* Saves GPR0, GPR3...GPR12. */ +#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */ + stw %r0, 32(%sp) /* Saves GPR0. */ + mfSRR0 %r0 + stw %r0, 8(%sp) /* Saves PC. */ + mfSRR1 %r0 + stw %r0, 12(%sp) /* Saves MSR. */ + mfCR %r0 + stw %r0, 16(%sp) /* Saves CR. */ + mfLR %r0 + stw %r0, 20(%sp) /* Saves LR. */ + mfCTR %r0 + stw %r0, 24(%sp) /* Saves CTR. */ + mfXER %r0 + stw %r0, 28(%sp) /* Saves XER. */ + stw %r3, 36(%sp) /* Saves GPR3...GPR12. */ + stw %r4, 40(%sp) + stw %r5, 44(%sp) + stw %r6, 48(%sp) + stw %r7, 52(%sp) + stw %r8, 56(%sp) + stw %r9, 60(%sp) + stw %r10, 64(%sp) + stw %r11, 68(%sp) + stw %r12, 72(%sp) +#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */ + + /* Increasing the SPGR0 register.*/ + mfspr %r0, 272 + eaddi %r0, %r0, 1 + mtspr 272, %r0 + + /* Reset DIE bit in TSR register.*/ + lis %r3, 0x0800 /* DIS bit mask. */ + mtspr 336, %r3 /* TSR register. */ + + /* Restoring pre-IRQ MSR register value.*/ + mfSRR1 %r0 +#if !PPC_USE_IRQ_PREEMPTION + /* No preemption, keeping EE disabled.*/ + se_bclri %r0, 16 /* EE = bit 16. */ +#endif + mtMSR %r0 + +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_enter_isr + bl _dbg_check_lock_from_isr +#endif + /* System tick handler invocation.*/ + bl chSysTimerHandlerI +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_unlock_from_isr + bl _dbg_check_leave_isr +#endif + +#if PPC_USE_IRQ_PREEMPTION + /* Prevents preemption again.*/ + wrteei 0 +#endif + + /* Jumps to the common IVOR epilogue code.*/ + b _ivor_exit +#endif /* PPC_SUPPORTS_DECREMENTER */ + + /* + * _IVOR4 handler (Book-E external interrupt). + */ + .align 4 + .globl _IVOR4 + .type _IVOR4, @function +_IVOR4: + /* Saving the external context (port_extctx structure).*/ + stwu %sp, -80(%sp) +#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI + e_stmvsrrw 8(%sp) /* Saves PC, MSR. */ + e_stmvsprw 16(%sp) /* Saves CR, LR, CTR, XER. */ + e_stmvgprw 32(%sp) /* Saves GPR0, GPR3...GPR12. */ +#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */ + stw %r0, 32(%sp) /* Saves GPR0. */ + mfSRR0 %r0 + stw %r0, 8(%sp) /* Saves PC. */ + mfSRR1 %r0 + stw %r0, 12(%sp) /* Saves MSR. */ + mfCR %r0 + stw %r0, 16(%sp) /* Saves CR. */ + mfLR %r0 + stw %r0, 20(%sp) /* Saves LR. */ + mfCTR %r0 + stw %r0, 24(%sp) /* Saves CTR. */ + mfXER %r0 + stw %r0, 28(%sp) /* Saves XER. */ + stw %r3, 36(%sp) /* Saves GPR3...GPR12. */ + stw %r4, 40(%sp) + stw %r5, 44(%sp) + stw %r6, 48(%sp) + stw %r7, 52(%sp) + stw %r8, 56(%sp) + stw %r9, 60(%sp) + stw %r10, 64(%sp) + stw %r11, 68(%sp) + stw %r12, 72(%sp) +#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */ + + /* Increasing the SPGR0 register.*/ + mfspr %r0, 272 + eaddi %r0, %r0, 1 + mtspr 272, %r0 + + /* Software vector address from the INTC register.*/ + lis %r3, INTC_IACKR_ADDR@h + ori %r3, %r3, INTC_IACKR_ADDR@l /* IACKR register address. */ + lwz %r3, 0(%r3) /* IACKR register value. */ + lwz %r3, 0(%r3) + mtCTR %r3 /* Software handler address. */ + + /* Restoring pre-IRQ MSR register value.*/ + mfSRR1 %r0 +#if !PPC_USE_IRQ_PREEMPTION + /* No preemption, keeping EE disabled.*/ + se_bclri %r0, 16 /* EE = bit 16. */ +#endif + mtMSR %r0 + + /* Exectes the software handler.*/ + bctrl + +#if PPC_USE_IRQ_PREEMPTION + /* Prevents preemption again.*/ + wrteei 0 +#endif + + /* Informs the INTC that the interrupt has been served.*/ + mbar 0 + lis %r3, INTC_EOIR_ADDR@h + ori %r3, %r3, INTC_EOIR_ADDR@l + stw %r3, 0(%r3) /* Writing any value should do. */ + + /* Common IVOR epilogue code, context restore.*/ + .globl _ivor_exit +_ivor_exit: + /* Decreasing the SPGR0 register.*/ + mfspr %r0, 272 + eaddi %r0, %r0, -1 + mtspr 272, %r0 + +#if CH_DBG_STATISTICS + bl _stats_start_measure_crit_thd +#endif +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_lock +#endif + bl chSchIsPreemptionRequired + cmpli cr0, %r3, 0 + beq cr0, .noresch + bl chSchDoReschedule +.noresch: +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_unlock +#endif +#if CH_DBG_STATISTICS + bl _stats_stop_measure_crit_thd +#endif + + /* Restoring the external context.*/ +#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI + e_lmvgprw 32(%sp) /* Restores GPR0, GPR3...GPR12. */ + e_lmvsprw 16(%sp) /* Restores CR, LR, CTR, XER. */ + e_lmvsrrw 8(%sp) /* Restores PC, MSR. */ +#else /*!(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */ + lwz %r3, 36(%sp) /* Restores GPR3...GPR12. */ + lwz %r4, 40(%sp) + lwz %r5, 44(%sp) + lwz %r6, 48(%sp) + lwz %r7, 52(%sp) + lwz %r8, 56(%sp) + lwz %r9, 60(%sp) + lwz %r10, 64(%sp) + lwz %r11, 68(%sp) + lwz %r12, 72(%sp) + lwz %r0, 8(%sp) + mtSRR0 %r0 /* Restores PC. */ + lwz %r0, 12(%sp) + mtSRR1 %r0 /* Restores MSR. */ + lwz %r0, 16(%sp) + mtCR %r0 /* Restores CR. */ + lwz %r0, 20(%sp) + mtLR %r0 /* Restores LR. */ + lwz %r0, 24(%sp) + mtCTR %r0 /* Restores CTR. */ + lwz %r0, 28(%sp) + mtXER %r0 /* Restores XER. */ + lwz %r0, 32(%sp) /* Restores GPR0. */ +#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */ + addi %sp, %sp, 80 /* Back to the previous frame. */ + rfi + +#endif /* !defined(__DOXYGEN__) */ + +/** @} */ diff --git a/os/common/ports/e200/compilers/GCC/ivor.s b/os/common/ports/e200/compilers/GCC/ivor.s deleted file mode 100644 index 53f84f96c..000000000 --- a/os/common/ports/e200/compilers/GCC/ivor.s +++ /dev/null @@ -1,259 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio. - - This file is part of ChibiOS. - - ChibiOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file ivor.s - * @brief Kernel ISRs. - * - * @addtogroup PPC_CORE - * @{ - */ - -#if !defined(FALSE) || defined(__DOXYGEN__) -#define FALSE 0 -#endif - -#if !defined(TRUE) || defined(__DOXYGEN__) -#define TRUE 1 -#endif - -/* - * Imports the PPC configuration headers. - */ -#define _FROM_ASM_ -#include "chlicense.h" -#include "chconf.h" -#include "chcore.h" - -#if !defined(__DOXYGEN__) - - .section .handlers, "ax" - -#if PPC_SUPPORTS_DECREMENTER - /* - * _IVOR10 handler (Book-E decrementer). - */ - .align 4 - .globl _IVOR10 - .type _IVOR10, @function -_IVOR10: - /* Saving the external context (port_extctx structure).*/ - stwu %sp, -80(%sp) -#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI - e_stmvsrrw 8(%sp) /* Saves PC, MSR. */ - e_stmvsprw 16(%sp) /* Saves CR, LR, CTR, XER. */ - e_stmvgprw 32(%sp) /* Saves GPR0, GPR3...GPR12. */ -#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */ - stw %r0, 32(%sp) /* Saves GPR0. */ - mfSRR0 %r0 - stw %r0, 8(%sp) /* Saves PC. */ - mfSRR1 %r0 - stw %r0, 12(%sp) /* Saves MSR. */ - mfCR %r0 - stw %r0, 16(%sp) /* Saves CR. */ - mfLR %r0 - stw %r0, 20(%sp) /* Saves LR. */ - mfCTR %r0 - stw %r0, 24(%sp) /* Saves CTR. */ - mfXER %r0 - stw %r0, 28(%sp) /* Saves XER. */ - stw %r3, 36(%sp) /* Saves GPR3...GPR12. */ - stw %r4, 40(%sp) - stw %r5, 44(%sp) - stw %r6, 48(%sp) - stw %r7, 52(%sp) - stw %r8, 56(%sp) - stw %r9, 60(%sp) - stw %r10, 64(%sp) - stw %r11, 68(%sp) - stw %r12, 72(%sp) -#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */ - - /* Increasing the SPGR0 register.*/ - mfspr %r0, 272 - eaddi %r0, %r0, 1 - mtspr 272, %r0 - - /* Reset DIE bit in TSR register.*/ - lis %r3, 0x0800 /* DIS bit mask. */ - mtspr 336, %r3 /* TSR register. */ - - /* Restoring pre-IRQ MSR register value.*/ - mfSRR1 %r0 -#if !PPC_USE_IRQ_PREEMPTION - /* No preemption, keeping EE disabled.*/ - se_bclri %r0, 16 /* EE = bit 16. */ -#endif - mtMSR %r0 - -#if CH_DBG_SYSTEM_STATE_CHECK - bl _dbg_check_enter_isr - bl _dbg_check_lock_from_isr -#endif - /* System tick handler invocation.*/ - bl chSysTimerHandlerI -#if CH_DBG_SYSTEM_STATE_CHECK - bl _dbg_check_unlock_from_isr - bl _dbg_check_leave_isr -#endif - -#if PPC_USE_IRQ_PREEMPTION - /* Prevents preemption again.*/ - wrteei 0 -#endif - - /* Jumps to the common IVOR epilogue code.*/ - b _ivor_exit -#endif /* PPC_SUPPORTS_DECREMENTER */ - - /* - * _IVOR4 handler (Book-E external interrupt). - */ - .align 4 - .globl _IVOR4 - .type _IVOR4, @function -_IVOR4: - /* Saving the external context (port_extctx structure).*/ - stwu %sp, -80(%sp) -#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI - e_stmvsrrw 8(%sp) /* Saves PC, MSR. */ - e_stmvsprw 16(%sp) /* Saves CR, LR, CTR, XER. */ - e_stmvgprw 32(%sp) /* Saves GPR0, GPR3...GPR12. */ -#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */ - stw %r0, 32(%sp) /* Saves GPR0. */ - mfSRR0 %r0 - stw %r0, 8(%sp) /* Saves PC. */ - mfSRR1 %r0 - stw %r0, 12(%sp) /* Saves MSR. */ - mfCR %r0 - stw %r0, 16(%sp) /* Saves CR. */ - mfLR %r0 - stw %r0, 20(%sp) /* Saves LR. */ - mfCTR %r0 - stw %r0, 24(%sp) /* Saves CTR. */ - mfXER %r0 - stw %r0, 28(%sp) /* Saves XER. */ - stw %r3, 36(%sp) /* Saves GPR3...GPR12. */ - stw %r4, 40(%sp) - stw %r5, 44(%sp) - stw %r6, 48(%sp) - stw %r7, 52(%sp) - stw %r8, 56(%sp) - stw %r9, 60(%sp) - stw %r10, 64(%sp) - stw %r11, 68(%sp) - stw %r12, 72(%sp) -#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */ - - /* Increasing the SPGR0 register.*/ - mfspr %r0, 272 - eaddi %r0, %r0, 1 - mtspr 272, %r0 - - /* Software vector address from the INTC register.*/ - lis %r3, INTC_IACKR_ADDR@h - ori %r3, %r3, INTC_IACKR_ADDR@l /* IACKR register address. */ - lwz %r3, 0(%r3) /* IACKR register value. */ - lwz %r3, 0(%r3) - mtCTR %r3 /* Software handler address. */ - - /* Restoring pre-IRQ MSR register value.*/ - mfSRR1 %r0 -#if !PPC_USE_IRQ_PREEMPTION - /* No preemption, keeping EE disabled.*/ - se_bclri %r0, 16 /* EE = bit 16. */ -#endif - mtMSR %r0 - - /* Exectes the software handler.*/ - bctrl - -#if PPC_USE_IRQ_PREEMPTION - /* Prevents preemption again.*/ - wrteei 0 -#endif - - /* Informs the INTC that the interrupt has been served.*/ - mbar 0 - lis %r3, INTC_EOIR_ADDR@h - ori %r3, %r3, INTC_EOIR_ADDR@l - stw %r3, 0(%r3) /* Writing any value should do. */ - - /* Common IVOR epilogue code, context restore.*/ - .globl _ivor_exit -_ivor_exit: - /* Decreasing the SPGR0 register.*/ - mfspr %r0, 272 - eaddi %r0, %r0, -1 - mtspr 272, %r0 - -#if CH_DBG_STATISTICS - bl _stats_start_measure_crit_thd -#endif -#if CH_DBG_SYSTEM_STATE_CHECK - bl _dbg_check_lock -#endif - bl chSchIsPreemptionRequired - cmpli cr0, %r3, 0 - beq cr0, .noresch - bl chSchDoReschedule -.noresch: -#if CH_DBG_SYSTEM_STATE_CHECK - bl _dbg_check_unlock -#endif -#if CH_DBG_STATISTICS - bl _stats_stop_measure_crit_thd -#endif - - /* Restoring the external context.*/ -#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI - e_lmvgprw 32(%sp) /* Restores GPR0, GPR3...GPR12. */ - e_lmvsprw 16(%sp) /* Restores CR, LR, CTR, XER. */ - e_lmvsrrw 8(%sp) /* Restores PC, MSR. */ -#else /*!(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */ - lwz %r3, 36(%sp) /* Restores GPR3...GPR12. */ - lwz %r4, 40(%sp) - lwz %r5, 44(%sp) - lwz %r6, 48(%sp) - lwz %r7, 52(%sp) - lwz %r8, 56(%sp) - lwz %r9, 60(%sp) - lwz %r10, 64(%sp) - lwz %r11, 68(%sp) - lwz %r12, 72(%sp) - lwz %r0, 8(%sp) - mtSRR0 %r0 /* Restores PC. */ - lwz %r0, 12(%sp) - mtSRR1 %r0 /* Restores MSR. */ - lwz %r0, 16(%sp) - mtCR %r0 /* Restores CR. */ - lwz %r0, 20(%sp) - mtLR %r0 /* Restores LR. */ - lwz %r0, 24(%sp) - mtCTR %r0 /* Restores CTR. */ - lwz %r0, 28(%sp) - mtXER %r0 /* Restores XER. */ - lwz %r0, 32(%sp) /* Restores GPR0. */ -#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */ - addi %sp, %sp, 80 /* Back to the previous frame. */ - rfi - -#endif /* !defined(__DOXYGEN__) */ - -/** @} */ diff --git a/os/common/ports/e200/compilers/GCC/mk/port.mk b/os/common/ports/e200/compilers/GCC/mk/port.mk index d22a30c97..e4bbbafa1 100644 --- a/os/common/ports/e200/compilers/GCC/mk/port.mk +++ b/os/common/ports/e200/compilers/GCC/mk/port.mk @@ -1,8 +1,8 @@ # List of the ChibiOS/RT e200 generic port files. PORTSRC = $(CHIBIOS)/os/common/ports/e200/chcore.c -PORTASM = $(CHIBIOS)/os/common/ports/e200/compilers/GCC/ivor.s \ - $(CHIBIOS)/os/common/ports/e200/compilers/GCC/chcoreasm.s +PORTASM = $(CHIBIOS)/os/common/ports/e200/compilers/GCC/ivor.S \ + $(CHIBIOS)/os/common/ports/e200/compilers/GCC/chcoreasm.S PORTINC = $(CHIBIOS)/os/common/ports/e200 \ $(CHIBIOS)/os/common/ports/e200/compilers/GCC diff --git a/os/common/startup/ARM/compilers/GCC/crt0.S b/os/common/startup/ARM/compilers/GCC/crt0.S new file mode 100644 index 000000000..663d975b9 --- /dev/null +++ b/os/common/startup/ARM/compilers/GCC/crt0.S @@ -0,0 +1,152 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file crt0.s + * @brief Generic ARM startup file. + * + * @addtogroup ARM_GCC_STARTUP + * @{ + */ + +#if !defined(__DOXYGEN__) + + .set MODE_USR, 0x10 + .set MODE_FIQ, 0x11 + .set MODE_IRQ, 0x12 + .set MODE_SVC, 0x13 + .set MODE_ABT, 0x17 + .set MODE_UND, 0x1B + .set MODE_SYS, 0x1F + + .set I_BIT, 0x80 + .set F_BIT, 0x40 + + .text + .code 32 + .balign 4 + +/* + * Reset handler. + */ + .global Reset_Handler +Reset_Handler: + /* + * Stack pointers initialization. + */ + ldr r0, =__stacks_end__ + /* Undefined */ + msr CPSR_c, #MODE_UND | I_BIT | F_BIT + mov sp, r0 + ldr r1, =__und_stack_size__ + sub r0, r0, r1 + /* Abort */ + msr CPSR_c, #MODE_ABT | I_BIT | F_BIT + mov sp, r0 + ldr r1, =__abt_stack_size__ + sub r0, r0, r1 + /* FIQ */ + msr CPSR_c, #MODE_FIQ | I_BIT | F_BIT + mov sp, r0 + ldr r1, =__fiq_stack_size__ + sub r0, r0, r1 + /* IRQ */ + msr CPSR_c, #MODE_IRQ | I_BIT | F_BIT + mov sp, r0 + ldr r1, =__irq_stack_size__ + sub r0, r0, r1 + /* Supervisor */ + msr CPSR_c, #MODE_SVC | I_BIT | F_BIT + mov sp, r0 + ldr r1, =__svc_stack_size__ + sub r0, r0, r1 + /* System */ + msr CPSR_c, #MODE_SYS | I_BIT | F_BIT + mov sp, r0 +// ldr r1, =__sys_stack_size__ +// sub r0, r0, r1 + /* + * Early initialization. + */ +#if !defined(THUMB_NO_INTERWORKING) + bl __early_init +#else /* defined(THUMB_NO_INTERWORKING) */ + add r0, pc, #1 + bx r0 + .code 16 + bl __early_init + mov r0, pc + bx r0 + .code 32 +#endif /* defined(THUMB_NO_INTERWORKING) */ + + /* + * Data initialization. + * NOTE: It assumes that the DATA size is a multiple of 4. + */ + ldr r1, =_textdata + ldr r2, =_data + ldr r3, =_edata +dataloop: + cmp r2, r3 + ldrlo r0, [r1], #4 + strlo r0, [r2], #4 + blo dataloop + /* + * BSS initialization. + * NOTE: It assumes that the BSS size is a multiple of 4. + */ + mov r0, #0 + ldr r1, =_bss_start + ldr r2, =_bss_end +bssloop: + cmp r1, r2 + strlo r0, [r1], #4 + blo bssloop + /* + * Late initialization. + */ +#if !defined(THUMB_NO_INTERWORKING) + bl __late_init +#else /* defined(THUMB_NO_INTERWORKING) */ + add r0, pc, #1 + bx r0 + .code 16 + bl __late_init + mov r0, pc + bx r0 + .code 32 +#endif /* defined(THUMB_NO_INTERWORKING) */ + + /* + * Main program invocation. + */ +#if defined(THUMB_NO_INTERWORKING) + add r0, pc, #1 + bx r0 + .code 16 + bl main + ldr r1, =__default_exit + bx r1 + .code 32 +#else /* !defined(THUMB_NO_INTERWORKING) */ + bl main + b __default_exit +#endif /* !defined(THUMB_NO_INTERWORKING) */ + +#endif /* !defined(__DOXYGEN__) */ + +/** @} */ diff --git a/os/common/startup/ARM/compilers/GCC/crt0.s b/os/common/startup/ARM/compilers/GCC/crt0.s deleted file mode 100644 index 663d975b9..000000000 --- a/os/common/startup/ARM/compilers/GCC/crt0.s +++ /dev/null @@ -1,152 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file crt0.s - * @brief Generic ARM startup file. - * - * @addtogroup ARM_GCC_STARTUP - * @{ - */ - -#if !defined(__DOXYGEN__) - - .set MODE_USR, 0x10 - .set MODE_FIQ, 0x11 - .set MODE_IRQ, 0x12 - .set MODE_SVC, 0x13 - .set MODE_ABT, 0x17 - .set MODE_UND, 0x1B - .set MODE_SYS, 0x1F - - .set I_BIT, 0x80 - .set F_BIT, 0x40 - - .text - .code 32 - .balign 4 - -/* - * Reset handler. - */ - .global Reset_Handler -Reset_Handler: - /* - * Stack pointers initialization. - */ - ldr r0, =__stacks_end__ - /* Undefined */ - msr CPSR_c, #MODE_UND | I_BIT | F_BIT - mov sp, r0 - ldr r1, =__und_stack_size__ - sub r0, r0, r1 - /* Abort */ - msr CPSR_c, #MODE_ABT | I_BIT | F_BIT - mov sp, r0 - ldr r1, =__abt_stack_size__ - sub r0, r0, r1 - /* FIQ */ - msr CPSR_c, #MODE_FIQ | I_BIT | F_BIT - mov sp, r0 - ldr r1, =__fiq_stack_size__ - sub r0, r0, r1 - /* IRQ */ - msr CPSR_c, #MODE_IRQ | I_BIT | F_BIT - mov sp, r0 - ldr r1, =__irq_stack_size__ - sub r0, r0, r1 - /* Supervisor */ - msr CPSR_c, #MODE_SVC | I_BIT | F_BIT - mov sp, r0 - ldr r1, =__svc_stack_size__ - sub r0, r0, r1 - /* System */ - msr CPSR_c, #MODE_SYS | I_BIT | F_BIT - mov sp, r0 -// ldr r1, =__sys_stack_size__ -// sub r0, r0, r1 - /* - * Early initialization. - */ -#if !defined(THUMB_NO_INTERWORKING) - bl __early_init -#else /* defined(THUMB_NO_INTERWORKING) */ - add r0, pc, #1 - bx r0 - .code 16 - bl __early_init - mov r0, pc - bx r0 - .code 32 -#endif /* defined(THUMB_NO_INTERWORKING) */ - - /* - * Data initialization. - * NOTE: It assumes that the DATA size is a multiple of 4. - */ - ldr r1, =_textdata - ldr r2, =_data - ldr r3, =_edata -dataloop: - cmp r2, r3 - ldrlo r0, [r1], #4 - strlo r0, [r2], #4 - blo dataloop - /* - * BSS initialization. - * NOTE: It assumes that the BSS size is a multiple of 4. - */ - mov r0, #0 - ldr r1, =_bss_start - ldr r2, =_bss_end -bssloop: - cmp r1, r2 - strlo r0, [r1], #4 - blo bssloop - /* - * Late initialization. - */ -#if !defined(THUMB_NO_INTERWORKING) - bl __late_init -#else /* defined(THUMB_NO_INTERWORKING) */ - add r0, pc, #1 - bx r0 - .code 16 - bl __late_init - mov r0, pc - bx r0 - .code 32 -#endif /* defined(THUMB_NO_INTERWORKING) */ - - /* - * Main program invocation. - */ -#if defined(THUMB_NO_INTERWORKING) - add r0, pc, #1 - bx r0 - .code 16 - bl main - ldr r1, =__default_exit - bx r1 - .code 32 -#else /* !defined(THUMB_NO_INTERWORKING) */ - bl main - b __default_exit -#endif /* !defined(THUMB_NO_INTERWORKING) */ - -#endif /* !defined(__DOXYGEN__) */ - -/** @} */ diff --git a/os/common/startup/ARM/compilers/GCC/ld/rules.ld b/os/common/startup/ARM/compilers/GCC/ld/rules.ld new file mode 100644 index 000000000..219d0d420 --- /dev/null +++ b/os/common/startup/ARM/compilers/GCC/ld/rules.ld @@ -0,0 +1,222 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +__stacks_total_size__ = __und_stack_size__ + __abt_stack_size__ + __fiq_stack_size__ + __irq_stack_size__ + __svc_stack_size__ + __sys_stack_size__; + +__ram0_start__ = ORIGIN(ram0); +__ram0_size__ = LENGTH(ram0); +__ram0_end__ = __ram0_start__ + __ram0_size__; +__ram1_start__ = ORIGIN(ram1); +__ram1_size__ = LENGTH(ram1); +__ram1_end__ = __ram1_start__ + __ram1_size__; +__ram2_start__ = ORIGIN(ram2); +__ram2_size__ = LENGTH(ram2); +__ram2_end__ = __ram2_start__ + __ram2_size__; +__ram3_start__ = ORIGIN(ram3); +__ram3_size__ = LENGTH(ram3); +__ram3_end__ = __ram3_start__ + __ram3_size__; +__ram4_start__ = ORIGIN(ram4); +__ram4_size__ = LENGTH(ram4); +__ram4_end__ = __ram4_start__ + __ram4_size__; +__ram5_start__ = ORIGIN(ram5); +__ram5_size__ = LENGTH(ram5); +__ram5_end__ = __ram5_start__ + __ram5_size__; +__ram6_start__ = ORIGIN(ram6); +__ram6_size__ = LENGTH(ram6); +__ram6_end__ = __ram6_start__ + __ram6_size__; +__ram7_start__ = ORIGIN(ram7); +__ram7_size__ = LENGTH(ram7); +__ram7_end__ = __ram7_start__ + __ram7_size__; + +ENTRY(Reset_Handler) + +SECTIONS +{ + . = 0; + _text = .; + + startup : ALIGN(16) SUBALIGN(16) + { + KEEP(*(.vectors)) + } > flash + + constructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE(__init_array_end = .); + } > flash + + destructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__fini_array_start = .); + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + PROVIDE(__fini_array_end = .); + } > flash + + .text : ALIGN(16) SUBALIGN(16) + { + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > flash + + .ARM.exidx : { + PROVIDE(__exidx_start = .); + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + PROVIDE(__exidx_end = .); + } > flash + + .eh_frame_hdr : + { + *(.eh_frame_hdr) + } > flash + + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash + + .textalign : ONLY_IF_RO + { + . = ALIGN(8); + } > flash + + . = ALIGN(4); + _etext = .; + _textdata = _etext; + + .stacks : + { + . = ALIGN(8); + __stacks_base__ = .; + __main_thread_stack_base__ = .; + . += __stacks_total_size__; + . = ALIGN(8); + __stacks_end__ = .; + } > STACKS_RAM + + .data : ALIGN(4) + { + . = ALIGN(4); + PROVIDE(_data = .); + *(.data) + *(.data.*) + *(.ramtext) + . = ALIGN(4); + PROVIDE(_edata = .); + } > DATA_RAM AT > flash + + .bss : ALIGN(4) + { + . = ALIGN(4); + PROVIDE(_bss_start = .); + *(.bss) + *(.bss.*) + *(COMMON) + . = ALIGN(4); + PROVIDE(_bss_end = .); + PROVIDE(end = .); + } > BSS_RAM + + .ram0 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + *(.ram0) + *(.ram0.*) + . = ALIGN(4); + __ram0_free__ = .; + } > ram0 + + .ram1 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + *(.ram1) + *(.ram1.*) + . = ALIGN(4); + __ram1_free__ = .; + } > ram1 + + .ram2 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + *(.ram2) + *(.ram2.*) + . = ALIGN(4); + __ram2_free__ = .; + } > ram2 + + .ram3 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + *(.ram3) + *(.ram3.*) + . = ALIGN(4); + __ram3_free__ = .; + } > ram3 + + .ram4 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + *(.ram4) + *(.ram4.*) + . = ALIGN(4); + __ram4_free__ = .; + } > ram4 + + .ram5 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + *(.ram5) + *(.ram5.*) + . = ALIGN(4); + __ram5_free__ = .; + } > ram5 + + .ram6 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + *(.ram6) + *(.ram6.*) + . = ALIGN(4); + __ram6_free__ = .; + } > ram6 + + .ram7 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + *(.ram7) + *(.ram7.*) + . = ALIGN(4); + __ram7_free__ = .; + } > ram7 +} + +/* Heap default boundaries, it is defaulted to be the non-used part + of ram0 region.*/ +__heap_base__ = __ram0_free__; +__heap_end__ = __ram0_end__; diff --git a/os/common/startup/ARM/compilers/GCC/mk/startup_lpc214x.mk b/os/common/startup/ARM/compilers/GCC/mk/startup_lpc214x.mk index baf301a34..04611a33f 100644 --- a/os/common/startup/ARM/compilers/GCC/mk/startup_lpc214x.mk +++ b/os/common/startup/ARM/compilers/GCC/mk/startup_lpc214x.mk @@ -1,8 +1,8 @@ # List of the ChibiOS generic LPC214x file. STARTUPSRC = $(CHIBIOS)/os/common/startup/ARM/compilers/GCC/crt1.c -STARTUPASM = $(CHIBIOS)/os/common/startup/ARM/compilers/GCC/vectors.s \ - $(CHIBIOS)/os/common/startup/ARM/compilers/GCC/crt0.s +STARTUPASM = $(CHIBIOS)/os/common/startup/ARM/compilers/GCC/vectors.S \ + $(CHIBIOS)/os/common/startup/ARM/compilers/GCC/crt0.S STARTUPINC = ${CHIBIOS}/os/common/startup/ARM/devices/LPC214x diff --git a/os/common/startup/ARM/compilers/GCC/rules.ld b/os/common/startup/ARM/compilers/GCC/rules.ld deleted file mode 100644 index 219d0d420..000000000 --- a/os/common/startup/ARM/compilers/GCC/rules.ld +++ /dev/null @@ -1,222 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -__stacks_total_size__ = __und_stack_size__ + __abt_stack_size__ + __fiq_stack_size__ + __irq_stack_size__ + __svc_stack_size__ + __sys_stack_size__; - -__ram0_start__ = ORIGIN(ram0); -__ram0_size__ = LENGTH(ram0); -__ram0_end__ = __ram0_start__ + __ram0_size__; -__ram1_start__ = ORIGIN(ram1); -__ram1_size__ = LENGTH(ram1); -__ram1_end__ = __ram1_start__ + __ram1_size__; -__ram2_start__ = ORIGIN(ram2); -__ram2_size__ = LENGTH(ram2); -__ram2_end__ = __ram2_start__ + __ram2_size__; -__ram3_start__ = ORIGIN(ram3); -__ram3_size__ = LENGTH(ram3); -__ram3_end__ = __ram3_start__ + __ram3_size__; -__ram4_start__ = ORIGIN(ram4); -__ram4_size__ = LENGTH(ram4); -__ram4_end__ = __ram4_start__ + __ram4_size__; -__ram5_start__ = ORIGIN(ram5); -__ram5_size__ = LENGTH(ram5); -__ram5_end__ = __ram5_start__ + __ram5_size__; -__ram6_start__ = ORIGIN(ram6); -__ram6_size__ = LENGTH(ram6); -__ram6_end__ = __ram6_start__ + __ram6_size__; -__ram7_start__ = ORIGIN(ram7); -__ram7_size__ = LENGTH(ram7); -__ram7_end__ = __ram7_start__ + __ram7_size__; - -ENTRY(Reset_Handler) - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(.vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - .textalign : ONLY_IF_RO - { - . = ALIGN(8); - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .stacks : - { - . = ALIGN(8); - __stacks_base__ = .; - __main_thread_stack_base__ = .; - . += __stacks_total_size__; - . = ALIGN(8); - __stacks_end__ = .; - } > STACKS_RAM - - .data : ALIGN(4) - { - . = ALIGN(4); - PROVIDE(_data = .); - *(.data) - *(.data.*) - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > DATA_RAM AT > flash - - .bss : ALIGN(4) - { - . = ALIGN(4); - PROVIDE(_bss_start = .); - *(.bss) - *(.bss.*) - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - PROVIDE(end = .); - } > BSS_RAM - - .ram0 (NOLOAD) : ALIGN(4) - { - . = ALIGN(4); - *(.ram0) - *(.ram0.*) - . = ALIGN(4); - __ram0_free__ = .; - } > ram0 - - .ram1 (NOLOAD) : ALIGN(4) - { - . = ALIGN(4); - *(.ram1) - *(.ram1.*) - . = ALIGN(4); - __ram1_free__ = .; - } > ram1 - - .ram2 (NOLOAD) : ALIGN(4) - { - . = ALIGN(4); - *(.ram2) - *(.ram2.*) - . = ALIGN(4); - __ram2_free__ = .; - } > ram2 - - .ram3 (NOLOAD) : ALIGN(4) - { - . = ALIGN(4); - *(.ram3) - *(.ram3.*) - . = ALIGN(4); - __ram3_free__ = .; - } > ram3 - - .ram4 (NOLOAD) : ALIGN(4) - { - . = ALIGN(4); - *(.ram4) - *(.ram4.*) - . = ALIGN(4); - __ram4_free__ = .; - } > ram4 - - .ram5 (NOLOAD) : ALIGN(4) - { - . = ALIGN(4); - *(.ram5) - *(.ram5.*) - . = ALIGN(4); - __ram5_free__ = .; - } > ram5 - - .ram6 (NOLOAD) : ALIGN(4) - { - . = ALIGN(4); - *(.ram6) - *(.ram6.*) - . = ALIGN(4); - __ram6_free__ = .; - } > ram6 - - .ram7 (NOLOAD) : ALIGN(4) - { - . = ALIGN(4); - *(.ram7) - *(.ram7.*) - . = ALIGN(4); - __ram7_free__ = .; - } > ram7 -} - -/* Heap default boundaries, it is defaulted to be the non-used part - of ram0 region.*/ -__heap_base__ = __ram0_free__; -__heap_end__ = __ram0_end__; diff --git a/os/common/startup/ARM/compilers/GCC/vectors.S b/os/common/startup/ARM/compilers/GCC/vectors.S new file mode 100644 index 000000000..39bd6db73 --- /dev/null +++ b/os/common/startup/ARM/compilers/GCC/vectors.S @@ -0,0 +1,98 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file ARM/compilers/GCC/vectors.s + * @brief Interrupt vectors for ARM devices. + * + * @defgroup ARM_VECTORS ARM Exception Vectors + * @{ + */ + +#if defined(__DOXYGEN__) +/** + * @brief Unhandled exceptions handler. + * @details Any undefined exception vector points to this function by default. + * This function simply stops the system into an infinite loop. + * @note The default implementation is a weak symbol, the application + * can override the default implementation. + * + * @notapi + */ +void _unhandled_exception(void) {} +#endif + +#if !defined(__DOXYGEN__) + + .section .vectors, "ax" + .code 32 + .balign 4 + +/* + * System entry points. + */ + .global _start +_start: + ldr pc, _reset + ldr pc, _undefined + ldr pc, _swi + ldr pc, _prefetch + ldr pc, _abort + nop + ldr pc, _irq + ldr pc, _fiq + +_reset: + .word Reset_Handler +_undefined: + .word Und_Handler +_swi: + .word Swi_Handler +_prefetch: + .word Prefetch_Handler +_abort: + .word Abort_Handler +_fiq: + .word Fiq_Handler +_irq: + .word Irq_Handler + +/* + * Default exceptions handlers. The handlers are declared weak in order to be + * replaced by the real handling code. Everything is defaulted to an infinite + * loop. + */ + .weak Reset_Handler +Reset_Handler: + .weak Und_Handler +Und_Handler: + .weak Swi_Handler +Swi_Handler: + .weak Prefetch_Handler +Prefetch_Handler: + .weak Abort_Handler +Abort_Handler: + .weak Fiq_Handler +Fiq_Handler: + .weak Irq_Handler +Irq_Handler: + .weak _unhandled_exception +_unhandled_exception: + b _unhandled_exception + +#endif + +/** @} */ diff --git a/os/common/startup/ARM/compilers/GCC/vectors.s b/os/common/startup/ARM/compilers/GCC/vectors.s deleted file mode 100644 index 39bd6db73..000000000 --- a/os/common/startup/ARM/compilers/GCC/vectors.s +++ /dev/null @@ -1,98 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file ARM/compilers/GCC/vectors.s - * @brief Interrupt vectors for ARM devices. - * - * @defgroup ARM_VECTORS ARM Exception Vectors - * @{ - */ - -#if defined(__DOXYGEN__) -/** - * @brief Unhandled exceptions handler. - * @details Any undefined exception vector points to this function by default. - * This function simply stops the system into an infinite loop. - * @note The default implementation is a weak symbol, the application - * can override the default implementation. - * - * @notapi - */ -void _unhandled_exception(void) {} -#endif - -#if !defined(__DOXYGEN__) - - .section .vectors, "ax" - .code 32 - .balign 4 - -/* - * System entry points. - */ - .global _start -_start: - ldr pc, _reset - ldr pc, _undefined - ldr pc, _swi - ldr pc, _prefetch - ldr pc, _abort - nop - ldr pc, _irq - ldr pc, _fiq - -_reset: - .word Reset_Handler -_undefined: - .word Und_Handler -_swi: - .word Swi_Handler -_prefetch: - .word Prefetch_Handler -_abort: - .word Abort_Handler -_fiq: - .word Fiq_Handler -_irq: - .word Irq_Handler - -/* - * Default exceptions handlers. The handlers are declared weak in order to be - * replaced by the real handling code. Everything is defaulted to an infinite - * loop. - */ - .weak Reset_Handler -Reset_Handler: - .weak Und_Handler -Und_Handler: - .weak Swi_Handler -Swi_Handler: - .weak Prefetch_Handler -Prefetch_Handler: - .weak Abort_Handler -Abort_Handler: - .weak Fiq_Handler -Fiq_Handler: - .weak Irq_Handler -Irq_Handler: - .weak _unhandled_exception -_unhandled_exception: - b _unhandled_exception - -#endif - -/** @} */ diff --git a/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.S b/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.S new file mode 100644 index 000000000..b313b611a --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.S @@ -0,0 +1,256 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file crt0_v6m.s + * @brief Generic ARMv6-M (Cortex-M0/M1) startup file for ChibiOS. + * + * @addtogroup ARMCMx_GCC_STARTUP_V6M + * @{ + */ + +/*===========================================================================*/ +/* Module constants. */ +/*===========================================================================*/ + +#if !defined(FALSE) || defined(__DOXYGEN__) +#define FALSE 0 +#endif + +#if !defined(TRUE) || defined(__DOXYGEN__) +#define TRUE 1 +#endif + +#define CONTROL_MODE_PRIVILEGED 0 +#define CONTROL_MODE_UNPRIVILEGED 1 +#define CONTROL_USE_MSP 0 +#define CONTROL_USE_PSP 2 + +/*===========================================================================*/ +/* Module pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @brief Control special register initialization value. + * @details The system is setup to run in privileged mode using the PSP + * stack (dual stack mode). + */ +#if !defined(CRT0_CONTROL_INIT) || defined(__DOXYGEN__) +#define CRT0_CONTROL_INIT (CONTROL_USE_PSP | \ + CONTROL_MODE_PRIVILEGED) +#endif + +/** + * @brief Core initialization switch. + */ +#if !defined(CRT0_INIT_CORE) || defined(__DOXYGEN__) +#define CRT0_INIT_CORE TRUE +#endif + +/** + * @brief Stack segments initialization switch. + */ +#if !defined(CRT0_STACKS_FILL_PATTERN) || defined(__DOXYGEN__) +#define CRT0_STACKS_FILL_PATTERN 0x55555555 +#endif + +/** + * @brief Stack segments initialization switch. + */ +#if !defined(CRT0_INIT_STACKS) || defined(__DOXYGEN__) +#define CRT0_INIT_STACKS TRUE +#endif + +/** + * @brief DATA segment initialization switch. + */ +#if !defined(CRT0_INIT_DATA) || defined(__DOXYGEN__) +#define CRT0_INIT_DATA TRUE +#endif + +/** + * @brief BSS segment initialization switch. + */ +#if !defined(CRT0_INIT_BSS) || defined(__DOXYGEN__) +#define CRT0_INIT_BSS TRUE +#endif + +/** + * @brief RAM areas initialization switch. + */ +#if !defined(CRT0_INIT_RAM_AREAS) || defined(__DOXYGEN__) +#define CRT0_INIT_RAM_AREAS TRUE +#endif + +/** + * @brief Constructors invocation switch. + */ +#if !defined(CRT0_CALL_CONSTRUCTORS) || defined(__DOXYGEN__) +#define CRT0_CALL_CONSTRUCTORS TRUE +#endif + +/** + * @brief Destructors invocation switch. + */ +#if !defined(CRT0_CALL_DESTRUCTORS) || defined(__DOXYGEN__) +#define CRT0_CALL_DESTRUCTORS TRUE +#endif + +/*===========================================================================*/ +/* Code section. */ +/*===========================================================================*/ + +#if !defined(__DOXYGEN__) + + .cpu cortex-m0 + .fpu softvfp + + .thumb + .text + +/* + * Reset handler. + */ + .align 2 + .thumb_func + .global Reset_Handler +Reset_Handler: + /* Interrupts are globally masked initially.*/ + cpsid i + + /* PSP stack pointers initialization.*/ + ldr r0, =__process_stack_end__ + msr PSP, r0 + + /* CPU mode initialization as configured.*/ + movs r0, #CRT0_CONTROL_INIT + msr CONTROL, r0 + isb + +#if CRT0_INIT_CORE == TRUE + /* Core initialization.*/ + bl __core_init +#endif + + /* Early initialization..*/ + bl __early_init + +#if CRT0_INIT_STACKS == TRUE + ldr r0, =CRT0_STACKS_FILL_PATTERN + /* Main Stack initialization. Note, it assumes that the + stack size is a multiple of 4 so the linker file must + ensure this.*/ + ldr r1, =__main_stack_base__ + ldr r2, =__main_stack_end__ +msloop: + cmp r1, r2 + bge endmsloop + str r0, [r1] + add r1, r1, #4 + b msloop +endmsloop: + /* Process Stack initialization. Note, it assumes that the + stack size is a multiple of 4 so the linker file must + ensure this.*/ + ldr r1, =__process_stack_base__ + ldr r2, =__process_stack_end__ +psloop: + cmp r1, r2 + bge endpsloop + str r0, [r1] + add r1, r1, #4 + b psloop +endpsloop: +#endif + +#if CRT0_INIT_DATA == TRUE + /* Data initialization. Note, it assumes that the DATA size + is a multiple of 4 so the linker file must ensure this.*/ + ldr r1, =_textdata + ldr r2, =_data + ldr r3, =_edata +dloop: + cmp r2, r3 + bge enddloop + ldr r0, [r1] + str r0, [r2] + add r1, r1, #4 + add r2, r2, #4 + b dloop +enddloop: +#endif + +#if CRT0_INIT_BSS == TRUE + /* BSS initialization. Note, it assumes that the DATA size + is a multiple of 4 so the linker file must ensure this.*/ + movs r0, #0 + ldr r1, =_bss_start + ldr r2, =_bss_end +bloop: + cmp r1, r2 + bge endbloop + str r0, [r1] + add r1, r1, #4 + b bloop +endbloop: +#endif + +#if CRT0_INIT_RAM_AREAS == TRUE + /* RAM areas initialization.*/ + bl __init_ram_areas +#endif + + /* Late initialization..*/ + bl __late_init + +#if CRT0_CALL_CONSTRUCTORS == TRUE + /* Constructors invocation.*/ + ldr r4, =__init_array_start + ldr r5, =__init_array_end +initloop: + cmp r4, r5 + bge endinitloop + ldr r1, [r4] + blx r1 + add r4, r4, #4 + b initloop +endinitloop: +#endif + + /* Main program invocation, r0 contains the returned value.*/ + bl main + +#if CRT0_CALL_DESTRUCTORS == TRUE + /* Destructors invocation.*/ + ldr r4, =__fini_array_start + ldr r5, =__fini_array_end +finiloop: + cmp r4, r5 + bge endfiniloop + ldr r1, [r4] + blx r1 + add r4, r4, #4 + b finiloop +endfiniloop: +#endif + + /* Branching to the defined exit handler.*/ + ldr r1, =__default_exit + bx r1 + +#endif + +/** @} */ diff --git a/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.s b/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.s deleted file mode 100644 index b313b611a..000000000 --- a/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.s +++ /dev/null @@ -1,256 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file crt0_v6m.s - * @brief Generic ARMv6-M (Cortex-M0/M1) startup file for ChibiOS. - * - * @addtogroup ARMCMx_GCC_STARTUP_V6M - * @{ - */ - -/*===========================================================================*/ -/* Module constants. */ -/*===========================================================================*/ - -#if !defined(FALSE) || defined(__DOXYGEN__) -#define FALSE 0 -#endif - -#if !defined(TRUE) || defined(__DOXYGEN__) -#define TRUE 1 -#endif - -#define CONTROL_MODE_PRIVILEGED 0 -#define CONTROL_MODE_UNPRIVILEGED 1 -#define CONTROL_USE_MSP 0 -#define CONTROL_USE_PSP 2 - -/*===========================================================================*/ -/* Module pre-compile time settings. */ -/*===========================================================================*/ - -/** - * @brief Control special register initialization value. - * @details The system is setup to run in privileged mode using the PSP - * stack (dual stack mode). - */ -#if !defined(CRT0_CONTROL_INIT) || defined(__DOXYGEN__) -#define CRT0_CONTROL_INIT (CONTROL_USE_PSP | \ - CONTROL_MODE_PRIVILEGED) -#endif - -/** - * @brief Core initialization switch. - */ -#if !defined(CRT0_INIT_CORE) || defined(__DOXYGEN__) -#define CRT0_INIT_CORE TRUE -#endif - -/** - * @brief Stack segments initialization switch. - */ -#if !defined(CRT0_STACKS_FILL_PATTERN) || defined(__DOXYGEN__) -#define CRT0_STACKS_FILL_PATTERN 0x55555555 -#endif - -/** - * @brief Stack segments initialization switch. - */ -#if !defined(CRT0_INIT_STACKS) || defined(__DOXYGEN__) -#define CRT0_INIT_STACKS TRUE -#endif - -/** - * @brief DATA segment initialization switch. - */ -#if !defined(CRT0_INIT_DATA) || defined(__DOXYGEN__) -#define CRT0_INIT_DATA TRUE -#endif - -/** - * @brief BSS segment initialization switch. - */ -#if !defined(CRT0_INIT_BSS) || defined(__DOXYGEN__) -#define CRT0_INIT_BSS TRUE -#endif - -/** - * @brief RAM areas initialization switch. - */ -#if !defined(CRT0_INIT_RAM_AREAS) || defined(__DOXYGEN__) -#define CRT0_INIT_RAM_AREAS TRUE -#endif - -/** - * @brief Constructors invocation switch. - */ -#if !defined(CRT0_CALL_CONSTRUCTORS) || defined(__DOXYGEN__) -#define CRT0_CALL_CONSTRUCTORS TRUE -#endif - -/** - * @brief Destructors invocation switch. - */ -#if !defined(CRT0_CALL_DESTRUCTORS) || defined(__DOXYGEN__) -#define CRT0_CALL_DESTRUCTORS TRUE -#endif - -/*===========================================================================*/ -/* Code section. */ -/*===========================================================================*/ - -#if !defined(__DOXYGEN__) - - .cpu cortex-m0 - .fpu softvfp - - .thumb - .text - -/* - * Reset handler. - */ - .align 2 - .thumb_func - .global Reset_Handler -Reset_Handler: - /* Interrupts are globally masked initially.*/ - cpsid i - - /* PSP stack pointers initialization.*/ - ldr r0, =__process_stack_end__ - msr PSP, r0 - - /* CPU mode initialization as configured.*/ - movs r0, #CRT0_CONTROL_INIT - msr CONTROL, r0 - isb - -#if CRT0_INIT_CORE == TRUE - /* Core initialization.*/ - bl __core_init -#endif - - /* Early initialization..*/ - bl __early_init - -#if CRT0_INIT_STACKS == TRUE - ldr r0, =CRT0_STACKS_FILL_PATTERN - /* Main Stack initialization. Note, it assumes that the - stack size is a multiple of 4 so the linker file must - ensure this.*/ - ldr r1, =__main_stack_base__ - ldr r2, =__main_stack_end__ -msloop: - cmp r1, r2 - bge endmsloop - str r0, [r1] - add r1, r1, #4 - b msloop -endmsloop: - /* Process Stack initialization. Note, it assumes that the - stack size is a multiple of 4 so the linker file must - ensure this.*/ - ldr r1, =__process_stack_base__ - ldr r2, =__process_stack_end__ -psloop: - cmp r1, r2 - bge endpsloop - str r0, [r1] - add r1, r1, #4 - b psloop -endpsloop: -#endif - -#if CRT0_INIT_DATA == TRUE - /* Data initialization. Note, it assumes that the DATA size - is a multiple of 4 so the linker file must ensure this.*/ - ldr r1, =_textdata - ldr r2, =_data - ldr r3, =_edata -dloop: - cmp r2, r3 - bge enddloop - ldr r0, [r1] - str r0, [r2] - add r1, r1, #4 - add r2, r2, #4 - b dloop -enddloop: -#endif - -#if CRT0_INIT_BSS == TRUE - /* BSS initialization. Note, it assumes that the DATA size - is a multiple of 4 so the linker file must ensure this.*/ - movs r0, #0 - ldr r1, =_bss_start - ldr r2, =_bss_end -bloop: - cmp r1, r2 - bge endbloop - str r0, [r1] - add r1, r1, #4 - b bloop -endbloop: -#endif - -#if CRT0_INIT_RAM_AREAS == TRUE - /* RAM areas initialization.*/ - bl __init_ram_areas -#endif - - /* Late initialization..*/ - bl __late_init - -#if CRT0_CALL_CONSTRUCTORS == TRUE - /* Constructors invocation.*/ - ldr r4, =__init_array_start - ldr r5, =__init_array_end -initloop: - cmp r4, r5 - bge endinitloop - ldr r1, [r4] - blx r1 - add r4, r4, #4 - b initloop -endinitloop: -#endif - - /* Main program invocation, r0 contains the returned value.*/ - bl main - -#if CRT0_CALL_DESTRUCTORS == TRUE - /* Destructors invocation.*/ - ldr r4, =__fini_array_start - ldr r5, =__fini_array_end -finiloop: - cmp r4, r5 - bge endfiniloop - ldr r1, [r4] - blx r1 - add r4, r4, #4 - b finiloop -endfiniloop: -#endif - - /* Branching to the defined exit handler.*/ - ldr r1, =__default_exit - bx r1 - -#endif - -/** @} */ diff --git a/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S b/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S new file mode 100644 index 000000000..5f9668efb --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S @@ -0,0 +1,319 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file crt0_v7m.s + * @brief Generic ARMv7-M (Cortex-M3/M4/M7) startup file for ChibiOS. + * + * @addtogroup ARMCMx_GCC_STARTUP_V7M + * @{ + */ + +/*===========================================================================*/ +/* Module constants. */ +/*===========================================================================*/ + +#if !defined(FALSE) || defined(__DOXYGEN__) +#define FALSE 0 +#endif + +#if !defined(TRUE) || defined(__DOXYGEN__) +#define TRUE 1 +#endif + +#define CONTROL_MODE_PRIVILEGED 0 +#define CONTROL_MODE_UNPRIVILEGED 1 +#define CONTROL_USE_MSP 0 +#define CONTROL_USE_PSP 2 +#define CONTROL_FPCA 4 + +#define FPCCR_ASPEN (1 << 31) +#define FPCCR_LSPEN (1 << 30) + +#define SCB_CPACR 0xE000ED88 +#define SCB_FPCCR 0xE000EF34 +#define SCB_FPDSCR 0xE000EF3C + +/*===========================================================================*/ +/* Module pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @brief FPU initialization switch. + */ +#if !defined(CRT0_INIT_FPU) || defined(__DOXYGEN__) +#if defined(CORTEX_USE_FPU) || defined(__DOXYGEN__) +#define CRT0_INIT_FPU CORTEX_USE_FPU +#else +#define CRT0_INIT_FPU FALSE +#endif +#endif + +/** + * @brief Control special register initialization value. + * @details The system is setup to run in privileged mode using the PSP + * stack (dual stack mode). + */ +#if !defined(CRT0_CONTROL_INIT) || defined(__DOXYGEN__) +#define CRT0_CONTROL_INIT (CONTROL_USE_PSP | \ + CONTROL_MODE_PRIVILEGED) +#endif + +/** + * @brief Core initialization switch. + */ +#if !defined(CRT0_INIT_CORE) || defined(__DOXYGEN__) +#define CRT0_INIT_CORE TRUE +#endif + +/** + * @brief Stack segments initialization switch. + */ +#if !defined(CRT0_STACKS_FILL_PATTERN) || defined(__DOXYGEN__) +#define CRT0_STACKS_FILL_PATTERN 0x55555555 +#endif + +/** + * @brief Stack segments initialization switch. + */ +#if !defined(CRT0_INIT_STACKS) || defined(__DOXYGEN__) +#define CRT0_INIT_STACKS TRUE +#endif + +/** + * @brief DATA segment initialization switch. + */ +#if !defined(CRT0_INIT_DATA) || defined(__DOXYGEN__) +#define CRT0_INIT_DATA TRUE +#endif + +/** + * @brief BSS segment initialization switch. + */ +#if !defined(CRT0_INIT_BSS) || defined(__DOXYGEN__) +#define CRT0_INIT_BSS TRUE +#endif + +/** + * @brief RAM areas initialization switch. + */ +#if !defined(CRT0_INIT_RAM_AREAS) || defined(__DOXYGEN__) +#define CRT0_INIT_RAM_AREAS TRUE +#endif + +/** + * @brief Constructors invocation switch. + */ +#if !defined(CRT0_CALL_CONSTRUCTORS) || defined(__DOXYGEN__) +#define CRT0_CALL_CONSTRUCTORS TRUE +#endif + +/** + * @brief Destructors invocation switch. + */ +#if !defined(CRT0_CALL_DESTRUCTORS) || defined(__DOXYGEN__) +#define CRT0_CALL_DESTRUCTORS TRUE +#endif + +/** + * @brief FPU FPCCR register initialization value. + * @note Only used if @p CRT0_INIT_FPU is equal to @p TRUE. + */ +#if !defined(CRT0_FPCCR_INIT) || defined(__DOXYGEN__) +#define CRT0_FPCCR_INIT (FPCCR_ASPEN | FPCCR_LSPEN) +#endif + +/** + * @brief CPACR register initialization value. + * @note Only used if @p CRT0_INIT_FPU is equal to @p TRUE. + */ +#if !defined(CRT0_CPACR_INIT) || defined(__DOXYGEN__) +#define CRT0_CPACR_INIT 0x00F00000 +#endif + +/*===========================================================================*/ +/* Code section. */ +/*===========================================================================*/ + +#if !defined(__DOXYGEN__) + + .syntax unified + .cpu cortex-m3 +#if CRT0_INIT_FPU == TRUE + .fpu fpv4-sp-d16 +#else + .fpu softvfp +#endif + + .thumb + .text + +/* + * Reset handler. + */ + .align 2 + .thumb_func + .global Reset_Handler +Reset_Handler: + /* Interrupts are globally masked initially.*/ + cpsid i + + /* PSP stack pointers initialization.*/ + ldr r0, =__process_stack_end__ + msr PSP, r0 + +#if CRT0_INIT_FPU == TRUE + /* FPU FPCCR initialization.*/ + movw r0, #CRT0_FPCCR_INIT & 0xFFFF + movt r0, #CRT0_FPCCR_INIT >> 16 + movw r1, #SCB_FPCCR & 0xFFFF + movt r1, #SCB_FPCCR >> 16 + str r0, [r1] + dsb + isb + + /* CPACR initialization.*/ + movw r0, #CRT0_CPACR_INIT & 0xFFFF + movt r0, #CRT0_CPACR_INIT >> 16 + movw r1, #SCB_CPACR & 0xFFFF + movt r1, #SCB_CPACR >> 16 + str r0, [r1] + dsb + isb + + /* FPU FPSCR initially cleared.*/ + mov r0, #0 + vmsr FPSCR, r0 + + /* FPU FPDSCR initially cleared.*/ + movw r1, #SCB_FPDSCR & 0xFFFF + movt r1, #SCB_FPDSCR >> 16 + str r0, [r1] + + /* Enforcing FPCA bit in the CONTROL register.*/ + movs r0, #CRT0_CONTROL_INIT | CONTROL_FPCA + +#else + movs r0, #CRT0_CONTROL_INIT +#endif + + /* CONTROL register initialization as configured.*/ + msr CONTROL, r0 + isb + +#if CRT0_INIT_CORE == TRUE + /* Core initialization.*/ + bl __core_init +#endif + + /* Early initialization.*/ + bl __early_init + +#if CRT0_INIT_STACKS == TRUE + ldr r0, =CRT0_STACKS_FILL_PATTERN + /* Main Stack initialization. Note, it assumes that the + stack size is a multiple of 4 so the linker file must + ensure this.*/ + ldr r1, =__main_stack_base__ + ldr r2, =__main_stack_end__ +msloop: + cmp r1, r2 + itt lo + strlo r0, [r1], #4 + blo msloop + + /* Process Stack initialization. Note, it assumes that the + stack size is a multiple of 4 so the linker file must + ensure this.*/ + ldr r1, =__process_stack_base__ + ldr r2, =__process_stack_end__ +psloop: + cmp r1, r2 + itt lo + strlo r0, [r1], #4 + blo psloop +#endif + +#if CRT0_INIT_DATA == TRUE + /* Data initialization. Note, it assumes that the DATA size + is a multiple of 4 so the linker file must ensure this.*/ + ldr r1, =_textdata_start + ldr r2, =_data_start + ldr r3, =_data_end +dloop: + cmp r2, r3 + ittt lo + ldrlo r0, [r1], #4 + strlo r0, [r2], #4 + blo dloop +#endif + +#if CRT0_INIT_BSS == TRUE + /* BSS initialization. Note, it assumes that the DATA size + is a multiple of 4 so the linker file must ensure this.*/ + movs r0, #0 + ldr r1, =_bss_start + ldr r2, =_bss_end +bloop: + cmp r1, r2 + itt lo + strlo r0, [r1], #4 + blo bloop +#endif + +#if CRT0_INIT_RAM_AREAS == TRUE + /* RAM areas initialization.*/ + bl __init_ram_areas +#endif + + /* Late initialization..*/ + bl __late_init + +#if CRT0_CALL_CONSTRUCTORS == TRUE + /* Constructors invocation.*/ + ldr r4, =__init_array_start + ldr r5, =__init_array_end +initloop: + cmp r4, r5 + bge endinitloop + ldr r1, [r4], #4 + blx r1 + b initloop +endinitloop: +#endif + + /* Main program invocation, r0 contains the returned value.*/ + bl main + +#if CRT0_CALL_DESTRUCTORS == TRUE + /* Destructors invocation.*/ + ldr r4, =__fini_array_start + ldr r5, =__fini_array_end +finiloop: + cmp r4, r5 + bge endfiniloop + ldr r1, [r4], #4 + blx r1 + b finiloop +endfiniloop: +#endif + + /* Branching to the defined exit handler.*/ + b __default_exit + +#endif /* !defined(__DOXYGEN__) */ + +/** @} */ diff --git a/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.s b/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.s deleted file mode 100644 index 5f9668efb..000000000 --- a/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.s +++ /dev/null @@ -1,319 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file crt0_v7m.s - * @brief Generic ARMv7-M (Cortex-M3/M4/M7) startup file for ChibiOS. - * - * @addtogroup ARMCMx_GCC_STARTUP_V7M - * @{ - */ - -/*===========================================================================*/ -/* Module constants. */ -/*===========================================================================*/ - -#if !defined(FALSE) || defined(__DOXYGEN__) -#define FALSE 0 -#endif - -#if !defined(TRUE) || defined(__DOXYGEN__) -#define TRUE 1 -#endif - -#define CONTROL_MODE_PRIVILEGED 0 -#define CONTROL_MODE_UNPRIVILEGED 1 -#define CONTROL_USE_MSP 0 -#define CONTROL_USE_PSP 2 -#define CONTROL_FPCA 4 - -#define FPCCR_ASPEN (1 << 31) -#define FPCCR_LSPEN (1 << 30) - -#define SCB_CPACR 0xE000ED88 -#define SCB_FPCCR 0xE000EF34 -#define SCB_FPDSCR 0xE000EF3C - -/*===========================================================================*/ -/* Module pre-compile time settings. */ -/*===========================================================================*/ - -/** - * @brief FPU initialization switch. - */ -#if !defined(CRT0_INIT_FPU) || defined(__DOXYGEN__) -#if defined(CORTEX_USE_FPU) || defined(__DOXYGEN__) -#define CRT0_INIT_FPU CORTEX_USE_FPU -#else -#define CRT0_INIT_FPU FALSE -#endif -#endif - -/** - * @brief Control special register initialization value. - * @details The system is setup to run in privileged mode using the PSP - * stack (dual stack mode). - */ -#if !defined(CRT0_CONTROL_INIT) || defined(__DOXYGEN__) -#define CRT0_CONTROL_INIT (CONTROL_USE_PSP | \ - CONTROL_MODE_PRIVILEGED) -#endif - -/** - * @brief Core initialization switch. - */ -#if !defined(CRT0_INIT_CORE) || defined(__DOXYGEN__) -#define CRT0_INIT_CORE TRUE -#endif - -/** - * @brief Stack segments initialization switch. - */ -#if !defined(CRT0_STACKS_FILL_PATTERN) || defined(__DOXYGEN__) -#define CRT0_STACKS_FILL_PATTERN 0x55555555 -#endif - -/** - * @brief Stack segments initialization switch. - */ -#if !defined(CRT0_INIT_STACKS) || defined(__DOXYGEN__) -#define CRT0_INIT_STACKS TRUE -#endif - -/** - * @brief DATA segment initialization switch. - */ -#if !defined(CRT0_INIT_DATA) || defined(__DOXYGEN__) -#define CRT0_INIT_DATA TRUE -#endif - -/** - * @brief BSS segment initialization switch. - */ -#if !defined(CRT0_INIT_BSS) || defined(__DOXYGEN__) -#define CRT0_INIT_BSS TRUE -#endif - -/** - * @brief RAM areas initialization switch. - */ -#if !defined(CRT0_INIT_RAM_AREAS) || defined(__DOXYGEN__) -#define CRT0_INIT_RAM_AREAS TRUE -#endif - -/** - * @brief Constructors invocation switch. - */ -#if !defined(CRT0_CALL_CONSTRUCTORS) || defined(__DOXYGEN__) -#define CRT0_CALL_CONSTRUCTORS TRUE -#endif - -/** - * @brief Destructors invocation switch. - */ -#if !defined(CRT0_CALL_DESTRUCTORS) || defined(__DOXYGEN__) -#define CRT0_CALL_DESTRUCTORS TRUE -#endif - -/** - * @brief FPU FPCCR register initialization value. - * @note Only used if @p CRT0_INIT_FPU is equal to @p TRUE. - */ -#if !defined(CRT0_FPCCR_INIT) || defined(__DOXYGEN__) -#define CRT0_FPCCR_INIT (FPCCR_ASPEN | FPCCR_LSPEN) -#endif - -/** - * @brief CPACR register initialization value. - * @note Only used if @p CRT0_INIT_FPU is equal to @p TRUE. - */ -#if !defined(CRT0_CPACR_INIT) || defined(__DOXYGEN__) -#define CRT0_CPACR_INIT 0x00F00000 -#endif - -/*===========================================================================*/ -/* Code section. */ -/*===========================================================================*/ - -#if !defined(__DOXYGEN__) - - .syntax unified - .cpu cortex-m3 -#if CRT0_INIT_FPU == TRUE - .fpu fpv4-sp-d16 -#else - .fpu softvfp -#endif - - .thumb - .text - -/* - * Reset handler. - */ - .align 2 - .thumb_func - .global Reset_Handler -Reset_Handler: - /* Interrupts are globally masked initially.*/ - cpsid i - - /* PSP stack pointers initialization.*/ - ldr r0, =__process_stack_end__ - msr PSP, r0 - -#if CRT0_INIT_FPU == TRUE - /* FPU FPCCR initialization.*/ - movw r0, #CRT0_FPCCR_INIT & 0xFFFF - movt r0, #CRT0_FPCCR_INIT >> 16 - movw r1, #SCB_FPCCR & 0xFFFF - movt r1, #SCB_FPCCR >> 16 - str r0, [r1] - dsb - isb - - /* CPACR initialization.*/ - movw r0, #CRT0_CPACR_INIT & 0xFFFF - movt r0, #CRT0_CPACR_INIT >> 16 - movw r1, #SCB_CPACR & 0xFFFF - movt r1, #SCB_CPACR >> 16 - str r0, [r1] - dsb - isb - - /* FPU FPSCR initially cleared.*/ - mov r0, #0 - vmsr FPSCR, r0 - - /* FPU FPDSCR initially cleared.*/ - movw r1, #SCB_FPDSCR & 0xFFFF - movt r1, #SCB_FPDSCR >> 16 - str r0, [r1] - - /* Enforcing FPCA bit in the CONTROL register.*/ - movs r0, #CRT0_CONTROL_INIT | CONTROL_FPCA - -#else - movs r0, #CRT0_CONTROL_INIT -#endif - - /* CONTROL register initialization as configured.*/ - msr CONTROL, r0 - isb - -#if CRT0_INIT_CORE == TRUE - /* Core initialization.*/ - bl __core_init -#endif - - /* Early initialization.*/ - bl __early_init - -#if CRT0_INIT_STACKS == TRUE - ldr r0, =CRT0_STACKS_FILL_PATTERN - /* Main Stack initialization. Note, it assumes that the - stack size is a multiple of 4 so the linker file must - ensure this.*/ - ldr r1, =__main_stack_base__ - ldr r2, =__main_stack_end__ -msloop: - cmp r1, r2 - itt lo - strlo r0, [r1], #4 - blo msloop - - /* Process Stack initialization. Note, it assumes that the - stack size is a multiple of 4 so the linker file must - ensure this.*/ - ldr r1, =__process_stack_base__ - ldr r2, =__process_stack_end__ -psloop: - cmp r1, r2 - itt lo - strlo r0, [r1], #4 - blo psloop -#endif - -#if CRT0_INIT_DATA == TRUE - /* Data initialization. Note, it assumes that the DATA size - is a multiple of 4 so the linker file must ensure this.*/ - ldr r1, =_textdata_start - ldr r2, =_data_start - ldr r3, =_data_end -dloop: - cmp r2, r3 - ittt lo - ldrlo r0, [r1], #4 - strlo r0, [r2], #4 - blo dloop -#endif - -#if CRT0_INIT_BSS == TRUE - /* BSS initialization. Note, it assumes that the DATA size - is a multiple of 4 so the linker file must ensure this.*/ - movs r0, #0 - ldr r1, =_bss_start - ldr r2, =_bss_end -bloop: - cmp r1, r2 - itt lo - strlo r0, [r1], #4 - blo bloop -#endif - -#if CRT0_INIT_RAM_AREAS == TRUE - /* RAM areas initialization.*/ - bl __init_ram_areas -#endif - - /* Late initialization..*/ - bl __late_init - -#if CRT0_CALL_CONSTRUCTORS == TRUE - /* Constructors invocation.*/ - ldr r4, =__init_array_start - ldr r5, =__init_array_end -initloop: - cmp r4, r5 - bge endinitloop - ldr r1, [r4], #4 - blx r1 - b initloop -endinitloop: -#endif - - /* Main program invocation, r0 contains the returned value.*/ - bl main - -#if CRT0_CALL_DESTRUCTORS == TRUE - /* Destructors invocation.*/ - ldr r4, =__fini_array_start - ldr r5, =__fini_array_end -finiloop: - cmp r4, r5 - bge endfiniloop - ldr r1, [r4], #4 - blx r1 - b finiloop -endfiniloop: -#endif - - /* Branching to the defined exit handler.*/ - b __default_exit - -#endif /* !defined(__DOXYGEN__) */ - -/** @} */ diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f0xx.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f0xx.mk index 466a58606..32aa674ef 100644 --- a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f0xx.mk +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f0xx.mk @@ -2,7 +2,7 @@ STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \ $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c -STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.s +STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.S STARTUPINC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ $(CHIBIOS)/os/common/startup/ARMCMx/devices/STM32F0xx \ diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f1xx.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f1xx.mk index f6c169973..7a0253a72 100644 --- a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f1xx.mk +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f1xx.mk @@ -2,7 +2,7 @@ STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \ $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c -STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.s +STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S STARTUPINC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ $(CHIBIOS)/os/common/startup/ARMCMx/devices/STM32F1xx \ diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f2xx.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f2xx.mk index 8dc97e3ec..d3e21d853 100644 --- a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f2xx.mk +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f2xx.mk @@ -2,7 +2,7 @@ STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \ $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c -STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.s +STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S STARTUPINC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ $(CHIBIOS)/os/common/startup/ARMCMx/devices/STM32F2xx \ diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk index bd16abfe5..78d714439 100644 --- a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk @@ -2,7 +2,7 @@ STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \ $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c -STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.s +STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S STARTUPINC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ $(CHIBIOS)/os/common/startup/ARMCMx/devices/STM32F3xx \ diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk index 3083b1372..0e39d2820 100644 --- a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk @@ -2,7 +2,7 @@ STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \ $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c -STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.s +STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S STARTUPINC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ $(CHIBIOS)/os/common/startup/ARMCMx/devices/STM32F4xx \ diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f7xx.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f7xx.mk index ed18f97ee..46e8f4735 100644 --- a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f7xx.mk +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f7xx.mk @@ -2,7 +2,7 @@ STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \ $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c -STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.s +STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S STARTUPINC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ $(CHIBIOS)/os/common/startup/ARMCMx/devices/STM32F7xx \ diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l0xx.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l0xx.mk index 3726c1711..d4937cd26 100644 --- a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l0xx.mk +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l0xx.mk @@ -2,7 +2,7 @@ STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \ $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c -STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.s +STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.S STARTUPINC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ $(CHIBIOS)/os/common/startup/ARMCMx/devices/STM32L0xx \ diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l1xx.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l1xx.mk index 63fadc95d..fb7e879b6 100644 --- a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l1xx.mk +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l1xx.mk @@ -2,7 +2,7 @@ STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \ $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c -STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.s +STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S STARTUPINC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ $(CHIBIOS)/os/common/startup/ARMCMx/devices/STM32L1xx \ diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l4xx.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l4xx.mk index 3c062b821..fbfc92a9a 100644 --- a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l4xx.mk +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l4xx.mk @@ -2,7 +2,7 @@ STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \ $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c -STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.s +STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S STARTUPINC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ $(CHIBIOS)/os/common/startup/ARMCMx/devices/STM32L4xx \ diff --git a/os/common/startup/e200/compilers/GCC/crt0.S b/os/common/startup/e200/compilers/GCC/crt0.S new file mode 100644 index 000000000..007b55d3b --- /dev/null +++ b/os/common/startup/e200/compilers/GCC/crt0.S @@ -0,0 +1,242 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file GCC/crt0.s + * @brief Generic PowerPC startup file for GCC. + * + * @addtogroup PPC_GCC_CORE + * @{ + */ + +/*===========================================================================*/ +/* Module constants. */ +/*===========================================================================*/ + +#if !defined(FALSE) || defined(__DOXYGEN__) +#define FALSE 0 +#endif + +#if !defined(TRUE) || defined(__DOXYGEN__) +#define TRUE 1 +#endif + +/*===========================================================================*/ +/* Module pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @brief Stack segments initialization switch. + */ +#if !defined(CRT0_STACKS_FILL_PATTERN) || defined(__DOXYGEN__) +#define CRT0_STACKS_FILL_PATTERN 0x55555555 +#endif + +/** + * @brief Stack segments initialization switch. + */ +#if !defined(CRT0_INIT_STACKS) || defined(__DOXYGEN__) +#define CRT0_INIT_STACKS TRUE +#endif + +/** + * @brief DATA segment initialization switch. + */ +#if !defined(CRT0_INIT_DATA) || defined(__DOXYGEN__) +#define CRT0_INIT_DATA TRUE +#endif + +/** + * @brief BSS segment initialization switch. + */ +#if !defined(CRT0_INIT_BSS) || defined(__DOXYGEN__) +#define CRT0_INIT_BSS TRUE +#endif + +/** + * @brief Constructors invocation switch. + */ +#if !defined(CRT0_CALL_CONSTRUCTORS) || defined(__DOXYGEN__) +#define CRT0_CALL_CONSTRUCTORS TRUE +#endif + +/** + * @brief Destructors invocation switch. + */ +#if !defined(CRT0_CALL_DESTRUCTORS) || defined(__DOXYGEN__) +#define CRT0_CALL_DESTRUCTORS TRUE +#endif + +/*===========================================================================*/ +/* Code section. */ +/*===========================================================================*/ + +#if !defined(__DOXYGEN__) + + .section .crt0, "ax" + .align 2 + .globl _boot_address + .type _boot_address, @function +_boot_address: + /* Stack setup.*/ + lis %r1, __process_stack_end__@h + ori %r1, %r1, __process_stack_end__@l + li %r0, 0 + stwu %r0, -8(%r1) + + /* Small sections registers initialization.*/ + lis %r2, __sdata2_start__@h + ori %r2, %r2, __sdata2_start__@l + lis %r13, __sdata_start__@h + ori %r13, %r13, __sdata_start__@l + + /* Early initialization.*/ + bl __early_init + +#if CRT0_INIT_STACKS == TRUE + /* Stacks fill pattern.*/ + lis %r7, CRT0_STACKS_FILL_PATTERN@h + ori %r7, %r7, CRT0_STACKS_FILL_PATTERN@l + + /* IRQ Stack initialization. Note, the architecture does not use this + stack, the size is usually zero. An OS can have special SW handling + and require this. A 4 bytes alignment is assmend and required.*/ + lis %r4, __irq_stack_base__@h + ori %r4, %r4, __irq_stack_base__@l + lis %r5, __irq_stack_end__@h + ori %r5, %r5, __irq_stack_end__@l +.irqsloop: + cmpl cr0, %r4, %r5 + bge cr0, .irqsend + stw %r7, 0(%r4) + addi %r4, %r4, 4 + b .irqsloop +.irqsend: + + /* Process Stack initialization. Note, does not overwrite the already + written EABI frame. A 4 bytes alignment is assmend and required.*/ + lis %r4, __process_stack_base__@h + ori %r4, %r4, __process_stack_base__@l + lis %r5, (__process_stack_end__ - 8)@h + ori %r5, %r5, (__process_stack_end__ - 8)@l +.prcsloop: + cmpl cr0, %r4, %r5 + bge cr0, .prcsend + stw %r7, 0(%r4) + addi %r4, %r4, 4 + b .prcsloop +.prcsend: +#endif + +#if CRT0_INIT_BSS == TRUE + /* BSS clearing.*/ + lis %r4, __bss_start__@h + ori %r4, %r4, __bss_start__@l + lis %r5, __bss_end__@h + ori %r5, %r5, __bss_end__@l + li %r7, 0 +.bssloop: + cmpl cr0, %r4, %r5 + bge cr0, .bssend + stw %r7, 0(%r4) + addi %r4, %r4, 4 + b .bssloop +.bssend: +#endif + +#if CRT0_INIT_DATA == TRUE + /* DATA initialization.*/ + lis %r4, __romdata_start__@h + ori %r4, %r4, __romdata_start__@l + lis %r5, __data_start__@h + ori %r5, %r5, __data_start__@l + lis %r6, __data_end__@h + ori %r6, %r6, __data_end__@l +.dataloop: + cmpl cr0, %r5, %r6 + bge cr0, .dataend + lwz %r7, 0(%r4) + addi %r4, %r4, 4 + stw %r7, 0(%r5) + addi %r5, %r5, 4 + b .dataloop +.dataend: +#endif + + /* Late initialization.*/ + bl __late_init + +#if CRT0_CALL_CONSTRUCTORS == TRUE + /* Constructors invocation.*/ + lis %r4, __init_array_start@h + ori %r4, %r4, __init_array_start@l + lis %r5, __init_array_end@h + ori %r5, %r5, __init_array_end@l +.iniloop: + cmplw %cr0, %r4, %r5 + bge %cr0, .iniend + lwz %r6, 0(%r4) + mtctr %r6 + addi %r4, %r4, 4 + bctrl + b .iniloop +.iniend: +#endif + + /* Main program invocation.*/ + bl main + +#if CRT0_CALL_DESTRUCTORS == TRUE + /* Destructors invocation.*/ + lis %r4, __fini_array_start@h + ori %r4, %r4, __fini_array_start@l + lis %r5, __fini_array_end@h + ori %r5, %r5, __fini_array_end@l +.finiloop: + cmplw %cr0, %r4, %r5 + bge %cr0, .finiend + lwz %r6, 0(%r4) + mtctr %r6 + addi %r4, %r4, 4 + bctrl + b .finiloop +.finiend: +#endif + + /* Branching to the defined exit handler.*/ + b __default_exit + + /* Default main exit code, infinite loop.*/ + .weak __default_exit + .type __default_exit, @function +__default_exit: + b __default_exit + + /* Default early initialization code, none.*/ + .weak __early_init + .type __early_init, @function +__early_init: + blr + + /* Default late initialization code, none.*/ + .weak __late_init + .type __late_init, @function +__late_init: + blr + +#endif /* !defined(__DOXYGEN__) */ + +/** @} */ diff --git a/os/common/startup/e200/compilers/GCC/crt0.s b/os/common/startup/e200/compilers/GCC/crt0.s deleted file mode 100644 index 007b55d3b..000000000 --- a/os/common/startup/e200/compilers/GCC/crt0.s +++ /dev/null @@ -1,242 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file GCC/crt0.s - * @brief Generic PowerPC startup file for GCC. - * - * @addtogroup PPC_GCC_CORE - * @{ - */ - -/*===========================================================================*/ -/* Module constants. */ -/*===========================================================================*/ - -#if !defined(FALSE) || defined(__DOXYGEN__) -#define FALSE 0 -#endif - -#if !defined(TRUE) || defined(__DOXYGEN__) -#define TRUE 1 -#endif - -/*===========================================================================*/ -/* Module pre-compile time settings. */ -/*===========================================================================*/ - -/** - * @brief Stack segments initialization switch. - */ -#if !defined(CRT0_STACKS_FILL_PATTERN) || defined(__DOXYGEN__) -#define CRT0_STACKS_FILL_PATTERN 0x55555555 -#endif - -/** - * @brief Stack segments initialization switch. - */ -#if !defined(CRT0_INIT_STACKS) || defined(__DOXYGEN__) -#define CRT0_INIT_STACKS TRUE -#endif - -/** - * @brief DATA segment initialization switch. - */ -#if !defined(CRT0_INIT_DATA) || defined(__DOXYGEN__) -#define CRT0_INIT_DATA TRUE -#endif - -/** - * @brief BSS segment initialization switch. - */ -#if !defined(CRT0_INIT_BSS) || defined(__DOXYGEN__) -#define CRT0_INIT_BSS TRUE -#endif - -/** - * @brief Constructors invocation switch. - */ -#if !defined(CRT0_CALL_CONSTRUCTORS) || defined(__DOXYGEN__) -#define CRT0_CALL_CONSTRUCTORS TRUE -#endif - -/** - * @brief Destructors invocation switch. - */ -#if !defined(CRT0_CALL_DESTRUCTORS) || defined(__DOXYGEN__) -#define CRT0_CALL_DESTRUCTORS TRUE -#endif - -/*===========================================================================*/ -/* Code section. */ -/*===========================================================================*/ - -#if !defined(__DOXYGEN__) - - .section .crt0, "ax" - .align 2 - .globl _boot_address - .type _boot_address, @function -_boot_address: - /* Stack setup.*/ - lis %r1, __process_stack_end__@h - ori %r1, %r1, __process_stack_end__@l - li %r0, 0 - stwu %r0, -8(%r1) - - /* Small sections registers initialization.*/ - lis %r2, __sdata2_start__@h - ori %r2, %r2, __sdata2_start__@l - lis %r13, __sdata_start__@h - ori %r13, %r13, __sdata_start__@l - - /* Early initialization.*/ - bl __early_init - -#if CRT0_INIT_STACKS == TRUE - /* Stacks fill pattern.*/ - lis %r7, CRT0_STACKS_FILL_PATTERN@h - ori %r7, %r7, CRT0_STACKS_FILL_PATTERN@l - - /* IRQ Stack initialization. Note, the architecture does not use this - stack, the size is usually zero. An OS can have special SW handling - and require this. A 4 bytes alignment is assmend and required.*/ - lis %r4, __irq_stack_base__@h - ori %r4, %r4, __irq_stack_base__@l - lis %r5, __irq_stack_end__@h - ori %r5, %r5, __irq_stack_end__@l -.irqsloop: - cmpl cr0, %r4, %r5 - bge cr0, .irqsend - stw %r7, 0(%r4) - addi %r4, %r4, 4 - b .irqsloop -.irqsend: - - /* Process Stack initialization. Note, does not overwrite the already - written EABI frame. A 4 bytes alignment is assmend and required.*/ - lis %r4, __process_stack_base__@h - ori %r4, %r4, __process_stack_base__@l - lis %r5, (__process_stack_end__ - 8)@h - ori %r5, %r5, (__process_stack_end__ - 8)@l -.prcsloop: - cmpl cr0, %r4, %r5 - bge cr0, .prcsend - stw %r7, 0(%r4) - addi %r4, %r4, 4 - b .prcsloop -.prcsend: -#endif - -#if CRT0_INIT_BSS == TRUE - /* BSS clearing.*/ - lis %r4, __bss_start__@h - ori %r4, %r4, __bss_start__@l - lis %r5, __bss_end__@h - ori %r5, %r5, __bss_end__@l - li %r7, 0 -.bssloop: - cmpl cr0, %r4, %r5 - bge cr0, .bssend - stw %r7, 0(%r4) - addi %r4, %r4, 4 - b .bssloop -.bssend: -#endif - -#if CRT0_INIT_DATA == TRUE - /* DATA initialization.*/ - lis %r4, __romdata_start__@h - ori %r4, %r4, __romdata_start__@l - lis %r5, __data_start__@h - ori %r5, %r5, __data_start__@l - lis %r6, __data_end__@h - ori %r6, %r6, __data_end__@l -.dataloop: - cmpl cr0, %r5, %r6 - bge cr0, .dataend - lwz %r7, 0(%r4) - addi %r4, %r4, 4 - stw %r7, 0(%r5) - addi %r5, %r5, 4 - b .dataloop -.dataend: -#endif - - /* Late initialization.*/ - bl __late_init - -#if CRT0_CALL_CONSTRUCTORS == TRUE - /* Constructors invocation.*/ - lis %r4, __init_array_start@h - ori %r4, %r4, __init_array_start@l - lis %r5, __init_array_end@h - ori %r5, %r5, __init_array_end@l -.iniloop: - cmplw %cr0, %r4, %r5 - bge %cr0, .iniend - lwz %r6, 0(%r4) - mtctr %r6 - addi %r4, %r4, 4 - bctrl - b .iniloop -.iniend: -#endif - - /* Main program invocation.*/ - bl main - -#if CRT0_CALL_DESTRUCTORS == TRUE - /* Destructors invocation.*/ - lis %r4, __fini_array_start@h - ori %r4, %r4, __fini_array_start@l - lis %r5, __fini_array_end@h - ori %r5, %r5, __fini_array_end@l -.finiloop: - cmplw %cr0, %r4, %r5 - bge %cr0, .finiend - lwz %r6, 0(%r4) - mtctr %r6 - addi %r4, %r4, 4 - bctrl - b .finiloop -.finiend: -#endif - - /* Branching to the defined exit handler.*/ - b __default_exit - - /* Default main exit code, infinite loop.*/ - .weak __default_exit - .type __default_exit, @function -__default_exit: - b __default_exit - - /* Default early initialization code, none.*/ - .weak __early_init - .type __early_init, @function -__early_init: - blr - - /* Default late initialization code, none.*/ - .weak __late_init - .type __late_init, @function -__late_init: - blr - -#endif /* !defined(__DOXYGEN__) */ - -/** @} */ diff --git a/os/common/startup/e200/compilers/GCC/mk/startup_spc560bcxx.mk b/os/common/startup/e200/compilers/GCC/mk/startup_spc560bcxx.mk index 6ca606b50..260625db1 100644 --- a/os/common/startup/e200/compilers/GCC/mk/startup_spc560bcxx.mk +++ b/os/common/startup/e200/compilers/GCC/mk/startup_spc560bcxx.mk @@ -1,9 +1,9 @@ # List of the ChibiOS e200z0 SPC560BCxx startup files. STARTUPSRC = -STARTUPASM = $(CHIBIOS)/os/common/startup/e200/devices/SPC560BCxx/boot.s \ - $(CHIBIOS)/os/common/startup/e200/compilers/GCC/vectors.s \ - $(CHIBIOS)/os/common/startup/e200/compilers/GCC/crt0.s +STARTUPASM = $(CHIBIOS)/os/common/startup/e200/devices/SPC560BCxx/boot.S \ + $(CHIBIOS)/os/common/startup/e200/compilers/GCC/vectors.S \ + $(CHIBIOS)/os/common/startup/e200/compilers/GCC/crt0.S STARTUPINC = ${CHIBIOS}/os/common/startup/e200/compilers/GCC \ ${CHIBIOS}/os/common/startup/e200/devices/SPC560BCxx diff --git a/os/common/startup/e200/compilers/GCC/mk/startup_spc560bxx.mk b/os/common/startup/e200/compilers/GCC/mk/startup_spc560bxx.mk index 56a4a9813..5cda5f242 100644 --- a/os/common/startup/e200/compilers/GCC/mk/startup_spc560bxx.mk +++ b/os/common/startup/e200/compilers/GCC/mk/startup_spc560bxx.mk @@ -1,9 +1,9 @@ # List of the ChibiOS e200z0 SPC560Bxx startup files. STARTUPSRC = -STARTUPASM = $(CHIBIOS)/os/common/startup/e200/devices/SPC560Bxx/boot.s \ - $(CHIBIOS)/os/common/startup/e200/compilers/GCC/vectors.s \ - $(CHIBIOS)/os/common/startup/e200/compilers/GCC/crt0.s +STARTUPASM = $(CHIBIOS)/os/common/startup/e200/devices/SPC560Bxx/boot.S \ + $(CHIBIOS)/os/common/startup/e200/compilers/GCC/vectors.S \ + $(CHIBIOS)/os/common/startup/e200/compilers/GCC/crt0.S STARTUPINC = ${CHIBIOS}/os/common/startup/e200/compilers/GCC \ ${CHIBIOS}/os/common/startup/e200/devices/SPC560Bxx diff --git a/os/common/startup/e200/compilers/GCC/mk/startup_spc560dxx.mk b/os/common/startup/e200/compilers/GCC/mk/startup_spc560dxx.mk index 0c5574013..04fd2adf1 100644 --- a/os/common/startup/e200/compilers/GCC/mk/startup_spc560dxx.mk +++ b/os/common/startup/e200/compilers/GCC/mk/startup_spc560dxx.mk @@ -1,9 +1,9 @@ # List of the ChibiOS e200z0 SPC560Dxx startup files. STARTUPSRC = -STARTUPASM = $(CHIBIOS)/os/common/startup/e200/devices/SPC560Dxx/boot.s \ - $(CHIBIOS)/os/common/startup/e200/compilers/GCC/vectors.s \ - $(CHIBIOS)/os/common/startup/e200/compilers/GCC/crt0.s +STARTUPASM = $(CHIBIOS)/os/common/startup/e200/devices/SPC560Dxx/boot.S \ + $(CHIBIOS)/os/common/startup/e200/compilers/GCC/vectors.S \ + $(CHIBIOS)/os/common/startup/e200/compilers/GCC/crt0.S STARTUPINC = ${CHIBIOS}/os/common/startup/e200/compilers/GCC \ ${CHIBIOS}/os/common/startup/e200/devices/SPC560Dxx diff --git a/os/common/startup/e200/compilers/GCC/mk/startup_spc560pxx.mk b/os/common/startup/e200/compilers/GCC/mk/startup_spc560pxx.mk index fee580672..17e958dd0 100644 --- a/os/common/startup/e200/compilers/GCC/mk/startup_spc560pxx.mk +++ b/os/common/startup/e200/compilers/GCC/mk/startup_spc560pxx.mk @@ -1,9 +1,9 @@ # List of the ChibiOS e200z0 SPC560Pxx startup files. STARTUPSRC = -STARTUPASM = $(CHIBIOS)/os/common/startup/e200/devices/SPC560Pxx/boot.s \ - $(CHIBIOS)/os/common/startup/e200/compilers/GCC/vectors.s \ - $(CHIBIOS)/os/common/startup/e200/compilers/GCC/crt0.s +STARTUPASM = $(CHIBIOS)/os/common/startup/e200/devices/SPC560Pxx/boot.S \ + $(CHIBIOS)/os/common/startup/e200/compilers/GCC/vectors.S \ + $(CHIBIOS)/os/common/startup/e200/compilers/GCC/crt0.S STARTUPINC = ${CHIBIOS}/os/common/startup/e200/compilers/GCC \ ${CHIBIOS}/os/common/startup/e200/devices/SPC560Pxx diff --git a/os/common/startup/e200/compilers/GCC/mk/startup_spc563mxx.mk b/os/common/startup/e200/compilers/GCC/mk/startup_spc563mxx.mk index 61f786043..436ba43a6 100644 --- a/os/common/startup/e200/compilers/GCC/mk/startup_spc563mxx.mk +++ b/os/common/startup/e200/compilers/GCC/mk/startup_spc563mxx.mk @@ -1,9 +1,9 @@ # List of the ChibiOS e200z3 SPC563Mxx startup files. STARTUPSRC = -STARTUPASM = $(CHIBIOS)/os/common/startup/e200/devices/SPC563Mxx/boot.s \ - $(CHIBIOS)/os/common/startup/e200/compilers/GCC/vectors.s \ - $(CHIBIOS)/os/common/startup/e200/compilers/GCC/crt0.s +STARTUPASM = $(CHIBIOS)/os/common/startup/e200/devices/SPC563Mxx/boot.S \ + $(CHIBIOS)/os/common/startup/e200/compilers/GCC/vectors.S \ + $(CHIBIOS)/os/common/startup/e200/compilers/GCC/crt0.S STARTUPINC = ${CHIBIOS}/os/common/startup/e200/compilers/GCC \ ${CHIBIOS}/os/common/startup/e200/devices/SPC563Mxx diff --git a/os/common/startup/e200/compilers/GCC/mk/startup_spc564axx.mk b/os/common/startup/e200/compilers/GCC/mk/startup_spc564axx.mk index 976ae6dd1..af46dd0fa 100644 --- a/os/common/startup/e200/compilers/GCC/mk/startup_spc564axx.mk +++ b/os/common/startup/e200/compilers/GCC/mk/startup_spc564axx.mk @@ -1,9 +1,9 @@ # List of the ChibiOS e200z4 SPC564Axx startup files. STARTUPSRC = -STARTUPASM = $(CHIBIOS)/os/common/startup/e200/devices/SPC564Axx/boot.s \ - $(CHIBIOS)/os/common/startup/e200/compilers/GCC/vectors.s \ - $(CHIBIOS)/os/common/startup/e200/compilers/GCC/crt0.s +STARTUPASM = $(CHIBIOS)/os/common/startup/e200/devices/SPC564Axx/boot.S \ + $(CHIBIOS)/os/common/startup/e200/compilers/GCC/vectors.S \ + $(CHIBIOS)/os/common/startup/e200/compilers/GCC/crt0.S STARTUPINC = ${CHIBIOS}/os/common/startup/e200/compilers/GCC \ ${CHIBIOS}/os/common/startup/e200/devices/SPC564Axx diff --git a/os/common/startup/e200/compilers/GCC/mk/startup_spc56ecxx.mk b/os/common/startup/e200/compilers/GCC/mk/startup_spc56ecxx.mk index e08bfd6de..369e601da 100644 --- a/os/common/startup/e200/compilers/GCC/mk/startup_spc56ecxx.mk +++ b/os/common/startup/e200/compilers/GCC/mk/startup_spc56ecxx.mk @@ -1,9 +1,9 @@ # List of the ChibiOS e200z4 SPC56ECxx startup files. STARTUPSRC = -STARTUPASM = $(CHIBIOS)/os/common/startup/e200/devices/SPC56ECxx/boot.s \ - $(CHIBIOS)/os/common/startup/e200/compilers/GCC/vectors.s \ - $(CHIBIOS)/os/common/startup/e200/compilers/GCC/crt0.s +STARTUPASM = $(CHIBIOS)/os/common/startup/e200/devices/SPC56ECxx/boot.S \ + $(CHIBIOS)/os/common/startup/e200/compilers/GCC/vectors.S \ + $(CHIBIOS)/os/common/startup/e200/compilers/GCC/crt0.S STARTUPINC = ${CHIBIOS}/os/common/startup/e200/compilers/GCC \ ${CHIBIOS}/os/common/startup/e200/devices/SPC56ECxx diff --git a/os/common/startup/e200/compilers/GCC/mk/startup_spc56elxx.mk b/os/common/startup/e200/compilers/GCC/mk/startup_spc56elxx.mk index 8eae8535a..5dfce2179 100644 --- a/os/common/startup/e200/compilers/GCC/mk/startup_spc56elxx.mk +++ b/os/common/startup/e200/compilers/GCC/mk/startup_spc56elxx.mk @@ -1,9 +1,9 @@ # List of the ChibiOS e200z4 SPC56ELxx startup files. STARTUPSRC = -STARTUPASM = $(CHIBIOS)/os/common/startup/e200/devices/SPC56ELxx/boot.s \ - $(CHIBIOS)/os/common/startup/e200/compilers/GCC/vectors.s \ - $(CHIBIOS)/os/common/startup/e200/compilers/GCC/crt0.s +STARTUPASM = $(CHIBIOS)/os/common/startup/e200/devices/SPC56ELxx/boot.S \ + $(CHIBIOS)/os/common/startup/e200/compilers/GCC/vectors.S \ + $(CHIBIOS)/os/common/startup/e200/compilers/GCC/crt0.S STARTUPINC = ${CHIBIOS}/os/common/startup/e200/compilers/GCC \ ${CHIBIOS}/os/common/startup/e200/devices/SPC56ELxx diff --git a/os/common/startup/e200/compilers/GCC/vectors.S b/os/common/startup/e200/compilers/GCC/vectors.S new file mode 100644 index 000000000..22e10b170 --- /dev/null +++ b/os/common/startup/e200/compilers/GCC/vectors.S @@ -0,0 +1,2612 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file vectors.s + * @brief SPC56x vectors table. + * + * @addtogroup PPC_GCC_CORE + * @{ + */ + +#define _FROM_ASM_ +#include "ppcparams.h" + +#if defined(VECTORS_RENAMING) +#include "isrs.h" +#endif + +#if !defined(__DOXYGEN__) + + /* Software vectors table. The vectors are accessed from the IVOR4 + handler only. In order to declare an interrupt handler just create + a function withe the same name of a vector, the symbol will + override the weak symbol declared here.*/ + .section .vectors, "ax" + .align 4 + .globl _vectors +_vectors: + .long vector0, vector1, vector2, vector3 +#if PPC_NUM_VECTORS > 4 + .long vector4, vector5, vector6, vector7 +#endif +#if PPC_NUM_VECTORS > 8 + .long vector8, vector9, vector10, vector11 +#endif +#if PPC_NUM_VECTORS > 12 + .long vector12, vector13, vector14, vector15 +#endif +#if PPC_NUM_VECTORS > 16 + .long vector16, vector17, vector18, vector19 +#endif +#if PPC_NUM_VECTORS > 20 + .long vector20, vector21, vector22, vector23 +#endif +#if PPC_NUM_VECTORS > 24 + .long vector24, vector25, vector26, vector27 +#endif +#if PPC_NUM_VECTORS > 28 + .long vector28, vector29, vector30, vector31 +#endif +#if PPC_NUM_VECTORS > 32 + .long vector32, vector33, vector34, vector35 +#endif +#if PPC_NUM_VECTORS > 36 + .long vector36, vector37, vector38, vector39 +#endif +#if PPC_NUM_VECTORS > 40 + .long vector40, vector41, vector42, vector43 +#endif +#if PPC_NUM_VECTORS > 44 + .long vector44, vector45, vector46, vector47 +#endif +#if PPC_NUM_VECTORS > 48 + .long vector48, vector49, vector50, vector51 +#endif +#if PPC_NUM_VECTORS > 52 + .long vector52, vector53, vector54, vector55 +#endif +#if PPC_NUM_VECTORS > 56 + .long vector56, vector57, vector58, vector59 +#endif +#if PPC_NUM_VECTORS > 60 + .long vector60, vector61, vector62, vector63 +#endif +#if PPC_NUM_VECTORS > 64 + .long vector64, vector65, vector66, vector67 +#endif +#if PPC_NUM_VECTORS > 68 + .long vector68, vector69, vector70, vector71 +#endif +#if PPC_NUM_VECTORS > 72 + .long vector72, vector73, vector74, vector75 +#endif +#if PPC_NUM_VECTORS > 76 + .long vector76, vector77, vector78, vector79 +#endif +#if PPC_NUM_VECTORS > 80 + .long vector80, vector81, vector82, vector83 +#endif +#if PPC_NUM_VECTORS > 84 + .long vector84, vector85, vector86, vector87 +#endif +#if PPC_NUM_VECTORS > 88 + .long vector88, vector89, vector90, vector91 +#endif +#if PPC_NUM_VECTORS > 92 + .long vector92, vector93, vector94, vector95 +#endif +#if PPC_NUM_VECTORS > 96 + .long vector96, vector97, vector98, vector99 +#endif +#if PPC_NUM_VECTORS > 100 + .long vector100, vector101, vector102, vector103 +#endif +#if PPC_NUM_VECTORS > 104 + .long vector104, vector105, vector106, vector107 +#endif +#if PPC_NUM_VECTORS > 108 + .long vector108, vector109, vector110, vector111 +#endif +#if PPC_NUM_VECTORS > 112 + .long vector112, vector113, vector114, vector115 +#endif +#if PPC_NUM_VECTORS > 116 + .long vector116, vector117, vector118, vector119 +#endif +#if PPC_NUM_VECTORS > 120 + .long vector120, vector121, vector122, vector123 +#endif +#if PPC_NUM_VECTORS > 124 + .long vector124, vector125, vector126, vector127 +#endif +#if PPC_NUM_VECTORS > 128 + .long vector128, vector129, vector130, vector131 +#endif +#if PPC_NUM_VECTORS > 132 + .long vector132, vector133, vector134, vector135 +#endif +#if PPC_NUM_VECTORS > 136 + .long vector136, vector137, vector138, vector139 +#endif +#if PPC_NUM_VECTORS > 140 + .long vector140, vector141, vector142, vector143 +#endif +#if PPC_NUM_VECTORS > 144 + .long vector144, vector145, vector146, vector147 +#endif +#if PPC_NUM_VECTORS > 148 + .long vector148, vector149, vector150, vector151 +#endif +#if PPC_NUM_VECTORS > 152 + .long vector152, vector153, vector154, vector155 +#endif +#if PPC_NUM_VECTORS > 156 + .long vector156, vector157, vector158, vector159 +#endif +#if PPC_NUM_VECTORS > 160 + .long vector160, vector161, vector162, vector163 +#endif +#if PPC_NUM_VECTORS > 164 + .long vector164, vector165, vector166, vector167 +#endif +#if PPC_NUM_VECTORS > 168 + .long vector168, vector169, vector170, vector171 +#endif +#if PPC_NUM_VECTORS > 172 + .long vector172, vector173, vector174, vector175 +#endif +#if PPC_NUM_VECTORS > 176 + .long vector176, vector177, vector178, vector179 +#endif +#if PPC_NUM_VECTORS > 180 + .long vector180, vector181, vector182, vector183 +#endif +#if PPC_NUM_VECTORS > 184 + .long vector184, vector185, vector186, vector187 +#endif +#if PPC_NUM_VECTORS > 188 + .long vector188, vector189, vector190, vector191 +#endif +#if PPC_NUM_VECTORS > 192 + .long vector192, vector193, vector194, vector195 +#endif +#if PPC_NUM_VECTORS > 196 + .long vector196, vector197, vector198, vector199 +#endif +#if PPC_NUM_VECTORS > 200 + .long vector200, vector201, vector202, vector203 +#endif +#if PPC_NUM_VECTORS > 204 + .long vector204, vector205, vector206, vector207 +#endif +#if PPC_NUM_VECTORS > 208 + .long vector208, vector209, vector210, vector211 +#endif +#if PPC_NUM_VECTORS > 212 + .long vector212, vector213, vector214, vector215 +#endif +#if PPC_NUM_VECTORS > 216 + .long vector216, vector217, vector218, vector219 +#endif +#if PPC_NUM_VECTORS > 220 + .long vector220, vector221, vector222, vector223 +#endif +#if PPC_NUM_VECTORS > 224 + .long vector224, vector225, vector226, vector227 +#endif +#if PPC_NUM_VECTORS > 228 + .long vector228, vector229, vector230, vector231 +#endif +#if PPC_NUM_VECTORS > 232 + .long vector232, vector233, vector234, vector235 +#endif +#if PPC_NUM_VECTORS > 236 + .long vector236, vector237, vector238, vector239 +#endif +#if PPC_NUM_VECTORS > 240 + .long vector240, vector241, vector242, vector243 +#endif +#if PPC_NUM_VECTORS > 244 + .long vector244, vector245, vector246, vector247 +#endif +#if PPC_NUM_VECTORS > 248 + .long vector248, vector249, vector250, vector251 +#endif +#if PPC_NUM_VECTORS > 252 + .long vector252, vector253, vector254, vector255 +#endif +#if PPC_NUM_VECTORS > 256 + .long vector256, vector257, vector258, vector259 +#endif +#if PPC_NUM_VECTORS > 260 + .long vector260, vector261, vector262, vector263 +#endif +#if PPC_NUM_VECTORS > 264 + .long vector264, vector265, vector266, vector267 +#endif +#if PPC_NUM_VECTORS > 268 + .long vector268, vector269, vector270, vector271 +#endif +#if PPC_NUM_VECTORS > 272 + .long vector272, vector273, vector274, vector275 +#endif +#if PPC_NUM_VECTORS > 276 + .long vector276, vector277, vector278, vector279 +#endif +#if PPC_NUM_VECTORS > 280 + .long vector280, vector281, vector282, vector283 +#endif +#if PPC_NUM_VECTORS > 284 + .long vector284, vector285, vector286, vector287 +#endif +#if PPC_NUM_VECTORS > 288 + .long vector288, vector289, vector290, vector291 +#endif +#if PPC_NUM_VECTORS > 292 + .long vector292, vector293, vector294, vector295 +#endif +#if PPC_NUM_VECTORS > 296 + .long vector296, vector297, vector298, vector299 +#endif +#if PPC_NUM_VECTORS > 300 + .long vector300, vector301, vector302, vector303 +#endif +#if PPC_NUM_VECTORS > 304 + .long vector304, vector305, vector306, vector307 +#endif +#if PPC_NUM_VECTORS > 308 + .long vector308, vector309, vector310, vector311 +#endif +#if PPC_NUM_VECTORS > 312 + .long vector312, vector313, vector314, vector315 +#endif +#if PPC_NUM_VECTORS > 316 + .long vector316, vector317, vector318, vector319 +#endif +#if PPC_NUM_VECTORS > 320 + .long vector320, vector321, vector322, vector323 +#endif +#if PPC_NUM_VECTORS > 324 + .long vector324, vector325, vector326, vector327 +#endif +#if PPC_NUM_VECTORS > 328 + .long vector328, vector329, vector330, vector331 +#endif +#if PPC_NUM_VECTORS > 332 + .long vector332, vector333, vector334, vector335 +#endif +#if PPC_NUM_VECTORS > 336 + .long vector336, vector337, vector338, vector339 +#endif +#if PPC_NUM_VECTORS > 340 + .long vector340, vector341, vector342, vector343 +#endif +#if PPC_NUM_VECTORS > 344 + .long vector344, vector345, vector346, vector347 +#endif +#if PPC_NUM_VECTORS > 348 + .long vector348, vector349, vector350, vector351 +#endif +#if PPC_NUM_VECTORS > 352 + .long vector352, vector353, vector354, vector355 +#endif +#if PPC_NUM_VECTORS > 356 + .long vector356, vector357, vector358, vector359 +#endif +#if PPC_NUM_VECTORS > 360 + .long vector360, vector361, vector362, vector363 +#endif +#if PPC_NUM_VECTORS > 364 + .long vector364, vector365, vector366, vector367 +#endif +#if PPC_NUM_VECTORS > 368 + .long vector368, vector369, vector370, vector371 +#endif +#if PPC_NUM_VECTORS > 372 + .long vector372, vector373, vector374, vector375 +#endif +#if PPC_NUM_VECTORS > 376 + .long vector376, vector377, vector378, vector379 +#endif +#if PPC_NUM_VECTORS > 380 + .long vector380, vector381, vector382, vector383 +#endif +#if PPC_NUM_VECTORS > 384 + .long vector384, vector385, vector386, vector387 +#endif +#if PPC_NUM_VECTORS > 388 + .long vector388, vector389, vector390, vector391 +#endif +#if PPC_NUM_VECTORS > 392 + .long vector392, vector393, vector394, vector395 +#endif +#if PPC_NUM_VECTORS > 396 + .long vector396, vector397, vector398, vector399 +#endif +#if PPC_NUM_VECTORS > 400 + .long vector400, vector401, vector402, vector403 +#endif +#if PPC_NUM_VECTORS > 404 + .long vector404, vector405, vector406, vector407 +#endif +#if PPC_NUM_VECTORS > 408 + .long vector408, vector409, vector410, vector411 +#endif +#if PPC_NUM_VECTORS > 412 + .long vector412, vector413, vector414, vector415 +#endif +#if PPC_NUM_VECTORS > 416 + .long vector416, vector417, vector418, vector419 +#endif +#if PPC_NUM_VECTORS > 420 + .long vector420, vector421, vector422, vector423 +#endif +#if PPC_NUM_VECTORS > 424 + .long vector424, vector425, vector426, vector427 +#endif +#if PPC_NUM_VECTORS > 428 + .long vector428, vector429, vector430, vector431 +#endif +#if PPC_NUM_VECTORS > 432 + .long vector432, vector433, vector434, vector435 +#endif +#if PPC_NUM_VECTORS > 436 + .long vector436, vector437, vector438, vector439 +#endif +#if PPC_NUM_VECTORS > 440 + .long vector440, vector441, vector442, vector443 +#endif +#if PPC_NUM_VECTORS > 444 + .long vector444, vector445, vector446, vector447 +#endif +#if PPC_NUM_VECTORS > 448 + .long vector448, vector449, vector450, vector451 +#endif +#if PPC_NUM_VECTORS > 452 + .long vector452, vector453, vector454, vector455 +#endif +#if PPC_NUM_VECTORS > 456 + .long vector456, vector457, vector458, vector459 +#endif +#if PPC_NUM_VECTORS > 460 + .long vector460, vector461, vector462, vector463 +#endif +#if PPC_NUM_VECTORS > 464 + .long vector464, vector465, vector466, vector467 +#endif +#if PPC_NUM_VECTORS > 468 + .long vector468, vector469, vector470, vector471 +#endif +#if PPC_NUM_VECTORS > 472 + .long vector472, vector473, vector474, vector475 +#endif +#if PPC_NUM_VECTORS > 476 + .long vector476, vector477, vector478, vector479 +#endif +#if PPC_NUM_VECTORS > 480 + .long vector480, vector481, vector482, vector483 +#endif +#if PPC_NUM_VECTORS > 484 + .long vector484, vector485, vector486, vector487 +#endif +#if PPC_NUM_VECTORS > 488 + .long vector488, vector489, vector490, vector491 +#endif +#if PPC_NUM_VECTORS > 492 + .long vector492, vector493, vector494, vector495 +#endif +#if PPC_NUM_VECTORS > 496 + .long vector496, vector497, vector498, vector499 +#endif +#if PPC_NUM_VECTORS > 500 + .long vector500, vector501, vector502, vector503 +#endif +#if PPC_NUM_VECTORS > 504 + .long vector504, vector505, vector506, vector507 +#endif +#if PPC_NUM_VECTORS > 508 + .long vector508, vector509, vector510, vector511 +#endif +#if PPC_NUM_VECTORS > 512 + .long vector512, vector513, vector514, vector515 +#endif +#if PPC_NUM_VECTORS > 516 + .long vector516, vector517, vector518, vector519 +#endif +#if PPC_NUM_VECTORS > 520 + .long vector520, vector521, vector522, vector523 +#endif +#if PPC_NUM_VECTORS > 524 + .long vector524, vector525, vector526, vector527 +#endif +#if PPC_NUM_VECTORS > 528 + .long vector528, vector529, vector530, vector531 +#endif +#if PPC_NUM_VECTORS > 532 + .long vector532, vector533, vector534, vector535 +#endif +#if PPC_NUM_VECTORS > 536 + .long vector536, vector537, vector538, vector539 +#endif +#if PPC_NUM_VECTORS > 540 + .long vector540, vector541, vector542, vector543 +#endif +#if PPC_NUM_VECTORS > 544 + .long vector544, vector545, vector546, vector547 +#endif +#if PPC_NUM_VECTORS > 548 + .long vector548, vector549, vector550, vector551 +#endif +#if PPC_NUM_VECTORS > 552 + .long vector552, vector553, vector554, vector555 +#endif +#if PPC_NUM_VECTORS > 556 + .long vector556, vector557, vector558, vector559 +#endif +#if PPC_NUM_VECTORS > 560 + .long vector560, vector561, vector562, vector563 +#endif +#if PPC_NUM_VECTORS > 564 + .long vector564, vector565, vector566, vector567 +#endif +#if PPC_NUM_VECTORS > 568 + .long vector568, vector569, vector570, vector571 +#endif +#if PPC_NUM_VECTORS > 572 + .long vector572, vector573, vector574, vector575 +#endif +#if PPC_NUM_VECTORS > 576 + .long vector576, vector577, vector578, vector579 +#endif +#if PPC_NUM_VECTORS > 580 + .long vector580, vector581, vector582, vector583 +#endif +#if PPC_NUM_VECTORS > 584 + .long vector584, vector585, vector586, vector587 +#endif +#if PPC_NUM_VECTORS > 588 + .long vector588, vector589, vector590, vector591 +#endif +#if PPC_NUM_VECTORS > 592 + .long vector592, vector593, vector594, vector595 +#endif +#if PPC_NUM_VECTORS > 596 + .long vector596, vector597, vector598, vector599 +#endif +#if PPC_NUM_VECTORS > 600 + .long vector600, vector601, vector602, vector603 +#endif +#if PPC_NUM_VECTORS > 604 + .long vector604, vector605, vector606, vector607 +#endif +#if PPC_NUM_VECTORS > 608 + .long vector608, vector609, vector610, vector611 +#endif +#if PPC_NUM_VECTORS > 612 + .long vector612, vector613, vector614, vector615 +#endif +#if PPC_NUM_VECTORS > 616 + .long vector616, vector617, vector618, vector619 +#endif +#if PPC_NUM_VECTORS > 620 + .long vector620, vector621, vector622, vector623 +#endif +#if PPC_NUM_VECTORS > 624 + .long vector624, vector625, vector626, vector627 +#endif +#if PPC_NUM_VECTORS > 628 + .long vector628, vector629, vector630, vector631 +#endif +#if PPC_NUM_VECTORS > 632 + .long vector632, vector633, vector634, vector635 +#endif +#if PPC_NUM_VECTORS > 636 + .long vector636, vector637, vector638, vector639 +#endif +#if PPC_NUM_VECTORS > 640 + .long vector640, vector641, vector642, vector643 +#endif +#if PPC_NUM_VECTORS > 644 + .long vector644, vector645, vector646, vector647 +#endif +#if PPC_NUM_VECTORS > 648 + .long vector648, vector649, vector650, vector651 +#endif +#if PPC_NUM_VECTORS > 652 + .long vector652, vector653, vector654, vector655 +#endif +#if PPC_NUM_VECTORS > 656 + .long vector656, vector657, vector658, vector659 +#endif +#if PPC_NUM_VECTORS > 660 + .long vector660, vector661, vector662, vector663 +#endif +#if PPC_NUM_VECTORS > 664 + .long vector664, vector665, vector666, vector667 +#endif +#if PPC_NUM_VECTORS > 668 + .long vector668, vector669, vector670, vector671 +#endif +#if PPC_NUM_VECTORS > 672 + .long vector672, vector673, vector674, vector675 +#endif +#if PPC_NUM_VECTORS > 676 + .long vector676, vector677, vector678, vector679 +#endif +#if PPC_NUM_VECTORS > 680 + .long vector680, vector681, vector682, vector683 +#endif +#if PPC_NUM_VECTORS > 684 + .long vector684, vector685, vector686, vector687 +#endif +#if PPC_NUM_VECTORS > 688 + .long vector688, vector689, vector690, vector691 +#endif +#if PPC_NUM_VECTORS > 692 + .long vector692, vector693, vector694, vector695 +#endif +#if PPC_NUM_VECTORS > 696 + .long vector696, vector697, vector698, vector699 +#endif +#if PPC_NUM_VECTORS > 700 + .long vector700, vector701, vector702, vector703 +#endif +#if PPC_NUM_VECTORS > 704 + .long vector704, vector705, vector706, vector707 +#endif +#if PPC_NUM_VECTORS > 708 + .long vector708, vector709, vector710, vector711 +#endif +#if PPC_NUM_VECTORS > 712 + .long vector712, vector713, vector714, vector715 +#endif +#if PPC_NUM_VECTORS > 716 + .long vector716, vector717, vector718, vector719 +#endif +#if PPC_NUM_VECTORS > 720 + .long vector720, vector721, vector722, vector723 +#endif +#if PPC_NUM_VECTORS > 724 + .long vector724, vector725, vector726, vector727 +#endif +#if PPC_NUM_VECTORS > 728 + .long vector728, vector729, vector730, vector731 +#endif +#if PPC_NUM_VECTORS > 732 + .long vector732, vector733, vector734, vector735 +#endif +#if PPC_NUM_VECTORS > 736 + .long vector736, vector737, vector738, vector739 +#endif +#if PPC_NUM_VECTORS > 740 + .long vector740, vector741, vector742, vector743 +#endif +#if PPC_NUM_VECTORS > 744 + .long vector744, vector745, vector746, vector747 +#endif +#if PPC_NUM_VECTORS > 748 + .long vector748, vector749, vector750, vector751 +#endif +#if PPC_NUM_VECTORS > 752 + .long vector752, vector753, vector754, vector755 +#endif +#if PPC_NUM_VECTORS > 756 + .long vector756, vector757, vector758, vector759 +#endif +#if PPC_NUM_VECTORS > 760 + .long vector760, vector761, vector762, vector763 +#endif +#if PPC_NUM_VECTORS > 764 + .long vector764, vector765, vector766, vector767 +#endif +#if PPC_NUM_VECTORS > 768 + .long vector768, vector769, vector770, vector771 +#endif +#if PPC_NUM_VECTORS > 772 + .long vector772, vector773, vector774, vector775 +#endif +#if PPC_NUM_VECTORS > 776 + .long vector776, vector777, vector778, vector779 +#endif +#if PPC_NUM_VECTORS > 780 + .long vector780, vector781, vector782, vector783 +#endif +#if PPC_NUM_VECTORS > 784 + .long vector784, vector785, vector786, vector787 +#endif +#if PPC_NUM_VECTORS > 788 + .long vector788, vector789, vector790, vector791 +#endif +#if PPC_NUM_VECTORS > 792 + .long vector792, vector793, vector794, vector795 +#endif +#if PPC_NUM_VECTORS > 796 + .long vector796, vector797, vector798, vector799 +#endif +#if PPC_NUM_VECTORS > 800 + .long vector800, vector801, vector802, vector803 +#endif +#if PPC_NUM_VECTORS > 804 + .long vector804, vector805, vector806, vector807 +#endif +#if PPC_NUM_VECTORS > 808 + .long vector808, vector809, vector810, vector811 +#endif +#if PPC_NUM_VECTORS > 812 + .long vector812, vector813, vector814, vector815 +#endif +#if PPC_NUM_VECTORS > 816 + .long vector816, vector817, vector818, vector819 +#endif +#if PPC_NUM_VECTORS > 820 + .long vector820, vector821, vector822, vector823 +#endif +#if PPC_NUM_VECTORS > 824 + .long vector824, vector825, vector826, vector827 +#endif +#if PPC_NUM_VECTORS > 828 + .long vector828, vector829, vector830, vector831 +#endif +#if PPC_NUM_VECTORS > 832 + .long vector832, vector833, vector834, vector835 +#endif +#if PPC_NUM_VECTORS > 836 + .long vector836, vector837, vector838, vector839 +#endif +#if PPC_NUM_VECTORS > 840 + .long vector840, vector841, vector842, vector843 +#endif +#if PPC_NUM_VECTORS > 844 + .long vector844, vector845, vector846, vector847 +#endif +#if PPC_NUM_VECTORS > 848 + .long vector848, vector849, vector850, vector851 +#endif +#if PPC_NUM_VECTORS > 852 + .long vector852, vector853, vector854, vector855 +#endif +#if PPC_NUM_VECTORS > 856 + .long vector856, vector857, vector858, vector859 +#endif +#if PPC_NUM_VECTORS > 860 + .long vector860, vector861, vector862, vector863 +#endif +#if PPC_NUM_VECTORS > 864 + .long vector864, vector865, vector866, vector867 +#endif +#if PPC_NUM_VECTORS > 868 + .long vector868, vector869, vector870, vector871 +#endif +#if PPC_NUM_VECTORS > 872 + .long vector872, vector873, vector874, vector875 +#endif +#if PPC_NUM_VECTORS > 876 + .long vector876, vector877, vector878, vector879 +#endif +#if PPC_NUM_VECTORS > 880 + .long vector880, vector881, vector882, vector883 +#endif +#if PPC_NUM_VECTORS > 884 + .long vector884, vector885, vector886, vector887 +#endif +#if PPC_NUM_VECTORS > 888 + .long vector888, vector889, vector890, vector891 +#endif +#if PPC_NUM_VECTORS > 892 + .long vector892, vector893, vector894, vector895 +#endif +#if PPC_NUM_VECTORS > 896 + .long vector896, vector897, vector898, vector899 +#endif +#if PPC_NUM_VECTORS > 900 + .long vector900, vector901, vector902, vector903 +#endif +#if PPC_NUM_VECTORS > 904 + .long vector904, vector905, vector906, vector907 +#endif +#if PPC_NUM_VECTORS > 908 + .long vector908, vector909, vector910, vector911 +#endif +#if PPC_NUM_VECTORS > 912 + .long vector912, vector913, vector914, vector915 +#endif +#if PPC_NUM_VECTORS > 916 + .long vector916, vector917, vector918, vector919 +#endif +#if PPC_NUM_VECTORS > 920 + .long vector920, vector921, vector922, vector923 +#endif +#if PPC_NUM_VECTORS > 924 + .long vector924, vector925, vector926, vector927 +#endif +#if PPC_NUM_VECTORS > 928 + .long vector928, vector929, vector930, vector931 +#endif +#if PPC_NUM_VECTORS > 932 + .long vector932, vector933, vector934, vector935 +#endif +#if PPC_NUM_VECTORS > 936 + .long vector936, vector937, vector938, vector939 +#endif +#if PPC_NUM_VECTORS > 940 + .long vector940, vector941, vector942, vector943 +#endif +#if PPC_NUM_VECTORS > 944 + .long vector944, vector945, vector946, vector947 +#endif +#if PPC_NUM_VECTORS > 948 + .long vector948, vector949, vector950, vector951 +#endif +#if PPC_NUM_VECTORS > 952 + .long vector952, vector953, vector954, vector955 +#endif +#if PPC_NUM_VECTORS > 956 + .long vector956, vector957, vector958, vector959 +#endif +#if PPC_NUM_VECTORS > 960 + .long vector960, vector961, vector962, vector963 +#endif +#if PPC_NUM_VECTORS > 964 + .long vector964, vector965, vector966, vector967 +#endif +#if PPC_NUM_VECTORS > 968 + .long vector968, vector969, vector970, vector971 +#endif +#if PPC_NUM_VECTORS > 972 + .long vector972, vector973, vector974, vector975 +#endif +#if PPC_NUM_VECTORS > 976 + .long vector976, vector977, vector978, vector979 +#endif +#if PPC_NUM_VECTORS > 980 + .long vector980, vector981, vector982, vector983 +#endif +#if PPC_NUM_VECTORS > 984 + .long vector984, vector985, vector986, vector987 +#endif +#if PPC_NUM_VECTORS > 988 + .long vector988, vector989, vector990, vector991 +#endif +#if PPC_NUM_VECTORS > 992 + .long vector992, vector993, vector994, vector995 +#endif +#if PPC_NUM_VECTORS > 996 + .long vector996, vector997, vector998, vector999 +#endif +#if PPC_NUM_VECTORS > 1000 + .long vector1000, vector1001, vector1002, vector1003 +#endif +#if PPC_NUM_VECTORS > 1004 + .long vector1004, vector1005, vector1006, vector1007 +#endif +#if PPC_NUM_VECTORS > 1008 + .long vector1008, vector1009, vector1010, vector1011 +#endif +#if PPC_NUM_VECTORS > 1012 + .long vector1012, vector1013, vector1014, vector1015 +#endif +#if PPC_NUM_VECTORS > 1016 + .long vector1016, vector1017, vector1018, vector1019 +#endif +#if PPC_NUM_VECTORS > 1020 + .long vector1020, vector1021, vector1022, vector1023 +#endif + + .text + .align 2 + + .weak vector0, vector1, vector2, vector3 +#if PPC_NUM_VECTORS > 4 + .weak vector4, vector5, vector6, vector7 +#endif +#if PPC_NUM_VECTORS > 8 + .weak vector8, vector9, vector10, vector11 +#endif +#if PPC_NUM_VECTORS > 12 + .weak vector12, vector13, vector14, vector15 +#endif +#if PPC_NUM_VECTORS > 16 + .weak vector16, vector17, vector18, vector19 +#endif +#if PPC_NUM_VECTORS > 20 + .weak vector20, vector21, vector22, vector23 +#endif +#if PPC_NUM_VECTORS > 24 + .weak vector24, vector25, vector26, vector27 +#endif +#if PPC_NUM_VECTORS > 28 + .weak vector28, vector29, vector30, vector31 +#endif +#if PPC_NUM_VECTORS > 32 + .weak vector32, vector33, vector34, vector35 +#endif +#if PPC_NUM_VECTORS > 36 + .weak vector36, vector37, vector38, vector39 +#endif +#if PPC_NUM_VECTORS > 40 + .weak vector40, vector41, vector42, vector43 +#endif +#if PPC_NUM_VECTORS > 44 + .weak vector44, vector45, vector46, vector47 +#endif +#if PPC_NUM_VECTORS > 48 + .weak vector48, vector49, vector50, vector51 +#endif +#if PPC_NUM_VECTORS > 52 + .weak vector52, vector53, vector54, vector55 +#endif +#if PPC_NUM_VECTORS > 56 + .weak vector56, vector57, vector58, vector59 +#endif +#if PPC_NUM_VECTORS > 60 + .weak vector60, vector61, vector62, vector63 +#endif +#if PPC_NUM_VECTORS > 64 + .weak vector64, vector65, vector66, vector67 +#endif +#if PPC_NUM_VECTORS > 68 + .weak vector68, vector69, vector70, vector71 +#endif +#if PPC_NUM_VECTORS > 72 + .weak vector72, vector73, vector74, vector75 +#endif +#if PPC_NUM_VECTORS > 76 + .weak vector76, vector77, vector78, vector79 +#endif +#if PPC_NUM_VECTORS > 80 + .weak vector80, vector81, vector82, vector83 +#endif +#if PPC_NUM_VECTORS > 84 + .weak vector84, vector85, vector86, vector87 +#endif +#if PPC_NUM_VECTORS > 88 + .weak vector88, vector89, vector90, vector91 +#endif +#if PPC_NUM_VECTORS > 92 + .weak vector92, vector93, vector94, vector95 +#endif +#if PPC_NUM_VECTORS > 96 + .weak vector96, vector97, vector98, vector99 +#endif +#if PPC_NUM_VECTORS > 100 + .weak vector100, vector101, vector102, vector103 +#endif +#if PPC_NUM_VECTORS > 104 + .weak vector104, vector105, vector106, vector107 +#endif +#if PPC_NUM_VECTORS > 108 + .weak vector108, vector109, vector110, vector111 +#endif +#if PPC_NUM_VECTORS > 112 + .weak vector112, vector113, vector114, vector115 +#endif +#if PPC_NUM_VECTORS > 116 + .weak vector116, vector117, vector118, vector119 +#endif +#if PPC_NUM_VECTORS > 120 + .weak vector120, vector121, vector122, vector123 +#endif +#if PPC_NUM_VECTORS > 124 + .weak vector124, vector125, vector126, vector127 +#endif +#if PPC_NUM_VECTORS > 128 + .weak vector128, vector129, vector130, vector131 +#endif +#if PPC_NUM_VECTORS > 132 + .weak vector132, vector133, vector134, vector135 +#endif +#if PPC_NUM_VECTORS > 136 + .weak vector136, vector137, vector138, vector139 +#endif +#if PPC_NUM_VECTORS > 140 + .weak vector140, vector141, vector142, vector143 +#endif +#if PPC_NUM_VECTORS > 144 + .weak vector144, vector145, vector146, vector147 +#endif +#if PPC_NUM_VECTORS > 148 + .weak vector148, vector149, vector150, vector151 +#endif +#if PPC_NUM_VECTORS > 152 + .weak vector152, vector153, vector154, vector155 +#endif +#if PPC_NUM_VECTORS > 156 + .weak vector156, vector157, vector158, vector159 +#endif +#if PPC_NUM_VECTORS > 160 + .weak vector160, vector161, vector162, vector163 +#endif +#if PPC_NUM_VECTORS > 164 + .weak vector164, vector165, vector166, vector167 +#endif +#if PPC_NUM_VECTORS > 168 + .weak vector168, vector169, vector170, vector171 +#endif +#if PPC_NUM_VECTORS > 172 + .weak vector172, vector173, vector174, vector175 +#endif +#if PPC_NUM_VECTORS > 176 + .weak vector176, vector177, vector178, vector179 +#endif +#if PPC_NUM_VECTORS > 180 + .weak vector180, vector181, vector182, vector183 +#endif +#if PPC_NUM_VECTORS > 184 + .weak vector184, vector185, vector186, vector187 +#endif +#if PPC_NUM_VECTORS > 188 + .weak vector188, vector189, vector190, vector191 +#endif +#if PPC_NUM_VECTORS > 192 + .weak vector192, vector193, vector194, vector195 +#endif +#if PPC_NUM_VECTORS > 196 + .weak vector196, vector197, vector198, vector199 +#endif +#if PPC_NUM_VECTORS > 200 + .weak vector200, vector201, vector202, vector203 +#endif +#if PPC_NUM_VECTORS > 204 + .weak vector204, vector205, vector206, vector207 +#endif +#if PPC_NUM_VECTORS > 208 + .weak vector208, vector209, vector210, vector211 +#endif +#if PPC_NUM_VECTORS > 212 + .weak vector212, vector213, vector214, vector215 +#endif +#if PPC_NUM_VECTORS > 216 + .weak vector216, vector217, vector218, vector219 +#endif +#if PPC_NUM_VECTORS > 220 + .weak vector220, vector221, vector222, vector223 +#endif +#if PPC_NUM_VECTORS > 224 + .weak vector224, vector225, vector226, vector227 +#endif +#if PPC_NUM_VECTORS > 228 + .weak vector228, vector229, vector230, vector231 +#endif +#if PPC_NUM_VECTORS > 232 + .weak vector232, vector233, vector234, vector235 +#endif +#if PPC_NUM_VECTORS > 236 + .weak vector236, vector237, vector238, vector239 +#endif +#if PPC_NUM_VECTORS > 240 + .weak vector240, vector241, vector242, vector243 +#endif +#if PPC_NUM_VECTORS > 244 + .weak vector244, vector245, vector246, vector247 +#endif +#if PPC_NUM_VECTORS > 248 + .weak vector248, vector249, vector250, vector251 +#endif +#if PPC_NUM_VECTORS > 252 + .weak vector252, vector253, vector254, vector255 +#endif +#if PPC_NUM_VECTORS > 256 + .weak vector256, vector257, vector258, vector259 +#endif +#if PPC_NUM_VECTORS > 260 + .weak vector260, vector261, vector262, vector263 +#endif +#if PPC_NUM_VECTORS > 264 + .weak vector264, vector265, vector266, vector267 +#endif +#if PPC_NUM_VECTORS > 268 + .weak vector268, vector269, vector270, vector271 +#endif +#if PPC_NUM_VECTORS > 272 + .weak vector272, vector273, vector274, vector275 +#endif +#if PPC_NUM_VECTORS > 276 + .weak vector276, vector277, vector278, vector279 +#endif +#if PPC_NUM_VECTORS > 280 + .weak vector280, vector281, vector282, vector283 +#endif +#if PPC_NUM_VECTORS > 284 + .weak vector284, vector285, vector286, vector287 +#endif +#if PPC_NUM_VECTORS > 288 + .weak vector288, vector289, vector290, vector291 +#endif +#if PPC_NUM_VECTORS > 292 + .weak vector292, vector293, vector294, vector295 +#endif +#if PPC_NUM_VECTORS > 296 + .weak vector296, vector297, vector298, vector299 +#endif +#if PPC_NUM_VECTORS > 300 + .weak vector300, vector301, vector302, vector303 +#endif +#if PPC_NUM_VECTORS > 304 + .weak vector304, vector305, vector306, vector307 +#endif +#if PPC_NUM_VECTORS > 308 + .weak vector308, vector309, vector310, vector311 +#endif +#if PPC_NUM_VECTORS > 312 + .weak vector312, vector313, vector314, vector315 +#endif +#if PPC_NUM_VECTORS > 316 + .weak vector316, vector317, vector318, vector319 +#endif +#if PPC_NUM_VECTORS > 320 + .weak vector320, vector321, vector322, vector323 +#endif +#if PPC_NUM_VECTORS > 324 + .weak vector324, vector325, vector326, vector327 +#endif +#if PPC_NUM_VECTORS > 328 + .weak vector328, vector329, vector330, vector331 +#endif +#if PPC_NUM_VECTORS > 332 + .weak vector332, vector333, vector334, vector335 +#endif +#if PPC_NUM_VECTORS > 336 + .weak vector336, vector337, vector338, vector339 +#endif +#if PPC_NUM_VECTORS > 340 + .weak vector340, vector341, vector342, vector343 +#endif +#if PPC_NUM_VECTORS > 344 + .weak vector344, vector345, vector346, vector347 +#endif +#if PPC_NUM_VECTORS > 348 + .weak vector348, vector349, vector350, vector351 +#endif +#if PPC_NUM_VECTORS > 352 + .weak vector352, vector353, vector354, vector355 +#endif +#if PPC_NUM_VECTORS > 356 + .weak vector356, vector357, vector358, vector359 +#endif +#if PPC_NUM_VECTORS > 360 + .weak vector360, vector361, vector362, vector363 +#endif +#if PPC_NUM_VECTORS > 364 + .weak vector364, vector365, vector366, vector367 +#endif +#if PPC_NUM_VECTORS > 368 + .weak vector368, vector369, vector370, vector371 +#endif +#if PPC_NUM_VECTORS > 372 + .weak vector372, vector373, vector374, vector375 +#endif +#if PPC_NUM_VECTORS > 376 + .weak vector376, vector377, vector378, vector379 +#endif +#if PPC_NUM_VECTORS > 380 + .weak vector380, vector381, vector382, vector383 +#endif +#if PPC_NUM_VECTORS > 384 + .weak vector384, vector385, vector386, vector387 +#endif +#if PPC_NUM_VECTORS > 388 + .weak vector388, vector389, vector390, vector391 +#endif +#if PPC_NUM_VECTORS > 392 + .weak vector392, vector393, vector394, vector395 +#endif +#if PPC_NUM_VECTORS > 396 + .weak vector396, vector397, vector398, vector399 +#endif +#if PPC_NUM_VECTORS > 400 + .weak vector400, vector401, vector402, vector403 +#endif +#if PPC_NUM_VECTORS > 404 + .weak vector404, vector405, vector406, vector407 +#endif +#if PPC_NUM_VECTORS > 408 + .weak vector408, vector409, vector410, vector411 +#endif +#if PPC_NUM_VECTORS > 412 + .weak vector412, vector413, vector414, vector415 +#endif +#if PPC_NUM_VECTORS > 416 + .weak vector416, vector417, vector418, vector419 +#endif +#if PPC_NUM_VECTORS > 420 + .weak vector420, vector421, vector422, vector423 +#endif +#if PPC_NUM_VECTORS > 424 + .weak vector424, vector425, vector426, vector427 +#endif +#if PPC_NUM_VECTORS > 428 + .weak vector428, vector429, vector430, vector431 +#endif +#if PPC_NUM_VECTORS > 432 + .weak vector432, vector433, vector434, vector435 +#endif +#if PPC_NUM_VECTORS > 436 + .weak vector436, vector437, vector438, vector439 +#endif +#if PPC_NUM_VECTORS > 440 + .weak vector440, vector441, vector442, vector443 +#endif +#if PPC_NUM_VECTORS > 444 + .weak vector444, vector445, vector446, vector447 +#endif +#if PPC_NUM_VECTORS > 448 + .weak vector448, vector449, vector450, vector451 +#endif +#if PPC_NUM_VECTORS > 452 + .weak vector452, vector453, vector454, vector455 +#endif +#if PPC_NUM_VECTORS > 456 + .weak vector456, vector457, vector458, vector459 +#endif +#if PPC_NUM_VECTORS > 460 + .weak vector460, vector461, vector462, vector463 +#endif +#if PPC_NUM_VECTORS > 464 + .weak vector464, vector465, vector466, vector467 +#endif +#if PPC_NUM_VECTORS > 468 + .weak vector468, vector469, vector470, vector471 +#endif +#if PPC_NUM_VECTORS > 472 + .weak vector472, vector473, vector474, vector475 +#endif +#if PPC_NUM_VECTORS > 476 + .weak vector476, vector477, vector478, vector479 +#endif +#if PPC_NUM_VECTORS > 480 + .weak vector480, vector481, vector482, vector483 +#endif +#if PPC_NUM_VECTORS > 484 + .weak vector484, vector485, vector486, vector487 +#endif +#if PPC_NUM_VECTORS > 488 + .weak vector488, vector489, vector490, vector491 +#endif +#if PPC_NUM_VECTORS > 492 + .weak vector492, vector493, vector494, vector495 +#endif +#if PPC_NUM_VECTORS > 496 + .weak vector496, vector497, vector498, vector499 +#endif +#if PPC_NUM_VECTORS > 500 + .weak vector500, vector501, vector502, vector503 +#endif +#if PPC_NUM_VECTORS > 504 + .weak vector504, vector505, vector506, vector507 +#endif +#if PPC_NUM_VECTORS > 508 + .weak vector508, vector509, vector510, vector511 +#endif +#if PPC_NUM_VECTORS > 512 + .weak vector512, vector513, vector514, vector515 +#endif +#if PPC_NUM_VECTORS > 516 + .weak vector516, vector517, vector518, vector519 +#endif +#if PPC_NUM_VECTORS > 520 + .weak vector520, vector521, vector522, vector523 +#endif +#if PPC_NUM_VECTORS > 524 + .weak vector524, vector525, vector526, vector527 +#endif +#if PPC_NUM_VECTORS > 528 + .weak vector528, vector529, vector530, vector531 +#endif +#if PPC_NUM_VECTORS > 532 + .weak vector532, vector533, vector534, vector535 +#endif +#if PPC_NUM_VECTORS > 536 + .weak vector536, vector537, vector538, vector539 +#endif +#if PPC_NUM_VECTORS > 540 + .weak vector540, vector541, vector542, vector543 +#endif +#if PPC_NUM_VECTORS > 544 + .weak vector544, vector545, vector546, vector547 +#endif +#if PPC_NUM_VECTORS > 548 + .weak vector548, vector549, vector550, vector551 +#endif +#if PPC_NUM_VECTORS > 552 + .weak vector552, vector553, vector554, vector555 +#endif +#if PPC_NUM_VECTORS > 556 + .weak vector556, vector557, vector558, vector559 +#endif +#if PPC_NUM_VECTORS > 560 + .weak vector560, vector561, vector562, vector563 +#endif +#if PPC_NUM_VECTORS > 564 + .weak vector564, vector565, vector566, vector567 +#endif +#if PPC_NUM_VECTORS > 568 + .weak vector568, vector569, vector570, vector571 +#endif +#if PPC_NUM_VECTORS > 572 + .weak vector572, vector573, vector574, vector575 +#endif +#if PPC_NUM_VECTORS > 576 + .weak vector576, vector577, vector578, vector579 +#endif +#if PPC_NUM_VECTORS > 580 + .weak vector580, vector581, vector582, vector583 +#endif +#if PPC_NUM_VECTORS > 584 + .weak vector584, vector585, vector586, vector587 +#endif +#if PPC_NUM_VECTORS > 588 + .weak vector588, vector589, vector590, vector591 +#endif +#if PPC_NUM_VECTORS > 592 + .weak vector592, vector593, vector594, vector595 +#endif +#if PPC_NUM_VECTORS > 596 + .weak vector596, vector597, vector598, vector599 +#endif +#if PPC_NUM_VECTORS > 600 + .weak vector600, vector601, vector602, vector603 +#endif +#if PPC_NUM_VECTORS > 604 + .weak vector604, vector605, vector606, vector607 +#endif +#if PPC_NUM_VECTORS > 608 + .weak vector608, vector609, vector610, vector611 +#endif +#if PPC_NUM_VECTORS > 612 + .weak vector612, vector613, vector614, vector615 +#endif +#if PPC_NUM_VECTORS > 616 + .weak vector616, vector617, vector618, vector619 +#endif +#if PPC_NUM_VECTORS > 620 + .weak vector620, vector621, vector622, vector623 +#endif +#if PPC_NUM_VECTORS > 624 + .weak vector624, vector625, vector626, vector627 +#endif +#if PPC_NUM_VECTORS > 628 + .weak vector628, vector629, vector630, vector631 +#endif +#if PPC_NUM_VECTORS > 632 + .weak vector632, vector633, vector634, vector635 +#endif +#if PPC_NUM_VECTORS > 636 + .weak vector636, vector637, vector638, vector639 +#endif +#if PPC_NUM_VECTORS > 640 + .weak vector640, vector641, vector642, vector643 +#endif +#if PPC_NUM_VECTORS > 644 + .weak vector644, vector645, vector646, vector647 +#endif +#if PPC_NUM_VECTORS > 648 + .weak vector648, vector649, vector650, vector651 +#endif +#if PPC_NUM_VECTORS > 652 + .weak vector652, vector653, vector654, vector655 +#endif +#if PPC_NUM_VECTORS > 656 + .weak vector656, vector657, vector658, vector659 +#endif +#if PPC_NUM_VECTORS > 660 + .weak vector660, vector661, vector662, vector663 +#endif +#if PPC_NUM_VECTORS > 664 + .weak vector664, vector665, vector666, vector667 +#endif +#if PPC_NUM_VECTORS > 668 + .weak vector668, vector669, vector670, vector671 +#endif +#if PPC_NUM_VECTORS > 672 + .weak vector672, vector673, vector674, vector675 +#endif +#if PPC_NUM_VECTORS > 676 + .weak vector676, vector677, vector678, vector679 +#endif +#if PPC_NUM_VECTORS > 680 + .weak vector680, vector681, vector682, vector683 +#endif +#if PPC_NUM_VECTORS > 684 + .weak vector684, vector685, vector686, vector687 +#endif +#if PPC_NUM_VECTORS > 688 + .weak vector688, vector689, vector690, vector691 +#endif +#if PPC_NUM_VECTORS > 692 + .weak vector692, vector693, vector694, vector695 +#endif +#if PPC_NUM_VECTORS > 696 + .weak vector696, vector697, vector698, vector699 +#endif +#if PPC_NUM_VECTORS > 700 + .weak vector700, vector701, vector702, vector703 +#endif +#if PPC_NUM_VECTORS > 704 + .weak vector704, vector705, vector706, vector707 +#endif +#if PPC_NUM_VECTORS > 708 + .weak vector708, vector709, vector710, vector711 +#endif +#if PPC_NUM_VECTORS > 712 + .weak vector712, vector713, vector714, vector715 +#endif +#if PPC_NUM_VECTORS > 716 + .weak vector716, vector717, vector718, vector719 +#endif +#if PPC_NUM_VECTORS > 720 + .weak vector720, vector721, vector722, vector723 +#endif +#if PPC_NUM_VECTORS > 724 + .weak vector724, vector725, vector726, vector727 +#endif +#if PPC_NUM_VECTORS > 728 + .weak vector728, vector729, vector730, vector731 +#endif +#if PPC_NUM_VECTORS > 732 + .weak vector732, vector733, vector734, vector735 +#endif +#if PPC_NUM_VECTORS > 736 + .weak vector736, vector737, vector738, vector739 +#endif +#if PPC_NUM_VECTORS > 740 + .weak vector740, vector741, vector742, vector743 +#endif +#if PPC_NUM_VECTORS > 744 + .weak vector744, vector745, vector746, vector747 +#endif +#if PPC_NUM_VECTORS > 748 + .weak vector748, vector749, vector750, vector751 +#endif +#if PPC_NUM_VECTORS > 752 + .weak vector752, vector753, vector754, vector755 +#endif +#if PPC_NUM_VECTORS > 756 + .weak vector756, vector757, vector758, vector759 +#endif +#if PPC_NUM_VECTORS > 760 + .weak vector760, vector761, vector762, vector763 +#endif +#if PPC_NUM_VECTORS > 764 + .weak vector764, vector765, vector766, vector767 +#endif +#if PPC_NUM_VECTORS > 768 + .weak vector768, vector769, vector770, vector771 +#endif +#if PPC_NUM_VECTORS > 772 + .weak vector772, vector773, vector774, vector775 +#endif +#if PPC_NUM_VECTORS > 776 + .weak vector776, vector777, vector778, vector779 +#endif +#if PPC_NUM_VECTORS > 780 + .weak vector780, vector781, vector782, vector783 +#endif +#if PPC_NUM_VECTORS > 784 + .weak vector784, vector785, vector786, vector787 +#endif +#if PPC_NUM_VECTORS > 788 + .weak vector788, vector789, vector790, vector791 +#endif +#if PPC_NUM_VECTORS > 792 + .weak vector792, vector793, vector794, vector795 +#endif +#if PPC_NUM_VECTORS > 796 + .weak vector796, vector797, vector798, vector799 +#endif +#if PPC_NUM_VECTORS > 800 + .weak vector800, vector801, vector802, vector803 +#endif +#if PPC_NUM_VECTORS > 804 + .weak vector804, vector805, vector806, vector807 +#endif +#if PPC_NUM_VECTORS > 808 + .weak vector808, vector809, vector810, vector811 +#endif +#if PPC_NUM_VECTORS > 812 + .weak vector812, vector813, vector814, vector815 +#endif +#if PPC_NUM_VECTORS > 816 + .weak vector816, vector817, vector818, vector819 +#endif +#if PPC_NUM_VECTORS > 820 + .weak vector820, vector821, vector822, vector823 +#endif +#if PPC_NUM_VECTORS > 824 + .weak vector824, vector825, vector826, vector827 +#endif +#if PPC_NUM_VECTORS > 828 + .weak vector828, vector829, vector830, vector831 +#endif +#if PPC_NUM_VECTORS > 832 + .weak vector832, vector833, vector834, vector835 +#endif +#if PPC_NUM_VECTORS > 836 + .weak vector836, vector837, vector838, vector839 +#endif +#if PPC_NUM_VECTORS > 840 + .weak vector840, vector841, vector842, vector843 +#endif +#if PPC_NUM_VECTORS > 844 + .weak vector844, vector845, vector846, vector847 +#endif +#if PPC_NUM_VECTORS > 848 + .weak vector848, vector849, vector850, vector851 +#endif +#if PPC_NUM_VECTORS > 852 + .weak vector852, vector853, vector854, vector855 +#endif +#if PPC_NUM_VECTORS > 856 + .weak vector856, vector857, vector858, vector859 +#endif +#if PPC_NUM_VECTORS > 860 + .weak vector860, vector861, vector862, vector863 +#endif +#if PPC_NUM_VECTORS > 864 + .weak vector864, vector865, vector866, vector867 +#endif +#if PPC_NUM_VECTORS > 868 + .weak vector868, vector869, vector870, vector871 +#endif +#if PPC_NUM_VECTORS > 872 + .weak vector872, vector873, vector874, vector875 +#endif +#if PPC_NUM_VECTORS > 876 + .weak vector876, vector877, vector878, vector879 +#endif +#if PPC_NUM_VECTORS > 880 + .weak vector880, vector881, vector882, vector883 +#endif +#if PPC_NUM_VECTORS > 884 + .weak vector884, vector885, vector886, vector887 +#endif +#if PPC_NUM_VECTORS > 888 + .weak vector888, vector889, vector890, vector891 +#endif +#if PPC_NUM_VECTORS > 892 + .weak vector892, vector893, vector894, vector895 +#endif +#if PPC_NUM_VECTORS > 896 + .weak vector896, vector897, vector898, vector899 +#endif +#if PPC_NUM_VECTORS > 900 + .weak vector900, vector901, vector902, vector903 +#endif +#if PPC_NUM_VECTORS > 904 + .weak vector904, vector905, vector906, vector907 +#endif +#if PPC_NUM_VECTORS > 908 + .weak vector908, vector909, vector910, vector911 +#endif +#if PPC_NUM_VECTORS > 912 + .weak vector912, vector913, vector914, vector915 +#endif +#if PPC_NUM_VECTORS > 916 + .weak vector916, vector917, vector918, vector919 +#endif +#if PPC_NUM_VECTORS > 920 + .weak vector920, vector921, vector922, vector923 +#endif +#if PPC_NUM_VECTORS > 924 + .weak vector924, vector925, vector926, vector927 +#endif +#if PPC_NUM_VECTORS > 928 + .weak vector928, vector929, vector930, vector931 +#endif +#if PPC_NUM_VECTORS > 932 + .weak vector932, vector933, vector934, vector935 +#endif +#if PPC_NUM_VECTORS > 936 + .weak vector936, vector937, vector938, vector939 +#endif +#if PPC_NUM_VECTORS > 940 + .weak vector940, vector941, vector942, vector943 +#endif +#if PPC_NUM_VECTORS > 944 + .weak vector944, vector945, vector946, vector947 +#endif +#if PPC_NUM_VECTORS > 948 + .weak vector948, vector949, vector950, vector951 +#endif +#if PPC_NUM_VECTORS > 952 + .weak vector952, vector953, vector954, vector955 +#endif +#if PPC_NUM_VECTORS > 956 + .weak vector956, vector957, vector958, vector959 +#endif +#if PPC_NUM_VECTORS > 960 + .weak vector960, vector961, vector962, vector963 +#endif +#if PPC_NUM_VECTORS > 964 + .weak vector964, vector965, vector966, vector967 +#endif +#if PPC_NUM_VECTORS > 968 + .weak vector968, vector969, vector970, vector971 +#endif +#if PPC_NUM_VECTORS > 972 + .weak vector972, vector973, vector974, vector975 +#endif +#if PPC_NUM_VECTORS > 976 + .weak vector976, vector977, vector978, vector979 +#endif +#if PPC_NUM_VECTORS > 980 + .weak vector980, vector981, vector982, vector983 +#endif +#if PPC_NUM_VECTORS > 984 + .weak vector984, vector985, vector986, vector987 +#endif +#if PPC_NUM_VECTORS > 988 + .weak vector988, vector989, vector990, vector991 +#endif +#if PPC_NUM_VECTORS > 992 + .weak vector992, vector993, vector994, vector995 +#endif +#if PPC_NUM_VECTORS > 996 + .weak vector996, vector997, vector998, vector999 +#endif +#if PPC_NUM_VECTORS > 1000 + .weak vector1000, vector1001, vector1002, vector1003 +#endif +#if PPC_NUM_VECTORS > 1004 + .weak vector1004, vector1005, vector1006, vector1007 +#endif +#if PPC_NUM_VECTORS > 1008 + .weak vector1008, vector1009, vector1010, vector1011 +#endif +#if PPC_NUM_VECTORS > 1012 + .weak vector1012, vector1013, vector1014, vector1015 +#endif +#if PPC_NUM_VECTORS > 1016 + .weak vector1016, vector1017, vector1018, vector1019 +#endif +#if PPC_NUM_VECTORS > 1020 + .weak vector1020, vector1021, vector1022, vector1023 +#endif + +vector0: +vector1: +vector2: +vector3: +vector4: +vector5: +vector6: +vector7: +vector8: +vector9: +vector10: +vector11: +vector12: +vector13: +vector14: +vector15: +vector16: +vector17: +vector18: +vector19: +vector20: +vector21: +vector22: +vector23: +vector24: +vector25: +vector26: +vector27: +vector28: +vector29: +vector30: +vector31: +vector32: +vector33: +vector34: +vector35: +vector36: +vector37: +vector38: +vector39: +vector40: +vector41: +vector42: +vector43: +vector44: +vector45: +vector46: +vector47: +vector48: +vector49: +vector50: +vector51: +vector52: +vector53: +vector54: +vector55: +vector56: +vector57: +vector58: +vector59: +vector60: +vector61: +vector62: +vector63: +vector64: +vector65: +vector66: +vector67: +vector68: +vector69: +vector70: +vector71: +vector72: +vector73: +vector74: +vector75: +vector76: +vector77: +vector78: +vector79: +vector80: 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+vector913: +vector914: +vector915: +vector916: +vector917: +vector918: +vector919: +vector920: +vector921: +vector922: +vector923: +vector924: +vector925: +vector926: +vector927: +vector928: +vector929: +vector930: +vector931: +vector932: +vector933: +vector934: +vector935: +vector936: +vector937: +vector938: +vector939: +vector940: +vector941: +vector942: +vector943: +vector944: +vector945: +vector946: +vector947: +vector948: +vector949: +vector950: +vector951: +vector952: +vector953: +vector954: +vector955: +vector956: +vector957: +vector958: +vector959: +vector960: +vector961: +vector962: +vector963: +vector964: +vector965: +vector966: +vector967: +vector968: +vector969: +vector970: +vector971: +vector972: +vector973: +vector974: +vector975: +vector976: +vector977: +vector978: +vector979: +vector980: +vector981: +vector982: +vector983: +vector984: +vector985: +vector986: +vector987: +vector988: +vector989: +vector990: +vector991: +vector992: +vector993: +vector994: +vector995: +vector996: +vector997: +vector998: +vector999: +vector1000: +vector1001: +vector1002: +vector1003: +vector1004: +vector1005: +vector1006: +vector1007: +vector1008: +vector1009: +vector1010: +vector1011: +vector1012: +vector1013: +vector1014: +vector1015: +vector1016: +vector1017: +vector1018: +vector1019: +vector1020: +vector1021: +vector1022: +vector1023: + b _unhandled_irq + + .weak _unhandled_irq + .type _unhandled_irq, @function +_unhandled_irq: + b _unhandled_irq + +#endif /* !defined(__DOXYGEN__) */ + +/** @} */ diff --git a/os/common/startup/e200/compilers/GCC/vectors.s b/os/common/startup/e200/compilers/GCC/vectors.s deleted file mode 100644 index 22e10b170..000000000 --- a/os/common/startup/e200/compilers/GCC/vectors.s +++ /dev/null @@ -1,2612 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file vectors.s - * @brief SPC56x vectors table. - * - * @addtogroup PPC_GCC_CORE - * @{ - */ - -#define _FROM_ASM_ -#include "ppcparams.h" - -#if defined(VECTORS_RENAMING) -#include "isrs.h" -#endif - -#if !defined(__DOXYGEN__) - - /* Software vectors table. The vectors are accessed from the IVOR4 - handler only. In order to declare an interrupt handler just create - a function withe the same name of a vector, the symbol will - override the weak symbol declared here.*/ - .section .vectors, "ax" - .align 4 - .globl _vectors -_vectors: - .long vector0, vector1, vector2, vector3 -#if PPC_NUM_VECTORS > 4 - .long vector4, vector5, vector6, vector7 -#endif -#if PPC_NUM_VECTORS > 8 - .long vector8, vector9, vector10, vector11 -#endif -#if PPC_NUM_VECTORS > 12 - .long vector12, vector13, vector14, vector15 -#endif -#if PPC_NUM_VECTORS > 16 - .long vector16, vector17, vector18, vector19 -#endif -#if PPC_NUM_VECTORS > 20 - .long vector20, vector21, vector22, vector23 -#endif -#if PPC_NUM_VECTORS > 24 - .long vector24, vector25, vector26, vector27 -#endif -#if PPC_NUM_VECTORS > 28 - .long vector28, vector29, vector30, vector31 -#endif -#if PPC_NUM_VECTORS > 32 - .long vector32, vector33, vector34, vector35 -#endif -#if PPC_NUM_VECTORS > 36 - .long vector36, vector37, vector38, vector39 -#endif -#if PPC_NUM_VECTORS > 40 - .long vector40, vector41, vector42, vector43 -#endif -#if PPC_NUM_VECTORS > 44 - .long vector44, vector45, vector46, vector47 -#endif -#if PPC_NUM_VECTORS > 48 - .long vector48, vector49, vector50, vector51 -#endif -#if PPC_NUM_VECTORS > 52 - .long vector52, vector53, vector54, vector55 -#endif -#if PPC_NUM_VECTORS > 56 - .long vector56, vector57, vector58, vector59 -#endif -#if PPC_NUM_VECTORS > 60 - .long vector60, vector61, vector62, vector63 -#endif -#if PPC_NUM_VECTORS > 64 - .long vector64, vector65, vector66, vector67 -#endif -#if PPC_NUM_VECTORS > 68 - .long vector68, vector69, vector70, vector71 -#endif -#if PPC_NUM_VECTORS > 72 - .long vector72, vector73, vector74, vector75 -#endif -#if PPC_NUM_VECTORS > 76 - .long vector76, vector77, vector78, vector79 -#endif -#if PPC_NUM_VECTORS > 80 - .long vector80, vector81, vector82, vector83 -#endif -#if PPC_NUM_VECTORS > 84 - .long vector84, vector85, vector86, vector87 -#endif -#if PPC_NUM_VECTORS > 88 - .long vector88, vector89, vector90, vector91 -#endif -#if PPC_NUM_VECTORS > 92 - .long vector92, vector93, vector94, vector95 -#endif -#if PPC_NUM_VECTORS > 96 - .long vector96, vector97, vector98, vector99 -#endif -#if PPC_NUM_VECTORS > 100 - .long vector100, vector101, vector102, vector103 -#endif -#if PPC_NUM_VECTORS > 104 - .long vector104, vector105, vector106, vector107 -#endif -#if PPC_NUM_VECTORS > 108 - .long vector108, vector109, vector110, vector111 -#endif -#if PPC_NUM_VECTORS > 112 - .long vector112, vector113, vector114, vector115 -#endif -#if PPC_NUM_VECTORS > 116 - .long vector116, vector117, vector118, vector119 -#endif -#if PPC_NUM_VECTORS > 120 - .long vector120, vector121, vector122, vector123 -#endif -#if PPC_NUM_VECTORS > 124 - .long vector124, vector125, vector126, vector127 -#endif -#if PPC_NUM_VECTORS > 128 - .long vector128, vector129, vector130, vector131 -#endif -#if PPC_NUM_VECTORS > 132 - .long vector132, vector133, vector134, vector135 -#endif -#if PPC_NUM_VECTORS > 136 - .long vector136, vector137, vector138, vector139 -#endif -#if PPC_NUM_VECTORS > 140 - .long vector140, vector141, vector142, vector143 -#endif -#if PPC_NUM_VECTORS > 144 - .long vector144, vector145, vector146, vector147 -#endif -#if PPC_NUM_VECTORS > 148 - .long vector148, vector149, vector150, vector151 -#endif -#if PPC_NUM_VECTORS > 152 - .long vector152, vector153, vector154, vector155 -#endif -#if PPC_NUM_VECTORS > 156 - .long vector156, vector157, vector158, vector159 -#endif -#if PPC_NUM_VECTORS > 160 - .long vector160, vector161, vector162, vector163 -#endif -#if PPC_NUM_VECTORS > 164 - .long vector164, vector165, vector166, vector167 -#endif -#if PPC_NUM_VECTORS > 168 - .long vector168, vector169, vector170, vector171 -#endif -#if PPC_NUM_VECTORS > 172 - .long vector172, vector173, vector174, vector175 -#endif -#if PPC_NUM_VECTORS > 176 - .long vector176, vector177, vector178, vector179 -#endif -#if PPC_NUM_VECTORS > 180 - .long vector180, vector181, vector182, vector183 -#endif -#if PPC_NUM_VECTORS > 184 - .long vector184, vector185, vector186, vector187 -#endif -#if PPC_NUM_VECTORS > 188 - .long vector188, vector189, vector190, vector191 -#endif -#if PPC_NUM_VECTORS > 192 - .long vector192, vector193, vector194, vector195 -#endif -#if PPC_NUM_VECTORS > 196 - .long vector196, vector197, vector198, vector199 -#endif -#if PPC_NUM_VECTORS > 200 - .long vector200, vector201, vector202, vector203 -#endif -#if PPC_NUM_VECTORS > 204 - .long vector204, vector205, vector206, vector207 -#endif -#if PPC_NUM_VECTORS > 208 - .long vector208, vector209, vector210, vector211 -#endif -#if PPC_NUM_VECTORS > 212 - .long vector212, vector213, vector214, vector215 -#endif -#if PPC_NUM_VECTORS > 216 - .long vector216, vector217, vector218, vector219 -#endif -#if PPC_NUM_VECTORS > 220 - .long vector220, vector221, vector222, vector223 -#endif -#if PPC_NUM_VECTORS > 224 - .long vector224, vector225, vector226, vector227 -#endif -#if PPC_NUM_VECTORS > 228 - .long vector228, vector229, vector230, vector231 -#endif -#if PPC_NUM_VECTORS > 232 - .long vector232, vector233, vector234, vector235 -#endif -#if PPC_NUM_VECTORS > 236 - .long vector236, vector237, vector238, vector239 -#endif -#if PPC_NUM_VECTORS > 240 - .long vector240, vector241, vector242, vector243 -#endif -#if PPC_NUM_VECTORS > 244 - .long vector244, vector245, vector246, vector247 -#endif -#if PPC_NUM_VECTORS > 248 - .long vector248, vector249, vector250, vector251 -#endif -#if PPC_NUM_VECTORS > 252 - .long vector252, vector253, vector254, vector255 -#endif -#if PPC_NUM_VECTORS > 256 - .long vector256, vector257, vector258, vector259 -#endif -#if PPC_NUM_VECTORS > 260 - .long vector260, vector261, vector262, vector263 -#endif -#if PPC_NUM_VECTORS > 264 - .long vector264, vector265, vector266, vector267 -#endif -#if PPC_NUM_VECTORS > 268 - .long vector268, vector269, vector270, vector271 -#endif -#if PPC_NUM_VECTORS > 272 - .long vector272, vector273, vector274, vector275 -#endif -#if PPC_NUM_VECTORS > 276 - .long vector276, vector277, vector278, vector279 -#endif -#if PPC_NUM_VECTORS > 280 - .long vector280, vector281, vector282, vector283 -#endif -#if PPC_NUM_VECTORS > 284 - .long vector284, vector285, vector286, vector287 -#endif -#if PPC_NUM_VECTORS > 288 - .long vector288, vector289, vector290, vector291 -#endif -#if PPC_NUM_VECTORS > 292 - .long vector292, vector293, vector294, vector295 -#endif -#if PPC_NUM_VECTORS > 296 - .long vector296, vector297, vector298, vector299 -#endif -#if PPC_NUM_VECTORS > 300 - .long vector300, vector301, vector302, vector303 -#endif -#if PPC_NUM_VECTORS > 304 - .long vector304, vector305, vector306, vector307 -#endif -#if PPC_NUM_VECTORS > 308 - .long vector308, vector309, vector310, vector311 -#endif -#if PPC_NUM_VECTORS > 312 - .long vector312, vector313, vector314, vector315 -#endif -#if PPC_NUM_VECTORS > 316 - .long vector316, vector317, vector318, vector319 -#endif -#if PPC_NUM_VECTORS > 320 - .long vector320, vector321, vector322, vector323 -#endif -#if PPC_NUM_VECTORS > 324 - .long vector324, vector325, vector326, vector327 -#endif -#if PPC_NUM_VECTORS > 328 - .long vector328, vector329, vector330, vector331 -#endif -#if PPC_NUM_VECTORS > 332 - .long vector332, vector333, vector334, vector335 -#endif -#if PPC_NUM_VECTORS > 336 - .long vector336, vector337, vector338, vector339 -#endif -#if PPC_NUM_VECTORS > 340 - .long vector340, vector341, vector342, vector343 -#endif -#if PPC_NUM_VECTORS > 344 - .long vector344, vector345, vector346, vector347 -#endif -#if PPC_NUM_VECTORS > 348 - .long vector348, vector349, vector350, vector351 -#endif -#if PPC_NUM_VECTORS > 352 - .long vector352, vector353, vector354, vector355 -#endif -#if PPC_NUM_VECTORS > 356 - .long vector356, vector357, vector358, vector359 -#endif -#if PPC_NUM_VECTORS > 360 - .long vector360, vector361, vector362, vector363 -#endif -#if PPC_NUM_VECTORS > 364 - .long vector364, vector365, vector366, vector367 -#endif -#if PPC_NUM_VECTORS > 368 - .long vector368, vector369, vector370, vector371 -#endif -#if PPC_NUM_VECTORS > 372 - .long vector372, vector373, vector374, vector375 -#endif -#if PPC_NUM_VECTORS > 376 - .long vector376, vector377, vector378, vector379 -#endif -#if PPC_NUM_VECTORS > 380 - .long vector380, vector381, vector382, vector383 -#endif -#if PPC_NUM_VECTORS > 384 - .long vector384, vector385, vector386, vector387 -#endif -#if PPC_NUM_VECTORS > 388 - .long vector388, vector389, vector390, vector391 -#endif -#if PPC_NUM_VECTORS > 392 - .long vector392, vector393, vector394, vector395 -#endif -#if PPC_NUM_VECTORS > 396 - .long vector396, vector397, vector398, vector399 -#endif -#if PPC_NUM_VECTORS > 400 - .long vector400, vector401, vector402, vector403 -#endif -#if PPC_NUM_VECTORS > 404 - .long vector404, vector405, vector406, vector407 -#endif -#if PPC_NUM_VECTORS > 408 - .long vector408, vector409, vector410, vector411 -#endif -#if PPC_NUM_VECTORS > 412 - .long vector412, vector413, vector414, vector415 -#endif -#if PPC_NUM_VECTORS > 416 - .long vector416, vector417, vector418, vector419 -#endif -#if PPC_NUM_VECTORS > 420 - .long vector420, vector421, vector422, vector423 -#endif -#if PPC_NUM_VECTORS > 424 - .long vector424, vector425, vector426, vector427 -#endif -#if PPC_NUM_VECTORS > 428 - .long vector428, vector429, vector430, vector431 -#endif -#if PPC_NUM_VECTORS > 432 - .long vector432, vector433, vector434, vector435 -#endif -#if PPC_NUM_VECTORS > 436 - .long vector436, vector437, vector438, vector439 -#endif -#if PPC_NUM_VECTORS > 440 - .long vector440, vector441, vector442, vector443 -#endif -#if PPC_NUM_VECTORS > 444 - .long vector444, vector445, vector446, vector447 -#endif -#if PPC_NUM_VECTORS > 448 - .long vector448, vector449, vector450, vector451 -#endif -#if PPC_NUM_VECTORS > 452 - .long vector452, vector453, vector454, vector455 -#endif -#if PPC_NUM_VECTORS > 456 - .long vector456, vector457, vector458, vector459 -#endif -#if PPC_NUM_VECTORS > 460 - .long vector460, vector461, vector462, vector463 -#endif -#if PPC_NUM_VECTORS > 464 - .long vector464, vector465, vector466, vector467 -#endif -#if PPC_NUM_VECTORS > 468 - .long vector468, vector469, vector470, vector471 -#endif -#if PPC_NUM_VECTORS > 472 - .long vector472, vector473, vector474, vector475 -#endif -#if PPC_NUM_VECTORS > 476 - .long vector476, vector477, vector478, vector479 -#endif -#if PPC_NUM_VECTORS > 480 - .long vector480, vector481, vector482, vector483 -#endif -#if PPC_NUM_VECTORS > 484 - .long vector484, vector485, vector486, vector487 -#endif -#if PPC_NUM_VECTORS > 488 - .long vector488, vector489, vector490, vector491 -#endif -#if PPC_NUM_VECTORS > 492 - .long vector492, vector493, vector494, vector495 -#endif -#if PPC_NUM_VECTORS > 496 - .long vector496, vector497, vector498, vector499 -#endif -#if PPC_NUM_VECTORS > 500 - .long vector500, vector501, vector502, vector503 -#endif -#if PPC_NUM_VECTORS > 504 - .long vector504, vector505, vector506, vector507 -#endif -#if PPC_NUM_VECTORS > 508 - .long vector508, vector509, vector510, vector511 -#endif -#if PPC_NUM_VECTORS > 512 - .long vector512, vector513, vector514, vector515 -#endif -#if PPC_NUM_VECTORS > 516 - .long vector516, vector517, vector518, vector519 -#endif -#if PPC_NUM_VECTORS > 520 - .long vector520, vector521, vector522, vector523 -#endif -#if PPC_NUM_VECTORS > 524 - .long vector524, vector525, vector526, vector527 -#endif -#if PPC_NUM_VECTORS > 528 - .long vector528, vector529, vector530, vector531 -#endif -#if PPC_NUM_VECTORS > 532 - .long vector532, vector533, vector534, vector535 -#endif -#if PPC_NUM_VECTORS > 536 - .long vector536, vector537, vector538, vector539 -#endif -#if PPC_NUM_VECTORS > 540 - .long vector540, vector541, vector542, vector543 -#endif -#if PPC_NUM_VECTORS > 544 - .long vector544, vector545, vector546, vector547 -#endif -#if PPC_NUM_VECTORS > 548 - .long vector548, vector549, vector550, vector551 -#endif -#if PPC_NUM_VECTORS > 552 - .long vector552, vector553, vector554, vector555 -#endif -#if PPC_NUM_VECTORS > 556 - .long vector556, vector557, vector558, vector559 -#endif -#if PPC_NUM_VECTORS > 560 - .long vector560, vector561, vector562, vector563 -#endif -#if PPC_NUM_VECTORS > 564 - .long vector564, vector565, vector566, vector567 -#endif -#if PPC_NUM_VECTORS > 568 - .long vector568, vector569, vector570, vector571 -#endif -#if PPC_NUM_VECTORS > 572 - .long vector572, vector573, vector574, vector575 -#endif -#if PPC_NUM_VECTORS > 576 - .long vector576, vector577, vector578, vector579 -#endif -#if PPC_NUM_VECTORS > 580 - .long vector580, vector581, vector582, vector583 -#endif -#if PPC_NUM_VECTORS > 584 - .long vector584, vector585, vector586, vector587 -#endif -#if PPC_NUM_VECTORS > 588 - .long vector588, vector589, vector590, vector591 -#endif -#if PPC_NUM_VECTORS > 592 - .long vector592, vector593, vector594, vector595 -#endif -#if PPC_NUM_VECTORS > 596 - .long vector596, vector597, vector598, vector599 -#endif -#if PPC_NUM_VECTORS > 600 - .long vector600, vector601, vector602, vector603 -#endif -#if PPC_NUM_VECTORS > 604 - .long vector604, vector605, vector606, vector607 -#endif -#if PPC_NUM_VECTORS > 608 - .long vector608, vector609, vector610, vector611 -#endif -#if PPC_NUM_VECTORS > 612 - .long vector612, vector613, vector614, vector615 -#endif -#if PPC_NUM_VECTORS > 616 - .long vector616, vector617, vector618, vector619 -#endif -#if PPC_NUM_VECTORS > 620 - .long vector620, vector621, vector622, vector623 -#endif -#if PPC_NUM_VECTORS > 624 - .long vector624, vector625, vector626, vector627 -#endif -#if PPC_NUM_VECTORS > 628 - .long vector628, vector629, vector630, vector631 -#endif -#if PPC_NUM_VECTORS > 632 - .long vector632, vector633, vector634, vector635 -#endif -#if PPC_NUM_VECTORS > 636 - .long vector636, vector637, vector638, vector639 -#endif -#if PPC_NUM_VECTORS > 640 - .long vector640, vector641, vector642, vector643 -#endif -#if PPC_NUM_VECTORS > 644 - .long vector644, vector645, vector646, vector647 -#endif -#if PPC_NUM_VECTORS > 648 - .long vector648, vector649, vector650, vector651 -#endif -#if PPC_NUM_VECTORS > 652 - .long vector652, vector653, vector654, vector655 -#endif -#if PPC_NUM_VECTORS > 656 - .long vector656, vector657, vector658, vector659 -#endif -#if PPC_NUM_VECTORS > 660 - .long vector660, vector661, vector662, vector663 -#endif -#if PPC_NUM_VECTORS > 664 - .long vector664, vector665, vector666, vector667 -#endif -#if PPC_NUM_VECTORS > 668 - .long vector668, vector669, vector670, vector671 -#endif -#if PPC_NUM_VECTORS > 672 - .long vector672, vector673, vector674, vector675 -#endif -#if PPC_NUM_VECTORS > 676 - .long vector676, vector677, vector678, vector679 -#endif -#if PPC_NUM_VECTORS > 680 - .long vector680, vector681, vector682, vector683 -#endif -#if PPC_NUM_VECTORS > 684 - .long vector684, vector685, vector686, vector687 -#endif -#if PPC_NUM_VECTORS > 688 - .long vector688, vector689, vector690, vector691 -#endif -#if PPC_NUM_VECTORS > 692 - .long vector692, vector693, vector694, vector695 -#endif -#if PPC_NUM_VECTORS > 696 - .long vector696, vector697, vector698, vector699 -#endif -#if PPC_NUM_VECTORS > 700 - .long vector700, vector701, vector702, vector703 -#endif -#if PPC_NUM_VECTORS > 704 - .long vector704, vector705, vector706, vector707 -#endif -#if PPC_NUM_VECTORS > 708 - .long vector708, vector709, vector710, vector711 -#endif -#if PPC_NUM_VECTORS > 712 - .long vector712, vector713, vector714, vector715 -#endif -#if PPC_NUM_VECTORS > 716 - .long vector716, vector717, vector718, vector719 -#endif -#if PPC_NUM_VECTORS > 720 - .long vector720, vector721, vector722, vector723 -#endif -#if PPC_NUM_VECTORS > 724 - .long vector724, vector725, vector726, vector727 -#endif -#if PPC_NUM_VECTORS > 728 - .long vector728, vector729, vector730, vector731 -#endif -#if PPC_NUM_VECTORS > 732 - .long vector732, vector733, vector734, vector735 -#endif -#if PPC_NUM_VECTORS > 736 - .long vector736, vector737, vector738, vector739 -#endif -#if PPC_NUM_VECTORS > 740 - .long vector740, vector741, vector742, vector743 -#endif -#if PPC_NUM_VECTORS > 744 - .long vector744, vector745, vector746, vector747 -#endif -#if PPC_NUM_VECTORS > 748 - .long vector748, vector749, vector750, vector751 -#endif -#if PPC_NUM_VECTORS > 752 - .long vector752, vector753, vector754, vector755 -#endif -#if PPC_NUM_VECTORS > 756 - .long vector756, vector757, vector758, vector759 -#endif -#if PPC_NUM_VECTORS > 760 - .long vector760, vector761, vector762, vector763 -#endif -#if PPC_NUM_VECTORS > 764 - .long vector764, vector765, vector766, vector767 -#endif -#if PPC_NUM_VECTORS > 768 - .long vector768, vector769, vector770, vector771 -#endif -#if PPC_NUM_VECTORS > 772 - .long vector772, vector773, vector774, vector775 -#endif -#if PPC_NUM_VECTORS > 776 - .long vector776, vector777, vector778, vector779 -#endif -#if PPC_NUM_VECTORS > 780 - .long vector780, vector781, vector782, vector783 -#endif -#if PPC_NUM_VECTORS > 784 - .long vector784, vector785, vector786, vector787 -#endif -#if PPC_NUM_VECTORS > 788 - .long vector788, vector789, vector790, vector791 -#endif -#if PPC_NUM_VECTORS > 792 - .long vector792, vector793, vector794, vector795 -#endif -#if PPC_NUM_VECTORS > 796 - .long vector796, vector797, vector798, vector799 -#endif -#if PPC_NUM_VECTORS > 800 - .long vector800, vector801, vector802, vector803 -#endif -#if PPC_NUM_VECTORS > 804 - .long vector804, vector805, vector806, vector807 -#endif -#if PPC_NUM_VECTORS > 808 - .long vector808, vector809, vector810, vector811 -#endif -#if PPC_NUM_VECTORS > 812 - .long vector812, vector813, vector814, vector815 -#endif -#if PPC_NUM_VECTORS > 816 - .long vector816, vector817, vector818, vector819 -#endif -#if PPC_NUM_VECTORS > 820 - .long vector820, vector821, vector822, vector823 -#endif -#if PPC_NUM_VECTORS > 824 - .long vector824, vector825, vector826, vector827 -#endif -#if PPC_NUM_VECTORS > 828 - .long vector828, vector829, vector830, vector831 -#endif -#if PPC_NUM_VECTORS > 832 - .long vector832, vector833, vector834, vector835 -#endif -#if PPC_NUM_VECTORS > 836 - .long vector836, vector837, vector838, vector839 -#endif -#if PPC_NUM_VECTORS > 840 - .long vector840, vector841, vector842, vector843 -#endif -#if PPC_NUM_VECTORS > 844 - .long vector844, vector845, vector846, vector847 -#endif -#if PPC_NUM_VECTORS > 848 - .long vector848, vector849, vector850, vector851 -#endif -#if PPC_NUM_VECTORS > 852 - .long vector852, vector853, vector854, vector855 -#endif -#if PPC_NUM_VECTORS > 856 - .long vector856, vector857, vector858, vector859 -#endif -#if PPC_NUM_VECTORS > 860 - .long vector860, vector861, vector862, vector863 -#endif -#if PPC_NUM_VECTORS > 864 - .long vector864, vector865, vector866, vector867 -#endif -#if PPC_NUM_VECTORS > 868 - .long vector868, vector869, vector870, vector871 -#endif -#if PPC_NUM_VECTORS > 872 - .long vector872, vector873, vector874, vector875 -#endif -#if PPC_NUM_VECTORS > 876 - .long vector876, vector877, vector878, vector879 -#endif -#if PPC_NUM_VECTORS > 880 - .long vector880, vector881, vector882, vector883 -#endif -#if PPC_NUM_VECTORS > 884 - .long vector884, vector885, vector886, vector887 -#endif -#if PPC_NUM_VECTORS > 888 - .long vector888, vector889, vector890, vector891 -#endif -#if PPC_NUM_VECTORS > 892 - .long vector892, vector893, vector894, vector895 -#endif -#if PPC_NUM_VECTORS > 896 - .long vector896, vector897, vector898, vector899 -#endif -#if PPC_NUM_VECTORS > 900 - .long vector900, vector901, vector902, vector903 -#endif -#if PPC_NUM_VECTORS > 904 - .long vector904, vector905, vector906, vector907 -#endif -#if PPC_NUM_VECTORS > 908 - .long vector908, vector909, vector910, vector911 -#endif -#if PPC_NUM_VECTORS > 912 - .long vector912, vector913, vector914, vector915 -#endif -#if PPC_NUM_VECTORS > 916 - .long vector916, vector917, vector918, vector919 -#endif -#if PPC_NUM_VECTORS > 920 - .long vector920, vector921, vector922, vector923 -#endif -#if PPC_NUM_VECTORS > 924 - .long vector924, vector925, vector926, vector927 -#endif -#if PPC_NUM_VECTORS > 928 - .long vector928, vector929, vector930, vector931 -#endif -#if PPC_NUM_VECTORS > 932 - .long vector932, vector933, vector934, vector935 -#endif -#if PPC_NUM_VECTORS > 936 - .long vector936, vector937, vector938, vector939 -#endif -#if PPC_NUM_VECTORS > 940 - .long vector940, vector941, vector942, vector943 -#endif -#if PPC_NUM_VECTORS > 944 - .long vector944, vector945, vector946, vector947 -#endif -#if PPC_NUM_VECTORS > 948 - .long vector948, vector949, vector950, vector951 -#endif -#if PPC_NUM_VECTORS > 952 - .long vector952, vector953, vector954, vector955 -#endif -#if PPC_NUM_VECTORS > 956 - .long vector956, vector957, vector958, vector959 -#endif -#if PPC_NUM_VECTORS > 960 - .long vector960, vector961, vector962, vector963 -#endif -#if PPC_NUM_VECTORS > 964 - .long vector964, vector965, vector966, vector967 -#endif -#if PPC_NUM_VECTORS > 968 - .long vector968, vector969, vector970, vector971 -#endif -#if PPC_NUM_VECTORS > 972 - .long vector972, vector973, vector974, vector975 -#endif -#if PPC_NUM_VECTORS > 976 - .long vector976, vector977, vector978, vector979 -#endif -#if PPC_NUM_VECTORS > 980 - .long vector980, vector981, vector982, vector983 -#endif -#if PPC_NUM_VECTORS > 984 - .long vector984, vector985, vector986, vector987 -#endif -#if PPC_NUM_VECTORS > 988 - .long vector988, vector989, vector990, vector991 -#endif -#if PPC_NUM_VECTORS > 992 - .long vector992, vector993, vector994, vector995 -#endif -#if PPC_NUM_VECTORS > 996 - .long vector996, vector997, vector998, vector999 -#endif -#if PPC_NUM_VECTORS > 1000 - .long vector1000, vector1001, vector1002, vector1003 -#endif -#if PPC_NUM_VECTORS > 1004 - .long vector1004, vector1005, vector1006, vector1007 -#endif -#if PPC_NUM_VECTORS > 1008 - .long vector1008, vector1009, vector1010, vector1011 -#endif -#if PPC_NUM_VECTORS > 1012 - .long vector1012, vector1013, vector1014, vector1015 -#endif -#if PPC_NUM_VECTORS > 1016 - .long vector1016, vector1017, vector1018, vector1019 -#endif -#if PPC_NUM_VECTORS > 1020 - .long vector1020, vector1021, vector1022, vector1023 -#endif - - .text - .align 2 - - .weak vector0, vector1, vector2, vector3 -#if PPC_NUM_VECTORS > 4 - .weak vector4, vector5, vector6, vector7 -#endif -#if PPC_NUM_VECTORS > 8 - .weak vector8, vector9, vector10, vector11 -#endif -#if PPC_NUM_VECTORS > 12 - .weak vector12, vector13, vector14, vector15 -#endif -#if PPC_NUM_VECTORS > 16 - .weak vector16, vector17, vector18, vector19 -#endif -#if PPC_NUM_VECTORS > 20 - .weak vector20, vector21, vector22, vector23 -#endif -#if PPC_NUM_VECTORS > 24 - .weak vector24, vector25, vector26, vector27 -#endif -#if PPC_NUM_VECTORS > 28 - .weak vector28, vector29, vector30, vector31 -#endif -#if PPC_NUM_VECTORS > 32 - .weak vector32, vector33, vector34, vector35 -#endif -#if PPC_NUM_VECTORS > 36 - .weak vector36, vector37, vector38, vector39 -#endif -#if PPC_NUM_VECTORS > 40 - .weak vector40, vector41, vector42, vector43 -#endif -#if PPC_NUM_VECTORS > 44 - .weak vector44, vector45, vector46, vector47 -#endif -#if PPC_NUM_VECTORS > 48 - .weak vector48, vector49, vector50, vector51 -#endif -#if PPC_NUM_VECTORS > 52 - .weak vector52, vector53, vector54, vector55 -#endif -#if PPC_NUM_VECTORS > 56 - .weak vector56, vector57, vector58, vector59 -#endif -#if PPC_NUM_VECTORS > 60 - .weak vector60, vector61, vector62, vector63 -#endif -#if PPC_NUM_VECTORS > 64 - .weak vector64, vector65, vector66, vector67 -#endif -#if PPC_NUM_VECTORS > 68 - .weak vector68, vector69, vector70, vector71 -#endif -#if PPC_NUM_VECTORS > 72 - .weak vector72, vector73, vector74, vector75 -#endif -#if PPC_NUM_VECTORS > 76 - .weak vector76, vector77, vector78, vector79 -#endif -#if PPC_NUM_VECTORS > 80 - .weak vector80, vector81, vector82, vector83 -#endif -#if PPC_NUM_VECTORS > 84 - .weak vector84, vector85, vector86, vector87 -#endif -#if PPC_NUM_VECTORS > 88 - .weak vector88, vector89, vector90, vector91 -#endif -#if PPC_NUM_VECTORS > 92 - .weak vector92, vector93, vector94, vector95 -#endif -#if PPC_NUM_VECTORS > 96 - .weak vector96, vector97, vector98, vector99 -#endif -#if PPC_NUM_VECTORS > 100 - .weak vector100, vector101, vector102, vector103 -#endif -#if PPC_NUM_VECTORS > 104 - .weak vector104, vector105, vector106, vector107 -#endif -#if PPC_NUM_VECTORS > 108 - .weak vector108, vector109, vector110, vector111 -#endif -#if PPC_NUM_VECTORS > 112 - .weak vector112, vector113, vector114, vector115 -#endif -#if PPC_NUM_VECTORS > 116 - .weak vector116, vector117, vector118, vector119 -#endif -#if PPC_NUM_VECTORS > 120 - .weak vector120, vector121, vector122, vector123 -#endif -#if PPC_NUM_VECTORS > 124 - .weak vector124, vector125, vector126, vector127 -#endif -#if PPC_NUM_VECTORS > 128 - .weak vector128, vector129, vector130, vector131 -#endif -#if PPC_NUM_VECTORS > 132 - .weak vector132, vector133, vector134, vector135 -#endif -#if PPC_NUM_VECTORS > 136 - .weak vector136, vector137, vector138, vector139 -#endif -#if PPC_NUM_VECTORS > 140 - .weak vector140, vector141, vector142, vector143 -#endif -#if PPC_NUM_VECTORS > 144 - .weak vector144, vector145, vector146, vector147 -#endif -#if PPC_NUM_VECTORS > 148 - .weak vector148, vector149, vector150, vector151 -#endif -#if PPC_NUM_VECTORS > 152 - .weak vector152, vector153, vector154, vector155 -#endif -#if PPC_NUM_VECTORS > 156 - .weak vector156, vector157, vector158, vector159 -#endif -#if PPC_NUM_VECTORS > 160 - .weak vector160, vector161, vector162, vector163 -#endif -#if PPC_NUM_VECTORS > 164 - .weak vector164, vector165, vector166, vector167 -#endif -#if PPC_NUM_VECTORS > 168 - .weak vector168, vector169, vector170, vector171 -#endif -#if PPC_NUM_VECTORS > 172 - .weak vector172, vector173, vector174, vector175 -#endif -#if PPC_NUM_VECTORS > 176 - .weak vector176, vector177, vector178, vector179 -#endif -#if PPC_NUM_VECTORS > 180 - .weak vector180, vector181, vector182, vector183 -#endif -#if PPC_NUM_VECTORS > 184 - .weak vector184, vector185, vector186, vector187 -#endif -#if PPC_NUM_VECTORS > 188 - .weak vector188, vector189, vector190, vector191 -#endif -#if PPC_NUM_VECTORS > 192 - .weak vector192, vector193, vector194, vector195 -#endif -#if PPC_NUM_VECTORS > 196 - .weak vector196, vector197, vector198, vector199 -#endif -#if PPC_NUM_VECTORS > 200 - .weak vector200, vector201, vector202, vector203 -#endif -#if PPC_NUM_VECTORS > 204 - .weak vector204, vector205, vector206, vector207 -#endif -#if PPC_NUM_VECTORS > 208 - .weak vector208, vector209, vector210, vector211 -#endif -#if PPC_NUM_VECTORS > 212 - .weak vector212, vector213, vector214, vector215 -#endif -#if PPC_NUM_VECTORS > 216 - .weak vector216, vector217, vector218, vector219 -#endif -#if PPC_NUM_VECTORS > 220 - .weak vector220, vector221, vector222, vector223 -#endif -#if PPC_NUM_VECTORS > 224 - .weak vector224, vector225, vector226, vector227 -#endif -#if PPC_NUM_VECTORS > 228 - .weak vector228, vector229, vector230, vector231 -#endif -#if PPC_NUM_VECTORS > 232 - .weak vector232, vector233, vector234, vector235 -#endif -#if PPC_NUM_VECTORS > 236 - .weak vector236, vector237, vector238, vector239 -#endif -#if PPC_NUM_VECTORS > 240 - .weak vector240, vector241, vector242, vector243 -#endif -#if PPC_NUM_VECTORS > 244 - .weak vector244, vector245, vector246, vector247 -#endif -#if PPC_NUM_VECTORS > 248 - .weak vector248, vector249, vector250, vector251 -#endif -#if PPC_NUM_VECTORS > 252 - .weak vector252, vector253, vector254, vector255 -#endif -#if PPC_NUM_VECTORS > 256 - .weak vector256, vector257, vector258, vector259 -#endif -#if PPC_NUM_VECTORS > 260 - .weak vector260, vector261, vector262, vector263 -#endif -#if PPC_NUM_VECTORS > 264 - .weak vector264, vector265, vector266, vector267 -#endif -#if PPC_NUM_VECTORS > 268 - .weak vector268, vector269, vector270, vector271 -#endif -#if PPC_NUM_VECTORS > 272 - .weak vector272, vector273, vector274, vector275 -#endif -#if PPC_NUM_VECTORS > 276 - .weak vector276, vector277, vector278, vector279 -#endif -#if PPC_NUM_VECTORS > 280 - .weak vector280, vector281, vector282, vector283 -#endif -#if PPC_NUM_VECTORS > 284 - .weak vector284, vector285, vector286, vector287 -#endif -#if PPC_NUM_VECTORS > 288 - .weak vector288, vector289, vector290, vector291 -#endif -#if PPC_NUM_VECTORS > 292 - .weak vector292, vector293, vector294, vector295 -#endif -#if PPC_NUM_VECTORS > 296 - .weak vector296, vector297, vector298, vector299 -#endif -#if PPC_NUM_VECTORS > 300 - .weak vector300, vector301, vector302, vector303 -#endif -#if PPC_NUM_VECTORS > 304 - .weak vector304, vector305, vector306, vector307 -#endif -#if PPC_NUM_VECTORS > 308 - .weak vector308, vector309, vector310, vector311 -#endif -#if PPC_NUM_VECTORS > 312 - .weak vector312, vector313, vector314, vector315 -#endif -#if PPC_NUM_VECTORS > 316 - .weak vector316, vector317, vector318, vector319 -#endif -#if PPC_NUM_VECTORS > 320 - .weak vector320, vector321, vector322, vector323 -#endif -#if PPC_NUM_VECTORS > 324 - .weak vector324, vector325, vector326, vector327 -#endif -#if PPC_NUM_VECTORS > 328 - .weak vector328, vector329, vector330, vector331 -#endif -#if PPC_NUM_VECTORS > 332 - .weak vector332, vector333, vector334, vector335 -#endif -#if PPC_NUM_VECTORS > 336 - .weak vector336, vector337, vector338, vector339 -#endif -#if PPC_NUM_VECTORS > 340 - .weak vector340, vector341, vector342, vector343 -#endif -#if PPC_NUM_VECTORS > 344 - .weak vector344, vector345, vector346, vector347 -#endif -#if PPC_NUM_VECTORS > 348 - .weak vector348, vector349, vector350, vector351 -#endif -#if PPC_NUM_VECTORS > 352 - .weak vector352, vector353, vector354, vector355 -#endif -#if PPC_NUM_VECTORS > 356 - .weak vector356, vector357, vector358, vector359 -#endif -#if PPC_NUM_VECTORS > 360 - .weak vector360, vector361, vector362, vector363 -#endif -#if PPC_NUM_VECTORS > 364 - .weak vector364, vector365, vector366, vector367 -#endif -#if PPC_NUM_VECTORS > 368 - .weak vector368, vector369, vector370, vector371 -#endif -#if PPC_NUM_VECTORS > 372 - .weak vector372, vector373, vector374, vector375 -#endif -#if PPC_NUM_VECTORS > 376 - .weak vector376, vector377, vector378, vector379 -#endif -#if PPC_NUM_VECTORS > 380 - .weak vector380, vector381, vector382, vector383 -#endif -#if PPC_NUM_VECTORS > 384 - .weak vector384, vector385, vector386, vector387 -#endif -#if PPC_NUM_VECTORS > 388 - .weak vector388, vector389, vector390, vector391 -#endif -#if PPC_NUM_VECTORS > 392 - .weak vector392, vector393, vector394, vector395 -#endif -#if PPC_NUM_VECTORS > 396 - .weak vector396, vector397, vector398, vector399 -#endif -#if PPC_NUM_VECTORS > 400 - .weak vector400, vector401, vector402, vector403 -#endif -#if PPC_NUM_VECTORS > 404 - .weak vector404, vector405, vector406, vector407 -#endif -#if PPC_NUM_VECTORS > 408 - .weak vector408, vector409, vector410, vector411 -#endif -#if PPC_NUM_VECTORS > 412 - .weak vector412, vector413, vector414, vector415 -#endif -#if PPC_NUM_VECTORS > 416 - .weak vector416, vector417, vector418, vector419 -#endif -#if PPC_NUM_VECTORS > 420 - .weak vector420, vector421, vector422, vector423 -#endif -#if PPC_NUM_VECTORS > 424 - .weak vector424, vector425, vector426, vector427 -#endif -#if PPC_NUM_VECTORS > 428 - .weak vector428, vector429, vector430, vector431 -#endif -#if PPC_NUM_VECTORS > 432 - .weak vector432, vector433, vector434, vector435 -#endif -#if PPC_NUM_VECTORS > 436 - .weak vector436, vector437, vector438, vector439 -#endif -#if PPC_NUM_VECTORS > 440 - .weak vector440, vector441, vector442, vector443 -#endif -#if PPC_NUM_VECTORS > 444 - .weak vector444, vector445, vector446, vector447 -#endif -#if PPC_NUM_VECTORS > 448 - .weak vector448, vector449, vector450, vector451 -#endif -#if PPC_NUM_VECTORS > 452 - .weak vector452, vector453, vector454, vector455 -#endif -#if PPC_NUM_VECTORS > 456 - .weak vector456, vector457, vector458, vector459 -#endif -#if PPC_NUM_VECTORS > 460 - .weak vector460, vector461, vector462, vector463 -#endif -#if PPC_NUM_VECTORS > 464 - .weak vector464, vector465, vector466, vector467 -#endif -#if PPC_NUM_VECTORS > 468 - .weak vector468, vector469, vector470, vector471 -#endif -#if PPC_NUM_VECTORS > 472 - .weak vector472, vector473, vector474, vector475 -#endif -#if PPC_NUM_VECTORS > 476 - .weak vector476, vector477, vector478, vector479 -#endif -#if PPC_NUM_VECTORS > 480 - .weak vector480, vector481, vector482, vector483 -#endif -#if PPC_NUM_VECTORS > 484 - .weak vector484, vector485, vector486, vector487 -#endif -#if PPC_NUM_VECTORS > 488 - .weak vector488, vector489, vector490, vector491 -#endif -#if PPC_NUM_VECTORS > 492 - .weak vector492, vector493, vector494, vector495 -#endif -#if PPC_NUM_VECTORS > 496 - .weak vector496, vector497, vector498, vector499 -#endif -#if PPC_NUM_VECTORS > 500 - .weak vector500, vector501, vector502, vector503 -#endif -#if PPC_NUM_VECTORS > 504 - .weak vector504, vector505, vector506, vector507 -#endif -#if PPC_NUM_VECTORS > 508 - .weak vector508, vector509, vector510, vector511 -#endif -#if PPC_NUM_VECTORS > 512 - .weak vector512, vector513, vector514, vector515 -#endif -#if PPC_NUM_VECTORS > 516 - .weak vector516, vector517, vector518, vector519 -#endif -#if PPC_NUM_VECTORS > 520 - .weak vector520, vector521, vector522, vector523 -#endif -#if PPC_NUM_VECTORS > 524 - .weak vector524, vector525, vector526, vector527 -#endif -#if PPC_NUM_VECTORS > 528 - .weak vector528, vector529, vector530, vector531 -#endif -#if PPC_NUM_VECTORS > 532 - .weak vector532, vector533, vector534, vector535 -#endif -#if PPC_NUM_VECTORS > 536 - .weak vector536, vector537, vector538, vector539 -#endif -#if PPC_NUM_VECTORS > 540 - .weak vector540, vector541, vector542, vector543 -#endif -#if PPC_NUM_VECTORS > 544 - .weak vector544, vector545, vector546, vector547 -#endif -#if PPC_NUM_VECTORS > 548 - .weak vector548, vector549, vector550, vector551 -#endif -#if PPC_NUM_VECTORS > 552 - .weak vector552, vector553, vector554, vector555 -#endif -#if PPC_NUM_VECTORS > 556 - .weak vector556, vector557, vector558, vector559 -#endif -#if PPC_NUM_VECTORS > 560 - .weak vector560, vector561, vector562, vector563 -#endif -#if PPC_NUM_VECTORS > 564 - .weak vector564, vector565, vector566, vector567 -#endif -#if PPC_NUM_VECTORS > 568 - .weak vector568, vector569, vector570, vector571 -#endif -#if PPC_NUM_VECTORS > 572 - .weak vector572, vector573, vector574, vector575 -#endif -#if PPC_NUM_VECTORS > 576 - .weak vector576, vector577, vector578, vector579 -#endif -#if PPC_NUM_VECTORS > 580 - .weak vector580, vector581, vector582, vector583 -#endif -#if PPC_NUM_VECTORS > 584 - .weak vector584, vector585, vector586, vector587 -#endif -#if PPC_NUM_VECTORS > 588 - .weak vector588, vector589, vector590, vector591 -#endif -#if PPC_NUM_VECTORS > 592 - .weak vector592, vector593, vector594, vector595 -#endif -#if PPC_NUM_VECTORS > 596 - .weak vector596, vector597, vector598, vector599 -#endif -#if PPC_NUM_VECTORS > 600 - .weak vector600, vector601, vector602, vector603 -#endif -#if PPC_NUM_VECTORS > 604 - .weak vector604, vector605, vector606, vector607 -#endif -#if PPC_NUM_VECTORS > 608 - .weak vector608, vector609, vector610, vector611 -#endif -#if PPC_NUM_VECTORS > 612 - .weak vector612, vector613, vector614, vector615 -#endif -#if PPC_NUM_VECTORS > 616 - .weak vector616, vector617, vector618, vector619 -#endif -#if PPC_NUM_VECTORS > 620 - .weak vector620, vector621, vector622, vector623 -#endif -#if PPC_NUM_VECTORS > 624 - .weak vector624, vector625, vector626, vector627 -#endif -#if PPC_NUM_VECTORS > 628 - .weak vector628, vector629, vector630, vector631 -#endif -#if PPC_NUM_VECTORS > 632 - .weak vector632, vector633, vector634, vector635 -#endif -#if PPC_NUM_VECTORS > 636 - .weak vector636, vector637, vector638, vector639 -#endif -#if PPC_NUM_VECTORS > 640 - .weak vector640, vector641, vector642, vector643 -#endif -#if PPC_NUM_VECTORS > 644 - .weak vector644, vector645, vector646, vector647 -#endif -#if PPC_NUM_VECTORS > 648 - .weak vector648, vector649, vector650, vector651 -#endif -#if PPC_NUM_VECTORS > 652 - .weak vector652, vector653, vector654, vector655 -#endif -#if PPC_NUM_VECTORS > 656 - .weak vector656, vector657, vector658, vector659 -#endif -#if PPC_NUM_VECTORS > 660 - .weak vector660, vector661, vector662, vector663 -#endif -#if PPC_NUM_VECTORS > 664 - .weak vector664, vector665, vector666, vector667 -#endif -#if PPC_NUM_VECTORS > 668 - .weak vector668, vector669, vector670, vector671 -#endif -#if PPC_NUM_VECTORS > 672 - .weak vector672, vector673, vector674, vector675 -#endif -#if PPC_NUM_VECTORS > 676 - .weak vector676, vector677, vector678, vector679 -#endif -#if PPC_NUM_VECTORS > 680 - .weak vector680, vector681, vector682, vector683 -#endif -#if PPC_NUM_VECTORS > 684 - .weak vector684, vector685, vector686, vector687 -#endif -#if PPC_NUM_VECTORS > 688 - .weak vector688, vector689, vector690, vector691 -#endif -#if PPC_NUM_VECTORS > 692 - .weak vector692, vector693, vector694, vector695 -#endif -#if PPC_NUM_VECTORS > 696 - .weak vector696, vector697, vector698, vector699 -#endif -#if PPC_NUM_VECTORS > 700 - .weak vector700, vector701, vector702, vector703 -#endif -#if PPC_NUM_VECTORS > 704 - .weak vector704, vector705, vector706, vector707 -#endif -#if PPC_NUM_VECTORS > 708 - .weak vector708, vector709, vector710, vector711 -#endif -#if PPC_NUM_VECTORS > 712 - .weak vector712, vector713, vector714, vector715 -#endif -#if PPC_NUM_VECTORS > 716 - .weak vector716, vector717, vector718, vector719 -#endif -#if PPC_NUM_VECTORS > 720 - .weak vector720, vector721, vector722, vector723 -#endif -#if PPC_NUM_VECTORS > 724 - .weak vector724, vector725, vector726, vector727 -#endif -#if PPC_NUM_VECTORS > 728 - .weak vector728, vector729, vector730, vector731 -#endif -#if PPC_NUM_VECTORS > 732 - .weak vector732, vector733, vector734, vector735 -#endif -#if PPC_NUM_VECTORS > 736 - .weak vector736, vector737, vector738, vector739 -#endif -#if PPC_NUM_VECTORS > 740 - .weak vector740, vector741, vector742, vector743 -#endif -#if PPC_NUM_VECTORS > 744 - .weak vector744, vector745, vector746, vector747 -#endif -#if PPC_NUM_VECTORS > 748 - .weak vector748, vector749, vector750, vector751 -#endif -#if PPC_NUM_VECTORS > 752 - .weak vector752, vector753, vector754, vector755 -#endif -#if PPC_NUM_VECTORS > 756 - .weak vector756, vector757, vector758, vector759 -#endif -#if PPC_NUM_VECTORS > 760 - .weak vector760, vector761, vector762, vector763 -#endif -#if PPC_NUM_VECTORS > 764 - .weak vector764, vector765, vector766, vector767 -#endif -#if PPC_NUM_VECTORS > 768 - .weak vector768, vector769, vector770, vector771 -#endif -#if PPC_NUM_VECTORS > 772 - .weak vector772, vector773, vector774, vector775 -#endif -#if PPC_NUM_VECTORS > 776 - .weak vector776, vector777, vector778, vector779 -#endif -#if PPC_NUM_VECTORS > 780 - .weak vector780, vector781, vector782, vector783 -#endif -#if PPC_NUM_VECTORS > 784 - .weak vector784, vector785, vector786, vector787 -#endif -#if PPC_NUM_VECTORS > 788 - .weak vector788, vector789, vector790, vector791 -#endif -#if PPC_NUM_VECTORS > 792 - .weak vector792, vector793, vector794, vector795 -#endif -#if PPC_NUM_VECTORS > 796 - .weak vector796, vector797, vector798, vector799 -#endif -#if PPC_NUM_VECTORS > 800 - .weak vector800, vector801, vector802, vector803 -#endif -#if PPC_NUM_VECTORS > 804 - .weak vector804, vector805, vector806, vector807 -#endif -#if PPC_NUM_VECTORS > 808 - .weak vector808, vector809, vector810, vector811 -#endif -#if PPC_NUM_VECTORS > 812 - .weak vector812, vector813, vector814, vector815 -#endif -#if PPC_NUM_VECTORS > 816 - .weak vector816, vector817, vector818, vector819 -#endif -#if PPC_NUM_VECTORS > 820 - .weak vector820, vector821, vector822, vector823 -#endif -#if PPC_NUM_VECTORS > 824 - .weak vector824, vector825, vector826, vector827 -#endif -#if PPC_NUM_VECTORS > 828 - .weak vector828, vector829, vector830, vector831 -#endif -#if PPC_NUM_VECTORS > 832 - .weak vector832, vector833, vector834, vector835 -#endif -#if PPC_NUM_VECTORS > 836 - .weak vector836, vector837, vector838, vector839 -#endif -#if PPC_NUM_VECTORS > 840 - .weak vector840, vector841, vector842, vector843 -#endif -#if PPC_NUM_VECTORS > 844 - .weak vector844, vector845, vector846, vector847 -#endif -#if PPC_NUM_VECTORS > 848 - .weak vector848, vector849, vector850, vector851 -#endif -#if PPC_NUM_VECTORS > 852 - .weak vector852, vector853, vector854, vector855 -#endif -#if PPC_NUM_VECTORS > 856 - .weak vector856, vector857, vector858, vector859 -#endif -#if PPC_NUM_VECTORS > 860 - .weak vector860, vector861, vector862, vector863 -#endif -#if PPC_NUM_VECTORS > 864 - .weak vector864, vector865, vector866, vector867 -#endif -#if PPC_NUM_VECTORS > 868 - .weak vector868, vector869, vector870, vector871 -#endif -#if PPC_NUM_VECTORS > 872 - .weak vector872, vector873, vector874, vector875 -#endif -#if PPC_NUM_VECTORS > 876 - .weak vector876, vector877, vector878, vector879 -#endif -#if PPC_NUM_VECTORS > 880 - .weak vector880, vector881, vector882, vector883 -#endif -#if PPC_NUM_VECTORS > 884 - .weak vector884, vector885, vector886, vector887 -#endif -#if PPC_NUM_VECTORS > 888 - .weak vector888, vector889, vector890, vector891 -#endif -#if PPC_NUM_VECTORS > 892 - .weak vector892, vector893, vector894, vector895 -#endif -#if PPC_NUM_VECTORS > 896 - .weak vector896, vector897, vector898, vector899 -#endif -#if PPC_NUM_VECTORS > 900 - .weak vector900, vector901, vector902, vector903 -#endif -#if PPC_NUM_VECTORS > 904 - .weak vector904, vector905, vector906, vector907 -#endif -#if PPC_NUM_VECTORS > 908 - .weak vector908, vector909, vector910, vector911 -#endif -#if PPC_NUM_VECTORS > 912 - .weak vector912, vector913, vector914, vector915 -#endif -#if PPC_NUM_VECTORS > 916 - .weak vector916, vector917, vector918, vector919 -#endif -#if PPC_NUM_VECTORS > 920 - .weak vector920, vector921, vector922, vector923 -#endif -#if PPC_NUM_VECTORS > 924 - .weak vector924, vector925, vector926, vector927 -#endif -#if PPC_NUM_VECTORS > 928 - .weak vector928, vector929, vector930, vector931 -#endif -#if PPC_NUM_VECTORS > 932 - .weak vector932, vector933, vector934, vector935 -#endif -#if PPC_NUM_VECTORS > 936 - .weak vector936, vector937, vector938, vector939 -#endif -#if PPC_NUM_VECTORS > 940 - .weak vector940, vector941, vector942, vector943 -#endif -#if PPC_NUM_VECTORS > 944 - .weak vector944, vector945, vector946, vector947 -#endif -#if PPC_NUM_VECTORS > 948 - .weak vector948, vector949, vector950, vector951 -#endif -#if PPC_NUM_VECTORS > 952 - .weak vector952, vector953, vector954, vector955 -#endif -#if PPC_NUM_VECTORS > 956 - .weak vector956, vector957, vector958, vector959 -#endif -#if PPC_NUM_VECTORS > 960 - .weak vector960, vector961, vector962, vector963 -#endif -#if PPC_NUM_VECTORS > 964 - .weak vector964, vector965, vector966, vector967 -#endif -#if PPC_NUM_VECTORS > 968 - .weak vector968, vector969, vector970, vector971 -#endif -#if PPC_NUM_VECTORS > 972 - .weak vector972, vector973, vector974, vector975 -#endif -#if PPC_NUM_VECTORS > 976 - .weak vector976, vector977, vector978, vector979 -#endif -#if PPC_NUM_VECTORS > 980 - .weak vector980, vector981, vector982, vector983 -#endif -#if PPC_NUM_VECTORS > 984 - .weak vector984, vector985, vector986, vector987 -#endif -#if PPC_NUM_VECTORS > 988 - .weak vector988, vector989, vector990, vector991 -#endif -#if PPC_NUM_VECTORS > 992 - .weak vector992, vector993, vector994, vector995 -#endif -#if PPC_NUM_VECTORS > 996 - .weak vector996, vector997, vector998, vector999 -#endif -#if PPC_NUM_VECTORS > 1000 - .weak vector1000, vector1001, vector1002, vector1003 -#endif -#if PPC_NUM_VECTORS > 1004 - .weak vector1004, vector1005, vector1006, vector1007 -#endif -#if PPC_NUM_VECTORS > 1008 - .weak vector1008, vector1009, vector1010, vector1011 -#endif -#if PPC_NUM_VECTORS > 1012 - .weak vector1012, vector1013, vector1014, vector1015 -#endif -#if PPC_NUM_VECTORS > 1016 - .weak vector1016, vector1017, vector1018, vector1019 -#endif -#if PPC_NUM_VECTORS > 1020 - .weak vector1020, vector1021, vector1022, vector1023 -#endif - -vector0: -vector1: -vector2: -vector3: -vector4: -vector5: -vector6: -vector7: -vector8: -vector9: -vector10: -vector11: -vector12: -vector13: -vector14: -vector15: -vector16: -vector17: -vector18: -vector19: -vector20: -vector21: -vector22: -vector23: -vector24: -vector25: -vector26: -vector27: -vector28: -vector29: -vector30: -vector31: -vector32: -vector33: -vector34: -vector35: -vector36: -vector37: -vector38: -vector39: -vector40: -vector41: -vector42: -vector43: -vector44: -vector45: -vector46: -vector47: -vector48: -vector49: -vector50: -vector51: -vector52: -vector53: -vector54: -vector55: -vector56: -vector57: -vector58: -vector59: -vector60: -vector61: -vector62: -vector63: -vector64: -vector65: -vector66: -vector67: -vector68: -vector69: -vector70: -vector71: -vector72: -vector73: -vector74: -vector75: -vector76: -vector77: -vector78: -vector79: -vector80: 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-vector913: -vector914: -vector915: -vector916: -vector917: -vector918: -vector919: -vector920: -vector921: -vector922: -vector923: -vector924: -vector925: -vector926: -vector927: -vector928: -vector929: -vector930: -vector931: -vector932: -vector933: -vector934: -vector935: -vector936: -vector937: -vector938: -vector939: -vector940: -vector941: -vector942: -vector943: -vector944: -vector945: -vector946: -vector947: -vector948: -vector949: -vector950: -vector951: -vector952: -vector953: -vector954: -vector955: -vector956: -vector957: -vector958: -vector959: -vector960: -vector961: -vector962: -vector963: -vector964: -vector965: -vector966: -vector967: -vector968: -vector969: -vector970: -vector971: -vector972: -vector973: -vector974: -vector975: -vector976: -vector977: -vector978: -vector979: -vector980: -vector981: -vector982: -vector983: -vector984: -vector985: -vector986: -vector987: -vector988: -vector989: -vector990: -vector991: -vector992: -vector993: -vector994: -vector995: -vector996: -vector997: -vector998: -vector999: -vector1000: -vector1001: -vector1002: -vector1003: -vector1004: -vector1005: -vector1006: -vector1007: -vector1008: -vector1009: -vector1010: -vector1011: -vector1012: -vector1013: -vector1014: -vector1015: -vector1016: -vector1017: -vector1018: -vector1019: -vector1020: -vector1021: -vector1022: -vector1023: - b _unhandled_irq - - .weak _unhandled_irq - .type _unhandled_irq, @function -_unhandled_irq: - b _unhandled_irq - -#endif /* !defined(__DOXYGEN__) */ - -/** @} */ -- cgit v1.2.3