From 566bc155acac0ef8f2826920244713f10044f951 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Tue, 16 Feb 2016 09:53:03 +0000 Subject: Start of tree reorganization. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8897 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.s | 259 +++++++++ os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.s | 322 +++++++++++ os/common/startup/ARMCMx/compilers/GCC/crt1.c | 221 +++++++ .../startup/ARMCMx/compilers/GCC/ld/KL25Z128.ld | 392 +++++++++++++ .../startup/ARMCMx/compilers/GCC/ld/MK20DX128.ld | 392 +++++++++++++ .../startup/ARMCMx/compilers/GCC/ld/STM32F030x4.ld | 53 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F030x6.ld | 53 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F030x8.ld | 53 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F031x6.ld | 53 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F042x6.ld | 53 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F051x8.ld | 53 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F072xB.ld | 53 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F091xC.ld | 53 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F100xB.ld | 53 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F103x8.ld | 53 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F103xB.ld | 53 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F103xD.ld | 53 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F103xE.ld | 53 ++ .../GCC/ld/STM32F103xE_maplemini_bootloader.ld | 56 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F103xG.ld | 53 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F107xC.ld | 53 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F207xG.ld | 54 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F302x8.ld | 53 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F303x8.ld | 53 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F303xC.ld | 53 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F334x8.ld | 53 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F373xC.ld | 53 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F401xC.ld | 53 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F401xE.ld | 53 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F405xG.ld | 53 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F407xG.ld | 54 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F411xC.ld | 53 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F411xE.ld | 53 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F429xI.ld | 54 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F746xG.ld | 66 +++ .../ARMCMx/compilers/GCC/ld/STM32F746xG_ETH.ld | 66 +++ .../ARMCMx/compilers/GCC/ld/STM32F746xG_MAX.ld | 68 +++ .../startup/ARMCMx/compilers/GCC/ld/STM32L052x6.ld | 53 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32L052x8.ld | 53 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32L053x8.ld | 53 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32L151x6.ld | 53 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32L152xB.ld | 53 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32L152xE.ld | 53 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32L476xG.ld | 53 ++ .../ARMCMx/compilers/GCC/ld/rules_STM32F7xx.ld | 394 +++++++++++++ .../ARMCMx/compilers/GCC/mk/startup_k20x.mk | 12 + .../ARMCMx/compilers/GCC/mk/startup_kl2x.mk | 12 + .../ARMCMx/compilers/GCC/mk/startup_stm32f0xx.mk | 12 + .../ARMCMx/compilers/GCC/mk/startup_stm32f1xx.mk | 12 + .../ARMCMx/compilers/GCC/mk/startup_stm32f2xx.mk | 12 + .../ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk | 12 + .../ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk | 12 + .../ARMCMx/compilers/GCC/mk/startup_stm32f7xx.mk | 12 + .../ARMCMx/compilers/GCC/mk/startup_stm32l0xx.mk | 12 + .../ARMCMx/compilers/GCC/mk/startup_stm32l1xx.mk | 12 + .../ARMCMx/compilers/GCC/mk/startup_stm32l4xx.mk | 12 + os/common/startup/ARMCMx/compilers/GCC/rules.ld | 362 ++++++++++++ os/common/startup/ARMCMx/compilers/GCC/rules.mk | 307 ++++++++++ os/common/startup/ARMCMx/compilers/GCC/vectors.c | 632 +++++++++++++++++++++ os/common/startup/ARMCMx/compilers/GCC/vectors.h | 105 ++++ 60 files changed, 5632 insertions(+) create mode 100644 os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.s create mode 100644 os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.s create mode 100644 os/common/startup/ARMCMx/compilers/GCC/crt1.c create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/KL25Z128.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F030x4.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F030x6.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F030x8.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F031x6.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F042x6.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F051x8.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F072xB.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F091xC.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F100xB.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103x8.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xB.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xD.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xE.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xE_maplemini_bootloader.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xG.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F107xC.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F207xG.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F302x8.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F303x8.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F303xC.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F334x8.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F373xC.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F401xC.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F401xE.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F405xG.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F407xG.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F411xC.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F411xE.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F429xI.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F746xG.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F746xG_ETH.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32F746xG_MAX.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32L052x6.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32L052x8.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32L053x8.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32L151x6.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32L152xB.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32L152xE.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/STM32L476xG.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/ld/rules_STM32F7xx.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x.mk create mode 100644 os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk create mode 100644 os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f0xx.mk create mode 100644 os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f1xx.mk create mode 100644 os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f2xx.mk create mode 100644 os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk create mode 100644 os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk create mode 100644 os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f7xx.mk create mode 100644 os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l0xx.mk create mode 100644 os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l1xx.mk create mode 100644 os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l4xx.mk create mode 100644 os/common/startup/ARMCMx/compilers/GCC/rules.ld create mode 100644 os/common/startup/ARMCMx/compilers/GCC/rules.mk create mode 100644 os/common/startup/ARMCMx/compilers/GCC/vectors.c create mode 100644 os/common/startup/ARMCMx/compilers/GCC/vectors.h (limited to 'os/common/startup/ARMCMx/compilers/GCC') diff --git a/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.s b/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.s new file mode 100644 index 000000000..c3ca9faa5 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.s @@ -0,0 +1,259 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file crt0_v6m.s + * @brief Generic ARMv6-M (Cortex-M0/M1) startup file for ChibiOS. + * + * @addtogroup ARMCMx_GCC_STARTUP_V6M + * @{ + */ + +/*===========================================================================*/ +/* Module constants. */ +/*===========================================================================*/ + +#if !defined(FALSE) || defined(__DOXYGEN__) +#define FALSE 0 +#endif + +#if !defined(TRUE) || defined(__DOXYGEN__) +#define TRUE 1 +#endif + +#define CONTROL_MODE_PRIVILEGED 0 +#define CONTROL_MODE_UNPRIVILEGED 1 +#define CONTROL_USE_MSP 0 +#define CONTROL_USE_PSP 2 + +/*===========================================================================*/ +/* Module pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @brief Control special register initialization value. + * @details The system is setup to run in privileged mode using the PSP + * stack (dual stack mode). + */ +#if !defined(CRT0_CONTROL_INIT) || defined(__DOXYGEN__) +#define CRT0_CONTROL_INIT (CONTROL_USE_PSP | \ + CONTROL_MODE_PRIVILEGED) +#endif + +/** + * @brief Core initialization switch. + */ +#if !defined(CRT0_INIT_CORE) || defined(__DOXYGEN__) +#define CRT0_INIT_CORE TRUE +#endif + +/** + * @brief Stack segments initialization switch. + */ +#if !defined(CRT0_STACKS_FILL_PATTERN) || defined(__DOXYGEN__) +#define CRT0_STACKS_FILL_PATTERN 0x55555555 +#endif + +/** + * @brief Stack segments initialization switch. + */ +#if !defined(CRT0_INIT_STACKS) || defined(__DOXYGEN__) +#define CRT0_INIT_STACKS TRUE +#endif + +/** + * @brief DATA segment initialization switch. + */ +#if !defined(CRT0_INIT_DATA) || defined(__DOXYGEN__) +#define CRT0_INIT_DATA TRUE +#endif + +/** + * @brief BSS segment initialization switch. + */ +#if !defined(CRT0_INIT_BSS) || defined(__DOXYGEN__) +#define CRT0_INIT_BSS TRUE +#endif + +/** + * @brief RAM areas initialization switch. + */ +#if !defined(CRT0_INIT_RAM_AREAS) || defined(__DOXYGEN__) +#define CRT0_INIT_RAM_AREAS TRUE +#endif + +/** + * @brief Constructors invocation switch. + */ +#if !defined(CRT0_CALL_CONSTRUCTORS) || defined(__DOXYGEN__) +#define CRT0_CALL_CONSTRUCTORS TRUE +#endif + +/** + * @brief Destructors invocation switch. + */ +#if !defined(CRT0_CALL_DESTRUCTORS) || defined(__DOXYGEN__) +#define CRT0_CALL_DESTRUCTORS TRUE +#endif + +/*===========================================================================*/ +/* Code section. */ +/*===========================================================================*/ + +#if !defined(__DOXYGEN__) + + .cpu cortex-m0 + .fpu softvfp + + .thumb + .text + +/* + * Reset handler. + */ + .align 2 + .thumb_func + .global Reset_Handler +Reset_Handler: + /* Interrupts are globally masked initially.*/ + cpsid i + + /* PSP stack pointers initialization.*/ + ldr r0, =__process_stack_end__ + msr PSP, r0 + + /* CPU mode initialization as configured.*/ + movs r0, #CRT0_CONTROL_INIT + msr CONTROL, r0 + isb + +#if CRT0_INIT_CORE == TRUE + /* Core initialization.*/ + bl __core_init +#endif + + /* Early initialization..*/ + bl __early_init + +#if CRT0_INIT_STACKS == TRUE + ldr r0, =CRT0_STACKS_FILL_PATTERN + /* Main Stack initialization. Note, it assumes that the + stack size is a multiple of 4 so the linker file must + ensure this.*/ + ldr r1, =__main_stack_base__ + ldr r2, =__main_stack_end__ +msloop: + cmp r1, r2 + bge endmsloop + str r0, [r1] + add r1, r1, #4 + b msloop +endmsloop: + /* Process Stack initialization. Note, it assumes that the + stack size is a multiple of 4 so the linker file must + ensure this.*/ + ldr r1, =__process_stack_base__ + ldr r2, =__process_stack_end__ +psloop: + cmp r1, r2 + bge endpsloop + str r0, [r1] + add r1, r1, #4 + b psloop +endpsloop: +#endif + +#if CRT0_INIT_DATA == TRUE + /* Data initialization. Note, it assumes that the DATA size + is a multiple of 4 so the linker file must ensure this.*/ + ldr r1, =_textdata + ldr r2, =_data + ldr r3, =_edata +dloop: + cmp r2, r3 + bge enddloop + ldr r0, [r1] + str r0, [r2] + add r1, r1, #4 + add r2, r2, #4 + b dloop +enddloop: +#endif + +#if CRT0_INIT_BSS == TRUE + /* BSS initialization. Note, it assumes that the DATA size + is a multiple of 4 so the linker file must ensure this.*/ + movs r0, #0 + ldr r1, =_bss_start + ldr r2, =_bss_end +bloop: + cmp r1, r2 + bge endbloop + str r0, [r1] + add r1, r1, #4 + b bloop +endbloop: +#endif + +#if CRT0_INIT_RAM_AREAS == TRUE + /* RAM areas initialization.*/ + bl __init_ram_areas +#endif + + /* Late initialization..*/ + bl __late_init + +#if CRT0_CALL_CONSTRUCTORS == TRUE + /* Constructors invocation.*/ + ldr r4, =__init_array_start + ldr r5, =__init_array_end +initloop: + cmp r4, r5 + bge endinitloop + ldr r1, [r4] + blx r1 + add r4, r4, #4 + b initloop +endinitloop: +#endif + + /* Main program invocation, r0 contains the returned value.*/ + bl main + +#if CRT0_CALL_DESTRUCTORS == TRUE + /* Destructors invocation.*/ + ldr r4, =__fini_array_start + ldr r5, =__fini_array_end +finiloop: + cmp r4, r5 + bge endfiniloop + ldr r1, [r4] + blx r1 + add r4, r4, #4 + b finiloop +endfiniloop: +#endif + + /* Branching to the defined exit handler.*/ + ldr r1, =__default_exit + bx r1 + +#endif + +/** @} */ diff --git a/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.s b/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.s new file mode 100644 index 000000000..c7792f954 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.s @@ -0,0 +1,322 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file crt0_v7m.s + * @brief Generic ARMv7-M (Cortex-M3/M4/M7) startup file for ChibiOS. + * + * @addtogroup ARMCMx_GCC_STARTUP_V7M + * @{ + */ + +/*===========================================================================*/ +/* Module constants. */ +/*===========================================================================*/ + +#if !defined(FALSE) || defined(__DOXYGEN__) +#define FALSE 0 +#endif + +#if !defined(TRUE) || defined(__DOXYGEN__) +#define TRUE 1 +#endif + +#define CONTROL_MODE_PRIVILEGED 0 +#define CONTROL_MODE_UNPRIVILEGED 1 +#define CONTROL_USE_MSP 0 +#define CONTROL_USE_PSP 2 +#define CONTROL_FPCA 4 + +#define FPCCR_ASPEN (1 << 31) +#define FPCCR_LSPEN (1 << 30) + +#define SCB_CPACR 0xE000ED88 +#define SCB_FPCCR 0xE000EF34 +#define SCB_FPDSCR 0xE000EF3C + +/*===========================================================================*/ +/* Module pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @brief FPU initialization switch. + */ +#if !defined(CRT0_INIT_FPU) || defined(__DOXYGEN__) +#if defined(CORTEX_USE_FPU) || defined(__DOXYGEN__) +#define CRT0_INIT_FPU CORTEX_USE_FPU +#else +#define CRT0_INIT_FPU FALSE +#endif +#endif + +/** + * @brief Control special register initialization value. + * @details The system is setup to run in privileged mode using the PSP + * stack (dual stack mode). + */ +#if !defined(CRT0_CONTROL_INIT) || defined(__DOXYGEN__) +#define CRT0_CONTROL_INIT (CONTROL_USE_PSP | \ + CONTROL_MODE_PRIVILEGED) +#endif + +/** + * @brief Core initialization switch. + */ +#if !defined(CRT0_INIT_CORE) || defined(__DOXYGEN__) +#define CRT0_INIT_CORE TRUE +#endif + +/** + * @brief Stack segments initialization switch. + */ +#if !defined(CRT0_STACKS_FILL_PATTERN) || defined(__DOXYGEN__) +#define CRT0_STACKS_FILL_PATTERN 0x55555555 +#endif + +/** + * @brief Stack segments initialization switch. + */ +#if !defined(CRT0_INIT_STACKS) || defined(__DOXYGEN__) +#define CRT0_INIT_STACKS TRUE +#endif + +/** + * @brief DATA segment initialization switch. + */ +#if !defined(CRT0_INIT_DATA) || defined(__DOXYGEN__) +#define CRT0_INIT_DATA TRUE +#endif + +/** + * @brief BSS segment initialization switch. + */ +#if !defined(CRT0_INIT_BSS) || defined(__DOXYGEN__) +#define CRT0_INIT_BSS TRUE +#endif + +/** + * @brief RAM areas initialization switch. + */ +#if !defined(CRT0_INIT_RAM_AREAS) || defined(__DOXYGEN__) +#define CRT0_INIT_RAM_AREAS TRUE +#endif + +/** + * @brief Constructors invocation switch. + */ +#if !defined(CRT0_CALL_CONSTRUCTORS) || defined(__DOXYGEN__) +#define CRT0_CALL_CONSTRUCTORS TRUE +#endif + +/** + * @brief Destructors invocation switch. + */ +#if !defined(CRT0_CALL_DESTRUCTORS) || defined(__DOXYGEN__) +#define CRT0_CALL_DESTRUCTORS TRUE +#endif + +/** + * @brief FPU FPCCR register initialization value. + * @note Only used if @p CRT0_INIT_FPU is equal to @p TRUE. + */ +#if !defined(CRT0_FPCCR_INIT) || defined(__DOXYGEN__) +#define CRT0_FPCCR_INIT (FPCCR_ASPEN | FPCCR_LSPEN) +#endif + +/** + * @brief CPACR register initialization value. + * @note Only used if @p CRT0_INIT_FPU is equal to @p TRUE. + */ +#if !defined(CRT0_CPACR_INIT) || defined(__DOXYGEN__) +#define CRT0_CPACR_INIT 0x00F00000 +#endif + +/*===========================================================================*/ +/* Code section. */ +/*===========================================================================*/ + +#if !defined(__DOXYGEN__) + + .syntax unified + .cpu cortex-m3 +#if CRT0_INIT_FPU == TRUE + .fpu fpv4-sp-d16 +#else + .fpu softvfp +#endif + + .thumb + .text + +/* + * Reset handler. + */ + .align 2 + .thumb_func + .global Reset_Handler +Reset_Handler: + /* Interrupts are globally masked initially.*/ + cpsid i + + /* PSP stack pointers initialization.*/ + ldr r0, =__process_stack_end__ + msr PSP, r0 + +#if CRT0_INIT_FPU == TRUE + /* FPU FPCCR initialization.*/ + movw r0, #CRT0_FPCCR_INIT & 0xFFFF + movt r0, #CRT0_FPCCR_INIT >> 16 + movw r1, #SCB_FPCCR & 0xFFFF + movt r1, #SCB_FPCCR >> 16 + str r0, [r1] + dsb + isb + + /* CPACR initialization.*/ + movw r0, #CRT0_CPACR_INIT & 0xFFFF + movt r0, #CRT0_CPACR_INIT >> 16 + movw r1, #SCB_CPACR & 0xFFFF + movt r1, #SCB_CPACR >> 16 + str r0, [r1] + dsb + isb + + /* FPU FPSCR initially cleared.*/ + mov r0, #0 + vmsr FPSCR, r0 + + /* FPU FPDSCR initially cleared.*/ + movw r1, #SCB_FPDSCR & 0xFFFF + movt r1, #SCB_FPDSCR >> 16 + str r0, [r1] + + /* Enforcing FPCA bit in the CONTROL register.*/ + movs r0, #CRT0_CONTROL_INIT | CONTROL_FPCA + +#else + movs r0, #CRT0_CONTROL_INIT +#endif + + /* CONTROL register initialization as configured.*/ + msr CONTROL, r0 + isb + +#if CRT0_INIT_CORE == TRUE + /* Core initialization.*/ + bl __core_init +#endif + + /* Early initialization.*/ + bl __early_init + +#if CRT0_INIT_STACKS == TRUE + ldr r0, =CRT0_STACKS_FILL_PATTERN + /* Main Stack initialization. Note, it assumes that the + stack size is a multiple of 4 so the linker file must + ensure this.*/ + ldr r1, =__main_stack_base__ + ldr r2, =__main_stack_end__ +msloop: + cmp r1, r2 + itt lo + strlo r0, [r1], #4 + blo msloop + + /* Process Stack initialization. Note, it assumes that the + stack size is a multiple of 4 so the linker file must + ensure this.*/ + ldr r1, =__process_stack_base__ + ldr r2, =__process_stack_end__ +psloop: + cmp r1, r2 + itt lo + strlo r0, [r1], #4 + blo psloop +#endif + +#if CRT0_INIT_DATA == TRUE + /* Data initialization. Note, it assumes that the DATA size + is a multiple of 4 so the linker file must ensure this.*/ + ldr r1, =_textdata_start + ldr r2, =_data_start + ldr r3, =_data_end +dloop: + cmp r2, r3 + ittt lo + ldrlo r0, [r1], #4 + strlo r0, [r2], #4 + blo dloop +#endif + +#if CRT0_INIT_BSS == TRUE + /* BSS initialization. Note, it assumes that the DATA size + is a multiple of 4 so the linker file must ensure this.*/ + movs r0, #0 + ldr r1, =_bss_start + ldr r2, =_bss_end +bloop: + cmp r1, r2 + itt lo + strlo r0, [r1], #4 + blo bloop +#endif + +#if CRT0_INIT_RAM_AREAS == TRUE + /* RAM areas initialization.*/ + bl __init_ram_areas +#endif + + /* Late initialization..*/ + bl __late_init + +#if CRT0_CALL_CONSTRUCTORS == TRUE + /* Constructors invocation.*/ + ldr r4, =__init_array_start + ldr r5, =__init_array_end +initloop: + cmp r4, r5 + bge endinitloop + ldr r1, [r4], #4 + blx r1 + b initloop +endinitloop: +#endif + + /* Main program invocation, r0 contains the returned value.*/ + bl main + +#if CRT0_CALL_DESTRUCTORS == TRUE + /* Destructors invocation.*/ + ldr r4, =__fini_array_start + ldr r5, =__fini_array_end +finiloop: + cmp r4, r5 + bge endfiniloop + ldr r1, [r4], #4 + blx r1 + b finiloop +endfiniloop: +#endif + + /* Branching to the defined exit handler.*/ + b __default_exit + +#endif /* !defined(__DOXYGEN__) */ + +/** @} */ diff --git a/os/common/startup/ARMCMx/compilers/GCC/crt1.c b/os/common/startup/ARMCMx/compilers/GCC/crt1.c new file mode 100644 index 000000000..c47214e39 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/crt1.c @@ -0,0 +1,221 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file ARMCMx/compilers/GCC/crt1.c + * @brief Startup stub functions. + * + * @addtogroup ARMCMx_GCC_STARTUP + * @{ + */ + +#include + +#include "cmparams.h" + +/*===========================================================================*/ +/* Module local definitions. */ +/*===========================================================================*/ + +#if !defined(CRT1_AREAS_NUMBER) || defined(__DOXYGEN__) +#define CRT1_AREAS_NUMBER 8 +#endif + +#if (CRT1_AREAS_NUMBER < 0) || (CRT1_AREAS_NUMBER > 8) +#error "CRT1_AREAS_NUMBER must be within 0 and 8" +#endif + +/*===========================================================================*/ +/* Module exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module local types. */ +/*===========================================================================*/ + +/** + * @brief Type of an area to be initialized. + */ +typedef struct { + uint32_t *init_text_area; + uint32_t *init_area; + uint32_t *clear_area; + uint32_t *no_init_area; +} ram_init_area_t; + +/*===========================================================================*/ +/* Module local variables. */ +/*===========================================================================*/ + +#if (CRT1_AREAS_NUMBER > 0) || defined(__DOXYGEN__) +extern uint32_t __ram0_init_text__, __ram0_init__, __ram0_clear__, __ram0_noinit__; +#endif +#if (CRT1_AREAS_NUMBER > 1) || defined(__DOXYGEN__) +extern uint32_t __ram1_init_text__, __ram1_init__, __ram1_clear__, __ram1_noinit__; +#endif +#if (CRT1_AREAS_NUMBER > 2) || defined(__DOXYGEN__) +extern uint32_t __ram2_init_text__, __ram2_init__, __ram2_clear__, __ram2_noinit__; +#endif +#if (CRT1_AREAS_NUMBER > 3) || defined(__DOXYGEN__) +extern uint32_t __ram3_init_text__, __ram3_init__, __ram3_clear__, __ram3_noinit__; +#endif +#if (CRT1_AREAS_NUMBER > 4) || defined(__DOXYGEN__) +extern uint32_t __ram4_init_text__, __ram4_init__, __ram4_clear__, __ram4_noinit__; +#endif +#if (CRT1_AREAS_NUMBER > 5) || defined(__DOXYGEN__) +extern uint32_t __ram5_init_text__, __ram5_init__, __ram5_clear__, __ram5_noinit__; +#endif +#if (CRT1_AREAS_NUMBER > 6) || defined(__DOXYGEN__) +extern uint32_t __ram6_init_text__, __ram6_init__, __ram6_clear__, __ram6_noinit__; +#endif +#if (CRT1_AREAS_NUMBER > 7) || defined(__DOXYGEN__) +extern uint32_t __ram7_init_text__, __ram7_init__, __ram7_clear__, __ram7_noinit__; +#endif + +/** + * @brief Static table of areas to be initialized. + */ +#if (CRT1_AREAS_NUMBER > 0) || defined(__DOXYGEN__) +static const ram_init_area_t ram_areas[CRT1_AREAS_NUMBER] = { + {&__ram0_init_text__, &__ram0_init__, &__ram0_clear__, &__ram0_noinit__}, +#if (CRT1_AREAS_NUMBER > 1) || defined(__DOXYGEN__) + {&__ram1_init_text__, &__ram1_init__, &__ram1_clear__, &__ram1_noinit__}, +#endif +#if (CRT1_AREAS_NUMBER > 2) || defined(__DOXYGEN__) + {&__ram2_init_text__, &__ram2_init__, &__ram2_clear__, &__ram2_noinit__}, +#endif +#if (CRT1_AREAS_NUMBER > 3) || defined(__DOXYGEN__) + {&__ram3_init_text__, &__ram3_init__, &__ram3_clear__, &__ram3_noinit__}, +#endif +#if (CRT1_AREAS_NUMBER > 4) || defined(__DOXYGEN__) + {&__ram4_init_text__, &__ram4_init__, &__ram4_clear__, &__ram4_noinit__}, +#endif +#if (CRT1_AREAS_NUMBER > 5) || defined(__DOXYGEN__) + {&__ram5_init_text__, &__ram5_init__, &__ram5_clear__, &__ram5_noinit__}, +#endif +#if (CRT1_AREAS_NUMBER > 6) || defined(__DOXYGEN__) + {&__ram6_init_text__, &__ram6_init__, &__ram6_clear__, &__ram6_noinit__}, +#endif +#if (CRT1_AREAS_NUMBER > 7) || defined(__DOXYGEN__) + {&__ram7_init_text__, &__ram7_init__, &__ram7_clear__, &__ram7_noinit__}, +#endif +}; +#endif + +/*===========================================================================*/ +/* Module local functions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module exported functions. */ +/*===========================================================================*/ + +/** + * @brief Architecture-dependent core initialization. + * @details This hook is invoked immediately after the stack initialization + * and before the DATA and BSS segments initialization. + * @note This function is a weak symbol. + */ +#if !defined(__DOXYGEN__) +__attribute__((weak)) +#endif +/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/ +void __core_init(void) { + +#if __CORTEX_M == 7 + SCB_EnableICache(); + SCB_EnableDCache(); +#endif +} + +/** + * @brief Early initialization. + * @details This hook is invoked immediately after the stack and core + * initialization and before the DATA and BSS segments + * initialization. + * @note This function is a weak symbol. + */ +#if !defined(__DOXYGEN__) +__attribute__((weak)) +#endif +/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/ +void __early_init(void) {} +/*lint -restore*/ + +/** + * @brief Late initialization. + * @details This hook is invoked after the DATA and BSS segments + * initialization and before any static constructor. The + * default behavior is to do nothing. + * @note This function is a weak symbol. + */ +#if !defined(__DOXYGEN__) +__attribute__((weak)) +#endif +/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/ +void __late_init(void) {} +/*lint -restore*/ + +/** + * @brief Default @p main() function exit handler. + * @details This handler is invoked or the @p main() function exit. The + * default behavior is to enter an infinite loop. + * @note This function is a weak symbol. + */ +#if !defined(__DOXYGEN__) +__attribute__((noreturn, weak)) +#endif +/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/ +void __default_exit(void) { +/*lint -restore*/ + + while (true) { + } +} + +/** + * @brief Performs the initialization of the various RAM areas. + */ +void __init_ram_areas(void) { + const ram_init_area_t *rap = ram_areas; + +#if CRT1_AREAS_NUMBER > 0 + do { + uint32_t *tp = rap->init_text_area; + uint32_t *p = rap->init_area; + + /* Copying initialization data.*/ + while (p < rap->clear_area) { + *p = *tp; + p++; + tp++; + } + + /* Zeroing clear area.*/ + while (p < rap->no_init_area) { + *p = 0; + p++; + } + rap++; + } + while (rap < &ram_areas[CRT1_AREAS_NUMBER]); +#endif +} + +/** @} */ diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/KL25Z128.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/KL25Z128.ld new file mode 100644 index 000000000..b0d6def1e --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/KL25Z128.ld @@ -0,0 +1,392 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * KL25Z128 memory setup. + */ +MEMORY +{ + flash0 : org = 0x00000000, len = 0x100 + flashcfg : org = 0x00000400, len = 0x10 + flash : org = 0x00000410, len = 128k - 0x410 + ram0 : org = 0x1FFFF000, len = 16k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +REGION_ALIAS("MAIN_STACK_RAM", ram0); +REGION_ALIAS("PROCESS_STACK_RAM", ram0); +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("BSS_RAM", ram0); +REGION_ALIAS("HEAP_RAM", ram0); + +__ram0_start__ = ORIGIN(ram0); +__ram0_size__ = LENGTH(ram0); +__ram0_end__ = __ram0_start__ + __ram0_size__; +__ram1_start__ = ORIGIN(ram1); +__ram1_size__ = LENGTH(ram1); +__ram1_end__ = __ram1_start__ + __ram1_size__; +__ram2_start__ = ORIGIN(ram2); +__ram2_size__ = LENGTH(ram2); +__ram2_end__ = __ram2_start__ + __ram2_size__; +__ram3_start__ = ORIGIN(ram3); +__ram3_size__ = LENGTH(ram3); +__ram3_end__ = __ram3_start__ + __ram3_size__; +__ram4_start__ = ORIGIN(ram4); +__ram4_size__ = LENGTH(ram4); +__ram4_end__ = __ram4_start__ + __ram4_size__; +__ram5_start__ = ORIGIN(ram5); +__ram5_size__ = LENGTH(ram5); +__ram5_end__ = __ram5_start__ + __ram5_size__; +__ram6_start__ = ORIGIN(ram6); +__ram6_size__ = LENGTH(ram6); +__ram6_end__ = __ram6_start__ + __ram6_size__; +__ram7_start__ = ORIGIN(ram7); +__ram7_size__ = LENGTH(ram7); +__ram7_end__ = __ram7_start__ + __ram7_size__; + +ENTRY(Reset_Handler) + +SECTIONS +{ + . = 0; + + startup : ALIGN(16) SUBALIGN(16) + { + KEEP(*(.vectors)) + } > flash0 + + .cfmprotect : ALIGN(4) SUBALIGN(4) + { + KEEP(*(.cfmconfig)) + } > flashcfg + + _text = .; + + constructors : ALIGN(4) SUBALIGN(4) + { + __init_array_start = .; + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + __init_array_end = .; + } > flash + + destructors : ALIGN(4) SUBALIGN(4) + { + __fini_array_start = .; + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + __fini_array_end = .; + } > flash + + .text : ALIGN(16) SUBALIGN(16) + { + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > flash + + .ARM.exidx : { + __exidx_start = .; + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + __exidx_end = .; + } > flash + + .eh_frame_hdr : + { + *(.eh_frame_hdr) + } > flash + + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash + + .textalign : ONLY_IF_RO + { + . = ALIGN(8); + } > flash + + /* Legacy symbol, not used anywhere.*/ + . = ALIGN(4); + PROVIDE(_etext = .); + + /* Special section for exceptions stack.*/ + .mstack : + { + . = ALIGN(8); + __main_stack_base__ = .; + . += __main_stack_size__; + . = ALIGN(8); + __main_stack_end__ = .; + } > MAIN_STACK_RAM + + /* Special section for process stack.*/ + .pstack : + { + __process_stack_base__ = .; + __main_thread_stack_base__ = .; + . += __process_stack_size__; + . = ALIGN(8); + __process_stack_end__ = .; + __main_thread_stack_end__ = .; + } > PROCESS_STACK_RAM + + .data : ALIGN(4) + { + . = ALIGN(4); + PROVIDE(_textdata = LOADADDR(.data)); + PROVIDE(_data = .); + _textdata_start = LOADADDR(.data); + _data_start = .; + *(.data) + *(.data.*) + *(.ramtext) + . = ALIGN(4); + PROVIDE(_edata = .); + _data_end = .; + } > DATA_RAM AT > flash + + .bss (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + _bss_start = .; + *(.bss) + *(.bss.*) + *(COMMON) + . = ALIGN(4); + _bss_end = .; + PROVIDE(end = .); + } > BSS_RAM + + .ram0_init : ALIGN(4) + { + . = ALIGN(4); + __ram0_init_text__ = LOADADDR(.ram0_init); + __ram0_init__ = .; + *(.ram0_init) + *(.ram0_init.*) + . = ALIGN(4); + } > ram0 AT > flash + + .ram0 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram0_clear__ = .; + *(.ram0_clear) + *(.ram0_clear.*) + . = ALIGN(4); + __ram0_noinit__ = .; + *(.ram0) + *(.ram0.*) + . = ALIGN(4); + __ram0_free__ = .; + } > ram0 + + .ram1_init : ALIGN(4) + { + . = ALIGN(4); + __ram1_init_text__ = LOADADDR(.ram1_init); + __ram1_init__ = .; + *(.ram1_init) + *(.ram1_init.*) + . = ALIGN(4); + } > ram1 AT > flash + + .ram1 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram1_clear__ = .; + *(.ram1_clear) + *(.ram1_clear.*) + . = ALIGN(4); + __ram1_noinit__ = .; + *(.ram1) + *(.ram1.*) + . = ALIGN(4); + __ram1_free__ = .; + } > ram1 + + .ram2_init : ALIGN(4) + { + . = ALIGN(4); + __ram2_init_text__ = LOADADDR(.ram2_init); + __ram2_init__ = .; + *(.ram2_init) + *(.ram2_init.*) + . = ALIGN(4); + } > ram2 AT > flash + + .ram2 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram2_clear__ = .; + *(.ram2_clear) + *(.ram2_clear.*) + . = ALIGN(4); + __ram2_noinit__ = .; + *(.ram2) + *(.ram2.*) + . = ALIGN(4); + __ram2_free__ = .; + } > ram2 + + .ram3_init : ALIGN(4) + { + . = ALIGN(4); + __ram3_init_text__ = LOADADDR(.ram3_init); + __ram3_init__ = .; + *(.ram3_init) + *(.ram3_init.*) + . = ALIGN(4); + } > ram3 AT > flash + + .ram3 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram3_clear__ = .; + *(.ram3_clear) + *(.ram3_clear.*) + . = ALIGN(4); + __ram3_noinit__ = .; + *(.ram3) + *(.ram3.*) + . = ALIGN(4); + __ram3_free__ = .; + } > ram3 + + .ram4_init : ALIGN(4) + { + . = ALIGN(4); + __ram4_init_text__ = LOADADDR(.ram4_init); + __ram4_init__ = .; + *(.ram4_init) + *(.ram4_init.*) + . = ALIGN(4); + } > ram4 AT > flash + + .ram4 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram4_clear__ = .; + *(.ram4_clear) + *(.ram4_clear.*) + . = ALIGN(4); + __ram4_noinit__ = .; + *(.ram4) + *(.ram4.*) + . = ALIGN(4); + __ram4_free__ = .; + } > ram4 + + .ram5_init : ALIGN(4) + { + . = ALIGN(4); + __ram5_init_text__ = LOADADDR(.ram5_init); + __ram5_init__ = .; + *(.ram5_init) + *(.ram5_init.*) + . = ALIGN(4); + } > ram5 AT > flash + + .ram5 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram5_clear__ = .; + *(.ram5_clear) + *(.ram5_clear.*) + . = ALIGN(4); + __ram5_noinit__ = .; + *(.ram5) + *(.ram5.*) + . = ALIGN(4); + __ram5_free__ = .; + } > ram5 + + .ram6_init : ALIGN(4) + { + . = ALIGN(4); + __ram6_init_text__ = LOADADDR(.ram6_init); + __ram6_init__ = .; + *(.ram6_init) + *(.ram6_init.*) + . = ALIGN(4); + } > ram6 AT > flash + + .ram6 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram6_clear__ = .; + *(.ram6_clear) + *(.ram6_clear.*) + . = ALIGN(4); + __ram6_noinit__ = .; + *(.ram6) + *(.ram6.*) + . = ALIGN(4); + __ram6_free__ = .; + } > ram6 + + .ram7_init : ALIGN(4) + { + . = ALIGN(4); + __ram7_init_text__ = LOADADDR(.ram7_init); + __ram7_init__ = .; + *(.ram7_init) + *(.ram7_init.*) + . = ALIGN(4); + } > ram7 AT > flash + + .ram7 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram7_clear__ = .; + *(.ram7_clear) + *(.ram7_clear.*) + . = ALIGN(4); + __ram7_noinit__ = .; + *(.ram7) + *(.ram7.*) + . = ALIGN(4); + __ram7_free__ = .; + } > ram7 + + /* The default heap uses the (statically) unused part of a RAM section.*/ + .heap (NOLOAD) : + { + . = ALIGN(8); + __heap_base__ = .; + . = ORIGIN(HEAP_RAM) + LENGTH(HEAP_RAM); + __heap_end__ = .; + } > HEAP_RAM +} diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128.ld new file mode 100644 index 000000000..d2350e749 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128.ld @@ -0,0 +1,392 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * MK20DX128 memory setup. + */ +MEMORY +{ + flash0 : org = 0x00000000, len = 0x100 + flashcfg : org = 0x00000400, len = 0x10 + flash : org = 0x00000410, len = 128k - 0x410 + ram0 : org = 0x1fffe000, len = 16k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +REGION_ALIAS("MAIN_STACK_RAM", ram0); +REGION_ALIAS("PROCESS_STACK_RAM", ram0); +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("BSS_RAM", ram0); +REGION_ALIAS("HEAP_RAM", ram0); + +__ram0_start__ = ORIGIN(ram0); +__ram0_size__ = LENGTH(ram0); +__ram0_end__ = __ram0_start__ + __ram0_size__; +__ram1_start__ = ORIGIN(ram1); +__ram1_size__ = LENGTH(ram1); +__ram1_end__ = __ram1_start__ + __ram1_size__; +__ram2_start__ = ORIGIN(ram2); +__ram2_size__ = LENGTH(ram2); +__ram2_end__ = __ram2_start__ + __ram2_size__; +__ram3_start__ = ORIGIN(ram3); +__ram3_size__ = LENGTH(ram3); +__ram3_end__ = __ram3_start__ + __ram3_size__; +__ram4_start__ = ORIGIN(ram4); +__ram4_size__ = LENGTH(ram4); +__ram4_end__ = __ram4_start__ + __ram4_size__; +__ram5_start__ = ORIGIN(ram5); +__ram5_size__ = LENGTH(ram5); +__ram5_end__ = __ram5_start__ + __ram5_size__; +__ram6_start__ = ORIGIN(ram6); +__ram6_size__ = LENGTH(ram6); +__ram6_end__ = __ram6_start__ + __ram6_size__; +__ram7_start__ = ORIGIN(ram7); +__ram7_size__ = LENGTH(ram7); +__ram7_end__ = __ram7_start__ + __ram7_size__; + +ENTRY(Reset_Handler) + +SECTIONS +{ + . = 0; + + startup : ALIGN(16) SUBALIGN(16) + { + KEEP(*(.vectors)) + } > flash0 + + .cfmprotect : ALIGN(4) SUBALIGN(4) + { + KEEP(*(.cfmconfig)) + } > flashcfg + + _text = .; + + constructors : ALIGN(4) SUBALIGN(4) + { + __init_array_start = .; + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + __init_array_end = .; + } > flash + + destructors : ALIGN(4) SUBALIGN(4) + { + __fini_array_start = .; + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + __fini_array_end = .; + } > flash + + .text : ALIGN(16) SUBALIGN(16) + { + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > flash + + .ARM.exidx : { + __exidx_start = .; + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + __exidx_end = .; + } > flash + + .eh_frame_hdr : + { + *(.eh_frame_hdr) + } > flash + + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash + + .textalign : ONLY_IF_RO + { + . = ALIGN(8); + } > flash + + /* Legacy symbol, not used anywhere.*/ + . = ALIGN(4); + PROVIDE(_etext = .); + + /* Special section for exceptions stack.*/ + .mstack : + { + . = ALIGN(8); + __main_stack_base__ = .; + . += __main_stack_size__; + . = ALIGN(8); + __main_stack_end__ = .; + } > MAIN_STACK_RAM + + /* Special section for process stack.*/ + .pstack : + { + __process_stack_base__ = .; + __main_thread_stack_base__ = .; + . += __process_stack_size__; + . = ALIGN(8); + __process_stack_end__ = .; + __main_thread_stack_end__ = .; + } > PROCESS_STACK_RAM + + .data : ALIGN(4) + { + . = ALIGN(4); + PROVIDE(_textdata = LOADADDR(.data)); + PROVIDE(_data = .); + _textdata_start = LOADADDR(.data); + _data_start = .; + *(.data) + *(.data.*) + *(.ramtext) + . = ALIGN(4); + PROVIDE(_edata = .); + _data_end = .; + } > DATA_RAM AT > flash + + .bss (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + _bss_start = .; + *(.bss) + *(.bss.*) + *(COMMON) + . = ALIGN(4); + _bss_end = .; + PROVIDE(end = .); + } > BSS_RAM + + .ram0_init : ALIGN(4) + { + . = ALIGN(4); + __ram0_init_text__ = LOADADDR(.ram0_init); + __ram0_init__ = .; + *(.ram0_init) + *(.ram0_init.*) + . = ALIGN(4); + } > ram0 AT > flash + + .ram0 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram0_clear__ = .; + *(.ram0_clear) + *(.ram0_clear.*) + . = ALIGN(4); + __ram0_noinit__ = .; + *(.ram0) + *(.ram0.*) + . = ALIGN(4); + __ram0_free__ = .; + } > ram0 + + .ram1_init : ALIGN(4) + { + . = ALIGN(4); + __ram1_init_text__ = LOADADDR(.ram1_init); + __ram1_init__ = .; + *(.ram1_init) + *(.ram1_init.*) + . = ALIGN(4); + } > ram1 AT > flash + + .ram1 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram1_clear__ = .; + *(.ram1_clear) + *(.ram1_clear.*) + . = ALIGN(4); + __ram1_noinit__ = .; + *(.ram1) + *(.ram1.*) + . = ALIGN(4); + __ram1_free__ = .; + } > ram1 + + .ram2_init : ALIGN(4) + { + . = ALIGN(4); + __ram2_init_text__ = LOADADDR(.ram2_init); + __ram2_init__ = .; + *(.ram2_init) + *(.ram2_init.*) + . = ALIGN(4); + } > ram2 AT > flash + + .ram2 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram2_clear__ = .; + *(.ram2_clear) + *(.ram2_clear.*) + . = ALIGN(4); + __ram2_noinit__ = .; + *(.ram2) + *(.ram2.*) + . = ALIGN(4); + __ram2_free__ = .; + } > ram2 + + .ram3_init : ALIGN(4) + { + . = ALIGN(4); + __ram3_init_text__ = LOADADDR(.ram3_init); + __ram3_init__ = .; + *(.ram3_init) + *(.ram3_init.*) + . = ALIGN(4); + } > ram3 AT > flash + + .ram3 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram3_clear__ = .; + *(.ram3_clear) + *(.ram3_clear.*) + . = ALIGN(4); + __ram3_noinit__ = .; + *(.ram3) + *(.ram3.*) + . = ALIGN(4); + __ram3_free__ = .; + } > ram3 + + .ram4_init : ALIGN(4) + { + . = ALIGN(4); + __ram4_init_text__ = LOADADDR(.ram4_init); + __ram4_init__ = .; + *(.ram4_init) + *(.ram4_init.*) + . = ALIGN(4); + } > ram4 AT > flash + + .ram4 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram4_clear__ = .; + *(.ram4_clear) + *(.ram4_clear.*) + . = ALIGN(4); + __ram4_noinit__ = .; + *(.ram4) + *(.ram4.*) + . = ALIGN(4); + __ram4_free__ = .; + } > ram4 + + .ram5_init : ALIGN(4) + { + . = ALIGN(4); + __ram5_init_text__ = LOADADDR(.ram5_init); + __ram5_init__ = .; + *(.ram5_init) + *(.ram5_init.*) + . = ALIGN(4); + } > ram5 AT > flash + + .ram5 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram5_clear__ = .; + *(.ram5_clear) + *(.ram5_clear.*) + . = ALIGN(4); + __ram5_noinit__ = .; + *(.ram5) + *(.ram5.*) + . = ALIGN(4); + __ram5_free__ = .; + } > ram5 + + .ram6_init : ALIGN(4) + { + . = ALIGN(4); + __ram6_init_text__ = LOADADDR(.ram6_init); + __ram6_init__ = .; + *(.ram6_init) + *(.ram6_init.*) + . = ALIGN(4); + } > ram6 AT > flash + + .ram6 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram6_clear__ = .; + *(.ram6_clear) + *(.ram6_clear.*) + . = ALIGN(4); + __ram6_noinit__ = .; + *(.ram6) + *(.ram6.*) + . = ALIGN(4); + __ram6_free__ = .; + } > ram6 + + .ram7_init : ALIGN(4) + { + . = ALIGN(4); + __ram7_init_text__ = LOADADDR(.ram7_init); + __ram7_init__ = .; + *(.ram7_init) + *(.ram7_init.*) + . = ALIGN(4); + } > ram7 AT > flash + + .ram7 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram7_clear__ = .; + *(.ram7_clear) + *(.ram7_clear.*) + . = ALIGN(4); + __ram7_noinit__ = .; + *(.ram7) + *(.ram7.*) + . = ALIGN(4); + __ram7_free__ = .; + } > ram7 + + /* The default heap uses the (statically) unused part of a RAM section.*/ + .heap (NOLOAD) : + { + . = ALIGN(8); + __heap_base__ = .; + . = ORIGIN(HEAP_RAM) + LENGTH(HEAP_RAM); + __heap_end__ = .; + } > HEAP_RAM +} diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F030x4.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F030x4.ld new file mode 100644 index 000000000..3a809ddb6 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F030x4.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F030x4 memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 16k + ram0 : org = 0x20000000, len = 4k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F030x6.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F030x6.ld new file mode 100644 index 000000000..71b738110 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F030x6.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F030x6 memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 32k + ram0 : org = 0x20000000, len = 4k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F030x8.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F030x8.ld new file mode 100644 index 000000000..429eba77a --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F030x8.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F030x8 memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 64k + ram0 : org = 0x20000000, len = 8k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F031x6.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F031x6.ld new file mode 100644 index 000000000..cb479f1b3 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F031x6.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F031x6 memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 32k + ram0 : org = 0x20000000, len = 4k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F042x6.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F042x6.ld new file mode 100644 index 000000000..b3e0f7390 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F042x6.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F042x6 memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 32k + ram0 : org = 0x20000000, len = 6k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F051x8.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F051x8.ld new file mode 100644 index 000000000..26466f115 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F051x8.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F051x8 memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 64k + ram0 : org = 0x20000000, len = 8k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F072xB.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F072xB.ld new file mode 100644 index 000000000..e44d43730 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F072xB.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F072xB memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 128k + ram0 : org = 0x20000000, len = 16k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F091xC.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F091xC.ld new file mode 100644 index 000000000..6d0ca2692 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F091xC.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F091xC memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 256k + ram0 : org = 0x20000000, len = 32k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F100xB.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F100xB.ld new file mode 100644 index 000000000..76c19c669 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F100xB.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F100xB memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 128k + ram0 : org = 0x20000000, len = 8k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103x8.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103x8.ld new file mode 100644 index 000000000..4ce14d925 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103x8.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103x8 memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 64k + ram0 : org = 0x20000000, len = 20k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xB.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xB.ld new file mode 100644 index 000000000..22eba093e --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xB.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103xB memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 128k + ram0 : org = 0x20000000, len = 20k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xD.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xD.ld new file mode 100644 index 000000000..1952b614c --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xD.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103xE memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 384k + ram0 : org = 0x20000000, len = 64k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xE.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xE.ld new file mode 100644 index 000000000..8af8a3c7b --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xE.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103xE memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 512k + ram0 : org = 0x20000000, len = 64k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xE_maplemini_bootloader.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xE_maplemini_bootloader.ld new file mode 100644 index 000000000..73fbc5209 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xE_maplemini_bootloader.ld @@ -0,0 +1,56 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103xE memory setup for use with the maplemini bootloader. + * You will have to + * #define CORTEX_VTOR_INIT 0x5000 + * in your projects chconf.h + */ +MEMORY +{ + flash : org = 0x08005000, len = 512k - 0x5000 + ram0 : org = 0x20000C00, len = 64k - 0xC00 + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xG.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xG.ld new file mode 100644 index 000000000..f40b46ff1 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xG.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103xG memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 1m + ram0 : org = 0x20000000, len = 96k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F107xC.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F107xC.ld new file mode 100644 index 000000000..f10a7a53b --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F107xC.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F107xC memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 256k + ram0 : org = 0x20000000, len = 64k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F207xG.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F207xG.ld new file mode 100644 index 000000000..644d358ab --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F207xG.ld @@ -0,0 +1,54 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F207xG memory setup. + * Note: Use of ram1 and ram2 is mutually exclusive with use of ram0. + */ +MEMORY +{ + flash : org = 0x08000000, len = 1M + ram0 : org = 0x20000000, len = 128k /* SRAM1 + SRAM2 */ + ram1 : org = 0x20000000, len = 112k /* SRAM1 */ + ram2 : org = 0x2001C000, len = 16k /* SRAM2 */ + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x10000000, len = 64k /* CCM SRAM */ + ram5 : org = 0x40024000, len = 4k /* BCKP SRAM */ + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F302x8.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F302x8.ld new file mode 100644 index 000000000..a78e033a6 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F302x8.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F302x8 memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 64k + ram0 : org = 0x20000000, len = 16k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F303x8.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F303x8.ld new file mode 100644 index 000000000..694ae5049 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F303x8.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F303x8 memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 64k + ram0 : org = 0x20000000, len = 12k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x10000000, len = 4k + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F303xC.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F303xC.ld new file mode 100644 index 000000000..518e96f0d --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F303xC.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F303xC memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 256k + ram0 : org = 0x20000000, len = 40k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x10000000, len = 8k + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F334x8.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F334x8.ld new file mode 100644 index 000000000..cfd9698e1 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F334x8.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F3334x8 memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 64k + ram0 : org = 0x20000000, len = 12k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x10000000, len = 4k + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F373xC.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F373xC.ld new file mode 100644 index 000000000..96d58449c --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F373xC.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F373xC memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 256k + ram0 : org = 0x20000000, len = 32k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F401xC.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F401xC.ld new file mode 100644 index 000000000..798e255bb --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F401xC.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F401xC memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 256k + ram0 : org = 0x20000000, len = 64k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F401xE.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F401xE.ld new file mode 100644 index 000000000..235ae50ea --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F401xE.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F401xE memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 512k + ram0 : org = 0x20000000, len = 96k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F405xG.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F405xG.ld new file mode 100644 index 000000000..151ec0dba --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F405xG.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F405xG memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 1M + ram0 : org = 0x20000000, len = 128k /* SRAM1 + SRAM2 */ + ram1 : org = 0x20000000, len = 112k /* SRAM1 */ + ram2 : org = 0x2001C000, len = 16k /* SRAM2 */ + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x10000000, len = 64k /* CCM SRAM */ + ram5 : org = 0x40024000, len = 4k /* BCKP SRAM */ + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F407xG.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F407xG.ld new file mode 100644 index 000000000..4ced890b6 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F407xG.ld @@ -0,0 +1,54 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F407xG memory setup. + * Note: Use of ram1 and ram2 is mutually exclusive with use of ram0. + */ +MEMORY +{ + flash : org = 0x08000000, len = 1M + ram0 : org = 0x20000000, len = 128k /* SRAM1 + SRAM2 */ + ram1 : org = 0x20000000, len = 112k /* SRAM1 */ + ram2 : org = 0x2001C000, len = 16k /* SRAM2 */ + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x10000000, len = 64k /* CCM SRAM */ + ram5 : org = 0x40024000, len = 4k /* BCKP SRAM */ + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F411xC.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F411xC.ld new file mode 100644 index 000000000..b3f91a45b --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F411xC.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F411xC memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 256k + ram0 : org = 0x20000000, len = 128k /* SRAM1 */ + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F411xE.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F411xE.ld new file mode 100644 index 000000000..010f8d4d2 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F411xE.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F411xE memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 512k + ram0 : org = 0x20000000, len = 128k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F429xI.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F429xI.ld new file mode 100644 index 000000000..81248e10c --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F429xI.ld @@ -0,0 +1,54 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F429xI memory setup. + * Note: Use of ram1, ram2 and ram3 is mutually exclusive with use of ram0. + */ +MEMORY +{ + flash : org = 0x08000000, len = 2M + ram0 : org = 0x20000000, len = 192k /* SRAM1 + SRAM2 + SRAM3 */ + ram1 : org = 0x20000000, len = 112k /* SRAM1 */ + ram2 : org = 0x2001C000, len = 16k /* SRAM2 */ + ram3 : org = 0x20020000, len = 64k /* SRAM3 */ + ram4 : org = 0x10000000, len = 64k /* CCM SRAM */ + ram5 : org = 0x40024000, len = 4k /* BCKP SRAM */ + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F746xG.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F746xG.ld new file mode 100644 index 000000000..b7c90bd0e --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F746xG.ld @@ -0,0 +1,66 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F746xG generic setup. + * + * RAM0 - Data, Heap. + * RAM3 - Main Stack, Process Stack, BSS, NOCACHE, ETH. + * + * Notes: + * BSS is placed in DTCM RAM in order to simplify DMA buffers management. + */ +MEMORY +{ + flash : org = 0x08000000, len = 1M + flash_itcm : org = 0x00200000, len = 1M + ram0 : org = 0x20010000, len = 256k /* SRAM1 + SRAM2 */ + ram1 : org = 0x20010000, len = 240k /* SRAM1 */ + ram2 : org = 0x2004C000, len = 16k /* SRAM2 */ + ram3 : org = 0x20000000, len = 64k /* DTCM-RAM */ + ram4 : org = 0x00000000, len = 16k /* ITCM-RAM */ + ram5 : org = 0x40024000, len = 4k /* BCKP SRAM */ + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram3); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram3); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram3); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* RAM region to be used for nocache segment.*/ +REGION_ALIAS("NOCACHE_RAM", ram3); + +/* RAM region to be used for eth segment.*/ +REGION_ALIAS("ETH_RAM", ram3); + +INCLUDE ld/rules_STM32F7xx.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F746xG_ETH.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F746xG_ETH.ld new file mode 100644 index 000000000..d4fa6ca8a --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F746xG_ETH.ld @@ -0,0 +1,66 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F746xG Ethernet setup. + * + * RAM1 - Data, Heap. + * RAM2 - ETH. + * RAM3 - Main Stack, Process Stack, BSS, NOCACHE. + * + * Notes: + * BSS is placed in DTCM RAM in order to simplify DMA buffers management. + */ +MEMORY +{ + flash : org = 0x08000000, len = 1M + ram0 : org = 0x20010000, len = 256k /* SRAM1 + SRAM2 */ + ram1 : org = 0x20010000, len = 240k /* SRAM1 */ + ram2 : org = 0x2004C000, len = 16k /* SRAM2 */ + ram3 : org = 0x20000000, len = 64k /* DTCM-RAM */ + ram4 : org = 0x00000000, len = 16k /* ITCM-RAM */ + ram5 : org = 0x40024000, len = 4k /* BCKP SRAM */ + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram3); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram3); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram1); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram3); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram1); + +/* RAM region to be used for nocache segment.*/ +REGION_ALIAS("NOCACHE_RAM", ram3); + +/* RAM region to be used for eth segment.*/ +REGION_ALIAS("ETH_RAM", ram2); + +INCLUDE rules_dma.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F746xG_MAX.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F746xG_MAX.ld new file mode 100644 index 000000000..21ba81fed --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F746xG_MAX.ld @@ -0,0 +1,68 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F746xG maximum RAM setup. + * + * RAM0 - Data, BSS, Heap. + * RAM3 - Main Stack, Process Stack, NOCACHE, ETH. + * + * Notes: + * BSS is placed in cached RAM, DMA buffers management is delegated to the + * application code. This setup maximizes the linear RAM available to BSS and + * Heap. + */ +MEMORY +{ + flash : org = 0x08000000, len = 1M + flash_itcm : org = 0x00200000, len = 1M + ram0 : org = 0x20010000, len = 256k /* SRAM1 + SRAM2 */ + ram1 : org = 0x20010000, len = 240k /* SRAM1 */ + ram2 : org = 0x2004C000, len = 16k /* SRAM2 */ + ram3 : org = 0x20000000, len = 64k /* DTCM-RAM */ + ram4 : org = 0x00000000, len = 16k /* ITCM-RAM */ + ram5 : org = 0x40024000, len = 4k /* BCKP SRAM */ + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram3); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram3); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* RAM region to be used for nocache segment.*/ +REGION_ALIAS("NOCACHE_RAM", ram3); + +/* RAM region to be used for eth segment.*/ +REGION_ALIAS("ETH_RAM", ram3); + +INCLUDE ld/rules_STM32F7xx.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L052x6.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L052x6.ld new file mode 100644 index 000000000..e5ebcb88a --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L052x6.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32L052x8 memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 16k + ram0 : org = 0x20000000, len = 8k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L052x8.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L052x8.ld new file mode 100644 index 000000000..faccde1ec --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L052x8.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32L052x8 memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 64k + ram0 : org = 0x20000000, len = 8k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L053x8.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L053x8.ld new file mode 100644 index 000000000..108e7f2c3 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L053x8.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32L053x8 memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 64k + ram0 : org = 0x20000000, len = 8k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L151x6.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L151x6.ld new file mode 100644 index 000000000..7709c2487 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L151x6.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32L151x6 memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 32k + ram0 : org = 0x20000000, len = 10k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L152xB.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L152xB.ld new file mode 100644 index 000000000..32ffdf596 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L152xB.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32L152xB memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 128k + ram0 : org = 0x20000000, len = 16k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L152xE.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L152xE.ld new file mode 100644 index 000000000..d6ad839a2 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L152xE.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32L152xB memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 512k + ram0 : org = 0x20000000, len = 80k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L476xG.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L476xG.ld new file mode 100644 index 000000000..060e79072 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L476xG.ld @@ -0,0 +1,53 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F303xC memory setup. + */ +MEMORY +{ + flash : org = 0x08000000, len = 1M + ram0 : org = 0x20000000, len = 96k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x10000000, len = 32k + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/rules_STM32F7xx.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/rules_STM32F7xx.ld new file mode 100644 index 000000000..0035c7ac3 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/rules_STM32F7xx.ld @@ -0,0 +1,394 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +__ram0_start__ = ORIGIN(ram0); +__ram0_size__ = LENGTH(ram0); +__ram0_end__ = __ram0_start__ + __ram0_size__; +__ram1_start__ = ORIGIN(ram1); +__ram1_size__ = LENGTH(ram1); +__ram1_end__ = __ram1_start__ + __ram1_size__; +__ram2_start__ = ORIGIN(ram2); +__ram2_size__ = LENGTH(ram2); +__ram2_end__ = __ram2_start__ + __ram2_size__; +__ram3_start__ = ORIGIN(ram3); +__ram3_size__ = LENGTH(ram3); +__ram3_end__ = __ram3_start__ + __ram3_size__; +__ram4_start__ = ORIGIN(ram4); +__ram4_size__ = LENGTH(ram4); +__ram4_end__ = __ram4_start__ + __ram4_size__; +__ram5_start__ = ORIGIN(ram5); +__ram5_size__ = LENGTH(ram5); +__ram5_end__ = __ram5_start__ + __ram5_size__; +__ram6_start__ = ORIGIN(ram6); +__ram6_size__ = LENGTH(ram6); +__ram6_end__ = __ram6_start__ + __ram6_size__; +__ram7_start__ = ORIGIN(ram7); +__ram7_size__ = LENGTH(ram7); +__ram7_end__ = __ram7_start__ + __ram7_size__; + +ENTRY(Reset_Handler) + +SECTIONS +{ + . = 0; + _text = .; + + startup : ALIGN(16) SUBALIGN(16) + { + KEEP(*(.vectors)) + } > flash_itcm AT > flash + + constructors : ALIGN(4) SUBALIGN(4) + { + __init_array_start = .; + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + __init_array_end = .; + } > flash_itcm AT > flash + + destructors : ALIGN(4) SUBALIGN(4) + { + __fini_array_start = .; + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + __fini_array_end = .; + } > flash_itcm AT > flash + + .text : ALIGN(16) SUBALIGN(16) + { + *(.text) + *(.text.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash_itcm AT > flash + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > flash_itcm AT > flash + + .ARM.exidx : { + __exidx_start = .; + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + __exidx_end = .; + } > flash_itcm AT > flash + + .eh_frame_hdr : + { + *(.eh_frame_hdr) + } > flash_itcm AT > flash + + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash_itcm AT > flash + + .textalign : ONLY_IF_RO + { + . = ALIGN(8); + } > flash_itcm AT > flash + + /* Constants are placed in the normal flash (non-ITCM) region because it + is desirable to make them DMA-accessible.*/ + .rodata : ALIGN(4) + { + . = ALIGN(4); + __rodata_base__ = .; + *(.rodata) + *(.rodata.*) + . = ALIGN(4); + __rodata_end__ = .; + } > flash + + /* Legacy symbol, not used anywhere.*/ + . = ALIGN(4); + PROVIDE(_etext = .); + + /* Special section for exceptions stack.*/ + .mstack : + { + . = ALIGN(8); + __main_stack_base__ = .; + . += __main_stack_size__; + . = ALIGN(8); + __main_stack_end__ = .; + } > MAIN_STACK_RAM + + /* Special section for process stack.*/ + .pstack : + { + __process_stack_base__ = .; + __main_thread_stack_base__ = .; + . += __process_stack_size__; + . = ALIGN(8); + __process_stack_end__ = .; + __main_thread_stack_end__ = .; + } > PROCESS_STACK_RAM + + /* Special section for non cache-able areas.*/ + .nocache (NOLOAD) : ALIGN(4) + { + __nocache_base__ = .; + *(.nocache) + *(.nocache.*) + *(.bss.__nocache_*) + . = ALIGN(4); + __nocache_end__ = .; + } > NOCACHE_RAM + + /* Special section for Ethernet DMA non cache-able areas.*/ + .eth (NOLOAD) : ALIGN(4) + { + __eth_base__ = .; + *(.eth) + *(.eth.*) + *(.bss.__eth_*) + . = ALIGN(4); + __eth_end__ = .; + } > ETH_RAM + + .data : ALIGN(4) + { + . = ALIGN(4); + PROVIDE(_textdata = LOADADDR(.data)); + PROVIDE(_data = .); + _textdata_start = LOADADDR(.data); + _data_start = .; + *(.data) + *(.data.*) + *(.ramtext) + . = ALIGN(4); + PROVIDE(_edata = .); + _data_end = .; + } > DATA_RAM AT > flash + + .bss (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + _bss_start = .; + *(.bss) + *(.bss.*) + *(COMMON) + . = ALIGN(4); + _bss_end = .; + PROVIDE(end = .); + } > BSS_RAM + + .ram0_init : ALIGN(4) + { + . = ALIGN(4); + __ram0_init_text__ = LOADADDR(.ram0_init); + __ram0_init__ = .; + *(.ram0_init) + *(.ram0_init.*) + . = ALIGN(4); + } > ram0 AT > flash + + .ram0 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram0_clear__ = .; + *(.ram0_clear) + *(.ram0_clear.*) + . = ALIGN(4); + __ram0_noinit__ = .; + *(.ram0) + *(.ram0.*) + . = ALIGN(4); + __ram0_free__ = .; + } > ram0 + + .ram1_init : ALIGN(4) + { + . = ALIGN(4); + __ram1_init_text__ = LOADADDR(.ram1_init); + __ram1_init__ = .; + *(.ram1_init) + *(.ram1_init.*) + . = ALIGN(4); + } > ram1 AT > flash + + .ram1 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram1_clear__ = .; + *(.ram1_clear) + *(.ram1_clear.*) + . = ALIGN(4); + __ram1_noinit__ = .; + *(.ram1) + *(.ram1.*) + . = ALIGN(4); + __ram1_free__ = .; + } > ram1 + + .ram2_init : ALIGN(4) + { + . = ALIGN(4); + __ram2_init_text__ = LOADADDR(.ram2_init); + __ram2_init__ = .; + *(.ram2_init) + *(.ram2_init.*) + . = ALIGN(4); + } > ram2 AT > flash + + .ram2 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram2_clear__ = .; + *(.ram2_clear) + *(.ram2_clear.*) + . = ALIGN(4); + __ram2_noinit__ = .; + *(.ram2) + *(.ram2.*) + . = ALIGN(4); + __ram2_free__ = .; + } > ram2 + + .ram3_init : ALIGN(4) + { + . = ALIGN(4); + __ram3_init_text__ = LOADADDR(.ram3_init); + __ram3_init__ = .; + *(.ram3_init) + *(.ram3_init.*) + . = ALIGN(4); + } > ram3 AT > flash + + .ram3 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram3_clear__ = .; + *(.ram3_clear) + *(.ram3_clear.*) + . = ALIGN(4); + __ram3_noinit__ = .; + *(.ram3) + *(.ram3.*) + . = ALIGN(4); + __ram3_free__ = .; + } > ram3 + + .ram4_init : ALIGN(4) + { + . = ALIGN(4); + __ram4_init_text__ = LOADADDR(.ram4_init); + __ram4_init__ = .; + *(.ram4_init) + *(.ram4_init.*) + . = ALIGN(4); + } > ram4 AT > flash + + .ram4 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram4_clear__ = .; + *(.ram4_clear) + *(.ram4_clear.*) + . = ALIGN(4); + __ram4_noinit__ = .; + *(.ram4) + *(.ram4.*) + . = ALIGN(4); + __ram4_free__ = .; + } > ram4 + + .ram5_init : ALIGN(4) + { + . = ALIGN(4); + __ram5_init_text__ = LOADADDR(.ram5_init); + __ram5_init__ = .; + *(.ram5_init) + *(.ram5_init.*) + . = ALIGN(4); + } > ram5 AT > flash + + .ram5 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram5_clear__ = .; + *(.ram5_clear) + *(.ram5_clear.*) + . = ALIGN(4); + __ram5_noinit__ = .; + *(.ram5) + *(.ram5.*) + . = ALIGN(4); + __ram5_free__ = .; + } > ram5 + + .ram6_init : ALIGN(4) + { + . = ALIGN(4); + __ram6_init_text__ = LOADADDR(.ram6_init); + __ram6_init__ = .; + *(.ram6_init) + *(.ram6_init.*) + . = ALIGN(4); + } > ram6 AT > flash + + .ram6 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram6_clear__ = .; + *(.ram6_clear) + *(.ram6_clear.*) + . = ALIGN(4); + __ram6_noinit__ = .; + *(.ram6) + *(.ram6.*) + . = ALIGN(4); + __ram6_free__ = .; + } > ram6 + + .ram7_init : ALIGN(4) + { + . = ALIGN(4); + __ram7_init_text__ = LOADADDR(.ram7_init); + __ram7_init__ = .; + *(.ram7_init) + *(.ram7_init.*) + . = ALIGN(4); + } > ram7 AT > flash + + .ram7 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram7_clear__ = .; + *(.ram7_clear) + *(.ram7_clear.*) + . = ALIGN(4); + __ram7_noinit__ = .; + *(.ram7) + *(.ram7.*) + . = ALIGN(4); + __ram7_free__ = .; + } > ram7 + + /* The default heap uses the (statically) unused part of a RAM section.*/ + .heap (NOLOAD) : + { + . = ALIGN(8); + __heap_base__ = .; + . = ORIGIN(HEAP_RAM) + LENGTH(HEAP_RAM); + __heap_end__ = .; + } > HEAP_RAM +} diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x.mk new file mode 100644 index 000000000..b7ea0f3be --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x.mk @@ -0,0 +1,12 @@ +# List of the ChibiOS generic K20x startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt1.c \ + $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/vectors.c + +STARTUPASM = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s + +STARTUPINC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC \ + $(CHIBIOS)/os/common/ports/ARMCMx/devices/K20x \ + $(CHIBIOS)/os/ext/CMSIS/include \ + $(CHIBIOS)/os/ext/CMSIS/KINETIS + +STARTUPLD = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk new file mode 100644 index 000000000..a073da004 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk @@ -0,0 +1,12 @@ +# List of the ChibiOS generic KL2x startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt1.c \ + $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/vectors.c + +STARTUPASM = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0_v6m.s + +STARTUPINC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC \ + $(CHIBIOS)/os/common/ports/ARMCMx/devices/KL2x \ + $(CHIBIOS)/os/ext/CMSIS/include \ + $(CHIBIOS)/os/ext/CMSIS/KINETIS + +STARTUPLD = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f0xx.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f0xx.mk new file mode 100644 index 000000000..e705bd70f --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f0xx.mk @@ -0,0 +1,12 @@ +# List of the ChibiOS generic STM32F0xx startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt1.c \ + $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/vectors.c + +STARTUPASM = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0_v6m.s + +STARTUPINC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC \ + $(CHIBIOS)/os/common/ports/ARMCMx/devices/STM32F0xx \ + $(CHIBIOS)/os/ext/CMSIS/include \ + $(CHIBIOS)/os/ext/CMSIS/ST/STM32F0xx + +STARTUPLD = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f1xx.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f1xx.mk new file mode 100644 index 000000000..748075f99 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f1xx.mk @@ -0,0 +1,12 @@ +# List of the ChibiOS generic STM32F1xx startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt1.c \ + $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/vectors.c + +STARTUPASM = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s + +STARTUPINC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC \ + $(CHIBIOS)/os/common/ports/ARMCMx/devices/STM32F1xx \ + $(CHIBIOS)/os/ext/CMSIS/include \ + $(CHIBIOS)/os/ext/CMSIS/ST/STM32F1xx + +STARTUPLD = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f2xx.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f2xx.mk new file mode 100644 index 000000000..9789041c2 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f2xx.mk @@ -0,0 +1,12 @@ +# List of the ChibiOS generic STM32F2xx startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt1.c \ + $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/vectors.c + +STARTUPASM = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s + +STARTUPINC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC \ + $(CHIBIOS)/os/common/ports/ARMCMx/devices/STM32F2xx \ + $(CHIBIOS)/os/ext/CMSIS/include \ + $(CHIBIOS)/os/ext/CMSIS/ST/STM32F2xx + +STARTUPLD = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk new file mode 100644 index 000000000..6968d34a3 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk @@ -0,0 +1,12 @@ +# List of the ChibiOS generic STM32F3xx startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt1.c \ + $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/vectors.c + +STARTUPASM = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s + +STARTUPINC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC \ + $(CHIBIOS)/os/common/ports/ARMCMx/devices/STM32F3xx \ + $(CHIBIOS)/os/ext/CMSIS/include \ + $(CHIBIOS)/os/ext/CMSIS/ST/STM32F3xx + +STARTUPLD = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk new file mode 100644 index 000000000..28744ffb5 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk @@ -0,0 +1,12 @@ +# List of the ChibiOS generic STM32F4xx startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt1.c \ + $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/vectors.c + +STARTUPASM = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s + +STARTUPINC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC \ + $(CHIBIOS)/os/common/ports/ARMCMx/devices/STM32F4xx \ + $(CHIBIOS)/os/ext/CMSIS/include \ + $(CHIBIOS)/os/ext/CMSIS/ST/STM32F4xx + +STARTUPLD = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f7xx.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f7xx.mk new file mode 100644 index 000000000..b2a8b1f56 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f7xx.mk @@ -0,0 +1,12 @@ +# List of the ChibiOS generic STM32F7xx startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt1.c \ + $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/vectors.c + +STARTUPASM = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s + +STARTUPINC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC \ + $(CHIBIOS)/os/common/ports/ARMCMx/devices/STM32F7xx \ + $(CHIBIOS)/os/ext/CMSIS/include \ + $(CHIBIOS)/os/ext/CMSIS/ST/STM32F7xx + +STARTUPLD = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l0xx.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l0xx.mk new file mode 100644 index 000000000..24c1ef054 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l0xx.mk @@ -0,0 +1,12 @@ +# List of the ChibiOS generic STM32L0xx startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt1.c \ + $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/vectors.c + +STARTUPASM = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0_v6m.s + +STARTUPINC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC \ + $(CHIBIOS)/os/common/ports/ARMCMx/devices/STM32L0xx \ + $(CHIBIOS)/os/ext/CMSIS/include \ + $(CHIBIOS)/os/ext/CMSIS/ST/STM32L0xx + +STARTUPLD = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l1xx.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l1xx.mk new file mode 100644 index 000000000..fcd588a9b --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l1xx.mk @@ -0,0 +1,12 @@ +# List of the ChibiOS generic STM32L1xx startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt1.c \ + $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/vectors.c + +STARTUPASM = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s + +STARTUPINC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC \ + $(CHIBIOS)/os/common/ports/ARMCMx/devices/STM32L1xx \ + $(CHIBIOS)/os/ext/CMSIS/include \ + $(CHIBIOS)/os/ext/CMSIS/ST/STM32L1xx + +STARTUPLD = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l4xx.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l4xx.mk new file mode 100644 index 000000000..a8a3ec441 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l4xx.mk @@ -0,0 +1,12 @@ +# List of the ChibiOS generic STM32L4xx startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt1.c \ + $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/vectors.c + +STARTUPASM = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s + +STARTUPINC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC \ + $(CHIBIOS)/os/common/ports/ARMCMx/devices/STM32L4xx \ + $(CHIBIOS)/os/ext/CMSIS/include \ + $(CHIBIOS)/os/ext/CMSIS/ST/STM32L4xx + +STARTUPLD = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/rules.ld b/os/common/startup/ARMCMx/compilers/GCC/rules.ld new file mode 100644 index 000000000..85d740b75 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/rules.ld @@ -0,0 +1,362 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +__ram0_start__ = ORIGIN(ram0); +__ram0_size__ = LENGTH(ram0); +__ram0_end__ = __ram0_start__ + __ram0_size__; +__ram1_start__ = ORIGIN(ram1); +__ram1_size__ = LENGTH(ram1); +__ram1_end__ = __ram1_start__ + __ram1_size__; +__ram2_start__ = ORIGIN(ram2); +__ram2_size__ = LENGTH(ram2); +__ram2_end__ = __ram2_start__ + __ram2_size__; +__ram3_start__ = ORIGIN(ram3); +__ram3_size__ = LENGTH(ram3); +__ram3_end__ = __ram3_start__ + __ram3_size__; +__ram4_start__ = ORIGIN(ram4); +__ram4_size__ = LENGTH(ram4); +__ram4_end__ = __ram4_start__ + __ram4_size__; +__ram5_start__ = ORIGIN(ram5); +__ram5_size__ = LENGTH(ram5); +__ram5_end__ = __ram5_start__ + __ram5_size__; +__ram6_start__ = ORIGIN(ram6); +__ram6_size__ = LENGTH(ram6); +__ram6_end__ = __ram6_start__ + __ram6_size__; +__ram7_start__ = ORIGIN(ram7); +__ram7_size__ = LENGTH(ram7); +__ram7_end__ = __ram7_start__ + __ram7_size__; + +ENTRY(Reset_Handler) + +SECTIONS +{ + . = 0; + _text = .; + + startup : ALIGN(16) SUBALIGN(16) + { + KEEP(*(.vectors)) + } > flash + + constructors : ALIGN(4) SUBALIGN(4) + { + __init_array_start = .; + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + __init_array_end = .; + } > flash + + destructors : ALIGN(4) SUBALIGN(4) + { + __fini_array_start = .; + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + __fini_array_end = .; + } > flash + + .text : ALIGN(16) SUBALIGN(16) + { + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > flash + + .ARM.exidx : { + __exidx_start = .; + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + __exidx_end = .; + } > flash + + .eh_frame_hdr : + { + *(.eh_frame_hdr) + } > flash + + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash + + .textalign : ONLY_IF_RO + { + . = ALIGN(8); + } > flash + + /* Legacy symbol, not used anywhere.*/ + . = ALIGN(4); + PROVIDE(_etext = .); + + /* Special section for exceptions stack.*/ + .mstack : + { + . = ALIGN(8); + __main_stack_base__ = .; + . += __main_stack_size__; + . = ALIGN(8); + __main_stack_end__ = .; + } > MAIN_STACK_RAM + + /* Special section for process stack.*/ + .pstack : + { + __process_stack_base__ = .; + __main_thread_stack_base__ = .; + . += __process_stack_size__; + . = ALIGN(8); + __process_stack_end__ = .; + __main_thread_stack_end__ = .; + } > PROCESS_STACK_RAM + + .data : ALIGN(4) + { + . = ALIGN(4); + PROVIDE(_textdata = LOADADDR(.data)); + PROVIDE(_data = .); + _textdata_start = LOADADDR(.data); + _data_start = .; + *(.data) + *(.data.*) + *(.ramtext) + . = ALIGN(4); + PROVIDE(_edata = .); + _data_end = .; + } > DATA_RAM AT > flash + + .bss (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + _bss_start = .; + *(.bss) + *(.bss.*) + *(COMMON) + . = ALIGN(4); + _bss_end = .; + PROVIDE(end = .); + } > BSS_RAM + + .ram0_init : ALIGN(4) + { + . = ALIGN(4); + __ram0_init_text__ = LOADADDR(.ram0_init); + __ram0_init__ = .; + *(.ram0_init) + *(.ram0_init.*) + . = ALIGN(4); + } > ram0 AT > flash + + .ram0 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram0_clear__ = .; + *(.ram0_clear) + *(.ram0_clear.*) + . = ALIGN(4); + __ram0_noinit__ = .; + *(.ram0) + *(.ram0.*) + . = ALIGN(4); + __ram0_free__ = .; + } > ram0 + + .ram1_init : ALIGN(4) + { + . = ALIGN(4); + __ram1_init_text__ = LOADADDR(.ram1_init); + __ram1_init__ = .; + *(.ram1_init) + *(.ram1_init.*) + . = ALIGN(4); + } > ram1 AT > flash + + .ram1 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram1_clear__ = .; + *(.ram1_clear) + *(.ram1_clear.*) + . = ALIGN(4); + __ram1_noinit__ = .; + *(.ram1) + *(.ram1.*) + . = ALIGN(4); + __ram1_free__ = .; + } > ram1 + + .ram2_init : ALIGN(4) + { + . = ALIGN(4); + __ram2_init_text__ = LOADADDR(.ram2_init); + __ram2_init__ = .; + *(.ram2_init) + *(.ram2_init.*) + . = ALIGN(4); + } > ram2 AT > flash + + .ram2 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram2_clear__ = .; + *(.ram2_clear) + *(.ram2_clear.*) + . = ALIGN(4); + __ram2_noinit__ = .; + *(.ram2) + *(.ram2.*) + . = ALIGN(4); + __ram2_free__ = .; + } > ram2 + + .ram3_init : ALIGN(4) + { + . = ALIGN(4); + __ram3_init_text__ = LOADADDR(.ram3_init); + __ram3_init__ = .; + *(.ram3_init) + *(.ram3_init.*) + . = ALIGN(4); + } > ram3 AT > flash + + .ram3 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram3_clear__ = .; + *(.ram3_clear) + *(.ram3_clear.*) + . = ALIGN(4); + __ram3_noinit__ = .; + *(.ram3) + *(.ram3.*) + . = ALIGN(4); + __ram3_free__ = .; + } > ram3 + + .ram4_init : ALIGN(4) + { + . = ALIGN(4); + __ram4_init_text__ = LOADADDR(.ram4_init); + __ram4_init__ = .; + *(.ram4_init) + *(.ram4_init.*) + . = ALIGN(4); + } > ram4 AT > flash + + .ram4 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram4_clear__ = .; + *(.ram4_clear) + *(.ram4_clear.*) + . = ALIGN(4); + __ram4_noinit__ = .; + *(.ram4) + *(.ram4.*) + . = ALIGN(4); + __ram4_free__ = .; + } > ram4 + + .ram5_init : ALIGN(4) + { + . = ALIGN(4); + __ram5_init_text__ = LOADADDR(.ram5_init); + __ram5_init__ = .; + *(.ram5_init) + *(.ram5_init.*) + . = ALIGN(4); + } > ram5 AT > flash + + .ram5 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram5_clear__ = .; + *(.ram5_clear) + *(.ram5_clear.*) + . = ALIGN(4); + __ram5_noinit__ = .; + *(.ram5) + *(.ram5.*) + . = ALIGN(4); + __ram5_free__ = .; + } > ram5 + + .ram6_init : ALIGN(4) + { + . = ALIGN(4); + __ram6_init_text__ = LOADADDR(.ram6_init); + __ram6_init__ = .; + *(.ram6_init) + *(.ram6_init.*) + . = ALIGN(4); + } > ram6 AT > flash + + .ram6 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram6_clear__ = .; + *(.ram6_clear) + *(.ram6_clear.*) + . = ALIGN(4); + __ram6_noinit__ = .; + *(.ram6) + *(.ram6.*) + . = ALIGN(4); + __ram6_free__ = .; + } > ram6 + + .ram7_init : ALIGN(4) + { + . = ALIGN(4); + __ram7_init_text__ = LOADADDR(.ram7_init); + __ram7_init__ = .; + *(.ram7_init) + *(.ram7_init.*) + . = ALIGN(4); + } > ram7 AT > flash + + .ram7 (NOLOAD) : ALIGN(4) + { + . = ALIGN(4); + __ram7_clear__ = .; + *(.ram7_clear) + *(.ram7_clear.*) + . = ALIGN(4); + __ram7_noinit__ = .; + *(.ram7) + *(.ram7.*) + . = ALIGN(4); + __ram7_free__ = .; + } > ram7 + + /* The default heap uses the (statically) unused part of a RAM section.*/ + .heap (NOLOAD) : + { + . = ALIGN(8); + __heap_base__ = .; + . = ORIGIN(HEAP_RAM) + LENGTH(HEAP_RAM); + __heap_end__ = .; + } > HEAP_RAM +} diff --git a/os/common/startup/ARMCMx/compilers/GCC/rules.mk b/os/common/startup/ARMCMx/compilers/GCC/rules.mk new file mode 100644 index 000000000..2434be9cd --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/rules.mk @@ -0,0 +1,307 @@ +# ARM Cortex-Mx common makefile scripts and rules. + +############################################################################## +# Processing options coming from the upper Makefile. +# + +# Compiler options +OPT = $(USE_OPT) +COPT = $(USE_COPT) +CPPOPT = $(USE_CPPOPT) + +# Garbage collection +ifeq ($(USE_LINK_GC),yes) + OPT += -ffunction-sections -fdata-sections -fno-common + LDOPT := ,--gc-sections +else + LDOPT := +endif + +# Linker extra options +ifneq ($(USE_LDOPT),) + LDOPT := $(LDOPT),$(USE_LDOPT) +endif + +# Link time optimizations +ifeq ($(USE_LTO),yes) + OPT += -flto +endif + +# FPU-related options +ifeq ($(USE_FPU),) + USE_FPU = no +endif +ifneq ($(USE_FPU),no) + OPT += -mfloat-abi=$(USE_FPU) -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE + DADEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE + DADEFS += -DCORTEX_USE_FPU=FALSE +endif + +# Process stack size +ifeq ($(USE_PROCESS_STACKSIZE),) + LDOPT := $(LDOPT),--defsym=__process_stack_size__=0x400 +else + LDOPT := $(LDOPT),--defsym=__process_stack_size__=$(USE_PROCESS_STACKSIZE) +endif + +# Exceptions stack size +ifeq ($(USE_EXCEPTIONS_STACKSIZE),) + LDOPT := $(LDOPT),--defsym=__main_stack_size__=0x400 +else + LDOPT := $(LDOPT),--defsym=__main_stack_size__=$(USE_EXCEPTIONS_STACKSIZE) +endif + +# Output directory and files +ifeq ($(BUILDDIR),) + BUILDDIR = build +endif +ifeq ($(BUILDDIR),.) + BUILDDIR = build +endif +OUTFILES = $(BUILDDIR)/$(PROJECT).elf \ + $(BUILDDIR)/$(PROJECT).hex \ + $(BUILDDIR)/$(PROJECT).bin \ + $(BUILDDIR)/$(PROJECT).dmp \ + $(BUILDDIR)/$(PROJECT).list + +ifdef SREC + OUTFILES += $(BUILDDIR)/$(PROJECT).srec +endif + +# Source files groups and paths +ifeq ($(USE_THUMB),yes) + TCSRC += $(CSRC) + TCPPSRC += $(CPPSRC) +else + ACSRC += $(CSRC) + ACPPSRC += $(CPPSRC) +endif +ASRC = $(ACSRC)$(ACPPSRC) +TSRC = $(TCSRC)$(TCPPSRC) +SRCPATHS = $(sort $(dir $(ASMXSRC)) $(dir $(ASMSRC)) $(dir $(ASRC)) $(dir $(TSRC))) + +# Various directories +OBJDIR = $(BUILDDIR)/obj +LSTDIR = $(BUILDDIR)/lst + +# Object files groups +ACOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ACSRC:.c=.o))) +ACPPOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ACPPSRC:.cpp=.o))) +TCOBJS = $(addprefix $(OBJDIR)/, $(notdir $(TCSRC:.c=.o))) +TCPPOBJS = $(addprefix $(OBJDIR)/, $(notdir $(TCPPSRC:.cpp=.o))) +ASMOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ASMSRC:.s=.o))) +ASMXOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ASMXSRC:.S=.o))) +OBJS = $(ASMXOBJS) $(ASMOBJS) $(ACOBJS) $(TCOBJS) $(ACPPOBJS) $(TCPPOBJS) + +# Paths +IINCDIR = $(patsubst %,-I%,$(INCDIR) $(DINCDIR) $(UINCDIR)) +LLIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR)) + +# Macros +DEFS = $(DDEFS) $(UDEFS) +ADEFS = $(DADEFS) $(UADEFS) + +# Libs +LIBS = $(DLIBS) $(ULIBS) + +# Various settings +MCFLAGS = -mcpu=$(MCU) +ODFLAGS = -x --syms +ASFLAGS = $(MCFLAGS) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.s=.lst)) $(ADEFS) +ASXFLAGS = $(MCFLAGS) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.S=.lst)) $(ADEFS) +CFLAGS = $(MCFLAGS) $(OPT) $(COPT) $(CWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.c=.lst)) $(DEFS) +CPPFLAGS = $(MCFLAGS) $(OPT) $(CPPOPT) $(CPPWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.cpp=.lst)) $(DEFS) +LDFLAGS = $(MCFLAGS) $(OPT) -nostartfiles $(LLIBDIR) -Wl,-Map=$(BUILDDIR)/$(PROJECT).map,--cref,--no-warn-mismatch,--library-path=$(RULESPATH),--script=$(LDSCRIPT)$(LDOPT) + +# Thumb interwork enabled only if needed because it kills performance. +ifneq ($(TSRC),) + CFLAGS += -DTHUMB_PRESENT + CPPFLAGS += -DTHUMB_PRESENT + ASFLAGS += -DTHUMB_PRESENT + ifneq ($(ASRC),) + # Mixed ARM and THUMB mode. + CFLAGS += -mthumb-interwork + CPPFLAGS += -mthumb-interwork + ASFLAGS += -mthumb-interwork + LDFLAGS += -mthumb-interwork + else + # Pure THUMB mode, THUMB C code cannot be called by ARM asm code directly. + CFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING + CPPFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING + ASFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING -mthumb + LDFLAGS += -mno-thumb-interwork -mthumb + endif +else + # Pure ARM mode + CFLAGS += -mno-thumb-interwork + CPPFLAGS += -mno-thumb-interwork + ASFLAGS += -mno-thumb-interwork + LDFLAGS += -mno-thumb-interwork +endif + +# Generate dependency information +ASFLAGS += -MD -MP -MF .dep/$(@F).d +CFLAGS += -MD -MP -MF .dep/$(@F).d +CPPFLAGS += -MD -MP -MF .dep/$(@F).d + +# Paths where to search for sources +VPATH = $(SRCPATHS) + +# +# Makefile rules +# + +all: PRE_MAKE_ALL_RULE_HOOK $(OBJS) $(OUTFILES) POST_MAKE_ALL_RULE_HOOK + +PRE_MAKE_ALL_RULE_HOOK: + +POST_MAKE_ALL_RULE_HOOK: + +$(OBJS): | $(BUILDDIR) $(OBJDIR) $(LSTDIR) + +$(BUILDDIR): +ifneq ($(USE_VERBOSE_COMPILE),yes) + @echo Compiler Options + @echo $(CC) -c $(CFLAGS) -I. $(IINCDIR) main.c -o main.o + @echo +endif + @mkdir -p $(BUILDDIR) + +$(OBJDIR): + @mkdir -p $(OBJDIR) + +$(LSTDIR): + @mkdir -p $(LSTDIR) + +$(ACPPOBJS) : $(OBJDIR)/%.o : %.cpp Makefile +ifeq ($(USE_VERBOSE_COMPILE),yes) + @echo + $(CPPC) -c $(CPPFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@ +else + @echo Compiling $( $@ + $(SZ) $< +else + @echo Creating $@ + @$(OD) $(ODFLAGS) $< > $@ + @echo + @$(SZ) $< +endif + +%.list: %.elf +ifeq ($(USE_VERBOSE_COMPILE),yes) + $(OD) -S $< > $@ +else + @echo Creating $@ + @$(OD) -S $< > $@ + @echo + @echo Done +endif + +lib: $(OBJS) $(BUILDDIR)/lib$(PROJECT).a + +$(BUILDDIR)/lib$(PROJECT).a: $(OBJS) + @$(AR) -r $@ $^ + @echo + @echo Done + +clean: + @echo Cleaning + -rm -fR .dep $(BUILDDIR) + @echo + @echo Done + +# +# Include the dependency files, should be the last of the makefile +# +-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*) + +# *** EOF *** diff --git a/os/common/startup/ARMCMx/compilers/GCC/vectors.c b/os/common/startup/ARMCMx/compilers/GCC/vectors.c new file mode 100644 index 000000000..d978d113c --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/vectors.c @@ -0,0 +1,632 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file ARMCMx/compilers/GCC/vectors.c + * @brief Interrupt vectors for Cortex-Mx devices. + * + * @defgroup ARMCMx_VECTORS Cortex-Mx Interrupt Vectors + * @{ + */ + +#include +#include + +#include "vectors.h" + +#if (CORTEX_NUM_VECTORS % 8) != 0 +#error "the constant CORTEX_NUM_VECTORS must be a multiple of 8" +#endif + +#if (CORTEX_NUM_VECTORS < 8) || (CORTEX_NUM_VECTORS > 240) +#error "the constant CORTEX_NUM_VECTORS must be between 8 and 240 inclusive" +#endif + +/** + * @brief Unhandled exceptions handler. + * @details Any undefined exception vector points to this function by default. + * This function simply stops the system into an infinite loop. + * + * @notapi + */ +/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/ +void _unhandled_exception(void) { +/*lint -restore*/ + + while (true) { + } +} + +#if !defined(__DOXYGEN__) +extern uint32_t __main_stack_end__; +void Reset_Handler(void) __attribute__((weak, alias("_unhandled_exception"))); +void NMI_Handler(void) __attribute__((weak, alias("_unhandled_exception"))); +void HardFault_Handler(void) __attribute__((weak, alias("_unhandled_exception"))); +void MemManage_Handler(void) __attribute__((weak, alias("_unhandled_exception"))); +void BusFault_Handler(void) __attribute__((weak, alias("_unhandled_exception"))); +void UsageFault_Handler(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector1C(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector20(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector24(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector28(void) __attribute__((weak, alias("_unhandled_exception"))); +void SVC_Handler(void) __attribute__((weak, alias("_unhandled_exception"))); +void DebugMon_Handler(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector34(void) __attribute__((weak, alias("_unhandled_exception"))); +void PendSV_Handler(void) __attribute__((weak, alias("_unhandled_exception"))); +void SysTick_Handler(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector40(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector44(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector48(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector4C(void) __attribute__((weak, alias("_unhandled_exception"))); +#if CORTEX_NUM_VECTORS > 4 +void Vector50(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector54(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector58(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector5C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 8 +void Vector60(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector64(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector68(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector6C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 12 +void Vector70(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector74(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector78(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector7C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 16 +void Vector80(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector84(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector88(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector8C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 20 +void Vector90(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector94(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector98(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector9C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 24 +void VectorA0(void) __attribute__((weak, alias("_unhandled_exception"))); +void VectorA4(void) __attribute__((weak, alias("_unhandled_exception"))); +void VectorA8(void) __attribute__((weak, alias("_unhandled_exception"))); +void VectorAC(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 28 +void VectorB0(void) __attribute__((weak, alias("_unhandled_exception"))); +void VectorB4(void) __attribute__((weak, alias("_unhandled_exception"))); +void VectorB8(void) __attribute__((weak, alias("_unhandled_exception"))); +void VectorBC(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 32 +void VectorC0(void) __attribute__((weak, alias("_unhandled_exception"))); +void VectorC4(void) __attribute__((weak, alias("_unhandled_exception"))); +void VectorC8(void) __attribute__((weak, alias("_unhandled_exception"))); +void VectorCC(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 36 +void VectorD0(void) __attribute__((weak, alias("_unhandled_exception"))); +void VectorD4(void) __attribute__((weak, alias("_unhandled_exception"))); +void VectorD8(void) __attribute__((weak, alias("_unhandled_exception"))); +void VectorDC(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 40 +void VectorE0(void) __attribute__((weak, alias("_unhandled_exception"))); +void VectorE4(void) __attribute__((weak, alias("_unhandled_exception"))); +void VectorE8(void) __attribute__((weak, alias("_unhandled_exception"))); +void VectorEC(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 44 +void VectorF0(void) __attribute__((weak, alias("_unhandled_exception"))); +void VectorF4(void) __attribute__((weak, alias("_unhandled_exception"))); +void VectorF8(void) __attribute__((weak, alias("_unhandled_exception"))); +void VectorFC(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 48 +void Vector100(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector104(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector108(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector10C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 52 +void Vector110(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector114(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector118(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector11C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 56 +void Vector120(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector124(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector128(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector12C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 60 +void Vector130(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector134(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector138(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector13C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 64 +void Vector140(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector144(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector148(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector14C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 68 +void Vector150(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector154(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector158(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector15C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 72 +void Vector160(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector164(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector168(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector16C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 76 +void Vector170(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector174(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector178(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector17C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 80 +void Vector180(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector184(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector188(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector18C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 84 +void Vector190(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector194(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector198(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector19C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 88 +void Vector1A0(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector1A4(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector1A8(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector1AC(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 92 +void Vector1B0(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector1B4(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector1B8(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector1BC(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 96 +void Vector1C0(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector1C4(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector1C8(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector1CC(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 100 +void Vector1D0(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector1D4(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector1D8(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector1DC(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 104 +void Vector1E0(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector1E4(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector1E8(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector1EC(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 108 +void Vector1F0(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector1F4(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector1F8(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector1FC(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 112 +void Vector200(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector204(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector208(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector20C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 116 +void Vector210(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector214(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector218(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector21C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 120 +void Vector220(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector224(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector228(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector22C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 124 +void Vector230(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector234(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector238(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector23C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 128 +void Vector240(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector244(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector248(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector24C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 132 +void Vector250(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector254(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector258(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector25C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 136 +void Vector260(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector264(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector268(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector26C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 140 +void Vector270(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector274(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector278(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector27C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 144 +void Vector280(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector284(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector288(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector28C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 148 +void Vector290(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector294(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector298(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector29C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 152 +void Vector2A0(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector2A4(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector2A8(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector2AC(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 156 +void Vector2B0(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector2B4(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector2B8(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector2BC(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 160 +void Vector2C0(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector2C4(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector2C8(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector2CC(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 164 +void Vector2D0(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector2D4(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector2D8(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector2DC(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 168 +void Vector2E0(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector2E4(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector2E8(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector2EC(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 172 +void Vector2F0(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector2F4(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector2F8(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector2FC(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 176 +void Vector300(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector304(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector308(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector30C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 180 +void Vector310(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector314(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector318(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector31C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 184 +void Vector320(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector324(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector328(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector32C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 188 +void Vector330(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector334(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector338(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector33C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 192 +void Vector340(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector344(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector348(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector34C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 196 +void Vector350(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector354(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector358(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector35C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 200 +void Vector360(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector364(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector368(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector36C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 204 +void Vector370(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector374(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector378(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector37C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 208 +void Vector380(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector384(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector388(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector38C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 212 +void Vector390(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector394(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector398(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector39C(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 216 +void Vector3A0(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector3A4(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector3A8(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector3AC(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 220 +void Vector3B0(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector3B4(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector3B8(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector3BC(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 224 +void Vector3C0(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector3C4(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector3C8(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector3CC(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 228 +void Vector3D0(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector3D4(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector3D8(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector3DC(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 232 +void Vector3E0(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector3E4(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector3E8(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector3EC(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#if CORTEX_NUM_VECTORS > 236 +void Vector3F0(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector3F4(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector3F8(void) __attribute__((weak, alias("_unhandled_exception"))); +void Vector3FC(void) __attribute__((weak, alias("_unhandled_exception"))); +#endif +#endif /* !defined(__DOXYGEN__) */ + +/** + * @brief STM32 vectors table. + */ +#if !defined(__DOXYGEN__) +#if !defined(VECTORS_SECTION) +__attribute__ ((used, aligned(128), section(".vectors"))) +#else +__attribute__ ((used, aligned(128), section(VECTORS_SECTION))) +#endif +#endif +/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/ +vectors_t _vectors = { +/*lint -restore*/ + &__main_stack_end__,Reset_Handler, NMI_Handler, HardFault_Handler, + MemManage_Handler, BusFault_Handler, UsageFault_Handler, Vector1C, + Vector20, Vector24, Vector28, SVC_Handler, + DebugMon_Handler, Vector34, PendSV_Handler, SysTick_Handler, + { + Vector40, Vector44, Vector48, Vector4C, +#if CORTEX_NUM_VECTORS > 4 + Vector50, Vector54, Vector58, Vector5C, +#endif +#if CORTEX_NUM_VECTORS > 8 + Vector60, Vector64, Vector68, Vector6C, +#endif +#if CORTEX_NUM_VECTORS > 12 + Vector70, Vector74, Vector78, Vector7C, +#endif +#if CORTEX_NUM_VECTORS > 16 + Vector80, Vector84, Vector88, Vector8C, +#endif +#if CORTEX_NUM_VECTORS > 20 + Vector90, Vector94, Vector98, Vector9C, +#endif +#if CORTEX_NUM_VECTORS > 24 + VectorA0, VectorA4, VectorA8, VectorAC, +#endif +#if CORTEX_NUM_VECTORS > 28 + VectorB0, VectorB4, VectorB8, VectorBC, +#endif +#if CORTEX_NUM_VECTORS > 32 + VectorC0, VectorC4, VectorC8, VectorCC, +#endif +#if CORTEX_NUM_VECTORS > 36 + VectorD0, VectorD4, VectorD8, VectorDC, +#endif +#if CORTEX_NUM_VECTORS > 40 + VectorE0, VectorE4, VectorE8, VectorEC, +#endif +#if CORTEX_NUM_VECTORS > 44 + VectorF0, VectorF4, VectorF8, VectorFC, +#endif +#if CORTEX_NUM_VECTORS > 48 + Vector100, Vector104, Vector108, Vector10C, +#endif +#if CORTEX_NUM_VECTORS > 52 + Vector110, Vector114, Vector118, Vector11C, +#endif +#if CORTEX_NUM_VECTORS > 56 + Vector120, Vector124, Vector128, Vector12C, +#endif +#if CORTEX_NUM_VECTORS > 60 + Vector130, Vector134, Vector138, Vector13C, +#endif +#if CORTEX_NUM_VECTORS > 64 + Vector140, Vector144, Vector148, Vector14C, +#endif +#if CORTEX_NUM_VECTORS > 68 + Vector150, Vector154, Vector158, Vector15C, +#endif +#if CORTEX_NUM_VECTORS > 72 + Vector160, Vector164, Vector168, Vector16C, +#endif +#if CORTEX_NUM_VECTORS > 76 + Vector170, Vector174, Vector178, Vector17C, +#endif +#if CORTEX_NUM_VECTORS > 80 + Vector180, Vector184, Vector188, Vector18C, +#endif +#if CORTEX_NUM_VECTORS > 84 + Vector190, Vector194, Vector198, Vector19C, +#endif +#if CORTEX_NUM_VECTORS > 88 + Vector1A0, Vector1A4, Vector1A8, Vector1AC, +#endif +#if CORTEX_NUM_VECTORS > 92 + Vector1B0, Vector1B4, Vector1B8, Vector1BC, +#endif +#if CORTEX_NUM_VECTORS > 96 + Vector1C0, Vector1C4, Vector1C8, Vector1CC, +#endif +#if CORTEX_NUM_VECTORS > 100 + Vector1D0, Vector1D4, Vector1D8, Vector1DC, +#endif +#if CORTEX_NUM_VECTORS > 104 + Vector1E0, Vector1E4, Vector1E8, Vector1EC, +#endif +#if CORTEX_NUM_VECTORS > 108 + Vector1F0, Vector1F4, Vector1F8, Vector1FC, +#endif +#if CORTEX_NUM_VECTORS > 112 + Vector200, Vector204, Vector208, Vector20C, +#endif +#if CORTEX_NUM_VECTORS > 116 + Vector210, Vector214, Vector218, Vector21C, +#endif +#if CORTEX_NUM_VECTORS > 120 + Vector220, Vector224, Vector228, Vector22C, +#endif +#if CORTEX_NUM_VECTORS > 124 + Vector230, Vector234, Vector238, Vector23C, +#endif +#if CORTEX_NUM_VECTORS > 128 + Vector240, Vector244, Vector248, Vector24C, +#endif +#if CORTEX_NUM_VECTORS > 132 + Vector250, Vector254, Vector258, Vector25C, +#endif +#if CORTEX_NUM_VECTORS > 136 + Vector260, Vector264, Vector268, Vector26C, +#endif +#if CORTEX_NUM_VECTORS > 140 + Vector270, Vector274, Vector278, Vector27C, +#endif +#if CORTEX_NUM_VECTORS > 144 + Vector280, Vector284, Vector288, Vector28C, +#endif +#if CORTEX_NUM_VECTORS > 148 + Vector290, Vector294, Vector298, Vector29C, +#endif +#if CORTEX_NUM_VECTORS > 152 + Vector2A0, Vector2A4, Vector2A8, Vector2AC, +#endif +#if CORTEX_NUM_VECTORS > 156 + Vector2B0, Vector2B4, Vector2B8, Vector2BC, +#endif +#if CORTEX_NUM_VECTORS > 160 + Vector2C0, Vector2C4, Vector2C8, Vector2CC, +#endif +#if CORTEX_NUM_VECTORS > 164 + Vector2D0, Vector2D4, Vector2D8, Vector2DC, +#endif +#if CORTEX_NUM_VECTORS > 168 + Vector2E0, Vector2E4, Vector2E8, Vector2EC, +#endif +#if CORTEX_NUM_VECTORS > 172 + Vector2F0, Vector2F4, Vector2F8, Vector2FC, +#endif +#if CORTEX_NUM_VECTORS > 176 + Vector300, Vector304, Vector308, Vector30C, +#endif +#if CORTEX_NUM_VECTORS > 180 + Vector310, Vector314, Vector318, Vector31C, +#endif +#if CORTEX_NUM_VECTORS > 184 + Vector320, Vector324, Vector328, Vector32C, +#endif +#if CORTEX_NUM_VECTORS > 188 + Vector330, Vector334, Vector338, Vector33C, +#endif +#if CORTEX_NUM_VECTORS > 192 + Vector340, Vector344, Vector348, Vector34C, +#endif +#if CORTEX_NUM_VECTORS > 196 + Vector350, Vector354, Vector358, Vector35C, +#endif +#if CORTEX_NUM_VECTORS > 200 + Vector360, Vector364, Vector368, Vector36C, +#endif +#if CORTEX_NUM_VECTORS > 204 + Vector370, Vector374, Vector378, Vector37C, +#endif +#if CORTEX_NUM_VECTORS > 208 + Vector380, Vector384, Vector388, Vector38C, +#endif +#if CORTEX_NUM_VECTORS > 212 + Vector390, Vector394, Vector398, Vector39C, +#endif +#if CORTEX_NUM_VECTORS > 216 + Vector3A0, Vector3A4, Vector3A8, Vector3AC, +#endif +#if CORTEX_NUM_VECTORS > 220 + Vector3B0, Vector3B4, Vector3B8, Vector3BC, +#endif +#if CORTEX_NUM_VECTORS > 224 + Vector3C0, Vector3C4, Vector3C8, Vector3CC, +#endif +#if CORTEX_NUM_VECTORS > 228 + Vector3D0, Vector3D4, Vector3D8, Vector3DC +#endif +#if CORTEX_NUM_VECTORS > 232 + Vector3E0, Vector3E4, Vector3E8, Vector3EC +#endif +#if CORTEX_NUM_VECTORS > 236 + Vector3F0, Vector3F4, Vector3F8, Vector3FC +#endif + } +}; + +/** @} */ diff --git a/os/common/startup/ARMCMx/compilers/GCC/vectors.h b/os/common/startup/ARMCMx/compilers/GCC/vectors.h new file mode 100644 index 000000000..a86db615b --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/vectors.h @@ -0,0 +1,105 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file ARMCMx/compilers/GCC/vectors.h + * @brief Interrupt vectors for Cortex-Mx devices. + * + * @defgroup ARMCMx_VECTORS Cortex-Mx Interrupt Vectors + * @{ + */ + +#ifndef _VECTORS_H_ +#define _VECTORS_H_ + +#include "cmparams.h" + +/*===========================================================================*/ +/* Module constants. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module data structures and types. */ +/*===========================================================================*/ + +#if !defined(_FROM_ASM_) +/** + * @brief Type of an IRQ vector. + */ +typedef void (*irq_vector_t)(void); + +/** + * @brief Type of a structure representing the whole vectors table. + */ +typedef struct { + uint32_t *init_stack; + irq_vector_t reset_handler; + irq_vector_t nmi_handler; + irq_vector_t hardfault_handler; + irq_vector_t memmanage_handler; + irq_vector_t busfault_handler; + irq_vector_t usagefault_handler; + irq_vector_t vector1c; + irq_vector_t vector20; + irq_vector_t vector24; + irq_vector_t vector28; + irq_vector_t svc_handler; + irq_vector_t debugmonitor_handler; + irq_vector_t vector34; + irq_vector_t pendsv_handler; + irq_vector_t systick_handler; + irq_vector_t vectors[CORTEX_NUM_VECTORS]; +} vectors_t; +#endif /* !defined(_FROM_ASM_) */ + +/*===========================================================================*/ +/* Module macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if !defined(_FROM_ASM_) +extern vectors_t _vectors; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef __cplusplus +} +#endif + +/*===========================================================================*/ +/* Module inline functions. */ +/*===========================================================================*/ + +#endif /* _VECTORS_H_ */ + +/** @} */ -- cgit v1.2.3