From b81fe69f7174006176e505ac66aff44eb8e246f2 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 6 Nov 2011 20:48:03 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3480 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- demos/ARMCM3-STM32F407-DISCOVERY/Makefile | 209 --- demos/ARMCM3-STM32F407-DISCOVERY/chconf.h | 535 ------- demos/ARMCM3-STM32F407-DISCOVERY/halconf.h | 335 ---- demos/ARMCM3-STM32F407-DISCOVERY/iar/ch.ewp | 2256 --------------------------- demos/ARMCM3-STM32F407-DISCOVERY/iar/ch.eww | 10 - demos/ARMCM3-STM32F407-DISCOVERY/iar/ch.icf | 39 - demos/ARMCM3-STM32F407-DISCOVERY/main.c | 268 ---- demos/ARMCM3-STM32F407-DISCOVERY/mcuconf.h | 191 --- demos/ARMCM3-STM32F407-DISCOVERY/readme.txt | 31 - demos/ARMCM4-STM32F407-DISCOVERY/Makefile | 209 +++ demos/ARMCM4-STM32F407-DISCOVERY/chconf.h | 535 +++++++ demos/ARMCM4-STM32F407-DISCOVERY/halconf.h | 335 ++++ demos/ARMCM4-STM32F407-DISCOVERY/iar/ch.ewp | 2256 +++++++++++++++++++++++++++ demos/ARMCM4-STM32F407-DISCOVERY/iar/ch.eww | 10 + demos/ARMCM4-STM32F407-DISCOVERY/iar/ch.icf | 39 + demos/ARMCM4-STM32F407-DISCOVERY/main.c | 268 ++++ demos/ARMCM4-STM32F407-DISCOVERY/mcuconf.h | 191 +++ demos/ARMCM4-STM32F407-DISCOVERY/readme.txt | 31 + 18 files changed, 3874 insertions(+), 3874 deletions(-) delete mode 100644 demos/ARMCM3-STM32F407-DISCOVERY/Makefile delete mode 100644 demos/ARMCM3-STM32F407-DISCOVERY/chconf.h delete mode 100644 demos/ARMCM3-STM32F407-DISCOVERY/halconf.h delete mode 100644 demos/ARMCM3-STM32F407-DISCOVERY/iar/ch.ewp delete mode 100644 demos/ARMCM3-STM32F407-DISCOVERY/iar/ch.eww delete mode 100644 demos/ARMCM3-STM32F407-DISCOVERY/iar/ch.icf delete mode 100644 demos/ARMCM3-STM32F407-DISCOVERY/main.c delete mode 100644 demos/ARMCM3-STM32F407-DISCOVERY/mcuconf.h delete mode 100644 demos/ARMCM3-STM32F407-DISCOVERY/readme.txt create mode 100644 demos/ARMCM4-STM32F407-DISCOVERY/Makefile create mode 100644 demos/ARMCM4-STM32F407-DISCOVERY/chconf.h create mode 100644 demos/ARMCM4-STM32F407-DISCOVERY/halconf.h create mode 100644 demos/ARMCM4-STM32F407-DISCOVERY/iar/ch.ewp create mode 100644 demos/ARMCM4-STM32F407-DISCOVERY/iar/ch.eww create mode 100644 demos/ARMCM4-STM32F407-DISCOVERY/iar/ch.icf create mode 100644 demos/ARMCM4-STM32F407-DISCOVERY/main.c create mode 100644 demos/ARMCM4-STM32F407-DISCOVERY/mcuconf.h create mode 100644 demos/ARMCM4-STM32F407-DISCOVERY/readme.txt (limited to 'demos') diff --git a/demos/ARMCM3-STM32F407-DISCOVERY/Makefile b/demos/ARMCM3-STM32F407-DISCOVERY/Makefile deleted file mode 100644 index 28a823c16..000000000 --- a/demos/ARMCM3-STM32F407-DISCOVERY/Makefile +++ /dev/null @@ -1,209 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -endif - -# C specific options here (added to USE_OPT). -ifeq ($(USE_COPT),) - USE_COPT = -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable this if you want to see the full log while compiling. -ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Imported source files and paths -CHIBIOS = ../.. -include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -include $(CHIBIOS)/test/test.mk - -# Define linker script file here -LDSCRIPT= $(PORTLD)/STM32F407xG.ld - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/demos/ARMCM3-STM32F407-DISCOVERY/chconf.h b/demos/ARMCM3-STM32F407-DISCOVERY/chconf.h deleted file mode 100644 index 9dd831c96..000000000 --- a/demos/ARMCM3-STM32F407-DISCOVERY/chconf.h +++ /dev/null @@ -1,535 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/** - * @name Kernel parameters and options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Performance options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Subsystem options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Debug options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Debug option, system state check. - * @details If enabled the correct call protocol for system APIs is checked - * at runtime. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK FALSE -#endif - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel hooks - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitily from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Context switch hook. - * @details This hook is invoked just before switching between threads. - */ -#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) -#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* System halt code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/** @} */ - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/demos/ARMCM3-STM32F407-DISCOVERY/halconf.h b/demos/ARMCM3-STM32F407-DISCOVERY/halconf.h deleted file mode 100644 index b4fb49092..000000000 --- a/demos/ARMCM3-STM32F407-DISCOVERY/halconf.h +++ /dev/null @@ -1,335 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the EXT subsystem. - */ -#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) -#define HAL_USE_EXT FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the RTC subsystem. - */ -#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL TRUE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) -#define MAC_USE_EVENTS TRUE -#endif - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/demos/ARMCM3-STM32F407-DISCOVERY/iar/ch.ewp b/demos/ARMCM3-STM32F407-DISCOVERY/iar/ch.ewp deleted file mode 100644 index cf9763bbe..000000000 --- a/demos/ARMCM3-STM32F407-DISCOVERY/iar/ch.ewp +++ /dev/null @@ -1,2256 +0,0 @@ - - - - 2 - - Debug - - ARM - - 1 - - General - 3 - - 21 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ICCARM - 2 - - 28 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AARM - 2 - - 8 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - OBJCOPY - 0 - - 1 - 1 - 1 - - - - - - - - - CUSTOM - 3 - - - - - - - BICOMP - 0 - - - - BUILDACTION - 1 - - - - - - - ILINK - 0 - - 13 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 1 - - - - - - - BILINK - 0 - - - - - Release - - ARM - - 0 - - General - 3 - - 21 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ICCARM - 2 - - 28 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AARM - 2 - - 8 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - OBJCOPY - 0 - - 1 - 1 - 0 - - - - - - - - - CUSTOM - 3 - - - - - - - BICOMP - 0 - - - - BUILDACTION - 1 - - - - - - - ILINK - 0 - - 13 - 1 - 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - IARCHIVE - 0 - - 0 - 1 - 0 - - - - - - - BILINK - 0 - - - - - board - - $PROJ_DIR$\..\..\..\boards\ST_STM32F4_DISCOVERY\board.c - - - $PROJ_DIR$\..\..\..\boards\ST_STM32F4_DISCOVERY\board.h - - - - os - - hal - - include - - $PROJ_DIR$\..\..\..\os\hal\include\adc.h - - - $PROJ_DIR$\..\..\..\os\hal\include\can.h - - - $PROJ_DIR$\..\..\..\os\hal\include\ext.h - - - $PROJ_DIR$\..\..\..\os\hal\include\gpt.h - - - $PROJ_DIR$\..\..\..\os\hal\include\hal.h - - - $PROJ_DIR$\..\..\..\os\hal\include\i2c.h - - - $PROJ_DIR$\..\..\..\os\hal\include\icu.h - - - $PROJ_DIR$\..\..\..\os\hal\include\mac.h - - - $PROJ_DIR$\..\..\..\os\hal\include\mii.h - - - $PROJ_DIR$\..\..\..\os\hal\include\mmc_spi.h - - - $PROJ_DIR$\..\..\..\os\hal\include\pal.h - - - $PROJ_DIR$\..\..\..\os\hal\include\pwm.h - - - $PROJ_DIR$\..\..\..\os\hal\include\rtc.h - - - $PROJ_DIR$\..\..\..\os\hal\include\sdc.h - - - $PROJ_DIR$\..\..\..\os\hal\include\serial.h - - - $PROJ_DIR$\..\..\..\os\hal\include\serial_usb.h - - - $PROJ_DIR$\..\..\..\os\hal\include\spi.h - - - $PROJ_DIR$\..\..\..\os\hal\include\uart.h - - - $PROJ_DIR$\..\..\..\os\hal\include\usb.h - - - $PROJ_DIR$\..\..\..\os\hal\include\usb_cdc.h - - - - src - - $PROJ_DIR$\..\..\..\os\hal\src\adc.c - - - $PROJ_DIR$\..\..\..\os\hal\src\can.c - - - $PROJ_DIR$\..\..\..\os\hal\src\ext.c - - - $PROJ_DIR$\..\..\..\os\hal\src\gpt.c - - - $PROJ_DIR$\..\..\..\os\hal\src\hal.c - - - $PROJ_DIR$\..\..\..\os\hal\src\i2c.c - - - $PROJ_DIR$\..\..\..\os\hal\src\icu.c - - - $PROJ_DIR$\..\..\..\os\hal\src\mac.c - - - $PROJ_DIR$\..\..\..\os\hal\src\mmc_spi.c - - - $PROJ_DIR$\..\..\..\os\hal\src\pal.c - - - $PROJ_DIR$\..\..\..\os\hal\src\pwm.c - - - $PROJ_DIR$\..\..\..\os\hal\src\rtc.c - - - $PROJ_DIR$\..\..\..\os\hal\src\sdc.c - - - $PROJ_DIR$\..\..\..\os\hal\src\serial.c - - - $PROJ_DIR$\..\..\..\os\hal\src\serial_usb.c - - - $PROJ_DIR$\..\..\..\os\hal\src\spi.c - - - $PROJ_DIR$\..\..\..\os\hal\src\uart.c - - - $PROJ_DIR$\..\..\..\os\hal\src\usb.c - - - - - kernel - - include - - $PROJ_DIR$\..\..\..\os\kernel\include\ch.h - - - $PROJ_DIR$\..\..\..\os\kernel\include\chcond.h - - - $PROJ_DIR$\..\..\..\os\kernel\include\chdebug.h - - - $PROJ_DIR$\..\..\..\os\kernel\include\chdynamic.h - - - $PROJ_DIR$\..\..\..\os\kernel\include\chevents.h - - - $PROJ_DIR$\..\..\..\os\kernel\include\chheap.h - - - $PROJ_DIR$\..\..\..\os\kernel\include\chinline.h - - - $PROJ_DIR$\..\..\..\os\kernel\include\chioch.h - - - $PROJ_DIR$\..\..\..\os\kernel\include\chlists.h - - - $PROJ_DIR$\..\..\..\os\kernel\include\chmboxes.h - - - $PROJ_DIR$\..\..\..\os\kernel\include\chmemcore.h - - - $PROJ_DIR$\..\..\..\os\kernel\include\chmempools.h - - - $PROJ_DIR$\..\..\..\os\kernel\include\chmsg.h - - - $PROJ_DIR$\..\..\..\os\kernel\include\chmtx.h - - - $PROJ_DIR$\..\..\..\os\kernel\include\chqueues.h - - - $PROJ_DIR$\..\..\..\os\kernel\include\chregistry.h - - - $PROJ_DIR$\..\..\..\os\kernel\include\chschd.h - - - $PROJ_DIR$\..\..\..\os\kernel\include\chsem.h - - - $PROJ_DIR$\..\..\..\os\kernel\include\chstreams.h - - - $PROJ_DIR$\..\..\..\os\kernel\include\chsys.h - - - $PROJ_DIR$\..\..\..\os\kernel\include\chthreads.h - - - $PROJ_DIR$\..\..\..\os\kernel\include\chvt.h - - - - src - - $PROJ_DIR$\..\..\..\os\kernel\src\chcond.c - - - $PROJ_DIR$\..\..\..\os\kernel\src\chdebug.c - - - $PROJ_DIR$\..\..\..\os\kernel\src\chdynamic.c - - - $PROJ_DIR$\..\..\..\os\kernel\src\chevents.c - - - $PROJ_DIR$\..\..\..\os\kernel\src\chheap.c - - - $PROJ_DIR$\..\..\..\os\kernel\src\chlists.c - - - $PROJ_DIR$\..\..\..\os\kernel\src\chmboxes.c - - - $PROJ_DIR$\..\..\..\os\kernel\src\chmemcore.c - - - $PROJ_DIR$\..\..\..\os\kernel\src\chmempools.c - - - $PROJ_DIR$\..\..\..\os\kernel\src\chmsg.c - - - $PROJ_DIR$\..\..\..\os\kernel\src\chmtx.c - - - $PROJ_DIR$\..\..\..\os\kernel\src\chqueues.c - - - $PROJ_DIR$\..\..\..\os\kernel\src\chregistry.c - - - $PROJ_DIR$\..\..\..\os\kernel\src\chschd.c - - - $PROJ_DIR$\..\..\..\os\kernel\src\chsem.c - - - $PROJ_DIR$\..\..\..\os\kernel\src\chsys.c - - - $PROJ_DIR$\..\..\..\os\kernel\src\chthreads.c - - - $PROJ_DIR$\..\..\..\os\kernel\src\chvt.c - - - - - platform - - $PROJ_DIR$\..\..\..\os\hal\platforms\STM32F4xx\hal_lld.c - - - $PROJ_DIR$\..\..\..\os\hal\platforms\STM32F4xx\hal_lld.h - - - $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.c - - - $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.h - - - $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pwm_lld.c - - - $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pwm_lld.h - - - $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\serial_lld.c - - - $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\serial_lld.h - - - $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\spi_lld.c - - - $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\spi_lld.h - - - $PROJ_DIR$\..\..\..\os\hal\platforms\STM32F4xx\stm32_dma.c - - - $PROJ_DIR$\..\..\..\os\hal\platforms\STM32F4xx\stm32_dma.h - - - $PROJ_DIR$\..\..\..\os\hal\platforms\STM32F4xx\stm32_rcc.h - - - $PROJ_DIR$\..\..\..\os\hal\platforms\STM32F4xx\stm32f4xx.h - - - - port - - STM32F4xx - - $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F4xx\cmparams.h - - - $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F4xx\vectors.s - - - - $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chcore.c - - - $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chcore.h - - - $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chcore_v7m.c - - - $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chcore_v7m.h - - - $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chcoreasm_v7m.s - - - $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chtypes.h - - - $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\cstartup.s - - - $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\nvic.c - - - $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\nvic.h - - - - - test - - $PROJ_DIR$\..\..\..\test\test.c - - - $PROJ_DIR$\..\..\..\test\test.h - - - $PROJ_DIR$\..\..\..\test\testbmk.c - - - $PROJ_DIR$\..\..\..\test\testbmk.h - - - $PROJ_DIR$\..\..\..\test\testdyn.c - - - $PROJ_DIR$\..\..\..\test\testdyn.h - - - $PROJ_DIR$\..\..\..\test\testevt.c - - - $PROJ_DIR$\..\..\..\test\testevt.h - - - $PROJ_DIR$\..\..\..\test\testheap.c - - - $PROJ_DIR$\..\..\..\test\testheap.h - - - $PROJ_DIR$\..\..\..\test\testmbox.c - - - $PROJ_DIR$\..\..\..\test\testmbox.h - - - $PROJ_DIR$\..\..\..\test\testmsg.c - - - $PROJ_DIR$\..\..\..\test\testmsg.h - - - $PROJ_DIR$\..\..\..\test\testmtx.c - - - $PROJ_DIR$\..\..\..\test\testmtx.h - - - $PROJ_DIR$\..\..\..\test\testpools.c - - - $PROJ_DIR$\..\..\..\test\testpools.h - - - $PROJ_DIR$\..\..\..\test\testqueues.c - - - $PROJ_DIR$\..\..\..\test\testqueues.h - - - $PROJ_DIR$\..\..\..\test\testsem.c - - - $PROJ_DIR$\..\..\..\test\testsem.h - - - $PROJ_DIR$\..\..\..\test\testthd.c - - - $PROJ_DIR$\..\..\..\test\testthd.h - - - - $PROJ_DIR$\..\chconf.h - - - $PROJ_DIR$\..\halconf.h - - - $PROJ_DIR$\..\main.c - - - $PROJ_DIR$\..\mcuconf.h - - - - diff --git a/demos/ARMCM3-STM32F407-DISCOVERY/iar/ch.eww b/demos/ARMCM3-STM32F407-DISCOVERY/iar/ch.eww deleted file mode 100644 index f9b3b2000..000000000 --- a/demos/ARMCM3-STM32F407-DISCOVERY/iar/ch.eww +++ /dev/null @@ -1,10 +0,0 @@ - - - - - $WS_DIR$\ch.ewp - - - - - diff --git a/demos/ARMCM3-STM32F407-DISCOVERY/iar/ch.icf b/demos/ARMCM3-STM32F407-DISCOVERY/iar/ch.icf deleted file mode 100644 index c0a51f44c..000000000 --- a/demos/ARMCM3-STM32F407-DISCOVERY/iar/ch.icf +++ /dev/null @@ -1,39 +0,0 @@ -/*###ICF### Section handled by ICF editor, don't touch! ****/ -/*-Editor annotation file-*/ -/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ -/*-Specials-*/ -define symbol __ICFEDIT_intvec_start__ = 0x08000000; -/*-Memory Regions-*/ -define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; -define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; -define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; -define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; -/*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = 0x400; -define symbol __ICFEDIT_size_heap__ = 0x400; -/**** End of ICF editor section. ###ICF###*/ - -/* Size of the IRQ Stack (Main Stack).*/ -define symbol __ICFEDIT_size_irqstack__ = 0x400; - -define memory mem with size = 4G; -define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; -define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; - -define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ {section CSTACK}; -define block IRQSTACK with alignment = 8, size = __ICFEDIT_size_irqstack__ {}; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ {}; -define block SYSHEAP with alignment = 8 {section SYSHEAP}; -define block DATABSS with alignment = 8 {readwrite, zeroinit}; - -initialize by copy { readwrite }; -do not initialize { section .noinit }; - -keep { section .intvec }; - -place at address mem:__ICFEDIT_intvec_start__ {section .intvec}; -place in ROM_region {readonly}; -place at start of RAM_region {block IRQSTACK}; -place in RAM_region {block DATABSS, block HEAP}; -place in RAM_region {block SYSHEAP}; -place at end of RAM_region {block CSTACK}; diff --git a/demos/ARMCM3-STM32F407-DISCOVERY/main.c b/demos/ARMCM3-STM32F407-DISCOVERY/main.c deleted file mode 100644 index cc12871d4..000000000 --- a/demos/ARMCM3-STM32F407-DISCOVERY/main.c +++ /dev/null @@ -1,268 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" -#include "test.h" - -#if 0 -static void pwmpcb(PWMDriver *pwmp); -static void adccb(ADCDriver *adcp, adcsample_t *buffer, size_t n); -static void spicb(SPIDriver *spip); - -/* Total number of channels to be sampled by a single ADC operation.*/ -#define ADC_GRP1_NUM_CHANNELS 2 - -/* Depth of the conversion buffer, channels are sampled four times each.*/ -#define ADC_GRP1_BUF_DEPTH 4 - -/* - * ADC samples buffer. - */ -static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; - -/* - * ADC conversion group. - * Mode: Linear buffer, 4 samples of 2 channels, SW triggered. - * Channels: IN10 (48 cycles sample time) - * Sensor (192 cycles sample time) - */ -static const ADCConversionGroup adcgrpcfg = { - FALSE, - ADC_GRP1_NUM_CHANNELS, - adccb, - NULL, - /* HW dependent part.*/ - 0, - 0, - 0, - ADC_SMPR2_SMP_AN10(ADC_SAMPLE_48) | ADC_SMPR2_SMP_SENSOR(ADC_SAMPLE_192), - 0, - ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), - 0, - 0, - 0, - ADC_SQR5_SQ2_N(ADC_CHANNEL_IN10) | ADC_SQR5_SQ1_N(ADC_CHANNEL_SENSOR) -}; - -/* - * PWM configuration structure. - * Cyclic callback enabled, channels 3 and 4 enabled without callbacks, - * the active state is a logic one. - */ -static PWMConfig pwmcfg = { - 10000, /* 10KHz PWM clock frequency. */ - 10000, /* PWM period 1S (in ticks). */ - pwmpcb, - { - {PWM_OUTPUT_ACTIVE_HIGH, NULL}, - {PWM_OUTPUT_ACTIVE_HIGH, NULL}, - {PWM_OUTPUT_DISABLED, NULL}, - {PWM_OUTPUT_DISABLED, NULL} - }, - /* HW dependent part.*/ - 0 -}; - -/* - * SPI configuration structure. - * Maximum speed (12MHz), CPHA=0, CPOL=0, 16bits frames, MSb transmitted first. - * The slave select line is the pin GPIOA_SPI1NSS on the port GPIOA. - */ -static const SPIConfig spicfg = { - spicb, - /* HW dependent part.*/ - GPIOB, - 12, - SPI_CR1_DFF -}; - -/* - * PWM cyclic callback. - * A new ADC conversion is started. - */ -static void pwmpcb(PWMDriver *pwmp) { - - (void)pwmp; - - /* Starts an asynchronous ADC conversion operation, the conversion - will be executed in parallel to the current PWM cycle and will - terminate before the next PWM cycle.*/ - chSysLockFromIsr(); - adcStartConversionI(&ADCD1, &adcgrpcfg, samples, ADC_GRP1_BUF_DEPTH); - chSysUnlockFromIsr(); -} - -/* - * ADC end conversion callback. - * The PWM channels are reprogrammed using the latest ADC samples. - * The latest samples are transmitted into a single SPI transaction. - */ -void adccb(ADCDriver *adcp, adcsample_t *buffer, size_t n) { - - (void) buffer; (void) n; - /* Note, only in the ADC_COMPLETE state because the ADC driver fires an - intermediate callback when the buffer is half full.*/ - if (adcp->state == ADC_COMPLETE) { - adcsample_t avg_ch1, avg_ch2; - - /* Calculates the average values from the ADC samples.*/ - avg_ch1 = (samples[0] + samples[2] + samples[4] + samples[6]) / 4; - avg_ch2 = (samples[1] + samples[3] + samples[5] + samples[7]) / 4; - - chSysLockFromIsr(); - - /* Changes the channels pulse width, the change will be effective - starting from the next cycle.*/ - pwmEnableChannelI(&PWMD4, 0, PWM_FRACTION_TO_WIDTH(&PWMD4, 4096, avg_ch1)); - pwmEnableChannelI(&PWMD4, 1, PWM_FRACTION_TO_WIDTH(&PWMD4, 4096, avg_ch2)); - - /* SPI slave selection and transmission start.*/ - spiSelectI(&SPID2); - spiStartSendI(&SPID2, ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH, samples); - - chSysUnlockFromIsr(); - } -} - -/* - * SPI end transfer callback. - */ -static void spicb(SPIDriver *spip) { - - /* On transfer end just releases the slave select line.*/ - chSysLockFromIsr(); - spiUnselectI(spip); - chSysUnlockFromIsr(); -} -#endif - -/* - * This is a periodic thread that does absolutely nothing except increasing - * a seconds counter. - */ -static WORKING_AREA(waThread1, 128); -#if 0 -static msg_t Thread1(void *arg) { - static uint32_t seconds_counter; - - (void)arg; - chRegSetThreadName("counter"); - while (TRUE) { - chThdSleepMilliseconds(1000); - seconds_counter++; - } -} -#else -static msg_t Thread1(void *arg) { - - (void)arg; - chRegSetThreadName("blinker"); - while (TRUE) { - palSetPad(GPIOD, GPIOD_LED5); - chThdSleepMilliseconds(500); - palClearPad(GPIOD, GPIOD_LED5); - chThdSleepMilliseconds(500); - } -} -#endif - -/* - * Application entry point. - */ -int main(void) { - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Activates the serial driver 1 using the driver default configuration. - * PA2(TX) and PA3(RX) are routed to USART1. - */ - sdStart(&SD2, NULL); - palSetPadMode(GPIOA, 2, PAL_MODE_ALTERNATE(7)); - palSetPadMode(GPIOA, 3, PAL_MODE_ALTERNATE(7)); - - /* - * If the user button is pressed after the reset then the test suite is - * executed immediately before activating the various device drivers in - * order to not alter the benchmark scores. - */ - if (palReadPad(GPIOA, GPIOA_BUTTON)) - TestThread(&SD2); - - /* - * Initializes the SPI driver 2. The SPI2 signals are routed as follow: - * PB12 - NSS. - * PB13 - SCK. - * PB14 - MISO. - * PB15 - MOSI. - */ -#if 0 - spiStart(&SPID2, &spicfg); - palSetPad(GPIOB, 12); - palSetPadMode(GPIOB, 12, PAL_MODE_OUTPUT_PUSHPULL | - PAL_STM32_OSPEED_HIGHEST); /* NSS. */ - palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(5) | - PAL_STM32_OSPEED_HIGHEST); /* SCK. */ - palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(5)); /* MISO. */ - palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(5) | - PAL_STM32_OSPEED_HIGHEST); /* MOSI. */ - - /* - * Initializes the ADC driver 1 and enable the thermal sensor. - * The pin PC0 on the port GPIOC is programmed as analog input. - */ - adcStart(&ADCD1, NULL); - adcSTM32EnableTSVREFE(); - palSetPadMode(GPIOC, 0, PAL_MODE_INPUT_ANALOG); - - /* - * Initializes the PWM driver 4, routes the TIM4 outputs to the board LEDs. - */ - pwmStart(&PWMD4, &pwmcfg); - palSetPadMode(GPIOB, GPIOB_LED4, PAL_MODE_ALTERNATE(2)); - palSetPadMode(GPIOB, GPIOB_LED3, PAL_MODE_ALTERNATE(2)); -#endif - - /* - * Creates the example thread. - */ - chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); - - /* - * Normal main() thread activity, in this demo it does nothing except - * sleeping in a loop and check the button state, when the button is - * pressed the test procedure is launched with output on the serial - * driver 1. - */ - while (TRUE) { - if (palReadPad(GPIOA, GPIOA_BUTTON)) - TestThread(&SD2); - chThdSleepMilliseconds(500); - } -} diff --git a/demos/ARMCM3-STM32F407-DISCOVERY/mcuconf.h b/demos/ARMCM3-STM32F407-DISCOVERY/mcuconf.h deleted file mode 100644 index 058cc7a76..000000000 --- a/demos/ARMCM3-STM32F407-DISCOVERY/mcuconf.h +++ /dev/null @@ -1,191 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32L1xx drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_NO_INIT FALSE -#define STM32_VOS STM32_VOS_HIGH -#define STM32_HSI_ENABLED TRUE -#define STM32_LSI_ENABLED TRUE -#define STM32_HSE_ENABLED TRUE -#define STM32_LSE_ENABLED FALSE -#define STM32_CLOCK48_REQUIRED TRUE -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLM_VALUE 8 -#define STM32_PLLN_VALUE 336 -#define STM32_PLLP_VALUE 2 -#define STM32_PLLQ_VALUE 7 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV4 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_RTCSEL STM32_RTCSEL_LSI -#define STM32_RTCPRE_VALUE 8 -#define STM32_MCO1SEL STM32_MCO1SEL_HSI -#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 -#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK -#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 -#define STM32_I2SSRC STM32_I2CSRC_CKIN -#define STM32_PLLI2SN_VALUE 192 -#define STM32_PLLI2SR_VALUE 5 - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * EXT driver system settings. - */ -#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 TRUE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 FALSE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/demos/ARMCM3-STM32F407-DISCOVERY/readme.txt b/demos/ARMCM3-STM32F407-DISCOVERY/readme.txt deleted file mode 100644 index ab3c5199a..000000000 --- a/demos/ARMCM3-STM32F407-DISCOVERY/readme.txt +++ /dev/null @@ -1,31 +0,0 @@ -***************************************************************************** -** ChibiOS/RT port for ARM-Cortex-M3 STM32F100xB. ** -***************************************************************************** - -** TARGET ** - -The demo runs on an ST STM32F4-Discovery board. - -** The Demo ** - -The demo shows how to use the ADC, PWM and SPI drivers using asynchronous -APIs. The ADC samples two channels (temperature sensor and PC0) and modulates -the PWM using the sampled values. The sample data is also transmitted using -the SPI port 1. -By pressing the button located on the board the test procedure is activated -with output on the serial port SD2 (USART2). - -** Build Procedure ** - -The demo has been tested by using the free Codesourcery GCC-based toolchain -and YAGARTO. just modify the TRGT line in the makefile in order to use -different GCC toolchains. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/demos/ARMCM4-STM32F407-DISCOVERY/Makefile b/demos/ARMCM4-STM32F407-DISCOVERY/Makefile new file mode 100644 index 000000000..28a823c16 --- /dev/null +++ b/demos/ARMCM4-STM32F407-DISCOVERY/Makefile @@ -0,0 +1,209 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../.. +include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F407xG.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/demos/ARMCM4-STM32F407-DISCOVERY/chconf.h b/demos/ARMCM4-STM32F407-DISCOVERY/chconf.h new file mode 100644 index 000000000..9dd831c96 --- /dev/null +++ b/demos/ARMCM4-STM32F407-DISCOVERY/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/demos/ARMCM4-STM32F407-DISCOVERY/halconf.h b/demos/ARMCM4-STM32F407-DISCOVERY/halconf.h new file mode 100644 index 000000000..b4fb49092 --- /dev/null +++ b/demos/ARMCM4-STM32F407-DISCOVERY/halconf.h @@ -0,0 +1,335 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/demos/ARMCM4-STM32F407-DISCOVERY/iar/ch.ewp b/demos/ARMCM4-STM32F407-DISCOVERY/iar/ch.ewp new file mode 100644 index 000000000..cf9763bbe --- /dev/null +++ b/demos/ARMCM4-STM32F407-DISCOVERY/iar/ch.ewp @@ -0,0 +1,2256 @@ + + + + 2 + + Debug + + ARM + + 1 + + General + 3 + + 21 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 28 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 8 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 13 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Release + + ARM + + 0 + + General + 3 + + 21 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 28 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 8 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 0 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 13 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 0 + + + + + + + BILINK + 0 + + + + + board + + $PROJ_DIR$\..\..\..\boards\ST_STM32F4_DISCOVERY\board.c + + + $PROJ_DIR$\..\..\..\boards\ST_STM32F4_DISCOVERY\board.h + + + + os + + hal + + include + + $PROJ_DIR$\..\..\..\os\hal\include\adc.h + + + $PROJ_DIR$\..\..\..\os\hal\include\can.h + + + $PROJ_DIR$\..\..\..\os\hal\include\ext.h + + + $PROJ_DIR$\..\..\..\os\hal\include\gpt.h + + + $PROJ_DIR$\..\..\..\os\hal\include\hal.h + + + $PROJ_DIR$\..\..\..\os\hal\include\i2c.h + + + $PROJ_DIR$\..\..\..\os\hal\include\icu.h + + + $PROJ_DIR$\..\..\..\os\hal\include\mac.h + + + $PROJ_DIR$\..\..\..\os\hal\include\mii.h + + + $PROJ_DIR$\..\..\..\os\hal\include\mmc_spi.h + + + $PROJ_DIR$\..\..\..\os\hal\include\pal.h + + + $PROJ_DIR$\..\..\..\os\hal\include\pwm.h + + + $PROJ_DIR$\..\..\..\os\hal\include\rtc.h + + + $PROJ_DIR$\..\..\..\os\hal\include\sdc.h + + + $PROJ_DIR$\..\..\..\os\hal\include\serial.h + + + $PROJ_DIR$\..\..\..\os\hal\include\serial_usb.h + + + $PROJ_DIR$\..\..\..\os\hal\include\spi.h + + + $PROJ_DIR$\..\..\..\os\hal\include\uart.h + + + $PROJ_DIR$\..\..\..\os\hal\include\usb.h + + + $PROJ_DIR$\..\..\..\os\hal\include\usb_cdc.h + + + + src + + $PROJ_DIR$\..\..\..\os\hal\src\adc.c + + + $PROJ_DIR$\..\..\..\os\hal\src\can.c + + + $PROJ_DIR$\..\..\..\os\hal\src\ext.c + + + $PROJ_DIR$\..\..\..\os\hal\src\gpt.c + + + $PROJ_DIR$\..\..\..\os\hal\src\hal.c + + + $PROJ_DIR$\..\..\..\os\hal\src\i2c.c + + + $PROJ_DIR$\..\..\..\os\hal\src\icu.c + + + $PROJ_DIR$\..\..\..\os\hal\src\mac.c + + + $PROJ_DIR$\..\..\..\os\hal\src\mmc_spi.c + + + $PROJ_DIR$\..\..\..\os\hal\src\pal.c + + + $PROJ_DIR$\..\..\..\os\hal\src\pwm.c + + + $PROJ_DIR$\..\..\..\os\hal\src\rtc.c + + + $PROJ_DIR$\..\..\..\os\hal\src\sdc.c + + + $PROJ_DIR$\..\..\..\os\hal\src\serial.c + + + $PROJ_DIR$\..\..\..\os\hal\src\serial_usb.c + + + $PROJ_DIR$\..\..\..\os\hal\src\spi.c + + + $PROJ_DIR$\..\..\..\os\hal\src\uart.c + + + $PROJ_DIR$\..\..\..\os\hal\src\usb.c + + + + + kernel + + include + + $PROJ_DIR$\..\..\..\os\kernel\include\ch.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chcond.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chdebug.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chdynamic.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chevents.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chheap.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chinline.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chioch.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chlists.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chmboxes.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chmemcore.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chmempools.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chmsg.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chmtx.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chqueues.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chregistry.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chschd.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chsem.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chstreams.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chsys.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chthreads.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chvt.h + + + + src + + $PROJ_DIR$\..\..\..\os\kernel\src\chcond.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chdebug.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chdynamic.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chevents.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chheap.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chlists.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chmboxes.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chmemcore.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chmempools.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chmsg.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chmtx.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chqueues.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chregistry.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chschd.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chsem.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chsys.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chthreads.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chvt.c + + + + + platform + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32F4xx\hal_lld.c + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32F4xx\hal_lld.h + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.c + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.h + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pwm_lld.c + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pwm_lld.h + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\serial_lld.c + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\serial_lld.h + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\spi_lld.c + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\spi_lld.h + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32F4xx\stm32_dma.c + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32F4xx\stm32_dma.h + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32F4xx\stm32_rcc.h + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32F4xx\stm32f4xx.h + + + + port + + STM32F4xx + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F4xx\cmparams.h + + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32F4xx\vectors.s + + + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chcore.c + + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chcore.h + + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chcore_v7m.c + + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chcore_v7m.h + + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chcoreasm_v7m.s + + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chtypes.h + + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\cstartup.s + + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\nvic.c + + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\nvic.h + + + + + test + + $PROJ_DIR$\..\..\..\test\test.c + + + $PROJ_DIR$\..\..\..\test\test.h + + + $PROJ_DIR$\..\..\..\test\testbmk.c + + + $PROJ_DIR$\..\..\..\test\testbmk.h + + + $PROJ_DIR$\..\..\..\test\testdyn.c + + + $PROJ_DIR$\..\..\..\test\testdyn.h + + + $PROJ_DIR$\..\..\..\test\testevt.c + + + $PROJ_DIR$\..\..\..\test\testevt.h + + + $PROJ_DIR$\..\..\..\test\testheap.c + + + $PROJ_DIR$\..\..\..\test\testheap.h + + + $PROJ_DIR$\..\..\..\test\testmbox.c + + + $PROJ_DIR$\..\..\..\test\testmbox.h + + + $PROJ_DIR$\..\..\..\test\testmsg.c + + + $PROJ_DIR$\..\..\..\test\testmsg.h + + + $PROJ_DIR$\..\..\..\test\testmtx.c + + + $PROJ_DIR$\..\..\..\test\testmtx.h + + + $PROJ_DIR$\..\..\..\test\testpools.c + + + $PROJ_DIR$\..\..\..\test\testpools.h + + + $PROJ_DIR$\..\..\..\test\testqueues.c + + + $PROJ_DIR$\..\..\..\test\testqueues.h + + + $PROJ_DIR$\..\..\..\test\testsem.c + + + $PROJ_DIR$\..\..\..\test\testsem.h + + + $PROJ_DIR$\..\..\..\test\testthd.c + + + $PROJ_DIR$\..\..\..\test\testthd.h + + + + $PROJ_DIR$\..\chconf.h + + + $PROJ_DIR$\..\halconf.h + + + $PROJ_DIR$\..\main.c + + + $PROJ_DIR$\..\mcuconf.h + + + + diff --git a/demos/ARMCM4-STM32F407-DISCOVERY/iar/ch.eww b/demos/ARMCM4-STM32F407-DISCOVERY/iar/ch.eww new file mode 100644 index 000000000..f9b3b2000 --- /dev/null +++ b/demos/ARMCM4-STM32F407-DISCOVERY/iar/ch.eww @@ -0,0 +1,10 @@ + + + + + $WS_DIR$\ch.ewp + + + + + diff --git a/demos/ARMCM4-STM32F407-DISCOVERY/iar/ch.icf b/demos/ARMCM4-STM32F407-DISCOVERY/iar/ch.icf new file mode 100644 index 000000000..c0a51f44c --- /dev/null +++ b/demos/ARMCM4-STM32F407-DISCOVERY/iar/ch.icf @@ -0,0 +1,39 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x08000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; +define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x400; +define symbol __ICFEDIT_size_heap__ = 0x400; +/**** End of ICF editor section. ###ICF###*/ + +/* Size of the IRQ Stack (Main Stack).*/ +define symbol __ICFEDIT_size_irqstack__ = 0x400; + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ {section CSTACK}; +define block IRQSTACK with alignment = 8, size = __ICFEDIT_size_irqstack__ {}; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ {}; +define block SYSHEAP with alignment = 8 {section SYSHEAP}; +define block DATABSS with alignment = 8 {readwrite, zeroinit}; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +keep { section .intvec }; + +place at address mem:__ICFEDIT_intvec_start__ {section .intvec}; +place in ROM_region {readonly}; +place at start of RAM_region {block IRQSTACK}; +place in RAM_region {block DATABSS, block HEAP}; +place in RAM_region {block SYSHEAP}; +place at end of RAM_region {block CSTACK}; diff --git a/demos/ARMCM4-STM32F407-DISCOVERY/main.c b/demos/ARMCM4-STM32F407-DISCOVERY/main.c new file mode 100644 index 000000000..cc12871d4 --- /dev/null +++ b/demos/ARMCM4-STM32F407-DISCOVERY/main.c @@ -0,0 +1,268 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" +#include "test.h" + +#if 0 +static void pwmpcb(PWMDriver *pwmp); +static void adccb(ADCDriver *adcp, adcsample_t *buffer, size_t n); +static void spicb(SPIDriver *spip); + +/* Total number of channels to be sampled by a single ADC operation.*/ +#define ADC_GRP1_NUM_CHANNELS 2 + +/* Depth of the conversion buffer, channels are sampled four times each.*/ +#define ADC_GRP1_BUF_DEPTH 4 + +/* + * ADC samples buffer. + */ +static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; + +/* + * ADC conversion group. + * Mode: Linear buffer, 4 samples of 2 channels, SW triggered. + * Channels: IN10 (48 cycles sample time) + * Sensor (192 cycles sample time) + */ +static const ADCConversionGroup adcgrpcfg = { + FALSE, + ADC_GRP1_NUM_CHANNELS, + adccb, + NULL, + /* HW dependent part.*/ + 0, + 0, + 0, + ADC_SMPR2_SMP_AN10(ADC_SAMPLE_48) | ADC_SMPR2_SMP_SENSOR(ADC_SAMPLE_192), + 0, + ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), + 0, + 0, + 0, + ADC_SQR5_SQ2_N(ADC_CHANNEL_IN10) | ADC_SQR5_SQ1_N(ADC_CHANNEL_SENSOR) +}; + +/* + * PWM configuration structure. + * Cyclic callback enabled, channels 3 and 4 enabled without callbacks, + * the active state is a logic one. + */ +static PWMConfig pwmcfg = { + 10000, /* 10KHz PWM clock frequency. */ + 10000, /* PWM period 1S (in ticks). */ + pwmpcb, + { + {PWM_OUTPUT_ACTIVE_HIGH, NULL}, + {PWM_OUTPUT_ACTIVE_HIGH, NULL}, + {PWM_OUTPUT_DISABLED, NULL}, + {PWM_OUTPUT_DISABLED, NULL} + }, + /* HW dependent part.*/ + 0 +}; + +/* + * SPI configuration structure. + * Maximum speed (12MHz), CPHA=0, CPOL=0, 16bits frames, MSb transmitted first. + * The slave select line is the pin GPIOA_SPI1NSS on the port GPIOA. + */ +static const SPIConfig spicfg = { + spicb, + /* HW dependent part.*/ + GPIOB, + 12, + SPI_CR1_DFF +}; + +/* + * PWM cyclic callback. + * A new ADC conversion is started. + */ +static void pwmpcb(PWMDriver *pwmp) { + + (void)pwmp; + + /* Starts an asynchronous ADC conversion operation, the conversion + will be executed in parallel to the current PWM cycle and will + terminate before the next PWM cycle.*/ + chSysLockFromIsr(); + adcStartConversionI(&ADCD1, &adcgrpcfg, samples, ADC_GRP1_BUF_DEPTH); + chSysUnlockFromIsr(); +} + +/* + * ADC end conversion callback. + * The PWM channels are reprogrammed using the latest ADC samples. + * The latest samples are transmitted into a single SPI transaction. + */ +void adccb(ADCDriver *adcp, adcsample_t *buffer, size_t n) { + + (void) buffer; (void) n; + /* Note, only in the ADC_COMPLETE state because the ADC driver fires an + intermediate callback when the buffer is half full.*/ + if (adcp->state == ADC_COMPLETE) { + adcsample_t avg_ch1, avg_ch2; + + /* Calculates the average values from the ADC samples.*/ + avg_ch1 = (samples[0] + samples[2] + samples[4] + samples[6]) / 4; + avg_ch2 = (samples[1] + samples[3] + samples[5] + samples[7]) / 4; + + chSysLockFromIsr(); + + /* Changes the channels pulse width, the change will be effective + starting from the next cycle.*/ + pwmEnableChannelI(&PWMD4, 0, PWM_FRACTION_TO_WIDTH(&PWMD4, 4096, avg_ch1)); + pwmEnableChannelI(&PWMD4, 1, PWM_FRACTION_TO_WIDTH(&PWMD4, 4096, avg_ch2)); + + /* SPI slave selection and transmission start.*/ + spiSelectI(&SPID2); + spiStartSendI(&SPID2, ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH, samples); + + chSysUnlockFromIsr(); + } +} + +/* + * SPI end transfer callback. + */ +static void spicb(SPIDriver *spip) { + + /* On transfer end just releases the slave select line.*/ + chSysLockFromIsr(); + spiUnselectI(spip); + chSysUnlockFromIsr(); +} +#endif + +/* + * This is a periodic thread that does absolutely nothing except increasing + * a seconds counter. + */ +static WORKING_AREA(waThread1, 128); +#if 0 +static msg_t Thread1(void *arg) { + static uint32_t seconds_counter; + + (void)arg; + chRegSetThreadName("counter"); + while (TRUE) { + chThdSleepMilliseconds(1000); + seconds_counter++; + } +} +#else +static msg_t Thread1(void *arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + palSetPad(GPIOD, GPIOD_LED5); + chThdSleepMilliseconds(500); + palClearPad(GPIOD, GPIOD_LED5); + chThdSleepMilliseconds(500); + } +} +#endif + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the serial driver 1 using the driver default configuration. + * PA2(TX) and PA3(RX) are routed to USART1. + */ + sdStart(&SD2, NULL); + palSetPadMode(GPIOA, 2, PAL_MODE_ALTERNATE(7)); + palSetPadMode(GPIOA, 3, PAL_MODE_ALTERNATE(7)); + + /* + * If the user button is pressed after the reset then the test suite is + * executed immediately before activating the various device drivers in + * order to not alter the benchmark scores. + */ + if (palReadPad(GPIOA, GPIOA_BUTTON)) + TestThread(&SD2); + + /* + * Initializes the SPI driver 2. The SPI2 signals are routed as follow: + * PB12 - NSS. + * PB13 - SCK. + * PB14 - MISO. + * PB15 - MOSI. + */ +#if 0 + spiStart(&SPID2, &spicfg); + palSetPad(GPIOB, 12); + palSetPadMode(GPIOB, 12, PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); /* NSS. */ + palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(5) | + PAL_STM32_OSPEED_HIGHEST); /* SCK. */ + palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(5)); /* MISO. */ + palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(5) | + PAL_STM32_OSPEED_HIGHEST); /* MOSI. */ + + /* + * Initializes the ADC driver 1 and enable the thermal sensor. + * The pin PC0 on the port GPIOC is programmed as analog input. + */ + adcStart(&ADCD1, NULL); + adcSTM32EnableTSVREFE(); + palSetPadMode(GPIOC, 0, PAL_MODE_INPUT_ANALOG); + + /* + * Initializes the PWM driver 4, routes the TIM4 outputs to the board LEDs. + */ + pwmStart(&PWMD4, &pwmcfg); + palSetPadMode(GPIOB, GPIOB_LED4, PAL_MODE_ALTERNATE(2)); + palSetPadMode(GPIOB, GPIOB_LED3, PAL_MODE_ALTERNATE(2)); +#endif + + /* + * Creates the example thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing except + * sleeping in a loop and check the button state, when the button is + * pressed the test procedure is launched with output on the serial + * driver 1. + */ + while (TRUE) { + if (palReadPad(GPIOA, GPIOA_BUTTON)) + TestThread(&SD2); + chThdSleepMilliseconds(500); + } +} diff --git a/demos/ARMCM4-STM32F407-DISCOVERY/mcuconf.h b/demos/ARMCM4-STM32F407-DISCOVERY/mcuconf.h new file mode 100644 index 000000000..058cc7a76 --- /dev/null +++ b/demos/ARMCM4-STM32F407-DISCOVERY/mcuconf.h @@ -0,0 +1,191 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32L1xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_VOS STM32_VOS_HIGH +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_CLOCK48_REQUIRED TRUE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLM_VALUE 8 +#define STM32_PLLN_VALUE 336 +#define STM32_PLLP_VALUE 2 +#define STM32_PLLQ_VALUE 7 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV4 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_RTCPRE_VALUE 8 +#define STM32_MCO1SEL STM32_MCO1SEL_HSI +#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 +#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK +#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 +#define STM32_I2SSRC STM32_I2CSRC_CKIN +#define STM32_PLLI2SN_VALUE 192 +#define STM32_PLLI2SR_VALUE 5 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 TRUE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/demos/ARMCM4-STM32F407-DISCOVERY/readme.txt b/demos/ARMCM4-STM32F407-DISCOVERY/readme.txt new file mode 100644 index 000000000..ab3c5199a --- /dev/null +++ b/demos/ARMCM4-STM32F407-DISCOVERY/readme.txt @@ -0,0 +1,31 @@ +***************************************************************************** +** ChibiOS/RT port for ARM-Cortex-M3 STM32F100xB. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an ST STM32F4-Discovery board. + +** The Demo ** + +The demo shows how to use the ADC, PWM and SPI drivers using asynchronous +APIs. The ADC samples two channels (temperature sensor and PC0) and modulates +the PWM using the sampled values. The sample data is also transmitted using +the SPI port 1. +By pressing the button located on the board the test procedure is activated +with output on the serial port SD2 (USART2). + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. just modify the TRGT line in the makefile in order to use +different GCC toolchains. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3