From 4d7be5bf04f6784d92e3f9a9e389cd4dde3e237f Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Sun, 2 Aug 2015 10:33:23 +0000 Subject: STM32F7xx clock tree and initialization done. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8144 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- demos/STM32/RT-STM32F746G-DISCOVERY/.project | 2 +- demos/STM32/RT-STM32F746G-DISCOVERY/Makefile | 2 +- demos/STM32/RT-STM32F746G-DISCOVERY/mcuconf.h | 51 ++++++++++++++++++++------- 3 files changed, 40 insertions(+), 15 deletions(-) (limited to 'demos') diff --git a/demos/STM32/RT-STM32F746G-DISCOVERY/.project b/demos/STM32/RT-STM32F746G-DISCOVERY/.project index 5521951e5..119e68a03 100644 --- a/demos/STM32/RT-STM32F746G-DISCOVERY/.project +++ b/demos/STM32/RT-STM32F746G-DISCOVERY/.project @@ -79,7 +79,7 @@ board 2 - CHIBIOS/os/hal/boards/ST_STM32F476G_DISCOVERY + CHIBIOS/os/hal/boards/ST_STM32F746G_DISCOVERY os diff --git a/demos/STM32/RT-STM32F746G-DISCOVERY/Makefile b/demos/STM32/RT-STM32F746G-DISCOVERY/Makefile index a46ef6422..3d6f7eedb 100644 --- a/demos/STM32/RT-STM32F746G-DISCOVERY/Makefile +++ b/demos/STM32/RT-STM32F746G-DISCOVERY/Makefile @@ -92,7 +92,7 @@ include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32f7xx.mk # HAL-OSAL files (optional). include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/hal/ports/STM32/STM32F7xx/platform.mk -include $(CHIBIOS)/os/hal/boards/ST_STM32F476G_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/boards/ST_STM32F746G_DISCOVERY/board.mk include $(CHIBIOS)/os/hal/osal/rt/osal.mk # RTOS files (optional). include $(CHIBIOS)/os/rt/rt.mk diff --git a/demos/STM32/RT-STM32F746G-DISCOVERY/mcuconf.h b/demos/STM32/RT-STM32F746G-DISCOVERY/mcuconf.h index 02a8e6ce6..1dc779067 100644 --- a/demos/STM32/RT-STM32F746G-DISCOVERY/mcuconf.h +++ b/demos/STM32/RT-STM32F746G-DISCOVERY/mcuconf.h @@ -37,32 +37,57 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_BKPRAM_ENABLE FALSE #define STM32_HSI_ENABLED TRUE -#define STM32_LSI_ENABLED TRUE +#define STM32_LSI_ENABLED FALSE #define STM32_HSE_ENABLED TRUE -#define STM32_LSE_ENABLED FALSE +#define STM32_LSE_ENABLED TRUE #define STM32_CLOCK48_REQUIRED TRUE #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLM_VALUE 8 -#define STM32_PLLN_VALUE 336 +#define STM32_PLLM_VALUE 25 +#define STM32_PLLN_VALUE 432 #define STM32_PLLP_VALUE 2 -#define STM32_PLLQ_VALUE 7 +#define STM32_PLLQ_VALUE 9 #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE1 STM32_PPRE1_DIV4 #define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_RTCSEL STM32_RTCSEL_LSI -#define STM32_RTCPRE_VALUE 8 +#define STM32_RTCSEL STM32_RTCSEL_LSE +#define STM32_RTCPRE_VALUE 25 #define STM32_MCO1SEL STM32_MCO1SEL_HSI #define STM32_MCO1PRE STM32_MCO1PRE_DIV1 #define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK -#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 -#define STM32_I2SSRC STM32_I2SSRC_CKIN +#define STM32_MCO2PRE STM32_MCO2PRE_DIV4 +#define STM32_I2SSRC STM32_I2SSRC_PLLI2S #define STM32_PLLI2SN_VALUE 192 -#define STM32_PLLI2SR_VALUE 5 -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_BKPRAM_ENABLE FALSE +#define STM32_PLLI2SP_VALUE 4 +#define STM32_PLLI2SQ_VALUE 4 +#define STM32_PLLI2SR_VALUE 4 +#define STM32_PLLSAIN_VALUE 192 +#define STM32_PLLSAIP_VALUE 4 +#define STM32_PLLSAIQ_VALUE 4 +#define STM32_PLLSAIR_VALUE 4 +#define STM32_PLLSAIDIVR STM32_PLLSAIDIVR_OFF +#define STM32_SAI1SEL STM32_SAI1SEL_OFF +#define STM32_SAI2SEL STM32_SAI2SEL_OFF +#define STM32_USART1SEL STM32_USART1SEL_PCLK2 +#define STM32_USART2SEL STM32_USART2SEL_PCLK1 +#define STM32_USART3SEL STM32_USART3SEL_PCLK1 +#define STM32_UART4SEL STM32_UART4SEL_PCLK1 +#define STM32_UART5SEL STM32_UART5SEL_PCLK1 +#define STM32_USART6SEL STM32_USART6SEL_PCLK2 +#define STM32_UART7SEL STM32_UART7SEL_PCLK1 +#define STM32_UART8SEL STM32_UART8SEL_PCLK1 +#define STM32_I2C1SEL STM32_I2C1SEL_PCLK1 +#define STM32_I2C2SEL STM32_I2C2SEL_PCLK1 +#define STM32_I2C3SEL STM32_I2C3SEL_PCLK1 +#define STM32_I2C4SEL STM32_I2C4SEL_PCLK1 +#define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1 +#define STM32_CECSEL STM32_CECSEL_LSE +#define STM32_CK48MSEL STM32_CK48MSEL_PLL +#define STM32_SDMMCSEL STM32_SDMMCSEL_PLL48CLK /* * ADC driver system settings. -- cgit v1.2.3