From 6798baae9674d251c07865662321e520c969669e Mon Sep 17 00:00:00 2001 From: barthess Date: Sun, 4 Sep 2011 18:49:14 +0000 Subject: Added board OLIMEX_STM32_103STK. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3289 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- boards/OLIMEX_STM32_103STK/board.c | 54 ++++++++++++ boards/OLIMEX_STM32_103STK/board.h | 162 ++++++++++++++++++++++++++++++++++++ boards/OLIMEX_STM32_103STK/board.mk | 5 ++ 3 files changed, 221 insertions(+) create mode 100644 boards/OLIMEX_STM32_103STK/board.c create mode 100644 boards/OLIMEX_STM32_103STK/board.h create mode 100644 boards/OLIMEX_STM32_103STK/board.mk (limited to 'boards') diff --git a/boards/OLIMEX_STM32_103STK/board.c b/boards/OLIMEX_STM32_103STK/board.c new file mode 100644 index 000000000..b8b98c05f --- /dev/null +++ b/boards/OLIMEX_STM32_103STK/board.c @@ -0,0 +1,54 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/** + * @brief PAL setup. + * @details Digital I/O ports static configuration as defined in @p board.h. + * This variable is used by the HAL when initializing the PAL driver. + */ +#if HAL_USE_PAL || defined(__DOXYGEN__) +const PALConfig pal_default_config = +{ + {VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH}, + {VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH}, + {VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH}, + {VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH}, + {VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH}, +}; +#endif + +/* + * Early initialization code. + * This initialization must be performed just after stack setup and before + * any other initialization. + */ +void __early_init(void) { + + stm32_clock_init(); +} + +/* + * Board-specific initialization code. + */ +void boardInit(void) { +} diff --git a/boards/OLIMEX_STM32_103STK/board.h b/boards/OLIMEX_STM32_103STK/board.h new file mode 100644 index 000000000..a53695906 --- /dev/null +++ b/boards/OLIMEX_STM32_103STK/board.h @@ -0,0 +1,162 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +/* + * Setup for the Olimex STM33-P103 proto board. + */ + +/* + * Board identifier. + */ +#define BOARD_OLIMEX_STM32_103STK +#define BOARD_NAME "Olimex STM32-103STK" + +/* + * Board frequencies. + */ +#define STM32_LSECLK 32768 +#define STM32_HSECLK 8000000 + +/* + * MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h. + */ +#define STM32F10X_MD + +/* + * IO pins assignments. + */ +#define GPIOA_BUTTON_WAKEUP 0 +#define GPIOC_BUTTON_TAMPER 13 +#define GPIOC_JOY 5 +#define GPIOC_JOY_CENTER_BUT 6 + +#define GPIOA_SPI1NSS 4 +#define GPIOB_SPI2NSS 12 + +#define GPIOC_MMCWP 2 +#define GPIOC_MMCCP 1 + +#define GPIOC_USB_P 4 +#define GPIOC_LCD_RES 7 +#define GPIOC_NRF_CE 8 +#define GPIOC_NRF_IRQ 9 +#define GPIOC_LCD_E 10 + +#define GPIOC_USB_DISC 11 +#define GPIOC_LED 12 + +#define GPIOB_ACCEL_IRQ 5 + +/* + * I/O ports initial setup, this configuration is established soon after reset + * in the initialization code. + * + * The digits have the following meaning: + * 0 - Analog input. + * 1 - Push Pull output 10MHz. + * 2 - Push Pull output 2MHz. + * 3 - Push Pull output 50MHz. + * 4 - Digital input. + * 5 - Open Drain output 10MHz. + * 6 - Open Drain output 2MHz. + * 7 - Open Drain output 50MHz. + * 8 - Digital input with PullUp or PullDown resistor depending on ODR. + * 9 - Alternate Push Pull output 10MHz. + * A - Alternate Push Pull output 2MHz. + * B - Alternate Push Pull output 50MHz. + * C - Reserved. + * D - Alternate Open Drain output 10MHz. + * E - Alternate Open Drain output 2MHz. + * F - Alternate Open Drain output 50MHz. + * Please refer to the STM32 Reference Manual for details. + */ + +/* + * Port A setup. + * Everything input with pull-up except: + * PA0 - Normal input (BUTTON). + * PA2 - Alternate output (USART2 TX). + * PA3 - Normal input (USART2 RX). + */ +#define VAL_GPIOACRL 0x88884B84 /* PA7...PA0 */ +#define VAL_GPIOACRH 0x88888888 /* PA15...PA8 */ +#define VAL_GPIOAODR 0xFFFFFFFF + +/* + * Port B setup. + * Everything input with pull-up except: + * PB6,7 - Alternate open drain (I2C1). + * PB10,11 - Alternate open drain (I2C2). + * PB12 - Push Pull output (MMC SPI2 NSS). + * PB13 - Alternate output (MMC SPI2 SCK). + * PB14 - Normal input (MMC SPI2 MISO). + * PB15 - Alternate output (MMC SPI2 MOSI). + */ +#define VAL_GPIOBCRL 0xEE888888 /* PB7...PB0 */ +#define VAL_GPIOBCRH 0xB4B3EE88 /* PB15...PB8 */ +#define VAL_GPIOBODR 0xFFFFFFFF + +/* + * Port C setup. + * Everything input with pull-up except: + * PC4 - Normal input because there is an external resistor. + * PC5 - Analog input (joystick). + * PC6 - Normal input because there is an external resistor. + * PC7 - Normal input because there is an external resistor. + * PC10 - Push Pull output (CAN CNTRL). + * PC11 - Push Pull output (USB DISC). + * PC12 - Open Drain output (LED). + */ +#define VAL_GPIOCCRL 0x44048888 /* PC7...PC0 */ +#define VAL_GPIOCCRH 0x88863388 /* PC15...PC8 */ +#define VAL_GPIOCODR 0xFFFFFFFF + +/* + * Port D setup. + * Everything input with pull-up except: + * PD0 - Normal input (XTAL). + * PD1 - Normal input (XTAL). + */ +#define VAL_GPIODCRL 0x88888844 /* PD7...PD0 */ +#define VAL_GPIODCRH 0x88888888 /* PD15...PD8 */ +#define VAL_GPIODODR 0xFFFFFFFF + +/* + * Port E setup. + * Everything input with pull-up except: + */ +#define VAL_GPIOECRL 0x88888888 /* PE7...PE0 */ +#define VAL_GPIOECRH 0x88888888 /* PE15...PE8 */ +#define VAL_GPIOEODR 0xFFFFFFFF + +#if !defined(_FROM_ASM_) +#ifdef __cplusplus +extern "C" { +#endif + void boardInit(void); +#ifdef __cplusplus +} +#endif +#endif /* _FROM_ASM_ */ + +#endif /* _BOARD_H_ */ diff --git a/boards/OLIMEX_STM32_103STK/board.mk b/boards/OLIMEX_STM32_103STK/board.mk new file mode 100644 index 000000000..383e1c490 --- /dev/null +++ b/boards/OLIMEX_STM32_103STK/board.mk @@ -0,0 +1,5 @@ +# List of all the board related files. +BOARDSRC = ${CHIBIOS}/boards/OLIMEX_STM32_103STK/board.c + +# Required include directories +BOARDINC = ${CHIBIOS}/boards/OLIMEX_STM32_103STK -- cgit v1.2.3 From 46538d795be83d1d54b132e7d57213cb6d975c51 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 15 Sep 2011 14:43:36 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3319 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- boards/OLIMEX_STM32_P107/board.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'boards') diff --git a/boards/OLIMEX_STM32_P107/board.h b/boards/OLIMEX_STM32_P107/board.h index 373123880..f4b273283 100644 --- a/boards/OLIMEX_STM32_P107/board.h +++ b/boards/OLIMEX_STM32_P107/board.h @@ -42,6 +42,11 @@ */ #define STM32F10X_CL +/* + * Ethernet PHY type. + */ +#define BOARD_PHY_ID MII_STE101P_ID + /* * IO pins assignments. */ -- cgit v1.2.3 From eea844796a2cdbea9f4ddf51f9766ff3964984b6 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 17 Sep 2011 06:48:56 +0000 Subject: Fixed paths in IAR project for STM32L152-Discovery board. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3322 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- boards/ST_STM32L_DISCOVERY/board.h | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) (limited to 'boards') diff --git a/boards/ST_STM32L_DISCOVERY/board.h b/boards/ST_STM32L_DISCOVERY/board.h index d95480c15..845113f57 100644 --- a/boards/ST_STM32L_DISCOVERY/board.h +++ b/boards/ST_STM32L_DISCOVERY/board.h @@ -105,8 +105,8 @@ PIN_PUDR_FLOATING(14) | \ PIN_PUDR_FLOATING(15))) #define VAL_GPIOA_ODR 0xFFFFFFFF -#define VAL_GPIOA_AFRL 0x00000000 -#define VAL_GPIOA_AFRH 0x00000000 +#define VAL_GPIOA_AFRL 0x00000000 +#define VAL_GPIOA_AFRH 0x00000000 /* * Port B setup. @@ -127,8 +127,8 @@ PIN_PUDR_FLOATING(GPIOB_LED4) | \ PIN_PUDR_FLOATING(GPIOB_LED3))) #define VAL_GPIOB_ODR 0xFFFFFF3F -#define VAL_GPIOB_AFRL 0x00000000 -#define VAL_GPIOB_AFRH 0x00000000 +#define VAL_GPIOB_AFRL 0x00000000 +#define VAL_GPIOB_AFRH 0x00000000 /* * Port C setup. @@ -142,8 +142,8 @@ #define VAL_GPIOC_PUPDR (~(PIN_PUDR_FLOATING(15) | \ PIN_PUDR_FLOATING(14))) #define VAL_GPIOC_ODR 0xFFFFFFFF -#define VAL_GPIOC_AFRL 0x00000000 -#define VAL_GPIOC_AFRH 0x00000000 +#define VAL_GPIOC_AFRL 0x00000000 +#define VAL_GPIOC_AFRH 0x00000000 /* * Port D setup. @@ -154,8 +154,8 @@ #define VAL_GPIOD_OSPEEDR 0xFFFFFFFF #define VAL_GPIOD_PUPDR 0xFFFFFFFF #define VAL_GPIOD_ODR 0xFFFFFFFF -#define VAL_GPIOD_AFRL 0x00000000 -#define VAL_GPIOD_AFRH 0x00000000 +#define VAL_GPIOD_AFRL 0x00000000 +#define VAL_GPIOD_AFRH 0x00000000 /* * Port E setup. @@ -166,8 +166,8 @@ #define VAL_GPIOE_OSPEEDR 0xFFFFFFFF #define VAL_GPIOE_PUPDR 0xFFFFFFFF #define VAL_GPIOE_ODR 0xFFFFFFFF -#define VAL_GPIOE_AFRL 0x00000000 -#define VAL_GPIOE_AFRH 0x00000000 +#define VAL_GPIOE_AFRL 0x00000000 +#define VAL_GPIOE_AFRH 0x00000000 /* * Port H setup. @@ -178,8 +178,8 @@ #define VAL_GPIOH_OSPEEDR 0xFFFFFFFF #define VAL_GPIOH_PUPDR 0xFFFFFFFF #define VAL_GPIOH_ODR 0xFFFFFFFF -#define VAL_GPIOH_AFRL 0x00000000 -#define VAL_GPIOH_AFRH 0x00000000 +#define VAL_GPIOH_AFRL 0x00000000 +#define VAL_GPIOH_AFRH 0x00000000 #if !defined(_FROM_ASM_) #ifdef __cplusplus -- cgit v1.2.3 From 4ff96215eddade6e541f1a97af5364e754ccee7c Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 17 Sep 2011 08:45:43 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3323 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- boards/ST_STM32L_DISCOVERY/board.h | 68 ++++++++++++++++++++++++++++++++------ 1 file changed, 58 insertions(+), 10 deletions(-) (limited to 'boards') diff --git a/boards/ST_STM32L_DISCOVERY/board.h b/boards/ST_STM32L_DISCOVERY/board.h index 845113f57..9e6802b26 100644 --- a/boards/ST_STM32L_DISCOVERY/board.h +++ b/boards/ST_STM32L_DISCOVERY/board.h @@ -95,15 +95,39 @@ * PA15 - JTDI (alternate 0). */ #define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_BUTTON) | \ + PIN_MODE_INPUT(1) | \ + PIN_MODE_INPUT(2) | \ + PIN_MODE_INPUT(3) | \ + PIN_MODE_INPUT(4) | \ + PIN_MODE_INPUT(5) | \ + PIN_MODE_INPUT(6) | \ + PIN_MODE_INPUT(7) | \ + PIN_MODE_INPUT(8) | \ + PIN_MODE_INPUT(9) | \ + PIN_MODE_INPUT(10) | \ + PIN_MODE_INPUT(11) | \ + PIN_MODE_INPUT(12) | \ PIN_MODE_ALTERNATE(13) | \ PIN_MODE_ALTERNATE(14) | \ PIN_MODE_ALTERNATE(15)) #define VAL_GPIOA_OTYPER 0x00000000 #define VAL_GPIOA_OSPEEDR 0xFFFFFFFF -#define VAL_GPIOA_PUPDR (~(PIN_PUDR_FLOATING(GPIOA_BUTTON) | \ - PIN_PUDR_FLOATING(13) | \ - PIN_PUDR_FLOATING(14) | \ - PIN_PUDR_FLOATING(15))) +#define VAL_GPIOA_PUPDR (PIN_PUDR_PULLUP(GPIOA_BUTTON) | \ + PIN_PUDR_PULLUP(1) | \ + PIN_PUDR_PULLUP(2) | \ + PIN_PUDR_PULLUP(3) | \ + PIN_PUDR_PULLUP(4) | \ + PIN_PUDR_PULLUP(5) | \ + PIN_PUDR_PULLUP(6) | \ + PIN_PUDR_PULLUP(7) | \ + PIN_PUDR_PULLUP(8) | \ + PIN_PUDR_PULLUP(9) | \ + PIN_PUDR_PULLUP(10) | \ + PIN_PUDR_PULLUP(11) | \ + PIN_PUDR_PULLUP(12) | \ + PIN_PUDR_FLOATING(13) | \ + PIN_PUDR_FLOATING(14) | \ + PIN_PUDR_FLOATING(15)) #define VAL_GPIOA_ODR 0xFFFFFFFF #define VAL_GPIOA_AFRL 0x00000000 #define VAL_GPIOA_AFRH 0x00000000 @@ -116,16 +140,40 @@ * PB6 - GPIOB_LED4 (output push-pull). * PB7 - GPIOB_LED3 (output push-pull). */ -#define VAL_GPIOB_MODER (PIN_MODE_ALTERNATE(3) | \ +#define VAL_GPIOB_MODER (PIN_MODE_INPUT(0) | \ + PIN_MODE_INPUT(1) | \ + PIN_MODE_INPUT(2) | \ + PIN_MODE_ALTERNATE(3) | \ PIN_MODE_ALTERNATE(4) | \ + PIN_MODE_INPUT(5) | \ PIN_MODE_OUTPUT(GPIOB_LED4) | \ - PIN_MODE_OUTPUT(GPIOB_LED3)) + PIN_MODE_OUTPUT(GPIOB_LED3) | \ + PIN_MODE_INPUT(8) | \ + PIN_MODE_INPUT(9) | \ + PIN_MODE_INPUT(10) | \ + PIN_MODE_INPUT(11) | \ + PIN_MODE_INPUT(12) | \ + PIN_MODE_INPUT(13) | \ + PIN_MODE_INPUT(14) | \ + PIN_MODE_INPUT(15)) #define VAL_GPIOB_OTYPER 0x00000000 #define VAL_GPIOB_OSPEEDR 0xFFFFFFFF -#define VAL_GPIOB_PUPDR (~(PIN_PUDR_FLOATING(3) | \ - PIN_PUDR_FLOATING(4) | \ - PIN_PUDR_FLOATING(GPIOB_LED4) | \ - PIN_PUDR_FLOATING(GPIOB_LED3))) +#define VAL_GPIOB_PUPDR (PIN_PUDR_PULLUP(0) | \ + PIN_PUDR_PULLUP(1) | \ + PIN_PUDR_PULLUP(2) | \ + PIN_PUDR_FLOATING(3) | \ + PIN_PUDR_FLOATING(4) | \ + PIN_PUDR_PULLUP(5) | \ + PIN_PUDR_FLOATING(GPIOB_LED4) | \ + PIN_PUDR_FLOATING(GPIOB_LED3) | \ + PIN_PUDR_PULLUP(8) | \ + PIN_PUDR_PULLUP(9) | \ + PIN_PUDR_PULLUP(10) | \ + PIN_PUDR_PULLUP(11) | \ + PIN_PUDR_PULLUP(12) | \ + PIN_PUDR_PULLUP(13) | \ + PIN_PUDR_PULLUP(14) | \ + PIN_PUDR_PULLUP(15)) #define VAL_GPIOB_ODR 0xFFFFFF3F #define VAL_GPIOB_AFRL 0x00000000 #define VAL_GPIOB_AFRH 0x00000000 -- cgit v1.2.3 From 94edbcb6cb917c1e5c34384c134cd661dda81d7a Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 18 Sep 2011 10:18:17 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3339 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- boards/ST_STM32L_DISCOVERY/board.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'boards') diff --git a/boards/ST_STM32L_DISCOVERY/board.h b/boards/ST_STM32L_DISCOVERY/board.h index 9e6802b26..46e2965fd 100644 --- a/boards/ST_STM32L_DISCOVERY/board.h +++ b/boards/ST_STM32L_DISCOVERY/board.h @@ -36,7 +36,7 @@ * NOTE: The HSE crystal is not fitted by default on the board. */ #define STM32_LSECLK 32768 -#define STM32_HSECLK 0 +#define STM32_HSECLK 8000000 /* * MCU type as defined in the ST header file stm32l1xx.h. -- cgit v1.2.3 From 538f257a6710eebea358e12845ae241437d70031 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 8 Oct 2011 09:22:34 +0000 Subject: New build system for GCC ARM ports. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3428 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- boards/OLIMEX_LPC_P2148/board.mk | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) (limited to 'boards') diff --git a/boards/OLIMEX_LPC_P2148/board.mk b/boards/OLIMEX_LPC_P2148/board.mk index d41ed5dd4..5d0937e6d 100644 --- a/boards/OLIMEX_LPC_P2148/board.mk +++ b/boards/OLIMEX_LPC_P2148/board.mk @@ -1,8 +1,5 @@ -# Board directory path -BOARDPATH = ${CHIBIOS}/boards/OLIMEX_LPC_P2148/ - # List of all the mandatory board related files. -BOARDSRC = ${BOARDPATH}/board.c +BOARDSRC = ${CHIBIOS}/boards/OLIMEX_LPC_P2148/board.c # Required include directories -BOARDINC = ${BOARDPATH} +BOARDINC = ${CHIBIOS}/boards/OLIMEX_LPC_P2148 -- cgit v1.2.3 From eea23b22826e76dba443a12c651d5490a0314471 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 8 Oct 2011 16:56:03 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3439 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- boards/OLIMEX_AVR_MT_128/board.c | 49 ++++++++++++++++++++++++---------------- 1 file changed, 30 insertions(+), 19 deletions(-) (limited to 'boards') diff --git a/boards/OLIMEX_AVR_MT_128/board.c b/boards/OLIMEX_AVR_MT_128/board.c index b1fa460a9..c7e74e2d4 100644 --- a/boards/OLIMEX_AVR_MT_128/board.c +++ b/boards/OLIMEX_AVR_MT_128/board.c @@ -21,6 +21,35 @@ #include "ch.h" #include "hal.h" +/** + * @brief PAL setup. + * @details Digital I/O ports static configuration as defined in @p board.h. + * This variable is used by the HAL when initializing the PAL driver. + */ +#if HAL_USE_PAL || defined(__DOXYGEN__) +const PALConfig pal_default_config = +{ +#if defined(PORTA) + {VAL_PORTA, VAL_DDRA}, +#endif +#if defined(PORTA) + {VAL_PORTB, VAL_DDRB}, +#endif +#if defined(PORTA) + {VAL_PORTC, VAL_DDRC}, +#endif +#if defined(PORTA) + {VAL_PORTD, VAL_DDRD}, +#endif +#if defined(PORTA) + {VAL_PORTE, VAL_DDRE}, +#endif +}; +#endif /* HAL_USE_PAL */ + +/** + * @brief Timer0 interrupt handler. + */ CH_IRQ_HANDLER(TIMER0_COMP_vect) { CH_IRQ_PROLOGUE(); @@ -32,29 +61,11 @@ CH_IRQ_HANDLER(TIMER0_COMP_vect) { CH_IRQ_EPILOGUE(); } -/* +/** * Board-specific initialization code. */ void boardInit(void) { - /* - * I/O ports setup. - */ - DDRA = VAL_DDRA; - PORTA = VAL_PORTA; - DDRB = VAL_DDRB; - PORTB = VAL_PORTB; - DDRC = VAL_DDRC; - PORTC = VAL_PORTC; - DDRD = VAL_DDRD; - PORTD = VAL_PORTD; - DDRE = VAL_DDRE; - PORTE = VAL_PORTE; - DDRF = VAL_DDRF; - PORTF = VAL_PORTF; - DDRG = VAL_DDRG; - PORTG = VAL_PORTG; - /* * External interrupts setup, all disabled initially. */ -- cgit v1.2.3 From 977abf0c51adfac84351ac5c9d93edf4719fd094 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 9 Oct 2011 16:32:08 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3440 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- boards/OLIMEX_AVR_MT_128/board.h | 35 ++++++++++++++++++----------------- 1 file changed, 18 insertions(+), 17 deletions(-) (limited to 'boards') diff --git a/boards/OLIMEX_AVR_MT_128/board.h b/boards/OLIMEX_AVR_MT_128/board.h index dfe6828bb..4dc68db92 100644 --- a/boards/OLIMEX_AVR_MT_128/board.h +++ b/boards/OLIMEX_AVR_MT_128/board.h @@ -93,23 +93,24 @@ #define VAL_DDRG 0x00 #define VAL_PORTG 0x07 -#define PORTA_BUTTON1 (1 << 0) -#define PORTA_BUTTON2 (1 << 1) -#define PORTA_BUTTON3 (1 << 2) -#define PORTA_BUTTON4 (1 << 3) -#define PORTA_BUTTON5 (1 << 4) -#define PORTA_DALLAS (1 << 5) -#define PORTA_RELAY (1 << 6) - -#define PORTC_44780_RS (1 << 0) -#define PORTC_44780_RW (1 << 1) -#define PORTC_44780_E (1 << 2) -#define PORTC_44780_D4 (1 << 4) -#define PORTC_44780_D5 (1 << 5) -#define PORTC_44780_D6 (1 << 6) -#define PORTC_44780_D7 (1 << 7) -#define PORTC_44780_DATA (PORTC_44780_D4 | PORTC_44780_D5 | \ - PORTC_44780_D6 | PORTC_44780_D7) + +#define PORTA_BUTTON1 0 +#define PORTA_BUTTON2 1 +#define PORTA_BUTTON3 2 +#define PORTA_BUTTON4 3 +#define PORTA_BUTTON5 4 +#define PORTA_DALLAS 5 +#define PORTA_RELAY 6 + +#define PORTC_44780_RS_MASK (1 << 0) +#define PORTC_44780_RW_MASK (1 << 1) +#define PORTC_44780_E_MASK (1 << 2) +#define PORTC_44780_D4_MASK (1 << 4) +#define PORTC_44780_D5_MASK (1 << 5) +#define PORTC_44780_D6_MASK (1 << 6) +#define PORTC_44780_D7_MASK (1 << 7) +#define PORTC_44780_DATA_MASK (PORTC_44780_D4_MASK | PORTC_44780_D5_MASK | \ + PORTC_44780_D6_MASK | PORTC_44780_D7_MASK) #define PORTE_BUZZ1 (1 << 4) #define PORTE_BUZZ2 (1 << 5) -- cgit v1.2.3 From 36d1e0978ac7cce6074470ac5a09d14b9986f922 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 10 Oct 2011 18:08:37 +0000 Subject: Finalized AVR PAL driver. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3441 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- boards/OLIMEX_AVR_CAN/board.c | 44 +++++++++++++++++++++++++------------------ boards/OLIMEX_AVR_CAN/board.h | 4 ++-- 2 files changed, 28 insertions(+), 20 deletions(-) (limited to 'boards') diff --git a/boards/OLIMEX_AVR_CAN/board.c b/boards/OLIMEX_AVR_CAN/board.c index de1af241c..cd84a8086 100644 --- a/boards/OLIMEX_AVR_CAN/board.c +++ b/boards/OLIMEX_AVR_CAN/board.c @@ -21,6 +21,32 @@ #include "ch.h" #include "hal.h" +/** + * @brief PAL setup. + * @details Digital I/O ports static configuration as defined in @p board.h. + * This variable is used by the HAL when initializing the PAL driver. + */ +#if HAL_USE_PAL || defined(__DOXYGEN__) +const PALConfig pal_default_config = +{ +#if defined(PORTA) + {VAL_PORTA, VAL_DDRA}, +#endif +#if defined(PORTA) + {VAL_PORTB, VAL_DDRB}, +#endif +#if defined(PORTA) + {VAL_PORTC, VAL_DDRC}, +#endif +#if defined(PORTA) + {VAL_PORTD, VAL_DDRD}, +#endif +#if defined(PORTA) + {VAL_PORTE, VAL_DDRE}, +#endif +}; +#endif /* HAL_USE_PAL */ + CH_IRQ_HANDLER(TIMER0_COMP_vect) { CH_IRQ_PROLOGUE(); @@ -37,24 +63,6 @@ CH_IRQ_HANDLER(TIMER0_COMP_vect) { */ void boardInit(void) { - /* - * I/O ports setup. - */ - DDRA = VAL_DDRA; - PORTA = VAL_PORTA; - DDRB = VAL_DDRB; - PORTB = VAL_PORTB; - DDRC = VAL_DDRC; - PORTC = VAL_PORTC; - DDRD = VAL_DDRD; - PORTD = VAL_PORTD; - DDRE = VAL_DDRE; - PORTE = VAL_PORTE; - DDRF = VAL_DDRF; - PORTF = VAL_PORTF; - DDRG = VAL_DDRG; - PORTG = VAL_PORTG; - /* * External interrupts setup, all disabled initially. */ diff --git a/boards/OLIMEX_AVR_CAN/board.h b/boards/OLIMEX_AVR_CAN/board.h index b1d6038c3..c4db2338a 100644 --- a/boards/OLIMEX_AVR_CAN/board.h +++ b/boards/OLIMEX_AVR_CAN/board.h @@ -87,8 +87,8 @@ #define VAL_DDRG 0x00 #define VAL_PORTG 0x07 -#define PORTE_LED (1 << 4) -#define PORTE_BUTTON (1 << 5) +#define PORTE_LED 4 +#define PORTE_BUTTON 5 #if !defined(_FROM_ASM_) #ifdef __cplusplus -- cgit v1.2.3 From 3ce8ccb68a6de3b053f0e5fd685725c0904597d9 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 15 Oct 2011 06:37:38 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3442 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- boards/OLIMEX_AVR_CAN/board.c | 8 ++++---- boards/OLIMEX_AVR_MT_128/board.c | 8 ++++---- 2 files changed, 8 insertions(+), 8 deletions(-) (limited to 'boards') diff --git a/boards/OLIMEX_AVR_CAN/board.c b/boards/OLIMEX_AVR_CAN/board.c index cd84a8086..4e808d501 100644 --- a/boards/OLIMEX_AVR_CAN/board.c +++ b/boards/OLIMEX_AVR_CAN/board.c @@ -32,16 +32,16 @@ const PALConfig pal_default_config = #if defined(PORTA) {VAL_PORTA, VAL_DDRA}, #endif -#if defined(PORTA) +#if defined(PORTB) {VAL_PORTB, VAL_DDRB}, #endif -#if defined(PORTA) +#if defined(PORTC) {VAL_PORTC, VAL_DDRC}, #endif -#if defined(PORTA) +#if defined(PORTD) {VAL_PORTD, VAL_DDRD}, #endif -#if defined(PORTA) +#if defined(PORTE) {VAL_PORTE, VAL_DDRE}, #endif }; diff --git a/boards/OLIMEX_AVR_MT_128/board.c b/boards/OLIMEX_AVR_MT_128/board.c index c7e74e2d4..90b0f7306 100644 --- a/boards/OLIMEX_AVR_MT_128/board.c +++ b/boards/OLIMEX_AVR_MT_128/board.c @@ -32,16 +32,16 @@ const PALConfig pal_default_config = #if defined(PORTA) {VAL_PORTA, VAL_DDRA}, #endif -#if defined(PORTA) +#if defined(PORTB) {VAL_PORTB, VAL_DDRB}, #endif -#if defined(PORTA) +#if defined(PORTC) {VAL_PORTC, VAL_DDRC}, #endif -#if defined(PORTA) +#if defined(PORTD) {VAL_PORTD, VAL_DDRD}, #endif -#if defined(PORTA) +#if defined(PORTE) {VAL_PORTE, VAL_DDRE}, #endif }; -- cgit v1.2.3 From ade734b003ec8f45e365816c60a1689dd3454146 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 15 Oct 2011 07:10:47 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3443 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- boards/OLIMEX_AVR_CAN/board.c | 6 ++++++ boards/OLIMEX_AVR_MT_128/board.c | 6 ++++++ 2 files changed, 12 insertions(+) (limited to 'boards') diff --git a/boards/OLIMEX_AVR_CAN/board.c b/boards/OLIMEX_AVR_CAN/board.c index 4e808d501..e22d72d48 100644 --- a/boards/OLIMEX_AVR_CAN/board.c +++ b/boards/OLIMEX_AVR_CAN/board.c @@ -44,6 +44,12 @@ const PALConfig pal_default_config = #if defined(PORTE) {VAL_PORTE, VAL_DDRE}, #endif +#if defined(PORTF) + {VAL_PORTF, VAL_DDRF}, +#endif +#if defined(PORTG) + {VAL_PORTG, VAL_DDRG}, +#endif }; #endif /* HAL_USE_PAL */ diff --git a/boards/OLIMEX_AVR_MT_128/board.c b/boards/OLIMEX_AVR_MT_128/board.c index 90b0f7306..c3f97cfff 100644 --- a/boards/OLIMEX_AVR_MT_128/board.c +++ b/boards/OLIMEX_AVR_MT_128/board.c @@ -44,6 +44,12 @@ const PALConfig pal_default_config = #if defined(PORTE) {VAL_PORTE, VAL_DDRE}, #endif +#if defined(PORTF) + {VAL_PORTF, VAL_DDRF}, +#endif +#if defined(PORTG) + {VAL_PORTG, VAL_DDRG}, +#endif }; #endif /* HAL_USE_PAL */ -- cgit v1.2.3 From 4e3f49400a9f7dd22369f1f286468b59f0115237 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 15 Oct 2011 13:24:40 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3447 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- boards/ST_STM32L_DISCOVERY/board.h | 58 +++++++++++++++++++------------------- 1 file changed, 29 insertions(+), 29 deletions(-) (limited to 'boards') diff --git a/boards/ST_STM32L_DISCOVERY/board.h b/boards/ST_STM32L_DISCOVERY/board.h index 46e2965fd..f91998a59 100644 --- a/boards/ST_STM32L_DISCOVERY/board.h +++ b/boards/ST_STM32L_DISCOVERY/board.h @@ -56,35 +56,35 @@ * in the initialization code. * Please refer to the STM32 Reference Manual for details. */ -#define PIN_MODE_INPUT(n) (0 << ((n) * 2)) -#define PIN_MODE_OUTPUT(n) (1 << ((n) * 2)) -#define PIN_MODE_ALTERNATE(n) (2 << ((n) * 2)) -#define PIN_MODE_ANALOG(n) (3 << ((n) * 2)) -#define PIN_OTYPE_PUSHPULL(n) (0 << (n)) -#define PIN_OTYPE_OPENDRAIN(n) (1 << (n)) -#define PIN_OSPEED_400K(n) (0 << ((n) * 2)) -#define PIN_OSPEED_2M(n) (1 << ((n) * 2)) -#define PIN_OSPEED_10M(n) (2 << ((n) * 2)) -#define PIN_OSPEED_40M(n) (3 << ((n) * 2)) -#define PIN_PUDR_FLOATING(n) (0 << ((n) * 2)) -#define PIN_PUDR_PULLUP(n) (1 << ((n) * 2)) -#define PIN_PUDR_PULLDOWN(n) (2 << ((n) * 2)) -#define PIN_AFIO_AF0(n) (0 << ((n % 8) * 4)) -#define PIN_AFIO_AF1(n) (1 << ((n % 8) * 4)) -#define PIN_AFIO_AF2(n) (2 << ((n % 8) * 4)) -#define PIN_AFIO_AF3(n) (3 << ((n % 8) * 4)) -#define PIN_AFIO_AF4(n) (4 << ((n % 8) * 4)) -#define PIN_AFIO_AF5(n) (5 << ((n % 8) * 4)) -#define PIN_AFIO_AF6(n) (6 << ((n % 8) * 4)) -#define PIN_AFIO_AF7(n) (7 << ((n % 8) * 4)) -#define PIN_AFIO_AF8(n) (8 << ((n % 8) * 4)) -#define PIN_AFIO_AF9(n) (9 << ((n % 8) * 4)) -#define PIN_AFIO_AF10(n) (10 << ((n % 8) * 4)) -#define PIN_AFIO_AF11(n) (11 << ((n % 8) * 4)) -#define PIN_AFIO_AF12(n) (12 << ((n % 8) * 4)) -#define PIN_AFIO_AF13(n) (13 << ((n % 8) * 4)) -#define PIN_AFIO_AF14(n) (14 << ((n % 8) * 4)) -#define PIN_AFIO_AF15(n) (15 << ((n % 8) * 4)) +#define PIN_MODE_INPUT(n) (0U << ((n) * 2)) +#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2)) +#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2)) +#define PIN_MODE_ANALOG(n) (3U << ((n) * 2)) +#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) +#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) +#define PIN_OSPEED_400K(n) (0U << ((n) * 2)) +#define PIN_OSPEED_2M(n) (1U << ((n) * 2)) +#define PIN_OSPEED_10M(n) (2U << ((n) * 2)) +#define PIN_OSPEED_40M(n) (3U << ((n) * 2)) +#define PIN_PUDR_FLOATING(n) (0U << ((n) * 2)) +#define PIN_PUDR_PULLUP(n) (1U << ((n) * 2)) +#define PIN_PUDR_PULLDOWN(n) (2U << ((n) * 2)) +#define PIN_AFIO_AF0(n) (0U << ((n % 8) * 4)) +#define PIN_AFIO_AF1(n) (1U << ((n % 8) * 4)) +#define PIN_AFIO_AF2(n) (2U << ((n % 8) * 4)) +#define PIN_AFIO_AF3(n) (3U << ((n % 8) * 4)) +#define PIN_AFIO_AF4(n) (4U << ((n % 8) * 4)) +#define PIN_AFIO_AF5(n) (5U << ((n % 8) * 4)) +#define PIN_AFIO_AF6(n) (6U << ((n % 8) * 4)) +#define PIN_AFIO_AF7(n) (7U << ((n % 8) * 4)) +#define PIN_AFIO_AF8(n) (8U << ((n % 8) * 4)) +#define PIN_AFIO_AF9(n) (9U << ((n % 8) * 4)) +#define PIN_AFIO_AF10(n) (10U << ((n % 8) * 4)) +#define PIN_AFIO_AF11(n) (11U << ((n % 8) * 4)) +#define PIN_AFIO_AF12(n) (12U << ((n % 8) * 4)) +#define PIN_AFIO_AF13(n) (13U << ((n % 8) * 4)) +#define PIN_AFIO_AF14(n) (14U << ((n % 8) * 4)) +#define PIN_AFIO_AF15(n) (15U << ((n % 8) * 4)) /* * Port A setup. -- cgit v1.2.3 From 2f572f109a463e7faa46ed544c91198e72e63343 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 23 Oct 2011 12:21:44 +0000 Subject: USB enhancements, phase two. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3451 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- boards/OLIMEX_STM32_P103/board.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'boards') diff --git a/boards/OLIMEX_STM32_P103/board.h b/boards/OLIMEX_STM32_P103/board.h index 337fc8ca0..699e9ad46 100644 --- a/boards/OLIMEX_STM32_P103/board.h +++ b/boards/OLIMEX_STM32_P103/board.h @@ -135,6 +135,16 @@ #define VAL_GPIOECRH 0x88888888 /* PE15...PE8 */ #define VAL_GPIOEODR 0xFFFFFFFF +/* + * USB bus activation macro, required by the USB driver. + */ +#define usb_lld_connect_bus(usbp) palClearPad(GPIOC, GPIOC_USB_DISC) + +/* + * USB bus de-activation macro, required by the USB driver. + */ +#define usb_lld_disconnect_bus(usbp) palSetPad(GPIOC, GPIOC_USB_DISC) + #if !defined(_FROM_ASM_) #ifdef __cplusplus extern "C" { -- cgit v1.2.3 From dc71ea034dc35f6a394a71831c95a73cd2ae06e7 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 2 Nov 2011 17:36:00 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3460 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- boards/ST_STM32F4_DISCOVERY/board.c | 55 +++++ boards/ST_STM32F4_DISCOVERY/board.h | 447 +++++++++++++++++++++++++++++++++++ boards/ST_STM32F4_DISCOVERY/board.mk | 5 + boards/ST_STM32L_DISCOVERY/board.h | 21 +- 4 files changed, 510 insertions(+), 18 deletions(-) create mode 100644 boards/ST_STM32F4_DISCOVERY/board.c create mode 100644 boards/ST_STM32F4_DISCOVERY/board.h create mode 100644 boards/ST_STM32F4_DISCOVERY/board.mk (limited to 'boards') diff --git a/boards/ST_STM32F4_DISCOVERY/board.c b/boards/ST_STM32F4_DISCOVERY/board.c new file mode 100644 index 000000000..4a93dada2 --- /dev/null +++ b/boards/ST_STM32F4_DISCOVERY/board.c @@ -0,0 +1,55 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/** + * @brief PAL setup. + * @details Digital I/O ports static configuration as defined in @p board.h. + * This variable is used by the HAL when initializing the PAL driver. + */ +#if HAL_USE_PAL || defined(__DOXYGEN__) +const PALConfig pal_default_config = +{ + {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, + {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, + {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, + {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, + {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, + {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH} +}; +#endif + +/* + * Early initialization code. + * This initialization must be performed just after stack setup and before + * any other initialization. + */ +void __early_init(void) { + + stm32_clock_init(); +} + +/* + * Board-specific initialization code. + */ +void boardInit(void) { +} diff --git a/boards/ST_STM32F4_DISCOVERY/board.h b/boards/ST_STM32F4_DISCOVERY/board.h new file mode 100644 index 000000000..b3d2f23e7 --- /dev/null +++ b/boards/ST_STM32F4_DISCOVERY/board.h @@ -0,0 +1,447 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +/* + * Setup for STMicroelectronics STM32F4-Discovery board. + */ + +/* + * Board identifier. + */ +#define BOARD_ST_STM32F4_DISCOVERY +#define BOARD_NAME "ST STM32F4-Discovery" + +/* + * Board frequencies. + * NOTE: The LSE crystal is not fitted by default on the board. + */ +#define STM32_LSECLK 0 +#define STM32_HSECLK 8000000 + +/* + * MCU type as defined in the ST header file stm32l1xx.h. + */ +#define STM32F4XX + +/* + * IO pins assignments. + */ +#define GPIOA_BUTTON 0 +#define GPIOA_LRCK 4 +#define GPIOA_SPC 5 +#define GPIOA_SDO 6 +#define GPIOA_SDA_SDI_SDO 7 +#define GPIOA_VBUS_FS 9 +#define GPIOA_OTG_FS_ID 10 +#define GPIOA_OTG_FS_DM 11 +#define GPIOA_OTG_FS_DP 12 +#define GPIOA_SWDIO 13 +#define GPIOA_SWCLK 14 + +#define GPIOB_SWO 3 +#define GPIOB_SCL 6 +#define GPIOB_SDA 9 +#define GPIOB_SCK 10 + +#define GPIOC_OTG_FS_POWER_ON 0 +#define GPIOC_DOUT 3 +#define GPIOC_MCLK 7 +#define GPIOC_SCLK 10 +#define GPIOC_SDIN 12 + +#define GPIOD_RESET 4 +#define GPIOD_OVER_CURRENT 5 +#define GPIOD_LED4 12 /* Green LED. */ +#define GPIOD_LED3 13 /* Orange LED. */ +#define GPIOD_LED5 14 /* Red LED. */ +#define GPIOD_LED6 15 /* Blue LED. */ + +#define GPIOE_INT1 0 +#define GPIOE_INT2 1 +#define GPIOE_CS_SPI 3 + +#define GPIOH_OSC_IN 0 +#define GPIOH_OSC_OUT 1 + +/* + * I/O ports initial setup, this configuration is established soon after reset + * in the initialization code. + * Please refer to the STM32 Reference Manual for details. + */ +#define PIN_MODE_INPUT(n) (0U << ((n) * 2)) +#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2)) +#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2)) +#define PIN_MODE_ANALOG(n) (3U << ((n) * 2)) +#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) +#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) +#define PIN_OSPEED_2M(n) (0U << ((n) * 2)) +#define PIN_OSPEED_25M(n) (1U << ((n) * 2)) +#define PIN_OSPEED_50M(n) (2U << ((n) * 2)) +#define PIN_OSPEED_100M(n) (3U << ((n) * 2)) +#define PIN_PUDR_FLOATING(n) (0U << ((n) * 2)) +#define PIN_PUDR_PULLUP(n) (1U << ((n) * 2)) +#define PIN_PUDR_PULLDOWN(n) (2U << ((n) * 2)) +#define PIN_AFIO_AF(n, v) ((v)U << ((n % 8) * 4)) + +/* + * Port A setup. + * All input with pull-up except: + * PA0 - GPIOA_BUTTON (input floating). + * PA4 - GPIOA_LRCK (alternate 6). + * PA5 - GPIOA_SPC (alternate 5). + * PA6 - GPIOA_SDO (alternate 5). + * PA7 - GPIOA_SDI (alternate 5). + * PA9 - GPIOA_VBUS_FS (input floating). + * PA10 - GPIOA_OTG_FS_ID (alternate 10). + * PA11 - GPIOA_OTG_FS_DM (alternate 10). + * PA12 - GPIOA_OTG_FS_DP (alternate 10). + * PA13 - GPIOA_SWDIO (alternate 0). + * PA14 - GPIOA_SWCLK (alternate 0). + */ +#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_BUTTON) | \ + PIN_MODE_INPUT(1) | \ + PIN_MODE_INPUT(2) | \ + PIN_MODE_INPUT(3) | \ + PIN_MODE_ALTERNATE(GPIOA_LRCK) | \ + PIN_MODE_ALTERNATE(GPIOA_SPC) | \ + PIN_MODE_ALTERNATE(GPIOA_SDO) | \ + PIN_MODE_ALTERNATE(GPIOA_SDI) | \ + PIN_MODE_INPUT(8) | \ + PIN_MODE_INPUT(GPIOA_VBUS_FS) | \ + PIN_MODE_ALTERNATE(GPIOA_OTG_FS_ID) | \ + PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | \ + PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | \ + PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \ + PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \ + PIN_MODE_INPUT(15)) +#define VAL_GPIOA_OTYPER 0x00000000 +#define VAL_GPIOA_OSPEEDR 0xFFFFFFFF +#define VAL_GPIOA_PUPDR (PIN_PUDR_FLOATING(GPIOA_BUTTON) | \ + PIN_PUDR_PULLUP(1) | \ + PIN_PUDR_PULLUP(2) | \ + PIN_PUDR_PULLUP(3) | \ + PIN_PUDR_FLOATING(GPIOA_LRCK) | \ + PIN_PUDR_FLOATING(GPIOA_SPC) | \ + PIN_PUDR_FLOATING(GPIOA_SDO) | \ + PIN_PUDR_FLOATING(GPIOA_SDI) | \ + PIN_PUDR_PULLUP(8) | \ + PIN_PUDR_FLOATING(GPIOA_VBUS_FS) | \ + PIN_PUDR_FLOATING(GPIOA_OTG_FS_ID) | \ + PIN_PUDR_FLOATING(GPIOA_OTG_FS_DM) | \ + PIN_PUDR_FLOATING(GPIOA_OTG_FS_DP) | \ + PIN_PUDR_PULLUP(GPIOA_SWDIO) | \ + PIN_PUDR_PULLDOWN(GPIOA_SWCLK) | \ + PIN_PUDR_PULLUP(15)) +#define VAL_GPIOA_ODR 0xFFFFFFFF +#define VAL_GPIOA_AFRL (PIN_AFIO_AF(4, 6) | \ + PIN_AFIO_AF(5, 5) | \ + PIN_AFIO_AF(6, 5) | \ + PIN_AFIO_AF(7, 5)) +#define VAL_GPIOA_AFRH (PIN_AFIO_AF(10, 10) | \ + PIN_AFIO_AF(11, 10) | \ + PIN_AFIO_AF(12, 10) | \ + PIN_AFIO_AF(13, 0) | \ + PIN_AFIO_AF(14, 0)) + +/* + * Port B setup. + * All input with pull-up except: + * PB3 - GPIOB_SWO (alternate 0). + * PB6 - GPIOB_SCL (alternate 4). + * PB9 - GPIOB_SDA (alternate 4). + * PB10 - GPIOB_SCK (alternate 5). + */ +#define VAL_GPIOB_MODER (PIN_MODE_INPUT(0) | \ + PIN_MODE_INPUT(1) | \ + PIN_MODE_INPUT(2) | \ + PIN_MODE_ALTERNATE(GPIOB_SWO) | \ + PIN_MODE_INPUT(4) | \ + PIN_MODE_INPUT(5) | \ + PIN_MODE_ALTERNATE(GPIOB_SCL) | \ + PIN_MODE_INPUT(7) | \ + PIN_MODE_INPUT(8) | \ + PIN_MODE_ALTERNATE(GPIOB_SDA) | \ + PIN_MODE_ALTERNATE(GPIOB_SCK) | \ + PIN_MODE_INPUT(11) | \ + PIN_MODE_INPUT(12) | \ + PIN_MODE_INPUT(13) | \ + PIN_MODE_INPUT(14) | \ + PIN_MODE_INPUT(15)) +#define VAL_GPIOB_OTYPER (PIN_OTYPE_OPENDRAIN(GPIOB_SCL) | \ + PIN_OTYPE_OPENDRAIN(GPIOB_SDA)) +#define VAL_GPIOB_OSPEEDR 0xFFFFFFFF +#define VAL_GPIOB_PUPDR (PIN_PUDR_PULLUP(0) | \ + PIN_PUDR_PULLUP(1) | \ + PIN_PUDR_PULLUP(2) | \ + PIN_PUDR_FLOATING(GPIOB_SWO) | \ + PIN_PUDR_PULLUP(4) | \ + PIN_PUDR_PULLUP(5) | \ + PIN_PUDR_FLOATING(GPIOB_SCL) | \ + PIN_PUDR_PULLUP(7) | \ + PIN_PUDR_PULLUP(8) | \ + PIN_PUDR_FLOATING(GPIOB_SDA) | \ + PIN_PUDR_FLOATING(GPIOB_SCK | \ + PIN_PUDR_PULLUP(11) | \ + PIN_PUDR_PULLUP(12) | \ + PIN_PUDR_PULLUP(13) | \ + PIN_PUDR_PULLUP(14) | \ + PIN_PUDR_PULLUP(15)) +#define VAL_GPIOB_ODR 0xFFFFFFFF +#define VAL_GPIOB_AFRL (PIN_AFIO_AF(3, 0) | \ + PIN_AFIO_AF(6, 4)) +#define VAL_GPIOB_AFRH (PIN_AFIO_AF(9, 4) | \ + PIN_AFIO_AF(10, 5)) + +/* + * Port C setup. + * All input with pull-up except: + * PC0 - GPIOC_OTG_FS_POWER_ON (output push-pull). + * PC3 - GPIOC_DOUT (alternate 5). + * PC7 - GPIOC_MCLK (alternate 6). + * PC10 - GPIOC_SCLK (alternate 6). + * PC12 - GPIOC_SDIN (alternate 6). + */ +#define VAL_GPIOC_MODER (PIN_MODE_OUTPUT(GPIOC_OTG_FS_POWER_ON) |\ + PIN_MODE_INPUT(1) | \ + PIN_MODE_INPUT(2) | \ + PIN_MODE_ALTERNATE(GPIOC_DOUT) | \ + PIN_MODE_INPUT(4) | \ + PIN_MODE_INPUT(5) | \ + PIN_MODE_INPUT(6) | \ + PIN_MODE_ALTERNATE(GPIOC_MCLK) | \ + PIN_MODE_INPUT(8) | \ + PIN_MODE_INPUT(9) | \ + PIN_MODE_ALTERNATE(GPIOC_SCLK) | \ + PIN_MODE_INPUT(11) | \ + PIN_MODE_ALTERNATE(GPIOC_SDIN)) \ + PIN_MODE_INPUT(13) | \ + PIN_MODE_INPUT(14) | \ + PIN_MODE_INPUT(15)) +#define VAL_GPIOC_OTYPER 0x00000000 +#define VAL_GPIOC_OSPEEDR 0xFFFFFFFF +#define VAL_GPIOC_PUPDR (PIN_PUDR_FLOATING(GPIOC_OTG_FS_POWER_ON) |\ + PIN_PUDR_PULLUP(1) | \ + PIN_PUDR_PULLUP(2) | \ + PIN_PUDR_FLOATING(GPIOC_DOUT)) | \ + PIN_PUDR_PULLUP(4) | \ + PIN_PUDR_PULLUP(5) | \ + PIN_PUDR_PULLUP(6) | \ + PIN_PUDR_FLOATING(GPIOC_MCLK)) | \ + PIN_PUDR_PULLUP(8) | \ + PIN_PUDR_PULLUP(9) | \ + PIN_PUDR_FLOATING(GPIOC_SCLK)) | \ + PIN_PUDR_PULLUP(11) | \ + PIN_PUDR_FLOATING(GPIOC_SDIN)) | \ + PIN_PUDR_PULLUP(13) | \ + PIN_PUDR_PULLUP(14) | \ + PIN_PUDR_PULLUP(15)) +#define VAL_GPIOC_ODR 0xFFFFFFFF +#define VAL_GPIOC_AFRL (PIN_AFIO_AF(3, 5) | \ + PIN_AFIO_AF(7, 6)) +#define VAL_GPIOC_AFRH (PIN_AFIO_AF(10, 6) | \ + PIN_AFIO_AF(12, 6)) + +/* + * Port D setup. + * All input with pull-up except: + * PD4 - GPIOD_RESET (output push-pull). + * PD5 - GPIOD_OVER_CURRENT (input floating). + * PD12 - GPIOD_LED4 (output push-pull). + * PD13 - GPIOD_LED3 (output push-pull). + * PD14 - GPIOD_LED5 (output push-pull). + * PD15 - GPIOD_LED6 (output push-pull). + */ +#define VAL_GPIOD_MODER (PIN_MODE_INPUT(0) | \ + PIN_MODE_INPUT(1) | \ + PIN_MODE_INPUT(2) | \ + PIN_MODE_INPUT(3) | \ + PIN_MODE_OUTPUT(GPIOD_RESET) | \ + PIN_MODE_INPUT(GPIOD_OVER_CURRENT) | \ + PIN_MODE_INPUT(6) | \ + PIN_MODE_INPUT(7) | \ + PIN_MODE_INPUT(8) | \ + PIN_MODE_INPUT(9) | \ + PIN_MODE_INPUT(10) | \ + PIN_MODE_INPUT(11) | \ + PIN_MODE_INPUT(GPIOD_LED4) | \ + PIN_MODE_INPUT(GPIOD_LED3) | \ + PIN_MODE_INPUT(GPIOD_LED5) | \ + PIN_MODE_INPUT(GPIOD_LED6)) +#define VAL_GPIOD_OTYPER 0x00000000 +#define VAL_GPIOD_OSPEEDR 0xFFFFFFFF +#define VAL_GPIOD_PUPDR (PIN_PUDR_PULLUP(0) | \ + PIN_PUDR_PULLUP(1) | \ + PIN_PUDR_PULLUP(2) | \ + PIN_PUDR_PULLUP(3) | \ + PIN_PUDR_FLOATING(GPIOD_RESET) | \ + PIN_PUDR_FLOATING(GPIOD_OVER_CURRENT) |\ + PIN_PUDR_PULLUP(6) | \ + PIN_PUDR_PULLUP(7) | \ + PIN_PUDR_PULLUP(8) | \ + PIN_PUDR_PULLUP(9) | \ + PIN_PUDR_PULLUP(10) | \ + PIN_PUDR_PULLUP(11) | \ + PIN_PUDR_FLOATING(GPIOD_LED4) | \ + PIN_PUDR_FLOATING(GPIOD_LED3) | \ + PIN_PUDR_FLOATING(GPIOD_LED5) | \ + PIN_PUDR_FLOATING(GPIOD_LED6)) +#define VAL_GPIOD_ODR 0x0FFFFFCF +#define VAL_GPIOD_AFRL 0x00000000 +#define VAL_GPIOD_AFRH 0x00000000 + +/* + * Port E setup. + * All input with pull-up except: + * PE0 - GPIOE_INT1 (input floating). + * PE1 - GPIOE_INT2 (input floating). + * PE3 - GPIOE_CS_SPI (output push-pull). + */ +#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_INT1) | \ + PIN_MODE_INPUT(GPIOE_INT2) | \ + PIN_MODE_INPUT(2) | \ + PIN_MODE_INPUT(GPIOE_CS_SPI) | \ + PIN_MODE_INPUT(4) | \ + PIN_MODE_INPUT(5) | \ + PIN_MODE_INPUT(6) | \ + PIN_MODE_INPUT(7) | \ + PIN_MODE_INPUT(8) | \ + PIN_MODE_INPUT(9) | \ + PIN_MODE_INPUT(10) | \ + PIN_MODE_INPUT(11) | \ + PIN_MODE_INPUT(12) | \ + PIN_MODE_INPUT(13) | \ + PIN_MODE_INPUT(14) | \ + PIN_MODE_INPUT(15)) +#define VAL_GPIOE_OTYPER 0x00000000 +#define VAL_GPIOE_OSPEEDR 0xFFFFFFFF +#define VAL_GPIOE_PUPDR (PIN_PUDR_FLOATING(0GPIOE_INT1) | \ + PIN_PUDR_FLOATING(GPIOE_INT2) | \ + PIN_PUDR_PULLUP(2) | \ + PIN_PUDR_FLOATING(GPIOE_CS_SPI) | \ + PIN_PUDR_PULLUP(4) | \ + PIN_PUDR_PULLUP(5) | \ + PIN_PUDR_PULLUP(6) | \ + PIN_PUDR_PULLUP(7) | \ + PIN_PUDR_PULLUP(8) | \ + PIN_PUDR_PULLUP(9) | \ + PIN_PUDR_PULLUP(10) | \ + PIN_PUDR_PULLUP(11) | \ + PIN_PUDR_PULLUP(12) | \ + PIN_PUDR_PULLUP(13) | \ + PIN_PUDR_PULLUP(14) | \ + PIN_PUDR_PULLUP(15)) +#define VAL_GPIOE_ODR 0xFFFFFFFF +#define VAL_GPIOE_AFRL 0x00000000 +#define VAL_GPIOE_AFRH 0x00000000 + +/* + * Port F setup. + * All input with pull-up. + */ +#define VAL_GPIOF_MODER 0x00000000 +#define VAL_GPIOF_OTYPER 0x00000000 +#define VAL_GPIOF_OSPEEDR 0xFFFFFFFF +#define VAL_GPIOF_PUPDR 0xFFFFFFFF +#define VAL_GPIOF_ODR 0xFFFFFFFF +#define VAL_GPIOF_AFRL 0x00000000 +#define VAL_GPIOF_AFRH 0x00000000 + +/* + * Port G setup. + * All input with pull-up. + */ +#define VAL_GPIOG_MODER 0x00000000 +#define VAL_GPIOG_OTYPER 0x00000000 +#define VAL_GPIOG_OSPEEDR 0xFFFFFFFF +#define VAL_GPIOG_PUPDR 0xFFFFFFFF +#define VAL_GPIOG_ODR 0xFFFFFFFF +#define VAL_GPIOG_AFRL 0x00000000 +#define VAL_GPIOG_AFRH 0x00000000 + +/* + * Port H setup. + * All input with pull-up except: + * PH0 - GPIOH_OSC_IN (input floating). + * PH1 - GPIOH_OSC_OUT (input floating). + */ +#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | \ + PIN_MODE_INPUT(GPIOH_OSC_OUT) | \ + PIN_MODE_INPUT(2) | \ + PIN_MODE_INPUT(3) | \ + PIN_MODE_INPUT(4) | \ + PIN_MODE_INPUT(5) | \ + PIN_MODE_INPUT(6) | \ + PIN_MODE_INPUT(7) | \ + PIN_MODE_INPUT(8) | \ + PIN_MODE_INPUT(9) | \ + PIN_MODE_INPUT(10) | \ + PIN_MODE_INPUT(11) | \ + PIN_MODE_INPUT(12) | \ + PIN_MODE_INPUT(13) | \ + PIN_MODE_INPUT(14) | \ + PIN_MODE_INPUT(15)) +#define VAL_GPIOH_OTYPER 0x00000000 +#define VAL_GPIOH_OSPEEDR 0xFFFFFFFF +#define VAL_GPIOH_PUPDR (PIN_PUDR_FLOATING(GPIOH_OSC_IN) | \ + PIN_PUDR_FLOATING(GPIOH_OSC_OUT) | \ + PIN_PUDR_PULLUP(2) | \ + PIN_PUDR_PULLUP(3) | \ + PIN_PUDR_PULLUP(4) | \ + PIN_PUDR_PULLUP(5) | \ + PIN_PUDR_PULLUP(6) | \ + PIN_PUDR_PULLUP(7) | \ + PIN_PUDR_PULLUP(8) | \ + PIN_PUDR_PULLUP(9) | \ + PIN_PUDR_PULLUP(10) | \ + PIN_PUDR_PULLUP(11) | \ + PIN_PUDR_PULLUP(12) | \ + PIN_PUDR_PULLUP(13) | \ + PIN_PUDR_PULLUP(14) | \ + PIN_PUDR_PULLUP(15)) +#define VAL_GPIOH_ODR 0xFFFFFFFF +#define VAL_GPIOH_AFRL 0x00000000 +#define VAL_GPIOH_AFRH 0x00000000 + +/* + * Port I setup. + * All input with pull-up. + */ +#define VAL_GPIOI_MODER 0x00000000 +#define VAL_GPIOI_OTYPER 0x00000000 +#define VAL_GPIOI_OSPEEDR 0xFFFFFFFF +#define VAL_GPIOI_PUPDR 0xFFFFFFFF +#define VAL_GPIOI_ODR 0xFFFFFFFF +#define VAL_GPIOI_AFRL 0x00000000 +#define VAL_GPIOI_AFRH 0x00000000 + +#if !defined(_FROM_ASM_) +#ifdef __cplusplus +extern "C" { +#endif + void boardInit(void); +#ifdef __cplusplus +} +#endif +#endif /* _FROM_ASM_ */ + +#endif /* _BOARD_H_ */ diff --git a/boards/ST_STM32F4_DISCOVERY/board.mk b/boards/ST_STM32F4_DISCOVERY/board.mk new file mode 100644 index 000000000..eb47aa2af --- /dev/null +++ b/boards/ST_STM32F4_DISCOVERY/board.mk @@ -0,0 +1,5 @@ +# List of all the board related files. +BOARDSRC = ${CHIBIOS}/boards/ST_STM32F4_DISCOVERY/board.c + +# Required include directories +BOARDINC = ${CHIBIOS}/boards/ST_STM32F4_DISCOVERY diff --git a/boards/ST_STM32L_DISCOVERY/board.h b/boards/ST_STM32L_DISCOVERY/board.h index f91998a59..6326c5e4d 100644 --- a/boards/ST_STM32L_DISCOVERY/board.h +++ b/boards/ST_STM32L_DISCOVERY/board.h @@ -22,13 +22,13 @@ #define _BOARD_H_ /* - * Setup for STMicroelectronics STM32VL-Discovery board. + * Setup for STMicroelectronics STM32L-Discovery board. */ /* * Board identifier. */ -#define BOARD_ST_STM32VL_DISCOVERY +#define BOARD_ST_STM32L_DISCOVERY #define BOARD_NAME "ST STM32L-Discovery" /* @@ -69,22 +69,7 @@ #define PIN_PUDR_FLOATING(n) (0U << ((n) * 2)) #define PIN_PUDR_PULLUP(n) (1U << ((n) * 2)) #define PIN_PUDR_PULLDOWN(n) (2U << ((n) * 2)) -#define PIN_AFIO_AF0(n) (0U << ((n % 8) * 4)) -#define PIN_AFIO_AF1(n) (1U << ((n % 8) * 4)) -#define PIN_AFIO_AF2(n) (2U << ((n % 8) * 4)) -#define PIN_AFIO_AF3(n) (3U << ((n % 8) * 4)) -#define PIN_AFIO_AF4(n) (4U << ((n % 8) * 4)) -#define PIN_AFIO_AF5(n) (5U << ((n % 8) * 4)) -#define PIN_AFIO_AF6(n) (6U << ((n % 8) * 4)) -#define PIN_AFIO_AF7(n) (7U << ((n % 8) * 4)) -#define PIN_AFIO_AF8(n) (8U << ((n % 8) * 4)) -#define PIN_AFIO_AF9(n) (9U << ((n % 8) * 4)) -#define PIN_AFIO_AF10(n) (10U << ((n % 8) * 4)) -#define PIN_AFIO_AF11(n) (11U << ((n % 8) * 4)) -#define PIN_AFIO_AF12(n) (12U << ((n % 8) * 4)) -#define PIN_AFIO_AF13(n) (13U << ((n % 8) * 4)) -#define PIN_AFIO_AF14(n) (14U << ((n % 8) * 4)) -#define PIN_AFIO_AF15(n) (15U << ((n % 8) * 4)) +#define PIN_AFIO_AF(n, v) ((v)U << ((n % 8) * 4)) /* * Port A setup. -- cgit v1.2.3 From bf185be2602528df7dd0f388b350cb71a378a1ce Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 3 Nov 2011 21:58:23 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3465 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- boards/ST_STM32F4_DISCOVERY/board.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'boards') diff --git a/boards/ST_STM32F4_DISCOVERY/board.h b/boards/ST_STM32F4_DISCOVERY/board.h index b3d2f23e7..30742b9af 100644 --- a/boards/ST_STM32F4_DISCOVERY/board.h +++ b/boards/ST_STM32F4_DISCOVERY/board.h @@ -233,7 +233,7 @@ PIN_MODE_INPUT(9) | \ PIN_MODE_ALTERNATE(GPIOC_SCLK) | \ PIN_MODE_INPUT(11) | \ - PIN_MODE_ALTERNATE(GPIOC_SDIN)) \ + PIN_MODE_ALTERNATE(GPIOC_SDIN) | \ PIN_MODE_INPUT(13) | \ PIN_MODE_INPUT(14) | \ PIN_MODE_INPUT(15)) @@ -242,16 +242,16 @@ #define VAL_GPIOC_PUPDR (PIN_PUDR_FLOATING(GPIOC_OTG_FS_POWER_ON) |\ PIN_PUDR_PULLUP(1) | \ PIN_PUDR_PULLUP(2) | \ - PIN_PUDR_FLOATING(GPIOC_DOUT)) | \ + PIN_PUDR_FLOATING(GPIOC_DOUT) | \ PIN_PUDR_PULLUP(4) | \ PIN_PUDR_PULLUP(5) | \ PIN_PUDR_PULLUP(6) | \ - PIN_PUDR_FLOATING(GPIOC_MCLK)) | \ + PIN_PUDR_FLOATING(GPIOC_MCLK) | \ PIN_PUDR_PULLUP(8) | \ PIN_PUDR_PULLUP(9) | \ - PIN_PUDR_FLOATING(GPIOC_SCLK)) | \ + PIN_PUDR_FLOATING(GPIOC_SCLK) | \ PIN_PUDR_PULLUP(11) | \ - PIN_PUDR_FLOATING(GPIOC_SDIN)) | \ + PIN_PUDR_FLOATING(GPIOC_SDIN) | \ PIN_PUDR_PULLUP(13) | \ PIN_PUDR_PULLUP(14) | \ PIN_PUDR_PULLUP(15)) -- cgit v1.2.3 From ba89f675a2affeaa66f06c31085ecc95b88e25df Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 4 Nov 2011 20:20:36 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3466 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- boards/ST_STM32F4_DISCOVERY/board.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'boards') diff --git a/boards/ST_STM32F4_DISCOVERY/board.h b/boards/ST_STM32F4_DISCOVERY/board.h index 30742b9af..00940a684 100644 --- a/boards/ST_STM32F4_DISCOVERY/board.h +++ b/boards/ST_STM32F4_DISCOVERY/board.h @@ -38,6 +38,12 @@ #define STM32_LSECLK 0 #define STM32_HSECLK 8000000 +/* + * Board voltages. + * Required for performance limits calculation. + */ +#define STM32_VDD 300 + /* * MCU type as defined in the ST header file stm32l1xx.h. */ -- cgit v1.2.3 From cdf83ce254198264167a1102c9c615b141b3c1dd Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 5 Nov 2011 14:40:48 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3472 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- boards/ST_STM32F4_DISCOVERY/board.c | 5 ++++- boards/ST_STM32F4_DISCOVERY/board.h | 8 ++++---- 2 files changed, 8 insertions(+), 5 deletions(-) (limited to 'boards') diff --git a/boards/ST_STM32F4_DISCOVERY/board.c b/boards/ST_STM32F4_DISCOVERY/board.c index 4a93dada2..efb8ef566 100644 --- a/boards/ST_STM32F4_DISCOVERY/board.c +++ b/boards/ST_STM32F4_DISCOVERY/board.c @@ -34,7 +34,10 @@ const PALConfig pal_default_config = {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, - {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH} + {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, + {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, + {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, + {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} }; #endif diff --git a/boards/ST_STM32F4_DISCOVERY/board.h b/boards/ST_STM32F4_DISCOVERY/board.h index 00940a684..cd1b64552 100644 --- a/boards/ST_STM32F4_DISCOVERY/board.h +++ b/boards/ST_STM32F4_DISCOVERY/board.h @@ -56,7 +56,7 @@ #define GPIOA_LRCK 4 #define GPIOA_SPC 5 #define GPIOA_SDO 6 -#define GPIOA_SDA_SDI_SDO 7 +#define GPIOA_SDI 7 #define GPIOA_VBUS_FS 9 #define GPIOA_OTG_FS_ID 10 #define GPIOA_OTG_FS_DM 11 @@ -107,7 +107,7 @@ #define PIN_PUDR_FLOATING(n) (0U << ((n) * 2)) #define PIN_PUDR_PULLUP(n) (1U << ((n) * 2)) #define PIN_PUDR_PULLDOWN(n) (2U << ((n) * 2)) -#define PIN_AFIO_AF(n, v) ((v)U << ((n % 8) * 4)) +#define PIN_AFIO_AF(n, v) ((v##U) << ((n % 8) * 4)) /* * Port A setup. @@ -206,7 +206,7 @@ PIN_PUDR_PULLUP(7) | \ PIN_PUDR_PULLUP(8) | \ PIN_PUDR_FLOATING(GPIOB_SDA) | \ - PIN_PUDR_FLOATING(GPIOB_SCK | \ + PIN_PUDR_FLOATING(GPIOB_SCK) | \ PIN_PUDR_PULLUP(11) | \ PIN_PUDR_PULLUP(12) | \ PIN_PUDR_PULLUP(13) | \ @@ -340,7 +340,7 @@ PIN_MODE_INPUT(15)) #define VAL_GPIOE_OTYPER 0x00000000 #define VAL_GPIOE_OSPEEDR 0xFFFFFFFF -#define VAL_GPIOE_PUPDR (PIN_PUDR_FLOATING(0GPIOE_INT1) | \ +#define VAL_GPIOE_PUPDR (PIN_PUDR_FLOATING(GPIOE_INT1) | \ PIN_PUDR_FLOATING(GPIOE_INT2) | \ PIN_PUDR_PULLUP(2) | \ PIN_PUDR_FLOATING(GPIOE_CS_SPI) | \ -- cgit v1.2.3 From 9e51498e1196b28e5c073a7505df2ae08f05b59a Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 6 Nov 2011 09:39:57 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3474 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- boards/ST_STM32F4_DISCOVERY/board.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'boards') diff --git a/boards/ST_STM32F4_DISCOVERY/board.h b/boards/ST_STM32F4_DISCOVERY/board.h index cd1b64552..227f96ce9 100644 --- a/boards/ST_STM32F4_DISCOVERY/board.h +++ b/boards/ST_STM32F4_DISCOVERY/board.h @@ -289,10 +289,10 @@ PIN_MODE_INPUT(9) | \ PIN_MODE_INPUT(10) | \ PIN_MODE_INPUT(11) | \ - PIN_MODE_INPUT(GPIOD_LED4) | \ - PIN_MODE_INPUT(GPIOD_LED3) | \ - PIN_MODE_INPUT(GPIOD_LED5) | \ - PIN_MODE_INPUT(GPIOD_LED6)) + PIN_MODE_OUTPUT(GPIOD_LED4) | \ + PIN_MODE_OUTPUT(GPIOD_LED3) | \ + PIN_MODE_OUTPUT(GPIOD_LED5) | \ + PIN_MODE_OUTPUT(GPIOD_LED6)) #define VAL_GPIOD_OTYPER 0x00000000 #define VAL_GPIOD_OSPEEDR 0xFFFFFFFF #define VAL_GPIOD_PUPDR (PIN_PUDR_PULLUP(0) | \ @@ -311,7 +311,7 @@ PIN_PUDR_FLOATING(GPIOD_LED3) | \ PIN_PUDR_FLOATING(GPIOD_LED5) | \ PIN_PUDR_FLOATING(GPIOD_LED6)) -#define VAL_GPIOD_ODR 0x0FFFFFCF +#define VAL_GPIOD_ODR 0x00000FCF #define VAL_GPIOD_AFRL 0x00000000 #define VAL_GPIOD_AFRH 0x00000000 -- cgit v1.2.3 From 30e29ea2155b522e962cd2778cb001089feb58c5 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 12 Nov 2011 10:10:52 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3488 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- boards/ST_STM32F4_DISCOVERY/board.h | 42 +++++++++++++++++-------------------- 1 file changed, 19 insertions(+), 23 deletions(-) (limited to 'boards') diff --git a/boards/ST_STM32F4_DISCOVERY/board.h b/boards/ST_STM32F4_DISCOVERY/board.h index 227f96ce9..d93e4a125 100644 --- a/boards/ST_STM32F4_DISCOVERY/board.h +++ b/boards/ST_STM32F4_DISCOVERY/board.h @@ -159,15 +159,15 @@ PIN_PUDR_PULLDOWN(GPIOA_SWCLK) | \ PIN_PUDR_PULLUP(15)) #define VAL_GPIOA_ODR 0xFFFFFFFF -#define VAL_GPIOA_AFRL (PIN_AFIO_AF(4, 6) | \ - PIN_AFIO_AF(5, 5) | \ - PIN_AFIO_AF(6, 5) | \ - PIN_AFIO_AF(7, 5)) -#define VAL_GPIOA_AFRH (PIN_AFIO_AF(10, 10) | \ - PIN_AFIO_AF(11, 10) | \ - PIN_AFIO_AF(12, 10) | \ - PIN_AFIO_AF(13, 0) | \ - PIN_AFIO_AF(14, 0)) +#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_LRCK, 6) | \ + PIN_AFIO_AF(GPIOA_SPC, 5) | \ + PIN_AFIO_AF(GPIOA_SDO, 5) | \ + PIN_AFIO_AF(GPIOA_SDI, 5)) +#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_OTG_FS_ID, 10) | \ + PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10) | \ + PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10) | \ + PIN_AFIO_AF(GPIOA_SWDIO, 0) | \ + PIN_AFIO_AF(GPIOA_SWCLK, 0)) /* * Port B setup. @@ -175,7 +175,6 @@ * PB3 - GPIOB_SWO (alternate 0). * PB6 - GPIOB_SCL (alternate 4). * PB9 - GPIOB_SDA (alternate 4). - * PB10 - GPIOB_SCK (alternate 5). */ #define VAL_GPIOB_MODER (PIN_MODE_INPUT(0) | \ PIN_MODE_INPUT(1) | \ @@ -187,7 +186,7 @@ PIN_MODE_INPUT(7) | \ PIN_MODE_INPUT(8) | \ PIN_MODE_ALTERNATE(GPIOB_SDA) | \ - PIN_MODE_ALTERNATE(GPIOB_SCK) | \ + PIN_MODE_INPUT(10) | \ PIN_MODE_INPUT(11) | \ PIN_MODE_INPUT(12) | \ PIN_MODE_INPUT(13) | \ @@ -206,23 +205,21 @@ PIN_PUDR_PULLUP(7) | \ PIN_PUDR_PULLUP(8) | \ PIN_PUDR_FLOATING(GPIOB_SDA) | \ - PIN_PUDR_FLOATING(GPIOB_SCK) | \ + PIN_PUDR_PULLUP(10) | \ PIN_PUDR_PULLUP(11) | \ PIN_PUDR_PULLUP(12) | \ PIN_PUDR_PULLUP(13) | \ PIN_PUDR_PULLUP(14) | \ PIN_PUDR_PULLUP(15)) #define VAL_GPIOB_ODR 0xFFFFFFFF -#define VAL_GPIOB_AFRL (PIN_AFIO_AF(3, 0) | \ - PIN_AFIO_AF(6, 4)) -#define VAL_GPIOB_AFRH (PIN_AFIO_AF(9, 4) | \ - PIN_AFIO_AF(10, 5)) +#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_SWO, 0) | \ + PIN_AFIO_AF(GPIOB_SCL, 4)) +#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_SDA, 4)) /* * Port C setup. * All input with pull-up except: * PC0 - GPIOC_OTG_FS_POWER_ON (output push-pull). - * PC3 - GPIOC_DOUT (alternate 5). * PC7 - GPIOC_MCLK (alternate 6). * PC10 - GPIOC_SCLK (alternate 6). * PC12 - GPIOC_SDIN (alternate 6). @@ -230,7 +227,7 @@ #define VAL_GPIOC_MODER (PIN_MODE_OUTPUT(GPIOC_OTG_FS_POWER_ON) |\ PIN_MODE_INPUT(1) | \ PIN_MODE_INPUT(2) | \ - PIN_MODE_ALTERNATE(GPIOC_DOUT) | \ + PIN_MODE_INPUT(3) | \ PIN_MODE_INPUT(4) | \ PIN_MODE_INPUT(5) | \ PIN_MODE_INPUT(6) | \ @@ -248,7 +245,7 @@ #define VAL_GPIOC_PUPDR (PIN_PUDR_FLOATING(GPIOC_OTG_FS_POWER_ON) |\ PIN_PUDR_PULLUP(1) | \ PIN_PUDR_PULLUP(2) | \ - PIN_PUDR_FLOATING(GPIOC_DOUT) | \ + PIN_PUDR_PULLUP(3) | \ PIN_PUDR_PULLUP(4) | \ PIN_PUDR_PULLUP(5) | \ PIN_PUDR_PULLUP(6) | \ @@ -262,10 +259,9 @@ PIN_PUDR_PULLUP(14) | \ PIN_PUDR_PULLUP(15)) #define VAL_GPIOC_ODR 0xFFFFFFFF -#define VAL_GPIOC_AFRL (PIN_AFIO_AF(3, 5) | \ - PIN_AFIO_AF(7, 6)) -#define VAL_GPIOC_AFRH (PIN_AFIO_AF(10, 6) | \ - PIN_AFIO_AF(12, 6)) +#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_MCLK, 6)) +#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_SCLK, 6) | \ + PIN_AFIO_AF(GPIOC_SDIN, 6)) /* * Port D setup. -- cgit v1.2.3 From 0132b4812df3bc3b8c2df9dbea6b75c372ed3453 Mon Sep 17 00:00:00 2001 From: barthess Date: Sat, 26 Nov 2011 15:47:19 +0000 Subject: Fixed mistype in comment. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3528 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- boards/OLIMEX_STM32_103STK/board.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'boards') diff --git a/boards/OLIMEX_STM32_103STK/board.h b/boards/OLIMEX_STM32_103STK/board.h index a53695906..e8fd9e7dc 100644 --- a/boards/OLIMEX_STM32_103STK/board.h +++ b/boards/OLIMEX_STM32_103STK/board.h @@ -22,7 +22,7 @@ #define _BOARD_H_ /* - * Setup for the Olimex STM33-P103 proto board. + * Setup for the Olimex STM32-103STK proto board. */ /* -- cgit v1.2.3 From 8ab75bd9f7f15dd9cda6719808555663626eadbd Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 27 Nov 2011 11:00:04 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3539 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- boards/ST_STM32F4_DISCOVERY/board.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'boards') diff --git a/boards/ST_STM32F4_DISCOVERY/board.h b/boards/ST_STM32F4_DISCOVERY/board.h index d93e4a125..6a7eb49d6 100644 --- a/boards/ST_STM32F4_DISCOVERY/board.h +++ b/boards/ST_STM32F4_DISCOVERY/board.h @@ -45,7 +45,7 @@ #define STM32_VDD 300 /* - * MCU type as defined in the ST header file stm32l1xx.h. + * MCU type as defined in the ST header file stm32f4xx.h. */ #define STM32F4XX -- cgit v1.2.3 From a8a85358455c96d2ca9acd4697b25cc746ebb359 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 3 Dec 2011 07:46:27 +0000 Subject: Fixed bug 3449076. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3551 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- boards/ST_STM3220G_EVAL/board.h | 21 +++------------------ boards/ST_STM32L_DISCOVERY/board.h | 2 +- 2 files changed, 4 insertions(+), 19 deletions(-) (limited to 'boards') diff --git a/boards/ST_STM3220G_EVAL/board.h b/boards/ST_STM3220G_EVAL/board.h index e10a5203c..219a9a738 100644 --- a/boards/ST_STM3220G_EVAL/board.h +++ b/boards/ST_STM3220G_EVAL/board.h @@ -84,22 +84,7 @@ #define PIN_PUDR_FLOATING(n) (0 << ((n) * 2)) #define PIN_PUDR_PULLUP(n) (1 << ((n) * 2)) #define PIN_PUDR_PULLDOWN(n) (2 << ((n) * 2)) -#define PIN_AFIO_AF0(n) (0 << ((n % 8) * 4)) -#define PIN_AFIO_AF1(n) (1 << ((n % 8) * 4)) -#define PIN_AFIO_AF2(n) (2 << ((n % 8) * 4)) -#define PIN_AFIO_AF3(n) (3 << ((n % 8) * 4)) -#define PIN_AFIO_AF4(n) (4 << ((n % 8) * 4)) -#define PIN_AFIO_AF5(n) (5 << ((n % 8) * 4)) -#define PIN_AFIO_AF6(n) (6 << ((n % 8) * 4)) -#define PIN_AFIO_AF7(n) (7 << ((n % 8) * 4)) -#define PIN_AFIO_AF8(n) (8 << ((n % 8) * 4)) -#define PIN_AFIO_AF9(n) (9 << ((n % 8) * 4)) -#define PIN_AFIO_AF10(n) (10 << ((n % 8) * 4)) -#define PIN_AFIO_AF11(n) (11 << ((n % 8) * 4)) -#define PIN_AFIO_AF12(n) (12 << ((n % 8) * 4)) -#define PIN_AFIO_AF13(n) (13 << ((n % 8) * 4)) -#define PIN_AFIO_AF14(n) (14 << ((n % 8) * 4)) -#define PIN_AFIO_AF15(n) (15 << ((n % 8) * 4)) +#define PIN_AFIO_AF(n, v) ((v##U) << ((n % 8) * 4)) /* * Port A setup. @@ -157,8 +142,8 @@ PIN_PUDR_FLOATING(15))) #define VAL_GPIOC_ODR 0xFFFFFFFF #define VAL_GPIOC_AFRL 0x00000000 -#define VAL_GPIOC_AFRH (PIN_AFIO_AF7(10) | \ - PIN_AFIO_AF7(11)) +#define VAL_GPIOC_AFRH (PIN_AFIO_AF(7, 10) | \ + PIN_AFIO_AF(7, 11)) /* * Port D setup. diff --git a/boards/ST_STM32L_DISCOVERY/board.h b/boards/ST_STM32L_DISCOVERY/board.h index 6326c5e4d..978d91456 100644 --- a/boards/ST_STM32L_DISCOVERY/board.h +++ b/boards/ST_STM32L_DISCOVERY/board.h @@ -69,7 +69,7 @@ #define PIN_PUDR_FLOATING(n) (0U << ((n) * 2)) #define PIN_PUDR_PULLUP(n) (1U << ((n) * 2)) #define PIN_PUDR_PULLDOWN(n) (2U << ((n) * 2)) -#define PIN_AFIO_AF(n, v) ((v)U << ((n % 8) * 4)) +#define PIN_AFIO_AF(n, v) ((v##U) << ((n % 8) * 4)) /* * Port A setup. -- cgit v1.2.3