From 25acf389b0475d90c8d3fcb2ed0eb24bc15b1287 Mon Sep 17 00:00:00 2001
From: barthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4>
Date: Thu, 8 Nov 2012 07:29:55 +0000
Subject: AT91SAM7A3. Initial commit.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4799 35acf78f-673a-0410-8e92-d51de3d6d3f4
---
 boards/STUDIEL_AT91SAM7A3_EK/board.c | 113 +++++++++++++++++++++++++++++++++++
 1 file changed, 113 insertions(+)
 create mode 100755 boards/STUDIEL_AT91SAM7A3_EK/board.c

(limited to 'boards/STUDIEL_AT91SAM7A3_EK/board.c')

diff --git a/boards/STUDIEL_AT91SAM7A3_EK/board.c b/boards/STUDIEL_AT91SAM7A3_EK/board.c
new file mode 100755
index 000000000..fd94d8a81
--- /dev/null
+++ b/boards/STUDIEL_AT91SAM7A3_EK/board.c
@@ -0,0 +1,113 @@
+/*
+    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+                 2011,2012 Giovanni Di Sirio.
+
+    This file is part of ChibiOS/RT.
+
+    ChibiOS/RT is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3 of the License, or
+    (at your option) any later version.
+
+    ChibiOS/RT is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#include "ch.h"
+#include "hal.h"
+
+/**
+ * @brief   PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ *          This variable is used by the HAL when initializing the PAL driver.
+ */
+#if HAL_USE_PAL || defined(__DOXYGEN__)
+const PALConfig pal_default_config =
+{
+  {VAL_PIOA_ODSR, VAL_PIOA_OSR, VAL_PIOA_PUSR},
+#if (SAM7_PLATFORM == SAM7X128) || (SAM7_PLATFORM == SAM7X256) || \
+    (SAM7_PLATFORM == SAM7X512) || (SAM7_PLATFORM == SAM7A3)
+  {VAL_PIOB_ODSR, VAL_PIOB_OSR, VAL_PIOB_PUSR}
+#endif
+};
+#endif
+
+/*
+ * SYS IRQ handling here.
+ */
+static CH_IRQ_HANDLER(SYSIrqHandler) {
+
+  CH_IRQ_PROLOGUE();
+
+  if (AT91C_BASE_PITC->PITC_PISR & AT91C_PITC_PITS) {
+    (void) AT91C_BASE_PITC->PITC_PIVR;
+    chSysLockFromIsr();
+    chSysTimerHandlerI();
+    chSysUnlockFromIsr();
+  }
+  
+#if USE_SAM7_DBGU_UART
+  if (AT91C_BASE_DBGU->DBGU_CSR & 
+    (AT91C_US_RXRDY | AT91C_US_TXRDY | AT91C_US_PARE | AT91C_US_FRAME | AT91C_US_OVRE | AT91C_US_RXBRK)) {
+    sd_lld_serve_interrupt(&SDDBG);
+  }
+#endif  
+  AT91C_BASE_AIC->AIC_EOICR = 0;
+  CH_IRQ_EPILOGUE();
+}
+
+/*
+ * Early initialization code.
+ * This initialization must be performed just after stack setup and before
+ * any other initialization.
+ */
+void __early_init(void) {
+  
+  /* Watchdog disabled.*/
+  AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;
+  
+  at91sam7_clock_init();
+}
+
+#if HAL_USE_MMC_SPI
+/* Board-related functions related to the MMC_SPI driver.*/
+bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
+
+  (void)mmcp;
+  return !palReadPad(IOPORT2, PIOB_MMC_CP);
+}
+
+bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
+
+  (void)mmcp;
+  return palReadPad(IOPORT2, PIOB_MMC_WP);
+}
+#endif
+
+/*
+ * Board-specific initialization code.
+ */
+void boardInit(void) {
+
+  /*
+   * PIT Initialization.
+   */
+  AIC_ConfigureIT(AT91C_ID_SYS,
+                  AT91C_AIC_SRCTYPE_HIGH_LEVEL | (AT91C_AIC_PRIOR_HIGHEST - 1),
+                  SYSIrqHandler);
+  AIC_EnableIT(AT91C_ID_SYS);
+  AT91C_BASE_PITC->PITC_PIMR = (MCK / 16 / CH_FREQUENCY) - 1;
+  AT91C_BASE_PITC->PITC_PIMR |= AT91C_PITC_PITEN | AT91C_PITC_PITIEN;
+
+  /*
+   * RTS/CTS pins enabled for USART0 only.
+   */
+  AT91C_BASE_PIOA->PIO_PDR   = AT91C_PA3_RTS0 | AT91C_PA4_CTS0;
+  AT91C_BASE_PIOA->PIO_ASR   = AT91C_PIO_PA3 | AT91C_PIO_PA4;
+  AT91C_BASE_PIOA->PIO_PPUDR = AT91C_PIO_PA3 | AT91C_PIO_PA4;
+}
-- 
cgit v1.2.3